44 changes: 22 additions & 22 deletions clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -141,7 +141,7 @@ struct S {
// CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK1-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 33, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*))
// CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates*
// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP6]], i32 0, i32 0
Expand Down Expand Up @@ -260,7 +260,7 @@ struct S {
// CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
// CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
// CHECK1: omp_if.then:
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK1-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.1*)* @.omp_task_entry..4 to i32 (i32, i8*)*))
// CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates.1*
// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], %struct.kmp_task_t_with_privates.1* [[TMP6]], i32 0, i32 0
Expand Down Expand Up @@ -399,7 +399,7 @@ struct S {
// CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP8]], align 8
// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 2
// CHECK1-NEXT: store i8*** [[TMP2]], i8**** [[TMP9]], align 8
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK1-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP1]], align 4
// CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR_5]], align 4
Expand Down Expand Up @@ -438,7 +438,7 @@ struct S {
// CHECK1-NEXT: [[TMP26:%.*]] = bitcast %struct.anon.2* [[AGG_CAPTURED]] to i8*
// CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP25]], i8* align 8 [[TMP26]], i64 24, i1 false)
// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP22]], i32 0, i32 1
// CHECK1-NEXT: [[TMP28:%.*]] = load i8, i8* [[CONV]], align 8
// CHECK1-NEXT: [[TMP28:%.*]] = load i8, i8* [[CONV]], align 1
// CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP28]] to i1
// CHECK1-NEXT: [[TMP29:%.*]] = sext i1 [[TOBOOL]] to i32
// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP23]], i32 0, i32 5
Expand Down Expand Up @@ -746,7 +746,7 @@ struct S {
// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[AGG_CAPTURED]], i32 0, i32 1
// CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP7]], align 8
// CHECK1-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
// CHECK1-NEXT: [[TMP8:%.*]] = load i8, i8* [[CONV]], align 8
// CHECK1-NEXT: [[TMP8:%.*]] = load i8, i8* [[CONV]], align 1
// CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP8]] to i1
// CHECK1-NEXT: store i32* [[TMP]], i32** [[_TMP1]], align 8
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP1]], align 4
Expand Down Expand Up @@ -986,7 +986,7 @@ struct S {
// CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
// CHECK2: omp_if.then:
// CHECK2-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK2-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 33, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*))
// CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates*
// CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP6]], i32 0, i32 0
Expand Down Expand Up @@ -1105,7 +1105,7 @@ struct S {
// CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
// CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
// CHECK2: omp_if.then:
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK2-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.1*)* @.omp_task_entry..4 to i32 (i32, i8*)*))
// CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates.1*
// CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], %struct.kmp_task_t_with_privates.1* [[TMP6]], i32 0, i32 0
Expand Down Expand Up @@ -1244,7 +1244,7 @@ struct S {
// CHECK2-NEXT: store i32* [[TMP1]], i32** [[TMP8]], align 8
// CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 2
// CHECK2-NEXT: store i8*** [[TMP2]], i8**** [[TMP9]], align 8
// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK2-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
// CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP1]], align 4
// CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR_5]], align 4
Expand Down Expand Up @@ -1283,7 +1283,7 @@ struct S {
// CHECK2-NEXT: [[TMP26:%.*]] = bitcast %struct.anon.2* [[AGG_CAPTURED]] to i8*
// CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP25]], i8* align 8 [[TMP26]], i64 24, i1 false)
// CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP22]], i32 0, i32 1
// CHECK2-NEXT: [[TMP28:%.*]] = load i8, i8* [[CONV]], align 8
// CHECK2-NEXT: [[TMP28:%.*]] = load i8, i8* [[CONV]], align 1
// CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP28]] to i1
// CHECK2-NEXT: [[TMP29:%.*]] = sext i1 [[TOBOOL]] to i32
// CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP23]], i32 0, i32 5
Expand Down Expand Up @@ -1571,7 +1571,7 @@ struct S {
// CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[AGG_CAPTURED]], i32 0, i32 1
// CHECK2-NEXT: store i32* [[TMP1]], i32** [[TMP7]], align 8
// CHECK2-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
// CHECK2-NEXT: [[TMP8:%.*]] = load i8, i8* [[CONV]], align 8
// CHECK2-NEXT: [[TMP8:%.*]] = load i8, i8* [[CONV]], align 1
// CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP8]] to i1
// CHECK2-NEXT: store i32* [[TMP]], i32** [[_TMP1]], align 8
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP1]], align 4
Expand Down Expand Up @@ -1831,7 +1831,7 @@ struct S {
// CHECK3-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
// CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK3-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 33, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*))
// CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates*
// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP6]], i32 0, i32 0
Expand Down Expand Up @@ -1950,7 +1950,7 @@ struct S {
// CHECK3-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
// CHECK3-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
// CHECK3: omp_if.then:
// CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK3-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.1*)* @.omp_task_entry..4 to i32 (i32, i8*)*))
// CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates.1*
// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], %struct.kmp_task_t_with_privates.1* [[TMP6]], i32 0, i32 0
Expand Down Expand Up @@ -2090,11 +2090,11 @@ struct S {
// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 2
// CHECK3-NEXT: store i8*** [[TMP2]], i8**** [[TMP9]], align 8
// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 3
// CHECK3-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
// CHECK3-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1
// CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
// CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[TMP10]], align 8
// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK3-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP1]], align 4
// CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_5]], align 4
Expand Down Expand Up @@ -2133,7 +2133,7 @@ struct S {
// CHECK3-NEXT: [[TMP28:%.*]] = bitcast %struct.anon.2* [[AGG_CAPTURED]] to i8*
// CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP27]], i8* align 8 [[TMP28]], i64 32, i1 false)
// CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP24]], i32 0, i32 1
// CHECK3-NEXT: [[TMP30:%.*]] = load i8, i8* [[CONV]], align 8
// CHECK3-NEXT: [[TMP30:%.*]] = load i8, i8* [[CONV]], align 1
// CHECK3-NEXT: [[TOBOOL18:%.*]] = trunc i8 [[TMP30]] to i1
// CHECK3-NEXT: [[TMP31:%.*]] = sext i1 [[TOBOOL18]] to i32
// CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP25]], i32 0, i32 5
Expand Down Expand Up @@ -2491,7 +2491,7 @@ struct S {
// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[AGG_CAPTURED]], i32 0, i32 1
// CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP7]], align 8
// CHECK3-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
// CHECK3-NEXT: [[TMP8:%.*]] = load i8, i8* [[CONV]], align 8
// CHECK3-NEXT: [[TMP8:%.*]] = load i8, i8* [[CONV]], align 1
// CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP8]] to i1
// CHECK3-NEXT: store i32* [[TMP]], i32** [[_TMP1]], align 8
// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP1]], align 4
Expand Down Expand Up @@ -2731,7 +2731,7 @@ struct S {
// CHECK4-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
// CHECK4: omp_if.then:
// CHECK4-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
// CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK4-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 33, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*))
// CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates*
// CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP6]], i32 0, i32 0
Expand Down Expand Up @@ -2850,7 +2850,7 @@ struct S {
// CHECK4-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
// CHECK4-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
// CHECK4: omp_if.then:
// CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK4-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.1*)* @.omp_task_entry..4 to i32 (i32, i8*)*))
// CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates.1*
// CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], %struct.kmp_task_t_with_privates.1* [[TMP6]], i32 0, i32 0
Expand Down Expand Up @@ -2990,11 +2990,11 @@ struct S {
// CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 2
// CHECK4-NEXT: store i8*** [[TMP2]], i8**** [[TMP9]], align 8
// CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 3
// CHECK4-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8
// CHECK4-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1
// CHECK4-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
// CHECK4-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
// CHECK4-NEXT: store i8 [[FROMBOOL]], i8* [[TMP10]], align 8
// CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK4-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
// CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP1]], align 4
// CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_5]], align 4
Expand Down Expand Up @@ -3033,7 +3033,7 @@ struct S {
// CHECK4-NEXT: [[TMP28:%.*]] = bitcast %struct.anon.2* [[AGG_CAPTURED]] to i8*
// CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP27]], i8* align 8 [[TMP28]], i64 32, i1 false)
// CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP24]], i32 0, i32 1
// CHECK4-NEXT: [[TMP30:%.*]] = load i8, i8* [[CONV]], align 8
// CHECK4-NEXT: [[TMP30:%.*]] = load i8, i8* [[CONV]], align 1
// CHECK4-NEXT: [[TOBOOL18:%.*]] = trunc i8 [[TMP30]] to i1
// CHECK4-NEXT: [[TMP31:%.*]] = sext i1 [[TOBOOL18]] to i32
// CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP25]], i32 0, i32 5
Expand Down Expand Up @@ -3391,7 +3391,7 @@ struct S {
// CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[AGG_CAPTURED]], i32 0, i32 1
// CHECK4-NEXT: store i32* [[TMP1]], i32** [[TMP7]], align 8
// CHECK4-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
// CHECK4-NEXT: [[TMP8:%.*]] = load i8, i8* [[CONV]], align 8
// CHECK4-NEXT: [[TMP8:%.*]] = load i8, i8* [[CONV]], align 1
// CHECK4-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP8]] to i1
// CHECK4-NEXT: store i32* [[TMP]], i32** [[_TMP1]], align 8
// CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP1]], align 4
Expand Down
20 changes: 10 additions & 10 deletions clang/test/OpenMP/single_codegen.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1031,9 +1031,9 @@ void array_func(int n, int a[n], St s[2]) {
// CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1
// CHECK1-NEXT: store i32 [[INC]], i32* [[TMP7]], align 4
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP9]], -1
// CHECK1-NEXT: store i32 [[DEC]], i32* [[CONV1]], align 8
// CHECK1-NEXT: store i32 [[DEC]], i32* [[CONV1]], align 4
// CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP5]], align 8
// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP11]], 1
Expand Down Expand Up @@ -1867,9 +1867,9 @@ void array_func(int n, int a[n], St s[2]) {
// CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1
// CHECK2-NEXT: store i32 [[INC]], i32* [[TMP7]], align 4
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK2-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP9]], -1
// CHECK2-NEXT: store i32 [[DEC]], i32* [[CONV1]], align 8
// CHECK2-NEXT: store i32 [[DEC]], i32* [[CONV1]], align 4
// CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP5]], align 8
// CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP11]], 1
Expand Down Expand Up @@ -3049,9 +3049,9 @@ void array_func(int n, int a[n], St s[2]) {
// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
// CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1
// CHECK3-NEXT: store i32 [[INC]], i32* [[TMP7]], align 4
// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP9]], -1
// CHECK3-NEXT: store i32 [[DEC]], i32* [[CONV1]], align 8
// CHECK3-NEXT: store i32 [[DEC]], i32* [[CONV1]], align 4
// CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP5]], align 8
// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP11]], 1
Expand Down Expand Up @@ -3873,9 +3873,9 @@ void array_func(int n, int a[n], St s[2]) {
// CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
// CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1
// CHECK4-NEXT: store i32 [[INC]], i32* [[TMP7]], align 4
// CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP9]], -1
// CHECK4-NEXT: store i32 [[DEC]], i32* [[CONV1]], align 8
// CHECK4-NEXT: store i32 [[DEC]], i32* [[CONV1]], align 4
// CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP5]], align 8
// CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
// CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP11]], 1
Expand Down Expand Up @@ -5053,9 +5053,9 @@ void array_func(int n, int a[n], St s[2]) {
// CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4, !dbg [[DBG168:![0-9]+]]
// CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1, !dbg [[DBG168]]
// CHECK5-NEXT: store i32 [[INC]], i32* [[TMP7]], align 4, !dbg [[DBG168]]
// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV1]], align 8, !dbg [[DBG169:![0-9]+]]
// CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV1]], align 4, !dbg [[DBG169:![0-9]+]]
// CHECK5-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP9]], -1, !dbg [[DBG169]]
// CHECK5-NEXT: store i32 [[DEC]], i32* [[CONV1]], align 8, !dbg [[DBG169]]
// CHECK5-NEXT: store i32 [[DEC]], i32* [[CONV1]], align 4, !dbg [[DBG169]]
// CHECK5-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP5]], align 8, !dbg [[DBG167]]
// CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4, !dbg [[DBG170:![0-9]+]]
// CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP11]], 1, !dbg [[DBG170]]
Expand Down
108 changes: 54 additions & 54 deletions clang/test/OpenMP/target_codegen_global_capture.cpp

Large diffs are not rendered by default.

728 changes: 364 additions & 364 deletions clang/test/OpenMP/target_parallel_codegen.cpp

Large diffs are not rendered by default.

8 changes: 4 additions & 4 deletions clang/test/OpenMP/target_parallel_debug_codegen.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -246,7 +246,7 @@ int main() {
// CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG114]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG114]]
// CHECK1-NEXT: [[TMP5:%.*]] = load [10 x [10 x [10 x i32]]]*, [10 x [10 x [10 x i32]]]** [[C_ADDR]], align 8, !dbg [[DBG114]]
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8, !dbg [[DBG114]]
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 4, !dbg [[DBG114]]
// CHECK1-NEXT: [[TMP7:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[B_ADDR]], align 8, !dbg [[DBG114]]
// CHECK1-NEXT: [[TMP8:%.*]] = load i8*, i8** [[BB_ADDR]], align 8, !dbg [[DBG114]]
// CHECK1-NEXT: [[TMP9:%.*]] = addrspacecast [10 x [10 x [10 x i32]]]* [[TMP5]] to [10 x [10 x [10 x i32]]] addrspace(1)*, !dbg [[DBG114]]
Expand Down Expand Up @@ -275,7 +275,7 @@ int main() {
// CHECK1-NEXT: [[TMP1:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[B_ADDR]], align 8, !dbg [[DBG123]]
// CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[BB_ADDR]], align 8, !dbg [[DBG123]]
// CHECK1-NEXT: [[TMP3:%.*]] = load [10 x [10 x [10 x i32]]]*, [10 x [10 x [10 x i32]]]** [[C_ADDR]], align 8, !dbg [[DBG123]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8, !dbg [[DBG123]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4, !dbg [[DBG123]]
// CHECK1-NEXT: [[TMP5:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[B_ADDR]], align 8, !dbg [[DBG123]]
// CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8** [[BB_ADDR]], align 8, !dbg [[DBG123]]
// CHECK1-NEXT: [[TMP7:%.*]] = addrspacecast [10 x [10 x [10 x i32]]]* [[TMP3]] to [10 x [10 x [10 x i32]]] addrspace(1)*, !dbg [[DBG123]]
Expand Down Expand Up @@ -455,7 +455,7 @@ int main() {
// CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG191]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG191]]
// CHECK1-NEXT: [[TMP5:%.*]] = load [10 x [10 x [10 x i32]]]*, [10 x [10 x [10 x i32]]]** [[C_ADDR]], align 8, !dbg [[DBG191]]
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8, !dbg [[DBG191]]
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 4, !dbg [[DBG191]]
// CHECK1-NEXT: [[TMP7:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[B_ADDR]], align 8, !dbg [[DBG191]]
// CHECK1-NEXT: [[TMP8:%.*]] = load i8*, i8** [[BB_ADDR]], align 8, !dbg [[DBG191]]
// CHECK1-NEXT: [[TMP9:%.*]] = addrspacecast [10 x [10 x [10 x i32]]]* [[TMP5]] to [10 x [10 x [10 x i32]]] addrspace(1)*, !dbg [[DBG191]]
Expand Down Expand Up @@ -485,7 +485,7 @@ int main() {
// CHECK1-NEXT: [[TMP1:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[B_ADDR]], align 8, !dbg [[DBG198]]
// CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[BB_ADDR]], align 8, !dbg [[DBG198]]
// CHECK1-NEXT: [[TMP3:%.*]] = load [10 x [10 x [10 x i32]]]*, [10 x [10 x [10 x i32]]]** [[C_ADDR]], align 8, !dbg [[DBG198]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8, !dbg [[DBG198]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4, !dbg [[DBG198]]
// CHECK1-NEXT: [[TMP5:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[B_ADDR]], align 8, !dbg [[DBG198]]
// CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8** [[BB_ADDR]], align 8, !dbg [[DBG198]]
// CHECK1-NEXT: [[TMP7:%.*]] = addrspacecast [10 x [10 x [10 x i32]]]* [[TMP3]] to [10 x [10 x [10 x i32]]] addrspace(1)*, !dbg [[DBG198]]
Expand Down
696 changes: 348 additions & 348 deletions clang/test/OpenMP/target_parallel_for_codegen.cpp

Large diffs are not rendered by default.

10 changes: 5 additions & 5 deletions clang/test/OpenMP/target_parallel_for_debug_codegen.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -316,7 +316,7 @@ int main() {
// CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG122]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG122]]
// CHECK1-NEXT: [[TMP5:%.*]] = load [10 x [10 x [10 x i32]]]*, [10 x [10 x [10 x i32]]]** [[C_ADDR]], align 8, !dbg [[DBG122]]
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8, !dbg [[DBG122]]
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 4, !dbg [[DBG122]]
// CHECK1-NEXT: [[TMP7:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[B_ADDR]], align 8, !dbg [[DBG122]]
// CHECK1-NEXT: [[TMP8:%.*]] = load i8*, i8** [[BB_ADDR]], align 8, !dbg [[DBG122]]
// CHECK1-NEXT: [[TMP9:%.*]] = addrspacecast [10 x [10 x [10 x i32]]]* [[TMP5]] to [10 x [10 x [10 x i32]]] addrspace(1)*, !dbg [[DBG122]]
Expand Down Expand Up @@ -349,10 +349,10 @@ int main() {
// CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[BB_ADDR]], align 8, !dbg [[DBG132]]
// CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*, !dbg [[DBG132]]
// CHECK1-NEXT: [[TMP3:%.*]] = load [10 x [10 x [10 x i32]]]*, [10 x [10 x [10 x i32]]]** [[C_ADDR]], align 8, !dbg [[DBG132]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8, !dbg [[DBG132]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4, !dbg [[DBG132]]
// CHECK1-NEXT: [[TMP5:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[B_ADDR]], align 8, !dbg [[DBG132]]
// CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8** [[BB_ADDR]], align 8, !dbg [[DBG132]]
// CHECK1-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 8, !dbg [[DBG132]]
// CHECK1-NEXT: [[TMP7:%.*]] = load i8, i8* [[CONV1]], align 1, !dbg [[DBG132]]
// CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP7]] to i1, !dbg [[DBG132]]
// CHECK1-NEXT: [[TMP8:%.*]] = addrspacecast [10 x [10 x [10 x i32]]]* [[TMP3]] to [10 x [10 x [10 x i32]]] addrspace(1)*, !dbg [[DBG132]]
// CHECK1-NEXT: [[TMP9:%.*]] = addrspacecast i8* [[TMP6]] to i8 addrspace(1)*, !dbg [[DBG132]]
Expand Down Expand Up @@ -604,7 +604,7 @@ int main() {
// CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG213]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG213]]
// CHECK1-NEXT: [[TMP5:%.*]] = load [10 x [10 x [10 x i32]]]*, [10 x [10 x [10 x i32]]]** [[C_ADDR]], align 8, !dbg [[DBG213]]
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 8, !dbg [[DBG213]]
// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV]], align 4, !dbg [[DBG213]]
// CHECK1-NEXT: [[TMP7:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[B_ADDR]], align 8, !dbg [[DBG213]]
// CHECK1-NEXT: [[TMP8:%.*]] = load i8*, i8** [[BB_ADDR]], align 8, !dbg [[DBG213]]
// CHECK1-NEXT: [[TMP9:%.*]] = addrspacecast [10 x [10 x [10 x i32]]]* [[TMP5]] to [10 x [10 x [10 x i32]]] addrspace(1)*, !dbg [[DBG213]]
Expand Down Expand Up @@ -634,7 +634,7 @@ int main() {
// CHECK1-NEXT: [[TMP1:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[B_ADDR]], align 8, !dbg [[DBG222]]
// CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[BB_ADDR]], align 8, !dbg [[DBG222]]
// CHECK1-NEXT: [[TMP3:%.*]] = load [10 x [10 x [10 x i32]]]*, [10 x [10 x [10 x i32]]]** [[C_ADDR]], align 8, !dbg [[DBG222]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8, !dbg [[DBG222]]
// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4, !dbg [[DBG222]]
// CHECK1-NEXT: [[TMP5:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[B_ADDR]], align 8, !dbg [[DBG222]]
// CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8** [[BB_ADDR]], align 8, !dbg [[DBG222]]
// CHECK1-NEXT: [[TMP7:%.*]] = addrspacecast [10 x [10 x [10 x i32]]]* [[TMP3]] to [10 x [10 x [10 x i32]]] addrspace(1)*, !dbg [[DBG222]]
Expand Down
752 changes: 376 additions & 376 deletions clang/test/OpenMP/target_parallel_for_simd_codegen.cpp

Large diffs are not rendered by default.

288 changes: 144 additions & 144 deletions clang/test/OpenMP/target_parallel_if_codegen.cpp

Large diffs are not rendered by default.

224 changes: 112 additions & 112 deletions clang/test/OpenMP/target_parallel_num_threads_codegen.cpp

Large diffs are not rendered by default.

840 changes: 420 additions & 420 deletions clang/test/OpenMP/target_teams_codegen.cpp

Large diffs are not rendered by default.

872 changes: 436 additions & 436 deletions clang/test/OpenMP/target_teams_distribute_codegen.cpp

Large diffs are not rendered by default.

16 changes: 8 additions & 8 deletions clang/test/OpenMP/target_teams_distribute_collapse_codegen.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -820,11 +820,11 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
// CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8
Expand Down Expand Up @@ -868,9 +868,9 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
Expand Down Expand Up @@ -1264,11 +1264,11 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
// CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8
Expand Down Expand Up @@ -1312,9 +1312,9 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
Expand Down
32 changes: 16 additions & 16 deletions clang/test/OpenMP/target_teams_distribute_dist_schedule_codegen.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1755,7 +1755,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
Expand Down Expand Up @@ -1789,7 +1789,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
Expand Down Expand Up @@ -1871,7 +1871,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
Expand Down Expand Up @@ -1905,7 +1905,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
Expand Down Expand Up @@ -1991,11 +1991,11 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
// CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
Expand Down Expand Up @@ -2032,7 +2032,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
Expand All @@ -2049,7 +2049,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
Expand Down Expand Up @@ -2700,7 +2700,7 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
// CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
Expand Down Expand Up @@ -2734,7 +2734,7 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
Expand Down Expand Up @@ -2816,7 +2816,7 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
// CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
Expand Down Expand Up @@ -2850,7 +2850,7 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
Expand Down Expand Up @@ -2936,11 +2936,11 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
// CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
// CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
Expand Down Expand Up @@ -2977,7 +2977,7 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
Expand All @@ -2994,7 +2994,7 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
Expand Down
44 changes: 22 additions & 22 deletions clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -345,11 +345,11 @@ int main() {
// CHECK1-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
// CHECK1-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
// CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
// CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
// CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32*
// CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV3]], align 4
// CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8
Expand Down Expand Up @@ -446,7 +446,7 @@ int main() {
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]]
Expand All @@ -458,9 +458,9 @@ int main() {
// CHECK1-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[VAR5]] to i8*
// CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false)
// CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[I]], align 4
// CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP20]]
// CHECK1-NEXT: store i32 [[ADD10]], i32* [[CONV1]], align 8
// CHECK1-NEXT: store i32 [[ADD10]], i32* [[CONV1]], align 4
// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// CHECK1: omp.body.continue:
// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
Expand Down Expand Up @@ -694,7 +694,7 @@ int main() {
// CHECK1-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
// CHECK1-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
// CHECK1-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
// CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
// CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
Expand Down Expand Up @@ -794,7 +794,7 @@ int main() {
// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]]
Expand Down Expand Up @@ -1135,11 +1135,11 @@ int main() {
// CHECK2-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
// CHECK2-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
// CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
// CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
// CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32*
// CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV3]], align 4
// CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8
Expand Down Expand Up @@ -1236,7 +1236,7 @@ int main() {
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
// CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]]
Expand All @@ -1248,9 +1248,9 @@ int main() {
// CHECK2-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[VAR5]] to i8*
// CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false)
// CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[I]], align 4
// CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP20]]
// CHECK2-NEXT: store i32 [[ADD10]], i32* [[CONV1]], align 8
// CHECK2-NEXT: store i32 [[ADD10]], i32* [[CONV1]], align 4
// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
// CHECK2: omp.body.continue:
// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
Expand Down Expand Up @@ -1484,7 +1484,7 @@ int main() {
// CHECK2-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
// CHECK2-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
// CHECK2-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
// CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
// CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
Expand Down Expand Up @@ -1584,7 +1584,7 @@ int main() {
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
// CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]]
Expand Down Expand Up @@ -3407,7 +3407,7 @@ int main() {
// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to i32*
// CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
// CHECK9-NEXT: store i32* [[CONV1]], i32** [[TMP]], align 8
// CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[G_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV3]], align 4
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[G_CASTED]], align 8
Expand All @@ -3416,7 +3416,7 @@ int main() {
// CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[G1_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[G1_CASTED]], align 8
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 8
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 4
// CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
// CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8
Expand Down Expand Up @@ -3481,10 +3481,10 @@ int main() {
// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
// CHECK9-NEXT: store i32 1, i32* [[CONV]], align 8
// CHECK9-NEXT: store i32 1, i32* [[CONV]], align 4
// CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP]], align 8
// CHECK9-NEXT: store volatile i32 1, i32* [[TMP8]], align 4
// CHECK9-NEXT: store i32 2, i32* [[CONV2]], align 8
// CHECK9-NEXT: store i32 2, i32* [[CONV2]], align 4
// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
// CHECK9-NEXT: store i32* [[CONV]], i32** [[TMP9]], align 8
// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
Expand Down Expand Up @@ -3664,7 +3664,7 @@ int main() {
// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to i32*
// CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
// CHECK10-NEXT: store i32* [[CONV1]], i32** [[TMP]], align 8
// CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[G_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP0]], i32* [[CONV3]], align 4
// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[G_CASTED]], align 8
Expand All @@ -3673,7 +3673,7 @@ int main() {
// CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[G1_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[G1_CASTED]], align 8
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 8
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 4
// CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
// CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8
Expand Down Expand Up @@ -3738,10 +3738,10 @@ int main() {
// CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
// CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
// CHECK10-NEXT: store i32 1, i32* [[CONV]], align 8
// CHECK10-NEXT: store i32 1, i32* [[CONV]], align 4
// CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP]], align 8
// CHECK10-NEXT: store volatile i32 1, i32* [[TMP8]], align 4
// CHECK10-NEXT: store i32 2, i32* [[CONV2]], align 8
// CHECK10-NEXT: store i32 2, i32* [[CONV2]], align 4
// CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
// CHECK10-NEXT: store i32* [[CONV]], i32** [[TMP9]], align 8
// CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
Expand Down
40 changes: 20 additions & 20 deletions clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -182,11 +182,11 @@ int main() {
// CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[G1_CASTED]] to double*
// CHECK1-NEXT: store double [[TMP3]], double* [[CONV5]], align 8
// CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[G1_CASTED]], align 8
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 8
// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 4
// CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
// CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV6]], align 4
// CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
// CHECK1-NEXT: [[TMP7:%.*]] = load float, float* [[CONV3]], align 8
// CHECK1-NEXT: [[TMP7:%.*]] = load float, float* [[CONV3]], align 4
// CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float*
// CHECK1-NEXT: store float [[TMP7]], float* [[CONV7]], align 4
// CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8
Expand Down Expand Up @@ -298,9 +298,9 @@ int main() {
// CHECK1-NEXT: [[TMP20:%.*]] = load double, double* [[TMP19]], align 8
// CHECK1-NEXT: store volatile double [[TMP20]], double* [[TMP0]], align 8
// CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR8]], align 4
// CHECK1-NEXT: store i32 [[TMP21]], i32* [[CONV2]], align 8
// CHECK1-NEXT: store i32 [[TMP21]], i32* [[CONV2]], align 4
// CHECK1-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR9]], align 4
// CHECK1-NEXT: store float [[TMP22]], float* [[CONV3]], align 8
// CHECK1-NEXT: store float [[TMP22]], float* [[CONV3]], align 4
// CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK1: .omp.lastprivate.done:
// CHECK1-NEXT: ret void
Expand Down Expand Up @@ -361,11 +361,11 @@ int main() {
// CHECK2-NEXT: [[CONV5:%.*]] = bitcast i64* [[G1_CASTED]] to double*
// CHECK2-NEXT: store double [[TMP3]], double* [[CONV5]], align 8
// CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[G1_CASTED]], align 8
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 8
// CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV2]], align 4
// CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
// CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV6]], align 4
// CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
// CHECK2-NEXT: [[TMP7:%.*]] = load float, float* [[CONV3]], align 8
// CHECK2-NEXT: [[TMP7:%.*]] = load float, float* [[CONV3]], align 4
// CHECK2-NEXT: [[CONV7:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float*
// CHECK2-NEXT: store float [[TMP7]], float* [[CONV7]], align 4
// CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8
Expand Down Expand Up @@ -477,9 +477,9 @@ int main() {
// CHECK2-NEXT: [[TMP20:%.*]] = load double, double* [[TMP19]], align 8
// CHECK2-NEXT: store volatile double [[TMP20]], double* [[TMP0]], align 8
// CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR8]], align 4
// CHECK2-NEXT: store i32 [[TMP21]], i32* [[CONV2]], align 8
// CHECK2-NEXT: store i32 [[TMP21]], i32* [[CONV2]], align 4
// CHECK2-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR9]], align 4
// CHECK2-NEXT: store float [[TMP22]], float* [[CONV3]], align 8
// CHECK2-NEXT: store float [[TMP22]], float* [[CONV3]], align 4
// CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK2: .omp.lastprivate.done:
// CHECK2-NEXT: ret void
Expand Down Expand Up @@ -977,12 +977,12 @@ int main() {
// CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
// CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
// CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV3]], align 4
// CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
Expand Down Expand Up @@ -1104,7 +1104,7 @@ int main() {
// CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
// CHECK9: .omp.lastprivate.then:
// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4
// CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 8
// CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4
// CHECK9-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
// CHECK9-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
// CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false)
Expand All @@ -1129,7 +1129,7 @@ int main() {
// CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP30]] to i8*
// CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false)
// CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[SVAR8]], align 4
// CHECK9-NEXT: store i32 [[TMP33]], i32* [[CONV1]], align 8
// CHECK9-NEXT: store i32 [[TMP33]], i32* [[CONV1]], align 4
// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK9: .omp.lastprivate.done:
// CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
Expand Down Expand Up @@ -1320,7 +1320,7 @@ int main() {
// CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
// CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
Expand Down Expand Up @@ -1439,7 +1439,7 @@ int main() {
// CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
// CHECK9: .omp.lastprivate.then:
// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4
// CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 8
// CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4
// CHECK9-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
// CHECK9-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
// CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false)
Expand Down Expand Up @@ -1683,12 +1683,12 @@ int main() {
// CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
// CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
// CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP6]], i32* [[CONV3]], align 4
// CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
Expand Down Expand Up @@ -1810,7 +1810,7 @@ int main() {
// CHECK10-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
// CHECK10: .omp.lastprivate.then:
// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4
// CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 8
// CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4
// CHECK10-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
// CHECK10-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
// CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false)
Expand All @@ -1835,7 +1835,7 @@ int main() {
// CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP30]] to i8*
// CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false)
// CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[SVAR8]], align 4
// CHECK10-NEXT: store i32 [[TMP33]], i32* [[CONV1]], align 8
// CHECK10-NEXT: store i32 [[TMP33]], i32* [[CONV1]], align 4
// CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
// CHECK10: .omp.lastprivate.done:
// CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
Expand Down Expand Up @@ -2026,7 +2026,7 @@ int main() {
// CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
// CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
Expand Down Expand Up @@ -2145,7 +2145,7 @@ int main() {
// CHECK10-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
// CHECK10: .omp.lastprivate.then:
// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR2]], align 4
// CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 8
// CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV]], align 4
// CHECK10-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
// CHECK10-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
// CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i64 8, i1 false)
Expand Down
100 changes: 50 additions & 50 deletions clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp

Large diffs are not rendered by default.

Original file line number Diff line number Diff line change
Expand Up @@ -1117,11 +1117,11 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
// CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8
Expand Down Expand Up @@ -1167,9 +1167,9 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
Expand Down Expand Up @@ -1224,11 +1224,11 @@ int main (int argc, char **argv) {
// CHECK9: omp.inner.for.body:
// CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
// CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV17:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP21]], i32* [[CONV17]], align 4
// CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK9-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV18]], align 4
// CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[M_CASTED]], align 8
Expand Down Expand Up @@ -1291,9 +1291,9 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
Expand Down Expand Up @@ -1766,11 +1766,11 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
// CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8
Expand Down Expand Up @@ -1816,9 +1816,9 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
Expand Down Expand Up @@ -1873,11 +1873,11 @@ int main (int argc, char **argv) {
// CHECK10: omp.inner.for.body:
// CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
// CHECK10-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
// CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV17:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP21]], i32* [[CONV17]], align 4
// CHECK10-NEXT: [[TMP22:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK10-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV18]], align 4
// CHECK10-NEXT: [[TMP24:%.*]] = load i64, i64* [[M_CASTED]], align 8
Expand Down Expand Up @@ -1940,9 +1940,9 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
Expand Down

Large diffs are not rendered by default.

Large diffs are not rendered by default.

Large diffs are not rendered by default.

Large diffs are not rendered by default.

Large diffs are not rendered by default.

Large diffs are not rendered by default.

Original file line number Diff line number Diff line change
Expand Up @@ -1461,11 +1461,11 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
// CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8
Expand Down Expand Up @@ -1511,9 +1511,9 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
Expand Down Expand Up @@ -1568,11 +1568,11 @@ int main (int argc, char **argv) {
// CHECK9: omp.inner.for.body:
// CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8, !llvm.access.group !5
// CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8, !llvm.access.group !5
// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !5
// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !5
// CHECK9-NEXT: [[CONV17:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP21]], i32* [[CONV17]], align 4, !llvm.access.group !5
// CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !5
// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV3]], align 8, !llvm.access.group !5
// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV3]], align 4, !llvm.access.group !5
// CHECK9-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV18]], align 4, !llvm.access.group !5
// CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[M_CASTED]], align 8, !llvm.access.group !5
Expand Down Expand Up @@ -1653,9 +1653,9 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
Expand Down Expand Up @@ -2162,11 +2162,11 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
// CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8
Expand Down Expand Up @@ -2212,9 +2212,9 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
Expand Down Expand Up @@ -2269,11 +2269,11 @@ int main (int argc, char **argv) {
// CHECK10: omp.inner.for.body:
// CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8, !llvm.access.group !5
// CHECK10-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8, !llvm.access.group !5
// CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !5
// CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !5
// CHECK10-NEXT: [[CONV17:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP21]], i32* [[CONV17]], align 4, !llvm.access.group !5
// CHECK10-NEXT: [[TMP22:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !5
// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV3]], align 8, !llvm.access.group !5
// CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV3]], align 4, !llvm.access.group !5
// CHECK10-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV18]], align 4, !llvm.access.group !5
// CHECK10-NEXT: [[TMP24:%.*]] = load i64, i64* [[M_CASTED]], align 8, !llvm.access.group !5
Expand Down Expand Up @@ -2354,9 +2354,9 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
Expand Down

Large diffs are not rendered by default.

Large diffs are not rendered by default.

Large diffs are not rendered by default.

Large diffs are not rendered by default.

Large diffs are not rendered by default.

872 changes: 436 additions & 436 deletions clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp

Large diffs are not rendered by default.

Original file line number Diff line number Diff line change
Expand Up @@ -1132,11 +1132,11 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
// CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8
Expand Down Expand Up @@ -1180,9 +1180,9 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
Expand Down Expand Up @@ -1602,11 +1602,11 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
// CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8
Expand Down Expand Up @@ -1650,9 +1650,9 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
// CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
// CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -2333,7 +2333,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
Expand Down Expand Up @@ -2367,7 +2367,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
Expand Down Expand Up @@ -2461,7 +2461,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
Expand Down Expand Up @@ -2495,7 +2495,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
Expand Down Expand Up @@ -2593,11 +2593,11 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
// CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
Expand Down Expand Up @@ -2634,7 +2634,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
Expand All @@ -2651,7 +2651,7 @@ int main (int argc, char **argv) {
// CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
Expand Down Expand Up @@ -3335,7 +3335,7 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
// CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
Expand Down Expand Up @@ -3369,7 +3369,7 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
Expand Down Expand Up @@ -3463,7 +3463,7 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
// CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
Expand Down Expand Up @@ -3497,7 +3497,7 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
Expand Down Expand Up @@ -3595,11 +3595,11 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
// CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
// CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
// CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
Expand Down Expand Up @@ -3636,7 +3636,7 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
// CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
// CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
// CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
// CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
Expand All @@ -3653,7 +3653,7 @@ int main (int argc, char **argv) {
// CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
// CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
// CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 8
// CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
// CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
Expand Down
Loading