12 changes: 6 additions & 6 deletions llvm/test/CodeGen/PowerPC/csr-split.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -16,10 +16,10 @@ define dso_local signext i32 @test1(ptr %b) local_unnamed_addr {
; CHECK-PWR9-NEXT: .cfi_offset lr, 16
; CHECK-PWR9-NEXT: .cfi_offset r30, -16
; CHECK-PWR9-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-PWR9-NEXT: std r0, 16(r1)
; CHECK-PWR9-NEXT: stdu r1, -48(r1)
; CHECK-PWR9-NEXT: mr r30, r3
; CHECK-PWR9-NEXT: addis r3, r2, a@toc@ha
; CHECK-PWR9-NEXT: std r0, 64(r1)
; CHECK-PWR9-NEXT: lwa r3, a@toc@l(r3)
; CHECK-PWR9-NEXT: cmpld r3, r30
; CHECK-PWR9-NEXT: # implicit-def: $r3
Expand All @@ -41,8 +41,8 @@ define dso_local signext i32 @test1(ptr %b) local_unnamed_addr {
; CHECK-LABEL: test1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
; CHECK-NEXT: std r0, 16(r1)
; CHECK-NEXT: stdu r1, -128(r1)
; CHECK-NEXT: std r0, 144(r1)
; CHECK-NEXT: .cfi_def_cfa_offset 128
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -95,10 +95,10 @@ define dso_local signext i32 @test2(ptr %p1) local_unnamed_addr {
; CHECK-PWR9-NEXT: .cfi_offset lr, 16
; CHECK-PWR9-NEXT: .cfi_offset r30, -16
; CHECK-PWR9-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-PWR9-NEXT: std r0, 16(r1)
; CHECK-PWR9-NEXT: stdu r1, -48(r1)
; CHECK-PWR9-NEXT: mr r30, r3
; CHECK-PWR9-NEXT: li r3, 0
; CHECK-PWR9-NEXT: std r0, 64(r1)
; CHECK-PWR9-NEXT: cmpldi r30, 0
; CHECK-PWR9-NEXT: beq cr0, .LBB1_3
; CHECK-PWR9-NEXT: # %bb.1: # %if.end
Expand All @@ -122,8 +122,8 @@ define dso_local signext i32 @test2(ptr %p1) local_unnamed_addr {
; CHECK-LABEL: test2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
; CHECK-NEXT: std r0, 16(r1)
; CHECK-NEXT: stdu r1, -128(r1)
; CHECK-NEXT: std r0, 144(r1)
; CHECK-NEXT: .cfi_def_cfa_offset 128
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -181,8 +181,8 @@ define dso_local ptr @test3(ptr nocapture %p1, i8 zeroext %p2) local_unnamed_add
; CHECK-PWR9-NEXT: .cfi_offset r30, -16
; CHECK-PWR9-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-PWR9-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-PWR9-NEXT: std r0, 16(r1)
; CHECK-PWR9-NEXT: stdu r1, -64(r1)
; CHECK-PWR9-NEXT: std r0, 80(r1)
; CHECK-PWR9-NEXT: ld r30, 0(r3)
; CHECK-PWR9-NEXT: cmpldi r30, 0
; CHECK-PWR9-NEXT: beq cr0, .LBB2_2
Expand All @@ -204,8 +204,8 @@ define dso_local ptr @test3(ptr nocapture %p1, i8 zeroext %p2) local_unnamed_add
; CHECK-LABEL: test3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
; CHECK-NEXT: std r0, 16(r1)
; CHECK-NEXT: stdu r1, -144(r1)
; CHECK-NEXT: std r0, 160(r1)
; CHECK-NEXT: .cfi_def_cfa_offset 144
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: .cfi_offset r29, -24
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/ctrloop-constrained-fp.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -12,10 +12,10 @@ define void @test(ptr %cast) {
; CHECK-NEXT: .cfi_offset r30, -16
; CHECK-NEXT: std 29, -24(1) # 8-byte Folded Spill
; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -64(1)
; CHECK-NEXT: li 30, 0
; CHECK-NEXT: addi 29, 3, -8
; CHECK-NEXT: std 0, 80(1)
; CHECK-NEXT: .p2align 5
; CHECK-NEXT: .LBB0_1: # %for.body
; CHECK-NEXT: #
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/PowerPC/ctrloop-fp128.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -36,19 +36,19 @@ define void @fmul_ctrloop_fp128() nounwind {
; PWR8-LABEL: fmul_ctrloop_fp128:
; PWR8: # %bb.0: # %entry
; PWR8-NEXT: mflr 0
; PWR8-NEXT: std 0, 16(1)
; PWR8-NEXT: stdu 1, -112(1)
; PWR8-NEXT: li 3, 48
; PWR8-NEXT: std 0, 128(1)
; PWR8-NEXT: addis 4, 2, x@toc@ha
; PWR8-NEXT: std 28, 80(1) # 8-byte Folded Spill
; PWR8-NEXT: std 29, 88(1) # 8-byte Folded Spill
; PWR8-NEXT: std 30, 96(1) # 8-byte Folded Spill
; PWR8-NEXT: li 30, 0
; PWR8-NEXT: li 29, 16
; PWR8-NEXT: addi 4, 4, x@toc@l
; PWR8-NEXT: std 26, 64(1) # 8-byte Folded Spill
; PWR8-NEXT: li 29, 16
; PWR8-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PWR8-NEXT: addis 3, 2, a@toc@ha
; PWR8-NEXT: std 26, 64(1) # 8-byte Folded Spill
; PWR8-NEXT: std 27, 72(1) # 8-byte Folded Spill
; PWR8-NEXT: addi 3, 3, a@toc@l
; PWR8-NEXT: lxvd2x 0, 0, 3
Expand Down Expand Up @@ -133,11 +133,11 @@ define void @fpext_ctrloop_fp128(ptr %a) nounwind {
; PWR8-NEXT: std 28, -32(1) # 8-byte Folded Spill
; PWR8-NEXT: std 29, -24(1) # 8-byte Folded Spill
; PWR8-NEXT: std 30, -16(1) # 8-byte Folded Spill
; PWR8-NEXT: std 0, 16(1)
; PWR8-NEXT: stdu 1, -64(1)
; PWR8-NEXT: addis 4, 2, y@toc@ha
; PWR8-NEXT: addi 30, 3, -8
; PWR8-NEXT: li 28, 0
; PWR8-NEXT: std 0, 80(1)
; PWR8-NEXT: addi 4, 4, y@toc@l
; PWR8-NEXT: addi 29, 4, -16
; PWR8-NEXT: .p2align 4
Expand Down Expand Up @@ -206,11 +206,11 @@ define void @fptrunc_ctrloop_fp128(ptr %a) nounwind {
; PWR8-NEXT: std 28, -32(1) # 8-byte Folded Spill
; PWR8-NEXT: std 29, -24(1) # 8-byte Folded Spill
; PWR8-NEXT: std 30, -16(1) # 8-byte Folded Spill
; PWR8-NEXT: std 0, 16(1)
; PWR8-NEXT: stdu 1, -64(1)
; PWR8-NEXT: addis 4, 2, x@toc@ha
; PWR8-NEXT: addi 30, 3, -8
; PWR8-NEXT: li 28, 0
; PWR8-NEXT: std 0, 80(1)
; PWR8-NEXT: addi 4, 4, x@toc@l
; PWR8-NEXT: addi 29, 4, -16
; PWR8-NEXT: .p2align 4
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/cxx_tlscc64.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,8 @@ define cxx_fast_tlscc nonnull ptr @_ZTW2sg() nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -48(1)
; CHECK-NEXT: std 0, 64(1)
; CHECK-NEXT: addis 3, 13, __tls_guard@tprel@ha
; CHECK-NEXT: lbz 4, __tls_guard@tprel@l(3)
; CHECK-NEXT: andi. 4, 4, 1
Expand Down
35 changes: 4 additions & 31 deletions llvm/test/CodeGen/PowerPC/disable-ctr-ppcf128.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -11,40 +11,11 @@
declare ppc_fp128 @llvm.fmuladd.ppcf128(ppc_fp128, ppc_fp128, ppc_fp128) #2

define ppc_fp128 @test_ctr0() {
; LE-LABEL: test_ctr0:
; LE: # %bb.0: # %bb
; LE-NEXT: mflr r0
; LE-NEXT: .cfi_def_cfa_offset 48
; LE-NEXT: .cfi_offset lr, 16
; LE-NEXT: .cfi_offset r30, -16
; LE-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; LE-NEXT: std r0, 16(r1)
; LE-NEXT: stdu r1, -48(r1)
; LE-NEXT: xxlxor f1, f1, f1
; LE-NEXT: li r30, 0
; LE-NEXT: xxlxor f2, f2, f2
; LE-NEXT: .p2align 5
; LE-NEXT: .LBB0_1: # %bb6
; LE-NEXT: #
; LE-NEXT: xxlxor f3, f3, f3
; LE-NEXT: xxlxor f4, f4, f4
; LE-NEXT: bl __gcc_qadd
; LE-NEXT: nop
; LE-NEXT: addi r30, r30, 4
; LE-NEXT: cmpldi r30, 0
; LE-NEXT: bne cr0, .LBB0_1
; LE-NEXT: # %bb.2: # %bb14
; LE-NEXT: addi r1, r1, 48
; LE-NEXT: ld r0, 16(r1)
; LE-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; LE-NEXT: mtlr r0
; LE-NEXT: blr
;
; P9BE-LABEL: test_ctr0:
; P9BE: # %bb.0: # %bb
; P9BE-NEXT: mflr r0
; P9BE-NEXT: std r0, 16(r1)
; P9BE-NEXT: stdu r1, -128(r1)
; P9BE-NEXT: std r0, 144(r1)
; P9BE-NEXT: .cfi_def_cfa_offset 128
; P9BE-NEXT: .cfi_offset lr, 16
; P9BE-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -72,8 +43,8 @@ define ppc_fp128 @test_ctr0() {
; P8BE-LABEL: test_ctr0:
; P8BE: # %bb.0: # %bb
; P8BE-NEXT: mflr r0
; P8BE-NEXT: std r0, 16(r1)
; P8BE-NEXT: stdu r1, -128(r1)
; P8BE-NEXT: std r0, 144(r1)
; P8BE-NEXT: .cfi_def_cfa_offset 128
; P8BE-NEXT: .cfi_offset lr, 16
; P8BE-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -111,3 +82,5 @@ bb6: ; preds = %bb6, %bb
bb14: ; preds = %bb6
ret ppc_fp128 %i8
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; LE: {{.*}}
28 changes: 14 additions & 14 deletions llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -11,8 +11,8 @@ define void @call_test_byval_mem1() #0 {
; CHECK-LABEL: call_test_byval_mem1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
Expand Down Expand Up @@ -45,8 +45,8 @@ define void @call_test_byval_mem1_2() #0 {
; CHECK-LABEL: call_test_byval_mem1_2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -112(1)
; CHECK-NEXT: std 0, 128(1)
; CHECK-NEXT: .cfi_def_cfa_offset 112
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
Expand Down Expand Up @@ -86,8 +86,8 @@ define void @call_test_byval_mem1_3() #0 {
; CHECK-LABEL: call_test_byval_mem1_3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
Expand Down Expand Up @@ -126,8 +126,8 @@ define void @call_test_byval_mem1_4() #0 {
; CHECK-LABEL: call_test_byval_mem1_4:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -112(1)
; CHECK-NEXT: std 0, 128(1)
; CHECK-NEXT: .cfi_def_cfa_offset 112
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
Expand Down Expand Up @@ -168,8 +168,8 @@ define void @call_test_byval_mem1_5() #0 {
; CHECK-LABEL: call_test_byval_mem1_5:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
Expand Down Expand Up @@ -211,8 +211,8 @@ define void @call_test_byval_mem2() #0 {
; CHECK-LABEL: call_test_byval_mem2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC1@toc@ha
Expand Down Expand Up @@ -247,8 +247,8 @@ define void @call_test_byval_mem3() #0 {
; CHECK-LABEL: call_test_byval_mem3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC2@toc@ha
Expand Down Expand Up @@ -290,8 +290,8 @@ define void @call_test_byval_mem4() #0 {
; CHECK-LABEL: call_test_byval_mem4:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC3@toc@ha
Expand Down Expand Up @@ -326,8 +326,8 @@ define void @call_test_byval_mem8() #0 {
; CHECK-LABEL: call_test_byval_mem8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC4@toc@ha
Expand Down Expand Up @@ -363,8 +363,8 @@ define void @call_test_byval_mem32() #0 {
; CHECK-LABEL: call_test_byval_mem32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC5@toc@ha
Expand Down Expand Up @@ -403,8 +403,8 @@ define void @call_test_byval_mem32_2() #0 {
; CHECK-LABEL: call_test_byval_mem32_2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC5@toc@ha
Expand Down Expand Up @@ -444,8 +444,8 @@ define void @call_test_byval_mem32_3() #0 {
; CHECK-LABEL: call_test_byval_mem32_3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -112(1)
; CHECK-NEXT: std 0, 128(1)
; CHECK-NEXT: .cfi_def_cfa_offset 112
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC5@toc@ha
Expand Down Expand Up @@ -498,8 +498,8 @@ define void @call_test_byval_mem64() #0 {
; CHECK-LABEL: call_test_byval_mem64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC6@toc@ha
Expand Down Expand Up @@ -548,8 +548,8 @@ define void @call_test_byval_mem65() #0 {
; CHECK-LABEL: call_test_byval_mem65:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -112(1)
; CHECK-NEXT: std 0, 128(1)
; CHECK-NEXT: .cfi_def_cfa_offset 112
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC7@toc@ha
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/expand-foldable-isel.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -31,11 +31,11 @@ define void @_ZN3pov6ot_insEPPNS_14ot_node_structEPNS_15ot_block_structEPNS_12ot
; CHECK-GEN-ISEL-TRUE-NEXT: .cfi_offset r30, -16
; CHECK-GEN-ISEL-TRUE-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-GEN-ISEL-TRUE-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-GEN-ISEL-TRUE-NEXT: std r0, 16(r1)
; CHECK-GEN-ISEL-TRUE-NEXT: stdu r1, -64(r1)
; CHECK-GEN-ISEL-TRUE-NEXT: mr r30, r3
; CHECK-GEN-ISEL-TRUE-NEXT: # implicit-def: $x3
; CHECK-GEN-ISEL-TRUE-NEXT: # implicit-def: $r29
; CHECK-GEN-ISEL-TRUE-NEXT: std r0, 80(r1)
; CHECK-GEN-ISEL-TRUE-NEXT: .p2align 4
; CHECK-GEN-ISEL-TRUE-NEXT: .LBB0_1: # %while.cond11
; CHECK-GEN-ISEL-TRUE-NEXT: #
Expand Down Expand Up @@ -71,11 +71,11 @@ define void @_ZN3pov6ot_insEPPNS_14ot_node_structEPNS_15ot_block_structEPNS_12ot
; CHECK-NEXT: .cfi_offset r30, -16
; CHECK-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-NEXT: std r0, 16(r1)
; CHECK-NEXT: stdu r1, -64(r1)
; CHECK-NEXT: mr r30, r3
; CHECK-NEXT: # implicit-def: $x3
; CHECK-NEXT: # implicit-def: $r29
; CHECK-NEXT: std r0, 80(r1)
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %while.cond11
; CHECK-NEXT: #
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/PowerPC/f128-aggregates.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -355,8 +355,8 @@ define fp128 @testMixedAggregate_03([4 x i128] %sa.coerce) {
; CHECK-P8-LABEL: testMixedAggregate_03:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -96(r1)
; CHECK-P8-NEXT: std r0, 112(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 96
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -596,16 +596,16 @@ define fp128 @sum_float128(i32 signext %count, ...) {
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: addis r11, r2, .LCPI17_0@toc@ha
; CHECK-P8-NEXT: cmpwi r3, 0
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: std r4, 104(r1)
; CHECK-P8-NEXT: std r5, 112(r1)
; CHECK-P8-NEXT: std r6, 120(r1)
; CHECK-P8-NEXT: std r7, 128(r1)
; CHECK-P8-NEXT: addi r11, r11, .LCPI17_0@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r11
; CHECK-P8-NEXT: std r7, 128(r1)
; CHECK-P8-NEXT: std r8, 136(r1)
; CHECK-P8-NEXT: std r9, 144(r1)
; CHECK-P8-NEXT: std r10, 152(r1)
Expand Down
132 changes: 66 additions & 66 deletions llvm/test/CodeGen/PowerPC/f128-arith.ll
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16 changes: 8 additions & 8 deletions llvm/test/CodeGen/PowerPC/f128-branch-cond.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -8,8 +8,8 @@ define i32 @test_choice1(fp128 %a, fp128 %b) #0 {
; P8-LABEL: test_choice1:
; P8: # %bb.0: # %entry
; P8-NEXT: mflr 0
; P8-NEXT: std 0, 16(1)
; P8-NEXT: stdu 1, -112(1)
; P8-NEXT: std 0, 128(1)
; P8-NEXT: bl __nekf2
; P8-NEXT: nop
; P8-NEXT: # kill: def $r3 killed $r3 killed $x3
Expand All @@ -36,8 +36,8 @@ define i32 @test_choice1(fp128 %a, fp128 %b) #0 {
; P9-LABEL: test_choice1:
; P9: # %bb.0: # %entry
; P9-NEXT: mflr 0
; P9-NEXT: std 0, 16(1)
; P9-NEXT: stdu 1, -112(1)
; P9-NEXT: std 0, 128(1)
; P9-NEXT: xscmpuqp 0, 2, 3
; P9-NEXT: bne 0, .LBB0_2
; P9-NEXT: b .LBB0_1
Expand Down Expand Up @@ -78,8 +78,8 @@ define i32 @test_choice2(fp128 %a, fp128 %b) #0 {
; P8-LABEL: test_choice2:
; P8: # %bb.0: # %entry
; P8-NEXT: mflr 0
; P8-NEXT: std 0, 16(1)
; P8-NEXT: stdu 1, -112(1)
; P8-NEXT: std 0, 128(1)
; P8-NEXT: bl __lekf2
; P8-NEXT: nop
; P8-NEXT: # kill: def $r3 killed $r3 killed $x3
Expand All @@ -106,8 +106,8 @@ define i32 @test_choice2(fp128 %a, fp128 %b) #0 {
; P9-LABEL: test_choice2:
; P9: # %bb.0: # %entry
; P9-NEXT: mflr 0
; P9-NEXT: std 0, 16(1)
; P9-NEXT: stdu 1, -112(1)
; P9-NEXT: std 0, 128(1)
; P9-NEXT: xscmpuqp 0, 2, 3
; P9-NEXT: crmove 20, 3
; P9-NEXT: crnot 21, 20
Expand Down Expand Up @@ -155,8 +155,8 @@ define i32 @test_choice3(fp128 %a, fp128 %b) #0 {
; P8-LABEL: test_choice3:
; P8: # %bb.0: # %entry
; P8-NEXT: mflr 0
; P8-NEXT: std 0, 16(1)
; P8-NEXT: stdu 1, -112(1)
; P8-NEXT: std 0, 128(1)
; P8-NEXT: bl __ltkf2
; P8-NEXT: nop
; P8-NEXT: # kill: def $r3 killed $r3 killed $x3
Expand All @@ -183,8 +183,8 @@ define i32 @test_choice3(fp128 %a, fp128 %b) #0 {
; P9-LABEL: test_choice3:
; P9: # %bb.0: # %entry
; P9-NEXT: mflr 0
; P9-NEXT: std 0, 16(1)
; P9-NEXT: stdu 1, -112(1)
; P9-NEXT: std 0, 128(1)
; P9-NEXT: xscmpuqp 0, 2, 3
; P9-NEXT: bge 0, .LBB2_2
; P9-NEXT: b .LBB2_1
Expand Down Expand Up @@ -225,8 +225,8 @@ define i32 @test_choice4(fp128 %a, fp128 %b) #0 {
; P8-LABEL: test_choice4:
; P8: # %bb.0: # %entry
; P8-NEXT: mflr 0
; P8-NEXT: std 0, 16(1)
; P8-NEXT: stdu 1, -112(1)
; P8-NEXT: std 0, 128(1)
; P8-NEXT: bl __eqkf2
; P8-NEXT: nop
; P8-NEXT: # kill: def $r3 killed $r3 killed $x3
Expand All @@ -253,8 +253,8 @@ define i32 @test_choice4(fp128 %a, fp128 %b) #0 {
; P9-LABEL: test_choice4:
; P9: # %bb.0: # %entry
; P9-NEXT: mflr 0
; P9-NEXT: std 0, 16(1)
; P9-NEXT: stdu 1, -112(1)
; P9-NEXT: std 0, 128(1)
; P9-NEXT: xscmpuqp 0, 2, 3
; P9-NEXT: beq 0, .LBB3_2
; P9-NEXT: b .LBB3_1
Expand Down
30 changes: 15 additions & 15 deletions llvm/test/CodeGen/PowerPC/f128-compare.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -27,8 +27,8 @@ define dso_local signext i32 @greater_qp() {
; CHECK-P8-LABEL: greater_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
Expand Down Expand Up @@ -75,8 +75,8 @@ define dso_local signext i32 @less_qp() {
; CHECK-P8-LABEL: less_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
Expand Down Expand Up @@ -121,8 +121,8 @@ define dso_local signext i32 @greater_eq_qp() {
; CHECK-P8-LABEL: greater_eq_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
Expand Down Expand Up @@ -168,8 +168,8 @@ define dso_local signext i32 @less_eq_qp() {
; CHECK-P8-LABEL: less_eq_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
Expand Down Expand Up @@ -217,8 +217,8 @@ define dso_local signext i32 @equal_qp() {
; CHECK-P8-LABEL: equal_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
Expand Down Expand Up @@ -263,8 +263,8 @@ define dso_local signext i32 @not_greater_qp() {
; CHECK-P8-LABEL: not_greater_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
Expand Down Expand Up @@ -312,8 +312,8 @@ define dso_local signext i32 @not_less_qp() {
; CHECK-P8-LABEL: not_less_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
Expand Down Expand Up @@ -360,8 +360,8 @@ define dso_local signext i32 @not_greater_eq_qp() {
; CHECK-P8-LABEL: not_greater_eq_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
Expand Down Expand Up @@ -407,8 +407,8 @@ define dso_local signext i32 @not_less_eq_qp() {
; CHECK-P8-LABEL: not_less_eq_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
Expand Down Expand Up @@ -455,8 +455,8 @@ define dso_local signext i32 @not_equal_qp() {
; CHECK-P8-LABEL: not_equal_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
Expand Down Expand Up @@ -503,8 +503,8 @@ define fp128 @greater_sel_qp() {
; CHECK-P8-LABEL: greater_sel_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset v30, -32
Expand Down Expand Up @@ -566,8 +566,8 @@ define fp128 @less_sel_qp() {
; CHECK-P8-LABEL: less_sel_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset v30, -32
Expand Down Expand Up @@ -630,8 +630,8 @@ define fp128 @greater_eq_sel_qp() {
; CHECK-P8-LABEL: greater_eq_sel_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset v30, -32
Expand Down Expand Up @@ -694,8 +694,8 @@ define fp128 @less_eq_sel_qp() {
; CHECK-P8-LABEL: less_eq_sel_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset v30, -32
Expand Down Expand Up @@ -757,8 +757,8 @@ define fp128 @equal_sel_qp() {
; CHECK-P8-LABEL: equal_sel_qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset v30, -32
Expand Down
138 changes: 69 additions & 69 deletions llvm/test/CodeGen/PowerPC/f128-conv.ll
View file

Large diffs are not rendered by default.

34 changes: 17 additions & 17 deletions llvm/test/CodeGen/PowerPC/f128-fma.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -18,8 +18,8 @@ define void @qpFmadd(ptr nocapture readonly %a, ptr nocapture %b,
; CHECK-P8-LABEL: qpFmadd:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -73,8 +73,8 @@ define void @qpFmadd_02(ptr nocapture readonly %a,
; CHECK-P8-LABEL: qpFmadd_02:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -136,12 +136,12 @@ define void @qpFmadd_03(ptr nocapture readonly %a,
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: mr r29, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: bl __mulkf3
Expand Down Expand Up @@ -184,8 +184,8 @@ define void @qpFnmadd(ptr nocapture readonly %a,
; CHECK-P8-LABEL: qpFnmadd:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -96(r1)
; CHECK-P8-NEXT: std r0, 112(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 96
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -254,12 +254,12 @@ define void @qpFnmadd_02(ptr nocapture readonly %a,
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: mr r29, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: bl __mulkf3
Expand Down Expand Up @@ -309,8 +309,8 @@ define void @qpFmsub(ptr nocapture readonly %a,
; CHECK-P8-LABEL: qpFmsub:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -372,12 +372,12 @@ define void @qpFmsub_02(ptr nocapture readonly %a,
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: mr r29, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: bl __mulkf3
Expand Down Expand Up @@ -421,8 +421,8 @@ define void @qpFnmsub(ptr nocapture readonly %a,
; CHECK-P8-LABEL: qpFnmsub:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -96(r1)
; CHECK-P8-NEXT: std r0, 112(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 96
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -491,12 +491,12 @@ define void @qpFnmsub_02(ptr nocapture readonly %a,
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: mr r29, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: bl __mulkf3
Expand Down
26 changes: 13 additions & 13 deletions llvm/test/CodeGen/PowerPC/f128-passByValue.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -39,8 +39,8 @@ define fp128 @loadConstant2(fp128 %a, fp128 %b) {
; CHECK-P8-LABEL: loadConstant2:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl __addkf3
Expand Down Expand Up @@ -74,8 +74,8 @@ define signext i32 @fp128Param(fp128 %a) {
; CHECK-P8-LABEL: fp128Param:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl __fixkfsi
Expand All @@ -101,8 +101,8 @@ define fp128 @fp128Return(fp128 %a, fp128 %b) {
; CHECK-P8-LABEL: fp128Return:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl __addkf3
Expand Down Expand Up @@ -131,8 +131,8 @@ define fp128 @fp128Array(ptr nocapture readonly %farray,
; CHECK-P8-LABEL: fp128Array:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: sldi r4, r4, 4
Expand Down Expand Up @@ -183,8 +183,8 @@ define fp128 @maxVecParam(fp128 %p1, fp128 %p2, fp128 %p3, fp128 %p4, fp128 %p5,
; CHECK-P8-LABEL: maxVecParam:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -224(r1)
; CHECK-P8-NEXT: std r0, 240(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 224
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset v21, -176
Expand Down Expand Up @@ -326,8 +326,8 @@ define fp128 @mixParam_01(fp128 %a, i32 signext %i, fp128 %b) {
; CHECK-P8-LABEL: mixParam_01:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -372,8 +372,8 @@ define fastcc fp128 @mixParam_01f(fp128 %a, i32 signext %i, fp128 %b) {
; CHECK-P8-LABEL: mixParam_01f:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -426,8 +426,8 @@ define fp128 @mixParam_02(fp128 %p1, double %p2, ptr nocapture %p3,
; CHECK-P8-LABEL: mixParam_02:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset f31, -8
Expand Down Expand Up @@ -499,8 +499,8 @@ define fastcc fp128 @mixParam_02f(fp128 %p1, double %p2, ptr nocapture %p3,
; CHECK-P8-LABEL: mixParam_02f:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset f31, -8
Expand Down Expand Up @@ -571,8 +571,8 @@ define void @mixParam_03(fp128 %f1, ptr nocapture %d1, <4 x i32> %vec1,
; CHECK-P8-LABEL: mixParam_03:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -635,8 +635,8 @@ define fastcc void @mixParam_03f(fp128 %f1, ptr nocapture %d1, <4 x i32> %vec1,
; CHECK-P8-LABEL: mixParam_03f:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -80(r1)
; CHECK-P8-NEXT: std r0, 96(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 80
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
Expand Down Expand Up @@ -686,8 +686,8 @@ define signext i32 @noopt_call_crash() #0 {
; CHECK-LABEL: noopt_call_crash:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
; CHECK-NEXT: std r0, 16(r1)
; CHECK-NEXT: stdu r1, -96(r1)
; CHECK-NEXT: std r0, 112(r1)
; CHECK-NEXT: .cfi_def_cfa_offset 96
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: bl in
Expand All @@ -703,8 +703,8 @@ define signext i32 @noopt_call_crash() #0 {
; CHECK-P8-LABEL: noopt_call_crash:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -96(r1)
; CHECK-P8-NEXT: std r0, 112(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 96
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl in
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/PowerPC/f128-rounding.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,10 +20,10 @@ define void @qp_trunc(ptr nocapture readonly %a, ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl truncf128
; CHECK-P8-NEXT: nop
Expand Down Expand Up @@ -57,10 +57,10 @@ define void @qp_rint(ptr nocapture readonly %a, ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl rintf128
; CHECK-P8-NEXT: nop
Expand Down Expand Up @@ -94,10 +94,10 @@ define void @qp_nearbyint(ptr nocapture readonly %a, ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl nearbyintf128
; CHECK-P8-NEXT: nop
Expand Down Expand Up @@ -131,10 +131,10 @@ define void @qp_round(ptr nocapture readonly %a, ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl roundf128
; CHECK-P8-NEXT: nop
Expand Down Expand Up @@ -168,10 +168,10 @@ define void @qp_floor(ptr nocapture readonly %a, ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl floorf128
; CHECK-P8-NEXT: nop
Expand Down Expand Up @@ -205,10 +205,10 @@ define void @qp_ceil(ptr nocapture readonly %a, ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl ceilf128
; CHECK-P8-NEXT: nop
Expand Down
92 changes: 46 additions & 46 deletions llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll
View file

Large diffs are not rendered by default.

6 changes: 3 additions & 3 deletions llvm/test/CodeGen/PowerPC/fast-isel-branch.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -8,8 +8,8 @@ define signext i32 @bar() #0 {
; ELF64-LABEL: bar:
; ELF64: # %bb.0: # %entry
; ELF64-NEXT: mflr 0
; ELF64-NEXT: std 0, 16(1)
; ELF64-NEXT: stdu 1, -48(1)
; ELF64-NEXT: std 0, 64(1)
; ELF64-NEXT: .cfi_def_cfa_offset 48
; ELF64-NEXT: .cfi_offset lr, 16
; ELF64-NEXT: li 3, 0
Expand Down Expand Up @@ -44,16 +44,16 @@ define signext i32 @bar() #0 {
; AIX64-LABEL: bar:
; AIX64: # %bb.0: # %entry
; AIX64-NEXT: mflr 0
; AIX64-NEXT: std 0, 16(1)
; AIX64-NEXT: stdu 1, -128(1)
; AIX64-NEXT: std 0, 144(1)
; AIX64-NEXT: li 3, 0
; AIX64-NEXT: stw 3, 124(1)
; AIX64-NEXT: li 3, 0
; AIX64-NEXT: stw 3, 120(1)
; AIX64-NEXT: L..BB0_1: # %for.cond
; AIX64-NEXT: #
; AIX64-NEXT: lwz 3, 120(1)
; AIX64-NEXT: ld 4, L..C0(2)
; AIX64-NEXT: ld 4, L..C0(2) # @x
; AIX64-NEXT: lwz 4, 0(4)
; AIX64-NEXT: cmpw 3, 4
; AIX64-NEXT: bge 0, L..BB0_4
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/float-load-store-pair.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -29,9 +29,9 @@ define dso_local signext i32 @test() nounwind {
; CHECK-LABEL: test:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -192(1)
; CHECK-NEXT: addis 3, 2, a1@toc@ha
; CHECK-NEXT: std 0, 208(1)
; CHECK-NEXT: addis 5, 2, a16@toc@ha
; CHECK-NEXT: addis 6, 2, a17@toc@ha
; CHECK-NEXT: addis 4, 2, a15@toc@ha
Expand Down
7 changes: 5 additions & 2 deletions llvm/test/CodeGen/PowerPC/fmf-propagation.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -593,8 +593,8 @@ define double @log2_approx(double %x) nounwind {
; FMF-LABEL: log2_approx:
; FMF: # %bb.0:
; FMF-NEXT: mflr 0
; FMF-NEXT: std 0, 16(1)
; FMF-NEXT: stdu 1, -32(1)
; FMF-NEXT: std 0, 48(1)
; FMF-NEXT: bl log2
; FMF-NEXT: nop
; FMF-NEXT: addi 1, 1, 32
Expand All @@ -605,8 +605,8 @@ define double @log2_approx(double %x) nounwind {
; GLOBAL-LABEL: log2_approx:
; GLOBAL: # %bb.0:
; GLOBAL-NEXT: mflr 0
; GLOBAL-NEXT: std 0, 16(1)
; GLOBAL-NEXT: stdu 1, -32(1)
; GLOBAL-NEXT: std 0, 48(1)
; GLOBAL-NEXT: bl log2
; GLOBAL-NEXT: nop
; GLOBAL-NEXT: addi 1, 1, 32
Expand Down Expand Up @@ -644,3 +644,6 @@ define float @fneg_fsub_nozeros_1(float %x, float %y, float %z) {

attributes #0 = { "denormal-fp-math"="ieee,ieee" }
attributes #1 = { "denormal-fp-math"="preserve-sign,preserve-sign" }
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; FMFDEBUG: {{.*}}
; GLOBALDEBUG: {{.*}}
20 changes: 10 additions & 10 deletions llvm/test/CodeGen/PowerPC/fminnum.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,8 @@ define float @test_fminf(float %x, float %y) {
; CHECK-LABEL: test_fminf:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stw 0, 4(1)
; CHECK-NEXT: stwu 1, -16(1)
; CHECK-NEXT: stw 0, 20(1)
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset lr, 4
; CHECK-NEXT: bl fminf
Expand All @@ -33,8 +33,8 @@ define double @test_fmin(double %x, double %y) {
; CHECK-LABEL: test_fmin:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stw 0, 4(1)
; CHECK-NEXT: stwu 1, -16(1)
; CHECK-NEXT: stw 0, 20(1)
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset lr, 4
; CHECK-NEXT: bl fmin
Expand All @@ -50,8 +50,8 @@ define ppc_fp128 @test_fminl(ppc_fp128 %x, ppc_fp128 %y) {
; CHECK-LABEL: test_fminl:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stw 0, 4(1)
; CHECK-NEXT: stwu 1, -112(1)
; CHECK-NEXT: stw 0, 116(1)
; CHECK-NEXT: .cfi_def_cfa_offset 112
; CHECK-NEXT: .cfi_offset lr, 4
; CHECK-NEXT: stfd 1, 40(1)
Expand Down Expand Up @@ -103,8 +103,8 @@ define float @test_intrinsic_fmin_f32(float %x, float %y) {
; CHECK-LABEL: test_intrinsic_fmin_f32:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stw 0, 4(1)
; CHECK-NEXT: stwu 1, -16(1)
; CHECK-NEXT: stw 0, 20(1)
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset lr, 4
; CHECK-NEXT: bl fminf
Expand All @@ -120,8 +120,8 @@ define double @test_intrinsic_fmin_f64(double %x, double %y) {
; CHECK-LABEL: test_intrinsic_fmin_f64:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stw 0, 4(1)
; CHECK-NEXT: stwu 1, -16(1)
; CHECK-NEXT: stw 0, 20(1)
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset lr, 4
; CHECK-NEXT: bl fmin
Expand All @@ -137,8 +137,8 @@ define ppc_fp128 @test_intrinsic_fmin_f128(ppc_fp128 %x, ppc_fp128 %y) {
; CHECK-LABEL: test_intrinsic_fmin_f128:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stw 0, 4(1)
; CHECK-NEXT: stwu 1, -112(1)
; CHECK-NEXT: stw 0, 116(1)
; CHECK-NEXT: .cfi_def_cfa_offset 112
; CHECK-NEXT: .cfi_offset lr, 4
; CHECK-NEXT: stfd 1, 40(1)
Expand Down Expand Up @@ -190,8 +190,8 @@ define <2 x float> @test_intrinsic_fminf_v2f32(<2 x float> %x, <2 x float> %y) {
; CHECK-LABEL: test_intrinsic_fminf_v2f32:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stw 0, 4(1)
; CHECK-NEXT: stwu 1, -32(1)
; CHECK-NEXT: stw 0, 36(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 4
; CHECK-NEXT: .cfi_offset f29, -24
Expand Down Expand Up @@ -225,8 +225,8 @@ define <4 x float> @test_intrinsic_fmin_v4f32(<4 x float> %x, <4 x float> %y) {
; CHECK-LABEL: test_intrinsic_fmin_v4f32:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stw 0, 4(1)
; CHECK-NEXT: stwu 1, -64(1)
; CHECK-NEXT: stw 0, 68(1)
; CHECK-NEXT: .cfi_def_cfa_offset 64
; CHECK-NEXT: .cfi_offset lr, 4
; CHECK-NEXT: .cfi_offset f25, -56
Expand Down Expand Up @@ -286,8 +286,8 @@ define <8 x float> @test_intrinsic_fmin_v8f32(<8 x float> %x, <8 x float> %y) {
; CHECK-LABEL: test_intrinsic_fmin_v8f32:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stw 0, 4(1)
; CHECK-NEXT: stwu 1, -128(1)
; CHECK-NEXT: stw 0, 132(1)
; CHECK-NEXT: .cfi_def_cfa_offset 128
; CHECK-NEXT: .cfi_offset lr, 4
; CHECK-NEXT: .cfi_offset f17, -120
Expand Down Expand Up @@ -399,8 +399,8 @@ define ppc_fp128 @fminnum_const(ppc_fp128 %0) {
; CHECK-LABEL: fminnum_const:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stw 0, 4(1)
; CHECK-NEXT: stwu 1, -96(1)
; CHECK-NEXT: stw 0, 100(1)
; CHECK-NEXT: .cfi_def_cfa_offset 96
; CHECK-NEXT: .cfi_offset lr, 4
; CHECK-NEXT: stfd 1, 40(1)
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/fp-int128-fp-combine.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -8,8 +8,8 @@ define float @f_i128_f(float %v) nounwind {
; CHECK-LABEL: f_i128_f:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: bl __fixsfti
; CHECK-NEXT: nop
; CHECK-NEXT: bl __floattisf
Expand Down
92 changes: 46 additions & 46 deletions llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll
View file

Large diffs are not rendered by default.

16 changes: 8 additions & 8 deletions llvm/test/CodeGen/PowerPC/fp-strict-conv-spe.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -38,8 +38,8 @@ define i64 @d_to_i64(double %m) #0 {
; SPE-LABEL: d_to_i64:
; SPE: # %bb.0: # %entry
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: evmergelo r4, r3, r4
Expand All @@ -60,8 +60,8 @@ define i64 @d_to_u64(double %m) #0 {
; SPE-LABEL: d_to_u64:
; SPE: # %bb.0: # %entry
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: evmergelo r4, r3, r4
Expand Down Expand Up @@ -103,8 +103,8 @@ define i64 @f_to_i64(float %m) #0 {
; SPE-LABEL: f_to_i64:
; SPE: # %bb.0: # %entry
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: bl __fixsfdi
Expand All @@ -121,8 +121,8 @@ define i64 @f_to_u64(float %m) #0 {
; SPE-LABEL: f_to_u64:
; SPE: # %bb.0: # %entry
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: bl __fixunssfdi
Expand Down Expand Up @@ -162,8 +162,8 @@ define double @i64_to_d(i64 %m) #0 {
; SPE-LABEL: i64_to_d:
; SPE: # %bb.0: # %entry
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: bl __floatdidf
Expand Down Expand Up @@ -197,8 +197,8 @@ define double @u64_to_d(i64 %m) #0 {
; SPE-LABEL: u64_to_d:
; SPE: # %bb.0: # %entry
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: bl __floatundidf
Expand Down Expand Up @@ -229,8 +229,8 @@ define float @i64_to_f(i64 %m) #0 {
; SPE-LABEL: i64_to_f:
; SPE: # %bb.0: # %entry
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: bl __floatdisf
Expand All @@ -257,8 +257,8 @@ define float @u64_to_f(i64 %m) #0 {
; SPE-LABEL: u64_to_f:
; SPE: # %bb.0: # %entry
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: bl __floatundisf
Expand Down
18 changes: 9 additions & 9 deletions llvm/test/CodeGen/PowerPC/fp-strict-f128.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -21,8 +21,8 @@ define fp128 @fadd_f128(fp128 %f1, fp128 %f2) #0 {
; CHECK-P8-LABEL: fadd_f128:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl __addkf3
Expand All @@ -47,8 +47,8 @@ define fp128 @fsub_f128(fp128 %f1, fp128 %f2) #0 {
; CHECK-P8-LABEL: fsub_f128:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl __subkf3
Expand All @@ -73,8 +73,8 @@ define fp128 @fmul_f128(fp128 %f1, fp128 %f2) #0 {
; CHECK-P8-LABEL: fmul_f128:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl __mulkf3
Expand All @@ -99,8 +99,8 @@ define fp128 @fdiv_f128(fp128 %f1, fp128 %f2) #0 {
; CHECK-P8-LABEL: fdiv_f128:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl __divkf3
Expand All @@ -126,8 +126,8 @@ define fp128 @fmadd_f128(fp128 %f0, fp128 %f1, fp128 %f2) #0 {
; CHECK-P8-LABEL: fmadd_f128:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl fmaf128
Expand All @@ -153,8 +153,8 @@ define fp128 @fmsub_f128(fp128 %f0, fp128 %f1, fp128 %f2) #0 {
; CHECK-P8-LABEL: fmsub_f128:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: xxswapd vs0, v4
Expand Down Expand Up @@ -189,8 +189,8 @@ define fp128 @fnmadd_f128(fp128 %f0, fp128 %f1, fp128 %f2) #0 {
; CHECK-P8-LABEL: fnmadd_f128:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl fmaf128
Expand Down Expand Up @@ -225,8 +225,8 @@ define fp128 @fnmsub_f128(fp128 %f0, fp128 %f1, fp128 %f2) #0 {
; CHECK-P8-LABEL: fnmsub_f128:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 64
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: xxswapd vs0, v4
Expand Down Expand Up @@ -270,8 +270,8 @@ define fp128 @fsqrt_f128(fp128 %f1) #0 {
; CHECK-P8-LABEL: fsqrt_f128:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl sqrtf128
Expand Down
96 changes: 48 additions & 48 deletions llvm/test/CodeGen/PowerPC/fp-strict-fcmp.ll
View file

Large diffs are not rendered by default.

12 changes: 6 additions & 6 deletions llvm/test/CodeGen/PowerPC/fp-strict-round.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -171,8 +171,8 @@ define double @nearbyint_f64(double %f1, double %f2) {
; P8-LABEL: nearbyint_f64:
; P8: # %bb.0:
; P8-NEXT: mflr r0
; P8-NEXT: std r0, 16(r1)
; P8-NEXT: stdu r1, -112(r1)
; P8-NEXT: std r0, 128(r1)
; P8-NEXT: .cfi_def_cfa_offset 112
; P8-NEXT: .cfi_offset lr, 16
; P8-NEXT: bl nearbyint
Expand All @@ -185,8 +185,8 @@ define double @nearbyint_f64(double %f1, double %f2) {
; P9-LABEL: nearbyint_f64:
; P9: # %bb.0:
; P9-NEXT: mflr r0
; P9-NEXT: std r0, 16(r1)
; P9-NEXT: stdu r1, -32(r1)
; P9-NEXT: std r0, 48(r1)
; P9-NEXT: .cfi_def_cfa_offset 32
; P9-NEXT: .cfi_offset lr, 16
; P9-NEXT: bl nearbyint
Expand All @@ -206,8 +206,8 @@ define <4 x float> @nearbyint_v4f32(<4 x float> %vf1, <4 x float> %vf2) {
; P8-LABEL: nearbyint_v4f32:
; P8: # %bb.0:
; P8-NEXT: mflr r0
; P8-NEXT: std r0, 16(r1)
; P8-NEXT: stdu r1, -176(r1)
; P8-NEXT: std r0, 192(r1)
; P8-NEXT: .cfi_def_cfa_offset 176
; P8-NEXT: .cfi_offset lr, 16
; P8-NEXT: .cfi_offset v29, -48
Expand Down Expand Up @@ -258,8 +258,8 @@ define <4 x float> @nearbyint_v4f32(<4 x float> %vf1, <4 x float> %vf2) {
; P9-LABEL: nearbyint_v4f32:
; P9: # %bb.0:
; P9-NEXT: mflr r0
; P9-NEXT: std r0, 16(r1)
; P9-NEXT: stdu r1, -80(r1)
; P9-NEXT: std r0, 96(r1)
; P9-NEXT: .cfi_def_cfa_offset 80
; P9-NEXT: .cfi_offset lr, 16
; P9-NEXT: .cfi_offset v29, -48
Expand Down Expand Up @@ -311,8 +311,8 @@ define <2 x double> @nearbyint_v2f64(<2 x double> %vf1, <2 x double> %vf2) {
; P8-LABEL: nearbyint_v2f64:
; P8: # %bb.0:
; P8-NEXT: mflr r0
; P8-NEXT: std r0, 16(r1)
; P8-NEXT: stdu r1, -160(r1)
; P8-NEXT: std r0, 176(r1)
; P8-NEXT: .cfi_def_cfa_offset 160
; P8-NEXT: .cfi_offset lr, 16
; P8-NEXT: .cfi_offset v30, -32
Expand Down Expand Up @@ -344,8 +344,8 @@ define <2 x double> @nearbyint_v2f64(<2 x double> %vf1, <2 x double> %vf2) {
; P9-LABEL: nearbyint_v2f64:
; P9: # %bb.0:
; P9-NEXT: mflr r0
; P9-NEXT: std r0, 16(r1)
; P9-NEXT: stdu r1, -64(r1)
; P9-NEXT: std r0, 80(r1)
; P9-NEXT: .cfi_def_cfa_offset 64
; P9-NEXT: .cfi_offset lr, 16
; P9-NEXT: .cfi_offset v30, -32
Expand Down
40 changes: 20 additions & 20 deletions llvm/test/CodeGen/PowerPC/fp-strict.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -594,8 +594,8 @@ define float @fmadd_f32(float %f0, float %f1, float %f2) #0 {
; SPE-LABEL: fmadd_f32:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: bl fmaf
Expand Down Expand Up @@ -625,8 +625,8 @@ define double @fmadd_f64(double %f0, double %f1, double %f2) #0 {
; SPE-LABEL: fmadd_f64:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: evmergelo r8, r7, r8
Expand Down Expand Up @@ -699,8 +699,8 @@ define <4 x float> @fmadd_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float>
; SPE-LABEL: fmadd_v4f32:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -96(r1)
; SPE-NEXT: stw r0, 100(r1)
; SPE-NEXT: .cfi_def_cfa_offset 96
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: .cfi_offset r21, -88
Expand Down Expand Up @@ -791,8 +791,8 @@ define <2 x double> @fmadd_v2f64(<2 x double> %vf0, <2 x double> %vf1, <2 x doub
; SPE-LABEL: fmadd_v2f64:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -64(r1)
; SPE-NEXT: stw r0, 68(r1)
; SPE-NEXT: .cfi_def_cfa_offset 64
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: .cfi_offset r26, -48
Expand Down Expand Up @@ -868,8 +868,8 @@ define float @fmsub_f32(float %f0, float %f1, float %f2) #0 {
; SPE-LABEL: fmsub_f32:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: efsneg r5, r5
Expand Down Expand Up @@ -901,8 +901,8 @@ define double @fmsub_f64(double %f0, double %f1, double %f2) #0 {
; SPE-LABEL: fmsub_f64:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: evmergelo r6, r5, r6
Expand Down Expand Up @@ -980,8 +980,8 @@ define <4 x float> @fmsub_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float>
; SPE-LABEL: fmsub_v4f32:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -96(r1)
; SPE-NEXT: stw r0, 100(r1)
; SPE-NEXT: .cfi_def_cfa_offset 96
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: .cfi_offset r21, -88
Expand Down Expand Up @@ -1077,8 +1077,8 @@ define <2 x double> @fmsub_v2f64(<2 x double> %vf0, <2 x double> %vf1, <2 x doub
; SPE-LABEL: fmsub_v2f64:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -64(r1)
; SPE-NEXT: stw r0, 68(r1)
; SPE-NEXT: .cfi_def_cfa_offset 64
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: .cfi_offset r26, -48
Expand Down Expand Up @@ -1157,8 +1157,8 @@ define float @fnmadd_f32(float %f0, float %f1, float %f2) #0 {
; SPE-LABEL: fnmadd_f32:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: bl fmaf
Expand Down Expand Up @@ -1190,8 +1190,8 @@ define double @fnmadd_f64(double %f0, double %f1, double %f2) #0 {
; SPE-LABEL: fnmadd_f64:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: evmergelo r8, r7, r8
Expand Down Expand Up @@ -1269,8 +1269,8 @@ define <4 x float> @fnmadd_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float>
; SPE-LABEL: fnmadd_v4f32:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -96(r1)
; SPE-NEXT: stw r0, 100(r1)
; SPE-NEXT: .cfi_def_cfa_offset 96
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: .cfi_offset r21, -88
Expand Down Expand Up @@ -1363,8 +1363,8 @@ define <2 x double> @fnmadd_v2f64(<2 x double> %vf0, <2 x double> %vf1, <2 x dou
; SPE-LABEL: fnmadd_v2f64:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -64(r1)
; SPE-NEXT: stw r0, 68(r1)
; SPE-NEXT: .cfi_def_cfa_offset 64
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: .cfi_offset r26, -48
Expand Down Expand Up @@ -1443,8 +1443,8 @@ define float @fnmsub_f32(float %f0, float %f1, float %f2) #0 {
; SPE-LABEL: fnmsub_f32:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: efsneg r5, r5
Expand Down Expand Up @@ -1478,8 +1478,8 @@ define double @fnmsub_f64(double %f0, double %f1, double %f2) #0 {
; SPE-LABEL: fnmsub_f64:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: evmergelo r6, r5, r6
Expand Down Expand Up @@ -1560,8 +1560,8 @@ define <4 x float> @fnmsub_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float>
; SPE-LABEL: fnmsub_v4f32:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -96(r1)
; SPE-NEXT: stw r0, 100(r1)
; SPE-NEXT: .cfi_def_cfa_offset 96
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: .cfi_offset r21, -88
Expand Down Expand Up @@ -1659,8 +1659,8 @@ define <2 x double> @fnmsub_v2f64(<2 x double> %vf0, <2 x double> %vf1, <2 x dou
; SPE-LABEL: fnmsub_v2f64:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -64(r1)
; SPE-NEXT: stw r0, 68(r1)
; SPE-NEXT: .cfi_def_cfa_offset 64
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: .cfi_offset r26, -48
Expand Down Expand Up @@ -1741,8 +1741,8 @@ define float @fsqrt_f32(float %f1) #0 {
; SPE-LABEL: fsqrt_f32:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: bl sqrtf
Expand Down Expand Up @@ -1771,8 +1771,8 @@ define double @fsqrt_f64(double %f1) #0 {
; SPE-LABEL: fsqrt_f64:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -16(r1)
; SPE-NEXT: stw r0, 20(r1)
; SPE-NEXT: .cfi_def_cfa_offset 16
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: evmergelo r4, r3, r4
Expand Down Expand Up @@ -1824,8 +1824,8 @@ define <4 x float> @fsqrt_v4f32(<4 x float> %vf1) #0 {
; SPE-LABEL: fsqrt_v4f32:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -48(r1)
; SPE-NEXT: stw r0, 52(r1)
; SPE-NEXT: .cfi_def_cfa_offset 48
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: .cfi_offset r27, -40
Expand Down Expand Up @@ -1883,8 +1883,8 @@ define <2 x double> @fsqrt_v2f64(<2 x double> %vf1) #0 {
; SPE-LABEL: fsqrt_v2f64:
; SPE: # %bb.0:
; SPE-NEXT: mflr r0
; SPE-NEXT: stw r0, 4(r1)
; SPE-NEXT: stwu r1, -48(r1)
; SPE-NEXT: stw r0, 52(r1)
; SPE-NEXT: .cfi_def_cfa_offset 48
; SPE-NEXT: .cfi_offset lr, 4
; SPE-NEXT: .cfi_offset r28, -32
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -92,8 +92,8 @@ define i128 @test_copysign(ppc_fp128 %x, ppc_fp128 %y) nounwind {
; PPC64-P8-LE-LABEL: test_copysign:
; PPC64-P8-LE: # %bb.0: # %entry
; PPC64-P8-LE-NEXT: mflr 0
; PPC64-P8-LE-NEXT: std 0, 16(1)
; PPC64-P8-LE-NEXT: stdu 1, -32(1)
; PPC64-P8-LE-NEXT: std 0, 48(1)
; PPC64-P8-LE-NEXT: bl copysignl
; PPC64-P8-LE-NEXT: nop
; PPC64-P8-LE-NEXT: mffprd 3, 1
Expand All @@ -106,8 +106,8 @@ define i128 @test_copysign(ppc_fp128 %x, ppc_fp128 %y) nounwind {
; PPC64-LE-LABEL: test_copysign:
; PPC64-LE: # %bb.0: # %entry
; PPC64-LE-NEXT: mflr 0
; PPC64-LE-NEXT: std 0, 16(1)
; PPC64-LE-NEXT: stdu 1, -48(1)
; PPC64-LE-NEXT: std 0, 64(1)
; PPC64-LE-NEXT: bl copysignl
; PPC64-LE-NEXT: nop
; PPC64-LE-NEXT: stfd 1, 32(1)
Expand All @@ -122,8 +122,8 @@ define i128 @test_copysign(ppc_fp128 %x, ppc_fp128 %y) nounwind {
; PPC64-P8-BE-LABEL: test_copysign:
; PPC64-P8-BE: # %bb.0: # %entry
; PPC64-P8-BE-NEXT: mflr 0
; PPC64-P8-BE-NEXT: std 0, 16(1)
; PPC64-P8-BE-NEXT: stdu 1, -112(1)
; PPC64-P8-BE-NEXT: std 0, 128(1)
; PPC64-P8-BE-NEXT: bl copysignl
; PPC64-P8-BE-NEXT: nop
; PPC64-P8-BE-NEXT: mffprd 3, 1
Expand All @@ -136,8 +136,8 @@ define i128 @test_copysign(ppc_fp128 %x, ppc_fp128 %y) nounwind {
; PPC64-BE-LABEL: test_copysign:
; PPC64-BE: # %bb.0: # %entry
; PPC64-BE-NEXT: mflr 0
; PPC64-BE-NEXT: std 0, 16(1)
; PPC64-BE-NEXT: stdu 1, -128(1)
; PPC64-BE-NEXT: std 0, 144(1)
; PPC64-BE-NEXT: bl copysignl
; PPC64-BE-NEXT: nop
; PPC64-BE-NEXT: stfd 1, 112(1)
Expand All @@ -152,8 +152,8 @@ define i128 @test_copysign(ppc_fp128 %x, ppc_fp128 %y) nounwind {
; PPC32-LABEL: test_copysign:
; PPC32: # %bb.0: # %entry
; PPC32-NEXT: mflr 0
; PPC32-NEXT: stw 0, 4(1)
; PPC32-NEXT: stwu 1, -96(1)
; PPC32-NEXT: stw 0, 100(1)
; PPC32-NEXT: stfd 1, 40(1)
; PPC32-NEXT: lwz 3, 44(1)
; PPC32-NEXT: stfd 2, 32(1)
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/frem.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,8 +5,8 @@ define float @frem32(float %a, float %b) {
; CHECK-LABEL: frem32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: bl fmodf
Expand All @@ -24,8 +24,8 @@ define double @frem64(double %a, double %b) {
; CHECK-LABEL: frem64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: bl fmod
Expand All @@ -43,8 +43,8 @@ define <4 x float> @frem4x32(<4 x float> %a, <4 x float> %b) {
; CHECK-LABEL: frem4x32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -96(1)
; CHECK-NEXT: std 0, 112(1)
; CHECK-NEXT: .cfi_def_cfa_offset 96
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: .cfi_offset v28, -64
Expand Down Expand Up @@ -105,8 +105,8 @@ define <2 x double> @frem2x64(<2 x double> %a, <2 x double> %b) {
; CHECK-LABEL: frem2x64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -80(1)
; CHECK-NEXT: std 0, 96(1)
; CHECK-NEXT: .cfi_def_cfa_offset 80
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: .cfi_offset v29, -48
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/funnel-shift.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -234,8 +234,8 @@ define i37 @fshl_i37(i37 %x, i37 %y, i37 %z) {
; CHECK32_32-LABEL: fshl_i37:
; CHECK32_32: # %bb.0:
; CHECK32_32-NEXT: mflr 0
; CHECK32_32-NEXT: stw 0, 4(1)
; CHECK32_32-NEXT: stwu 1, -32(1)
; CHECK32_32-NEXT: stw 0, 36(1)
; CHECK32_32-NEXT: .cfi_def_cfa_offset 32
; CHECK32_32-NEXT: .cfi_offset lr, 4
; CHECK32_32-NEXT: .cfi_offset r27, -20
Expand Down Expand Up @@ -289,8 +289,8 @@ define i37 @fshl_i37(i37 %x, i37 %y, i37 %z) {
; CHECK32_64-LABEL: fshl_i37:
; CHECK32_64: # %bb.0:
; CHECK32_64-NEXT: mflr 0
; CHECK32_64-NEXT: stw 0, 4(1)
; CHECK32_64-NEXT: stwu 1, -32(1)
; CHECK32_64-NEXT: stw 0, 36(1)
; CHECK32_64-NEXT: .cfi_def_cfa_offset 32
; CHECK32_64-NEXT: .cfi_offset lr, 4
; CHECK32_64-NEXT: .cfi_offset r27, -20
Expand Down Expand Up @@ -534,8 +534,8 @@ define i37 @fshr_i37(i37 %x, i37 %y, i37 %z) {
; CHECK32_32-LABEL: fshr_i37:
; CHECK32_32: # %bb.0:
; CHECK32_32-NEXT: mflr 0
; CHECK32_32-NEXT: stw 0, 4(1)
; CHECK32_32-NEXT: stwu 1, -32(1)
; CHECK32_32-NEXT: stw 0, 36(1)
; CHECK32_32-NEXT: .cfi_def_cfa_offset 32
; CHECK32_32-NEXT: .cfi_offset lr, 4
; CHECK32_32-NEXT: .cfi_offset r27, -20
Expand Down Expand Up @@ -590,8 +590,8 @@ define i37 @fshr_i37(i37 %x, i37 %y, i37 %z) {
; CHECK32_64-LABEL: fshr_i37:
; CHECK32_64: # %bb.0:
; CHECK32_64-NEXT: mflr 0
; CHECK32_64-NEXT: stw 0, 4(1)
; CHECK32_64-NEXT: stwu 1, -32(1)
; CHECK32_64-NEXT: stw 0, 36(1)
; CHECK32_64-NEXT: .cfi_def_cfa_offset 32
; CHECK32_64-NEXT: .cfi_offset lr, 4
; CHECK32_64-NEXT: .cfi_offset r27, -20
Expand Down
84 changes: 42 additions & 42 deletions llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
View file

Large diffs are not rendered by default.

6 changes: 3 additions & 3 deletions llvm/test/CodeGen/PowerPC/inlineasm-i64-reg.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -73,9 +73,9 @@ entry:

; CHECK-LABEL: @main

; CHECK-DAG: mr [[REG:[0-9]+]], 3
; CHECK-DAG: li 0, 1076
; CHECK: stw [[REG]],
; CHECK: mr [[REG:[0-9]+]], 3
; CHECK: std 0,
; CHECK: stw [[REG]],

; CHECK: #APP
; CHECK: sc
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/jump-tables-collapse-rotate.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,9 +7,9 @@ define dso_local zeroext i32 @test(i32 signext %l) nounwind {
; CHECK-LABEL: test:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
; CHECK-NEXT: std r0, 16(r1)
; CHECK-NEXT: stdu r1, -32(r1)
; CHECK-NEXT: addi r3, r3, -1
; CHECK-NEXT: std r0, 48(r1)
; CHECK-NEXT: cmplwi r3, 5
; CHECK-NEXT: bgt cr0, .LBB0_3
; CHECK-NEXT: # %bb.1: # %entry
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/larger-than-red-zone.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,8 +6,8 @@ define dso_local signext i32 @caller(i32 signext %a, i32 signext %b) local_unnam
; CHECK-LABEL: caller:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
; CHECK-NEXT: std r0, 16(r1)
; CHECK-NEXT: stdu r1, -320(r1)
; CHECK-NEXT: std r0, 336(r1)
; CHECK-NEXT: .cfi_def_cfa_offset 320
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: .cfi_offset r14, -288
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/lower-intrinsics-afn-mass_notail.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,9 +10,9 @@ define void @cos_f64(ptr %arg) {
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: .cfi_offset f31, -8
; CHECK-LNX-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -48(1)
; CHECK-LNX-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; CHECK-LNX-NEXT: std 0, 64(1)
; CHECK-LNX-NEXT: xssqrtdp 31, 0
; CHECK-LNX-NEXT: lfs 1, .LCPI0_0@toc@l(3)
; CHECK-LNX-NEXT: bl __xl_cos
Expand All @@ -27,8 +27,8 @@ define void @cos_f64(ptr %arg) {
; CHECK-AIX-LABEL: cos_f64:
; CHECK-AIX: # %bb.0: # %bb
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: stfd 31, 56(1) # 8-byte Folded Spill
; CHECK-AIX-NEXT: bl .sqrt[PR]
; CHECK-AIX-NEXT: nop
Expand Down Expand Up @@ -66,9 +66,9 @@ define void @log_f64(ptr %arg) {
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: .cfi_offset f31, -8
; CHECK-LNX-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -48(1)
; CHECK-LNX-NEXT: addis 3, 2, .LCPI1_0@toc@ha
; CHECK-LNX-NEXT: std 0, 64(1)
; CHECK-LNX-NEXT: xssqrtdp 31, 0
; CHECK-LNX-NEXT: lfs 1, .LCPI1_0@toc@l(3)
; CHECK-LNX-NEXT: bl __xl_log
Expand All @@ -83,8 +83,8 @@ define void @log_f64(ptr %arg) {
; CHECK-AIX-LABEL: log_f64:
; CHECK-AIX: # %bb.0: # %bb
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: stfd 31, 56(1) # 8-byte Folded Spill
; CHECK-AIX-NEXT: bl .sqrt[PR]
; CHECK-AIX-NEXT: nop
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass_notail.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,8 +6,8 @@ define void @cos_f64(ptr %arg) {
; CHECK-LNX-LABEL: cos_f64:
; CHECK-LNX: # %bb.0: # %bb
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI0_0@toc@ha
Expand All @@ -25,8 +25,8 @@ define void @cos_f64(ptr %arg) {
; CHECK-AIX-LABEL: cos_f64:
; CHECK-AIX: # %bb.0: # %bb
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: stfd 31, 56(1) # 8-byte Folded Spill
; CHECK-AIX-NEXT: bl .sqrt[PR]
; CHECK-AIX-NEXT: nop
Expand Down Expand Up @@ -60,8 +60,8 @@ define void @log_f64(ptr %arg) {
; CHECK-LNX-LABEL: log_f64:
; CHECK-LNX: # %bb.0: # %bb
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI1_0@toc@ha
Expand All @@ -79,8 +79,8 @@ define void @log_f64(ptr %arg) {
; CHECK-AIX-LABEL: log_f64:
; CHECK-AIX: # %bb.0: # %bb
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: stfd 31, 56(1) # 8-byte Folded Spill
; CHECK-AIX-NEXT: bl .sqrt[PR]
; CHECK-AIX-NEXT: nop
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/machine-pre.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -62,11 +62,11 @@ define dso_local signext i32 @foo(i32 signext %x, i32 signext %y) nounwind {
; CHECK-P9-NEXT: std r28, -32(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P9-NEXT: std r0, 16(r1)
; CHECK-P9-NEXT: stdu r1, -80(r1)
; CHECK-P9-NEXT: mr r30, r4
; CHECK-P9-NEXT: mr r29, r3
; CHECK-P9-NEXT: lis r3, 21845
; CHECK-P9-NEXT: std r0, 96(r1)
; CHECK-P9-NEXT: add r28, r30, r29
; CHECK-P9-NEXT: ori r27, r3, 21846
; CHECK-P9-NEXT: b .LBB1_4
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -150,9 +150,9 @@ define i1 @length2_eq_nobuiltin_attr(ptr %X, ptr %Y) nounwind {
; CHECK-LABEL: length2_eq_nobuiltin_attr:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: li 5, 2
; CHECK-NEXT: std 0, 48(1)
; CHECK-NEXT: bl memcmp
; CHECK-NEXT: nop
; CHECK-NEXT: cntlzw 3, 3
Expand Down
2 changes: 2 additions & 0 deletions llvm/test/CodeGen/PowerPC/no-duplicate.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@ target triple = "powerpc64le-grtev4-linux-gnu"
define void @no_duplicate1(i64 %a) {
; CHECK-LABEL: no_duplicate1
; CHECK: mr 30, 3
; CHECK-NEXT: std 0, 64(1)
; CHECK-NEXT: b .LBB0_2

; CHECK: .LBB0_2:
Expand Down Expand Up @@ -39,6 +40,7 @@ end:
define void @no_duplicate2(i64 %a) {
; CHECK-LABEL: no_duplicate2
; CHECK: mr 30, 3
; CHECK-NEXT: std 0, 64(1)
; CHECK-NEXT: b .LBB1_2

; CHECK: .LBB1_2:
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/not-fixed-frame-object.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -44,11 +44,11 @@ define dso_local signext i32 @caller(i32 signext %a, i32 signext %b, i32 signext
; CHECK-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-NEXT: std r31, -8(r1) # 8-byte Folded Spill
; CHECK-NEXT: std r0, 16(r1)
; CHECK-NEXT: stdu r1, -192(r1)
; CHECK-NEXT: std r0, 208(r1)
; CHECK-NEXT: std r5, 32(r1) # 8-byte Folded Spill
; CHECK-NEXT: std r3, 40(r1) # 8-byte Folded Spill
; CHECK-NEXT: mr r0, r4
; CHECK-NEXT: std r3, 40(r1) # 8-byte Folded Spill
; CHECK-NEXT: ld r3, 40(r1) # 8-byte Folded Reload
; CHECK-NEXT: #APP
; CHECK-NEXT: add r3, r3, r0
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/out-of-range-dform.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,8 +9,8 @@ define dso_local void @main() local_unnamed_addr personality ptr @__gxx_personal
; CHECK-P9-LABEL: main:
; CHECK-P9: # %bb.0: # %bb
; CHECK-P9-NEXT: mflr r0
; CHECK-P9-NEXT: std r0, 16(r1)
; CHECK-P9-NEXT: stdu r1, -32(r1)
; CHECK-P9-NEXT: std r0, 48(r1)
; CHECK-P9-NEXT: .cfi_def_cfa_offset 32
; CHECK-P9-NEXT: .cfi_offset lr, 16
; CHECK-P9-NEXT: bl malloc
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/pcrel_ldst.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2490,8 +2490,8 @@ define dso_local void @store_f128_to_uint(fp128 %str) local_unnamed_addr #0 {
; CHECK-P8-LE-LABEL: store_f128_to_uint:
; CHECK-P8-LE: # %bb.0: # %entry
; CHECK-P8-LE-NEXT: mflr r0
; CHECK-P8-LE-NEXT: std r0, 16(r1)
; CHECK-P8-LE-NEXT: stdu r1, -32(r1)
; CHECK-P8-LE-NEXT: std r0, 48(r1)
; CHECK-P8-LE-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-LE-NEXT: .cfi_offset lr, 16
; CHECK-P8-LE-NEXT: bl __fixunskfdi
Expand All @@ -2506,8 +2506,8 @@ define dso_local void @store_f128_to_uint(fp128 %str) local_unnamed_addr #0 {
; CHECK-P8-BE-LABEL: store_f128_to_uint:
; CHECK-P8-BE: # %bb.0: # %entry
; CHECK-P8-BE-NEXT: mflr r0
; CHECK-P8-BE-NEXT: std r0, 16(r1)
; CHECK-P8-BE-NEXT: stdu r1, -112(r1)
; CHECK-P8-BE-NEXT: std r0, 128(r1)
; CHECK-P8-BE-NEXT: .cfi_def_cfa_offset 112
; CHECK-P8-BE-NEXT: .cfi_offset lr, 16
; CHECK-P8-BE-NEXT: bl __fixunskfdi
Expand Down Expand Up @@ -2551,8 +2551,8 @@ define dso_local void @store_f128_to_sint(fp128 %str) local_unnamed_addr #0 {
; CHECK-P8-LE-LABEL: store_f128_to_sint:
; CHECK-P8-LE: # %bb.0: # %entry
; CHECK-P8-LE-NEXT: mflr r0
; CHECK-P8-LE-NEXT: std r0, 16(r1)
; CHECK-P8-LE-NEXT: stdu r1, -32(r1)
; CHECK-P8-LE-NEXT: std r0, 48(r1)
; CHECK-P8-LE-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-LE-NEXT: .cfi_offset lr, 16
; CHECK-P8-LE-NEXT: bl __fixkfdi
Expand All @@ -2567,8 +2567,8 @@ define dso_local void @store_f128_to_sint(fp128 %str) local_unnamed_addr #0 {
; CHECK-P8-BE-LABEL: store_f128_to_sint:
; CHECK-P8-BE: # %bb.0: # %entry
; CHECK-P8-BE-NEXT: mflr r0
; CHECK-P8-BE-NEXT: std r0, 16(r1)
; CHECK-P8-BE-NEXT: stdu r1, -112(r1)
; CHECK-P8-BE-NEXT: std r0, 128(r1)
; CHECK-P8-BE-NEXT: .cfi_def_cfa_offset 112
; CHECK-P8-BE-NEXT: .cfi_offset lr, 16
; CHECK-P8-BE-NEXT: bl __fixkfdi
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -40,9 +40,9 @@ define float @llvmintr_powf_f32_fast025(float %a) #1 {
; CHECK-AIX-LABEL: llvmintr_powf_f32_fast025:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C0(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_powf_finite[PR]
; CHECK-AIX-NEXT: nop
Expand Down Expand Up @@ -104,9 +104,9 @@ define double @llvmintr_pow_f64_fast025(double %a) #1 {
; CHECK-AIX-LABEL: llvmintr_pow_f64_fast025:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C1(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_pow_finite[PR]
; CHECK-AIX-NEXT: nop
Expand Down Expand Up @@ -155,9 +155,9 @@ define float @llvmintr_powf_f32_fast075(float %a) #1 {
; CHECK-AIX-LABEL: llvmintr_powf_f32_fast075:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C2(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_powf_finite[PR]
; CHECK-AIX-NEXT: nop
Expand Down Expand Up @@ -221,9 +221,9 @@ define double @llvmintr_pow_f64_fast075(double %a) #1 {
; CHECK-AIX-LABEL: llvmintr_pow_f64_fast075:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C3(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_pow_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -242,8 +242,8 @@ define float @llvmintr_powf_f32_fast050(float %a) #1 {
; CHECK-LNX-LABEL: llvmintr_powf_f32_fast050:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI4_0@toc@ha
Expand All @@ -258,9 +258,9 @@ define float @llvmintr_powf_f32_fast050(float %a) #1 {
; CHECK-AIX-LABEL: llvmintr_powf_f32_fast050:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C4(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_powf_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -279,8 +279,8 @@ define double @llvmintr_pow_f64_fast050(double %a) #1 {
; CHECK-LNX-LABEL: llvmintr_pow_f64_fast050:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI5_0@toc@ha
Expand All @@ -295,9 +295,9 @@ define double @llvmintr_pow_f64_fast050(double %a) #1 {
; CHECK-AIX-LABEL: llvmintr_pow_f64_fast050:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C5(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_pow_finite[PR]
; CHECK-AIX-NEXT: nop
Expand Down
48 changes: 24 additions & 24 deletions llvm/test/CodeGen/PowerPC/pow-025-075-nointrinsic-scalar-mass-fast.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,8 @@ define float @powf_f32_fast025(float %a) #1 {
; CHECK-LNX-LABEL: powf_f32_fast025:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI0_0@toc@ha
Expand All @@ -29,9 +29,9 @@ define float @powf_f32_fast025(float %a) #1 {
; CHECK-AIX-LABEL: powf_f32_fast025:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C0(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_powf_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -50,8 +50,8 @@ define double @pow_f64_fast025(double %a) #1 {
; CHECK-LNX-LABEL: pow_f64_fast025:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI1_0@toc@ha
Expand All @@ -66,9 +66,9 @@ define double @pow_f64_fast025(double %a) #1 {
; CHECK-AIX-LABEL: pow_f64_fast025:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C1(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_pow_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -87,8 +87,8 @@ define float @powf_f32_fast075(float %a) #1 {
; CHECK-LNX-LABEL: powf_f32_fast075:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI2_0@toc@ha
Expand All @@ -103,9 +103,9 @@ define float @powf_f32_fast075(float %a) #1 {
; CHECK-AIX-LABEL: powf_f32_fast075:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C2(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_powf_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -124,8 +124,8 @@ define double @pow_f64_fast075(double %a) #1 {
; CHECK-LNX-LABEL: pow_f64_fast075:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI3_0@toc@ha
Expand All @@ -140,9 +140,9 @@ define double @pow_f64_fast075(double %a) #1 {
; CHECK-AIX-LABEL: pow_f64_fast075:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C3(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_pow_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -161,8 +161,8 @@ define float @powf_f32_fast050(float %a) #1 {
; CHECK-LNX-LABEL: powf_f32_fast050:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI4_0@toc@ha
Expand All @@ -177,9 +177,9 @@ define float @powf_f32_fast050(float %a) #1 {
; CHECK-AIX-LABEL: powf_f32_fast050:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C4(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_powf_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -198,8 +198,8 @@ define double @pow_f64_fast050(double %a) #1 {
; CHECK-LNX-LABEL: pow_f64_fast050:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI5_0@toc@ha
Expand All @@ -214,9 +214,9 @@ define double @pow_f64_fast050(double %a) #1 {
; CHECK-AIX-LABEL: pow_f64_fast050:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C5(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_pow_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -237,8 +237,8 @@ define float @__powf_finite_f32_fast025(float %a) #1 {
; CHECK-LNX-LABEL: __powf_finite_f32_fast025:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI6_0@toc@ha
Expand All @@ -253,9 +253,9 @@ define float @__powf_finite_f32_fast025(float %a) #1 {
; CHECK-AIX-LABEL: __powf_finite_f32_fast025:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C6(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_powf_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -274,8 +274,8 @@ define double @__pow_finite_f64_fast025(double %a) #1 {
; CHECK-LNX-LABEL: __pow_finite_f64_fast025:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI7_0@toc@ha
Expand All @@ -290,9 +290,9 @@ define double @__pow_finite_f64_fast025(double %a) #1 {
; CHECK-AIX-LABEL: __pow_finite_f64_fast025:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C7(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_pow_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -311,8 +311,8 @@ define float @__powf_finite_f32_fast075(float %a) #1 {
; CHECK-LNX-LABEL: __powf_finite_f32_fast075:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI8_0@toc@ha
Expand All @@ -327,9 +327,9 @@ define float @__powf_finite_f32_fast075(float %a) #1 {
; CHECK-AIX-LABEL: __powf_finite_f32_fast075:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C8(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_powf_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -348,8 +348,8 @@ define double @__pow_finite_f64_fast075(double %a) #1 {
; CHECK-LNX-LABEL: __pow_finite_f64_fast075:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI9_0@toc@ha
Expand All @@ -364,9 +364,9 @@ define double @__pow_finite_f64_fast075(double %a) #1 {
; CHECK-AIX-LABEL: __pow_finite_f64_fast075:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C9(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_pow_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -385,8 +385,8 @@ define float @__powf_finite_f32_fast050(float %a) #1 {
; CHECK-LNX-LABEL: __powf_finite_f32_fast050:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI10_0@toc@ha
Expand All @@ -401,9 +401,9 @@ define float @__powf_finite_f32_fast050(float %a) #1 {
; CHECK-AIX-LABEL: __powf_finite_f32_fast050:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C10(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_powf_finite[PR]
; CHECK-AIX-NEXT: nop
Expand All @@ -422,8 +422,8 @@ define double @__pow_finite_f64_fast050(double %a) #1 {
; CHECK-LNX-LABEL: __pow_finite_f64_fast050:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: mflr 0
; CHECK-LNX-NEXT: std 0, 16(1)
; CHECK-LNX-NEXT: stdu 1, -32(1)
; CHECK-LNX-NEXT: std 0, 48(1)
; CHECK-LNX-NEXT: .cfi_def_cfa_offset 32
; CHECK-LNX-NEXT: .cfi_offset lr, 16
; CHECK-LNX-NEXT: addis 3, 2, .LCPI11_0@toc@ha
Expand All @@ -438,9 +438,9 @@ define double @__pow_finite_f64_fast050(double %a) #1 {
; CHECK-AIX-LABEL: __pow_finite_f64_fast050:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: mflr 0
; CHECK-AIX-NEXT: stw 0, 8(1)
; CHECK-AIX-NEXT: stwu 1, -64(1)
; CHECK-AIX-NEXT: lwz 3, L..C11(2) # %const.0
; CHECK-AIX-NEXT: stw 0, 72(1)
; CHECK-AIX-NEXT: lfs 2, 0(3)
; CHECK-AIX-NEXT: bl .__xl_pow_finite[PR]
; CHECK-AIX-NEXT: nop
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/ppc-prologue.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@

define i32 @_Z4funci(i32 %a) ssp {
; CHECK: mflr 0
; CHECK-NEXT: stw 0, 4(1)
; CHECK-NEXT: stwu 1, -32(1)
; CHECK-NEXT: stw 31, 28(1)
; CHECK-NEXT: stw 0, 36(1)
; CHECK: mr 31, 1
entry:
%a_addr = alloca i32 ; <ptr> [#uses=2]
Expand Down
9 changes: 8 additions & 1 deletion llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -mattr=-altivec -mcpu=pwr8 %s -o - -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,ENABLE,CHECK-32,ENABLE-32
; RUN: llc -mtriple=powerpc-ibm-aix-xcoff %s -o - -enable-shrink-wrap=false -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,DISABLE,CHECK-32,DISABLE-32
; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff -mattr=-altivec -mcpu=pwr8 %s -o - -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,ENABLE,CHECK-64,ENABLE-64
; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff %s -o - -enable-shrink-wrap=false -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,DISABLE,CHECK-64,DISABLE-64
; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff %s -o - -enable-shrink-wrap=false -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,DISABLE,CHECK-64,DISABLE-64,DISABLE-64-AIX
;
;
; Note: Lots of tests use inline asm instead of regular calls.
Expand All @@ -30,6 +30,8 @@
; Compare the arguments and jump to exit.
; After the prologue is set.
; DISABLE: cmpw 3, 4
; DISABLE-32: stw 0,
; DISABLE-64-AIX: std 0,
; DISABLE-NEXT: bge 0, {{.*}}[[EXIT_LABEL:BB[0-9_]+]]
;
; Store %a on the stack
Expand Down Expand Up @@ -478,6 +480,8 @@ if.end: ; preds = %for.body, %if.else
; CHECK: mflr {{[0-9]+}}
;
; DISABLE: cmplwi 3, 0
; DISABLE-32: stw 0, 72(1)
; DISABLE-64-AIX: std 0,
; DISABLE-NEXT: beq 0, {{.*}}[[ELSE_LABEL:BB[0-9_]+]]
;
; Setup of the varags.
Expand All @@ -494,6 +498,7 @@ if.end: ; preds = %for.body, %if.else
; CHECK-32-NEXT: mr 7, 4
; CHECK-32-NEXT: mr 8, 4
; CHECK-32-NEXT: mr 9, 4
; ENABLE-32-NEXT: stw 0, 72(1)
;
; CHECK-NEXT: bl {{.*}}someVariadicFunc
; CHECK: slwi 3, 3, 3
Expand Down Expand Up @@ -539,6 +544,8 @@ declare i32 @someVariadicFunc(i32, ...)
; DISABLE: mflr {{[0-9]+}}
;
; CHECK: cmplwi 3, 0
; DISABLE-32: stw 0, 72(1)
; DISABLE-64-AIX: std 0,
; CHECK-NEXT: bne{{[-]?}} 0, {{.*}}[[ABORT:BB[0-9_]+]]
;
; CHECK: li 3, 42
Expand Down
1 change: 1 addition & 0 deletions llvm/test/CodeGen/PowerPC/ppc32-nest.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@ define ptr @nest_receiver(ptr nest %arg) nounwind {
define ptr @nest_caller(ptr %arg) nounwind {
; CHECK-LABEL: nest_caller:
; CHECK: mr 11, 3
; CHECK: stw 0, 20(1)
; CHECK-NEXT: bl nest_receiver
; CHECK: blr

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1243,8 +1243,8 @@ define i64 @setbf128(fp128 %a, fp128 %b) {
; CHECK-PWR8-LABEL: setbf128:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: mflr r0
; CHECK-PWR8-NEXT: std r0, 16(r1)
; CHECK-PWR8-NEXT: stdu r1, -96(r1)
; CHECK-PWR8-NEXT: std r0, 112(r1)
; CHECK-PWR8-NEXT: .cfi_def_cfa_offset 96
; CHECK-PWR8-NEXT: .cfi_offset lr, 16
; CHECK-PWR8-NEXT: .cfi_offset r30, -16
Expand Down
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