30 changes: 15 additions & 15 deletions clang/test/CodeGen/X86/x86_32-arguments-linux.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2,22 +2,22 @@
// RUN: FileCheck < %t %s

// CHECK-LABEL: define{{.*}} void @f56(
// CHECK: i8 noundef signext %a0, %struct.s56_0* noundef byval(%struct.s56_0) align 4 %a1,
// CHECK: i64 noundef %a2.coerce, %struct.s56_1* noundef byval(%struct.s56_1) align 4 %0,
// CHECK: <1 x double> noundef %a4, %struct.s56_2* noundef byval(%struct.s56_2) align 4 %1,
// CHECK: <4 x i32> noundef %a6, %struct.s56_3* noundef byval(%struct.s56_3) align 4 %2,
// CHECK: <2 x double> noundef %a8, %struct.s56_4* noundef byval(%struct.s56_4) align 4 %3,
// CHECK: <8 x i32> noundef %a10, %struct.s56_5* noundef byval(%struct.s56_5) align 4 %4,
// CHECK: <4 x double> noundef %a12, %struct.s56_6* noundef byval(%struct.s56_6) align 4 %5)
// CHECK: i8 signext %a0, %struct.s56_0* byval(%struct.s56_0) align 4 %a1,
// CHECK: i64 %a2.coerce, %struct.s56_1* byval(%struct.s56_1) align 4 %0,
// CHECK: <1 x double> %a4, %struct.s56_2* byval(%struct.s56_2) align 4 %1,
// CHECK: <4 x i32> %a6, %struct.s56_3* byval(%struct.s56_3) align 4 %2,
// CHECK: <2 x double> %a8, %struct.s56_4* byval(%struct.s56_4) align 4 %3,
// CHECK: <8 x i32> %a10, %struct.s56_5* byval(%struct.s56_5) align 4 %4,
// CHECK: <4 x double> %a12, %struct.s56_6* byval(%struct.s56_6) align 4 %5)

// CHECK: call void (i32, ...) @f56_0(i32 noundef 1,
// CHECK: i32 noundef %{{.*}}, %struct.s56_0* noundef byval(%struct.s56_0) align 4 %{{[^ ]*}},
// CHECK: i64 noundef %{{[^ ]*}}, %struct.s56_1* noundef byval(%struct.s56_1) align 4 %{{[^ ]*}},
// CHECK: <1 x double> noundef %{{[^ ]*}}, %struct.s56_2* noundef byval(%struct.s56_2) align 4 %{{[^ ]*}},
// CHECK: <4 x i32> noundef %{{[^ ]*}}, %struct.s56_3* noundef byval(%struct.s56_3) align 4 %{{[^ ]*}},
// CHECK: <2 x double> noundef %{{[^ ]*}}, %struct.s56_4* noundef byval(%struct.s56_4) align 4 %{{[^ ]*}},
// CHECK: <8 x i32> noundef %{{[^ ]*}}, %struct.s56_5* noundef byval(%struct.s56_5) align 4 %{{[^ ]*}},
// CHECK: <4 x double> noundef %{{[^ ]*}}, %struct.s56_6* noundef byval(%struct.s56_6) align 4 %{{[^ ]*}})
// CHECK: call void (i32, ...) @f56_0(i32 1,
// CHECK: i32 %{{.*}}, %struct.s56_0* byval(%struct.s56_0) align 4 %{{[^ ]*}},
// CHECK: i64 %{{[^ ]*}}, %struct.s56_1* byval(%struct.s56_1) align 4 %{{[^ ]*}},
// CHECK: <1 x double> %{{[^ ]*}}, %struct.s56_2* byval(%struct.s56_2) align 4 %{{[^ ]*}},
// CHECK: <4 x i32> %{{[^ ]*}}, %struct.s56_3* byval(%struct.s56_3) align 4 %{{[^ ]*}},
// CHECK: <2 x double> %{{[^ ]*}}, %struct.s56_4* byval(%struct.s56_4) align 4 %{{[^ ]*}},
// CHECK: <8 x i32> %{{[^ ]*}}, %struct.s56_5* byval(%struct.s56_5) align 4 %{{[^ ]*}},
// CHECK: <4 x double> %{{[^ ]*}}, %struct.s56_6* byval(%struct.s56_6) align 4 %{{[^ ]*}})
// CHECK: }
//
// <rdar://problem/7964854> [i386] clang misaligns long double in structures
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/X86/x86_32-arguments-nommx.c
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Original file line number Diff line number Diff line change
Expand Up @@ -3,9 +3,9 @@
// no-mmx should put mmx into memory
typedef int __attribute__((vector_size (8))) i32v2;
int a(i32v2 x) { return x[0]; }
// CHECK-LABEL: define{{.*}} i32 @a(i64 noundef %x.coerce)
// CHECK-LABEL: define{{.*}} i32 @a(i64 %x.coerce)

// but SSE2 vectors should still go into an SSE2 register
typedef int __attribute__((vector_size (16))) i32v4;
int b(i32v4 x) { return x[0]; }
// CHECK-LABEL: define{{.*}} i32 @b(<4 x i32> noundef %x)
// CHECK-LABEL: define{{.*}} i32 @b(<4 x i32> %x)
2 changes: 1 addition & 1 deletion clang/test/CodeGen/X86/x86_32-arguments-realign.c
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
// RUN: %clang_cc1 -w -fblocks -triple i386-apple-darwin9 -emit-llvm -o %t %s
// RUN: FileCheck < %t %s

// CHECK-LABEL: define{{.*}} void @f0(%struct.s0* noundef byval(%struct.s0) align 4 %0)
// CHECK-LABEL: define{{.*}} void @f0(%struct.s0* byval(%struct.s0) align 4 %0)
// CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 16 %{{.*}}, i8* align 4 %{{.*}}, i32 16, i1 false)
// CHECK: }
struct s0 { long double a; };
Expand Down
12 changes: 6 additions & 6 deletions clang/test/CodeGen/X86/x86_32-arguments-win32.c
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Original file line number Diff line number Diff line change
Expand Up @@ -72,21 +72,21 @@ void receive_vec_512(__m512 x, __m512 y, __m512 z, __m512 w, __m512 q) {
void receive_vec_1024(__m1024 x, __m1024 y, __m1024 z, __m1024 w, __m1024 q) {
gv1024 = x + y + z + w + q;
}
// CHECK-LABEL: define dso_local void @receive_vec_128(<4 x float> inreg noundef %x, <4 x float> inreg noundef %y, <4 x float> inreg noundef %z, <4 x float>* noundef %0, <4 x float>* noundef %1)
// CHECK-LABEL: define dso_local void @receive_vec_256(<8 x float> inreg noundef %x, <8 x float> inreg noundef %y, <8 x float> inreg noundef %z, <8 x float>* noundef %0, <8 x float>* noundef %1)
// CHECK-LABEL: define dso_local void @receive_vec_512(<16 x float> inreg noundef %x, <16 x float> inreg noundef %y, <16 x float> inreg noundef %z, <16 x float>* noundef %0, <16 x float>* noundef %1)
// CHECK-LABEL: define dso_local void @receive_vec_1024(<32 x float>* noundef %0, <32 x float>* noundef %1, <32 x float>* noundef %2, <32 x float>* noundef %3, <32 x float>* noundef %4)
// CHECK-LABEL: define dso_local void @receive_vec_128(<4 x float> inreg %x, <4 x float> inreg %y, <4 x float> inreg %z, <4 x float>* %0, <4 x float>* %1)
// CHECK-LABEL: define dso_local void @receive_vec_256(<8 x float> inreg %x, <8 x float> inreg %y, <8 x float> inreg %z, <8 x float>* %0, <8 x float>* %1)
// CHECK-LABEL: define dso_local void @receive_vec_512(<16 x float> inreg %x, <16 x float> inreg %y, <16 x float> inreg %z, <16 x float>* %0, <16 x float>* %1)
// CHECK-LABEL: define dso_local void @receive_vec_1024(<32 x float>* %0, <32 x float>* %1, <32 x float>* %2, <32 x float>* %3, <32 x float>* %4)

void pass_vec_128() {
__m128 z = {0};
receive_vec_128(z, z, z, z, z);
}

// CHECK-LABEL: define dso_local void @pass_vec_128()
// CHECK: call void @receive_vec_128(<4 x float> inreg noundef %{{[^,)]*}}, <4 x float> inreg noundef %{{[^,)]*}}, <4 x float> inreg noundef %{{[^,)]*}}, <4 x float>* noundef %{{[^,)]*}}, <4 x float>* noundef %{{[^,)]*}})
// CHECK: call void @receive_vec_128(<4 x float> inreg %{{[^,)]*}}, <4 x float> inreg %{{[^,)]*}}, <4 x float> inreg %{{[^,)]*}}, <4 x float>* %{{[^,)]*}}, <4 x float>* %{{[^,)]*}})


void __fastcall fastcall_indirect_vec(__m128 x, __m128 y, __m128 z, __m128 w, int edx, __m128 q) {
gv128 = x + y + z + w + q;
}
// CHECK-LABEL: define dso_local x86_fastcallcc void @"\01@fastcall_indirect_vec@84"(<4 x float> inreg noundef %x, <4 x float> inreg noundef %y, <4 x float> inreg noundef %z, <4 x float>* inreg noundef %0, i32 inreg noundef %edx, <4 x float>* noundef %1)
// CHECK-LABEL: define dso_local x86_fastcallcc void @"\01@fastcall_indirect_vec@84"(<4 x float> inreg %x, <4 x float> inreg %y, <4 x float> inreg %z, <4 x float>* inreg %0, i32 inreg %edx, <4 x float>* %1)
6 changes: 3 additions & 3 deletions clang/test/CodeGen/X86/x86_64-arguments-nacl.c
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Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,7 @@ long double f5(void) {
return 0;
}

// CHECK-LABEL: define{{.*}} void @f6(i8 noundef signext %a0, i16 noundef signext %a1, i32 noundef %a2, i64 noundef %a3, i8* noundef %a4)
// CHECK-LABEL: define{{.*}} void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
void f6(char a0, short a1, int a2, long long a3, void *a4) {
}

Expand Down Expand Up @@ -61,14 +61,14 @@ void f12_1(struct s12 a0) {}

// Check that sret parameter is accounted for when checking available integer
// registers.
// CHECK: define{{.*}} void @f13(%struct.s13_0* noalias sret(%struct.s13_0) align 8 %agg.result, i32 noundef %a, i32 noundef %b, i32 noundef %c, i32 noundef %d, {{.*}}* noundef byval({{.*}}) align 8 %e, i32 noundef %f)
// CHECK: define{{.*}} void @f13(%struct.s13_0* noalias sret(%struct.s13_0) align 8 %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval({{.*}}) align 8 %e, i32 %f)

struct s13_0 { long long f0[3]; };
struct s13_1 { long long f0[2]; };
struct s13_0 f13(int a, int b, int c, int d,
struct s13_1 e, int f) { while (1) {} }

// CHECK-LABEL: define{{.*}} void @f20(%struct.s20* noundef byval(%struct.s20) align 32 %x)
// CHECK-LABEL: define{{.*}} void @f20(%struct.s20* byval(%struct.s20) align 32 %x)
struct __attribute__((aligned(32))) s20 {
int x;
int y;
Expand Down
12 changes: 6 additions & 6 deletions clang/test/CodeGen/X86/x86_64-arguments-win32.c
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Original file line number Diff line number Diff line change
Expand Up @@ -3,25 +3,25 @@
// To be ABI compatible with code generated by MSVC, there shouldn't be any
// sign/zero extensions on types smaller than 64bit.

// CHECK-LABEL: define dso_local void @f1(i8 noundef %a)
// CHECK-LABEL: define dso_local void @f1(i8 %a)
void f1(char a) {}

// CHECK-LABEL: define dso_local void @f2(i8 noundef %a)
// CHECK-LABEL: define dso_local void @f2(i8 %a)
void f2(unsigned char a) {}

// CHECK-LABEL: define dso_local void @f3(i16 noundef %a)
// CHECK-LABEL: define dso_local void @f3(i16 %a)
void f3(short a) {}

// CHECK-LABEL: define dso_local void @f4(i16 noundef %a)
// CHECK-LABEL: define dso_local void @f4(i16 %a)
void f4(unsigned short a) {}

// For ABI compatibility with ICC, _Complex should be passed/returned
// as if it were a struct with two elements.

// CHECK-LABEL: define dso_local void @f5(i64 noundef %a.coerce)
// CHECK-LABEL: define dso_local void @f5(i64 %a.coerce)
void f5(_Complex float a) {}

// CHECK-LABEL: define dso_local void @f6({ double, double }* noundef %a)
// CHECK-LABEL: define dso_local void @f6({ double, double }* %a)
void f6(_Complex double a) {}

// CHECK-LABEL: define dso_local i64 @f7()
Expand Down
82 changes: 41 additions & 41 deletions clang/test/CodeGen/X86/x86_64-arguments.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -36,19 +36,19 @@ long double f5(void) {
return 0;
}

// CHECK-LABEL: define{{.*}} void @f6(i8 noundef signext %a0, i16 noundef signext %a1, i32 noundef %a2, i64 noundef %a3, i8* noundef %a4)
// CHECK-LABEL: define{{.*}} void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
void f6(char a0, short a1, int a2, long long a3, void *a4) {
}

// CHECK-LABEL: define{{.*}} void @f7(i32 noundef %a0)
// CHECK-LABEL: define{{.*}} void @f7(i32 %a0)
typedef enum { A, B, C } e7;
void f7(e7 a0) {
}

// Test merging/passing of upper eightbyte with X87 class.
//
// CHECK-LABEL: define{{.*}} void @f8_1(%union.u8* noalias sret(%union.u8) align 16 %agg.result)
// CHECK-LABEL: define{{.*}} void @f8_2(%union.u8* noundef byval(%union.u8) align 16 %a0)
// CHECK-LABEL: define{{.*}} void @f8_2(%union.u8* byval(%union.u8) align 16 %a0)
union u8 {
long double a;
int b;
Expand All @@ -74,43 +74,43 @@ void f12_1(struct s12 a0) {}

// Check that sret parameter is accounted for when checking available integer
// registers.
// CHECK: define{{.*}} void @f13(%struct.s13_0* noalias sret(%struct.s13_0) align 8 %agg.result, i32 noundef %a, i32 noundef %b, i32 noundef %c, i32 noundef %d, {{.*}}* noundef byval({{.*}}) align 8 %e, i32 noundef %f)
// CHECK: define{{.*}} void @f13(%struct.s13_0* noalias sret(%struct.s13_0) align 8 %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval({{.*}}) align 8 %e, i32 %f)

struct s13_0 { long long f0[3]; };
struct s13_1 { long long f0[2]; };
struct s13_0 f13(int a, int b, int c, int d,
struct s13_1 e, int f) { while (1) {} }

// CHECK: define{{.*}} void @f14({{.*}}, i8 noundef signext %X)
// CHECK: define{{.*}} void @f14({{.*}}, i8 signext %X)
void f14(int a, int b, int c, int d, int e, int f, char X) {}

// CHECK: define{{.*}} void @f15({{.*}}, i8* noundef %X)
// CHECK: define{{.*}} void @f15({{.*}}, i8* %X)
void f15(int a, int b, int c, int d, int e, int f, void *X) {}

// CHECK: define{{.*}} void @f16({{.*}}, float noundef %X)
// CHECK: define{{.*}} void @f16({{.*}}, float %X)
void f16(float a, float b, float c, float d, float e, float f, float g, float h,
float X) {}

// CHECK: define{{.*}} void @f17({{.*}}, x86_fp80 noundef %X)
// CHECK: define{{.*}} void @f17({{.*}}, x86_fp80 %X)
void f17(float a, float b, float c, float d, float e, float f, float g, float h,
long double X) {}

// Check for valid coercion. The struct should be passed/returned as i32, not
// as i64 for better code quality.
// rdar://8135035
// CHECK-LABEL: define{{.*}} void @f18(i32 noundef %a, i32 %f18_arg1.coerce)
// CHECK-LABEL: define{{.*}} void @f18(i32 %a, i32 %f18_arg1.coerce)
struct f18_s0 { int f0; };
void f18(int a, struct f18_s0 f18_arg1) { while (1) {} }

// Check byval alignment.

// CHECK-LABEL: define{{.*}} void @f19(%struct.s19* noundef byval(%struct.s19) align 16 %x)
// CHECK-LABEL: define{{.*}} void @f19(%struct.s19* byval(%struct.s19) align 16 %x)
struct s19 {
long double a;
};
void f19(struct s19 x) {}

// CHECK-LABEL: define{{.*}} void @f20(%struct.s20* noundef byval(%struct.s20) align 32 %x)
// CHECK-LABEL: define{{.*}} void @f20(%struct.s20* byval(%struct.s20) align 32 %x)
struct __attribute__((aligned(32))) s20 {
int x;
int y;
Expand Down Expand Up @@ -144,21 +144,21 @@ struct f23S {


void f23(int A, struct f23S B) {
// CHECK-LABEL: define{{.*}} void @f23(i32 noundef %A, i64 %B.coerce0, i32 %B.coerce1)
// CHECK-LABEL: define{{.*}} void @f23(i32 %A, i64 %B.coerce0, i32 %B.coerce1)
}

struct f24s { long a; int b; };

struct f23S f24(struct f23S *X, struct f24s *P2) {
return *X;

// CHECK: define{{.*}} { i64, i32 } @f24(%struct.f23S* noundef %X, %struct.f24s* noundef %P2)
// CHECK: define{{.*}} { i64, i32 } @f24(%struct.f23S* %X, %struct.f24s* %P2)
}

// rdar://8248065
typedef float v4f32 __attribute__((__vector_size__(16)));
v4f32 f25(v4f32 X) {
// CHECK-LABEL: define{{.*}} <4 x float> @f25(<4 x float> noundef %X)
// CHECK-LABEL: define{{.*}} <4 x float> @f25(<4 x float> %X)
// CHECK-NOT: alloca
// CHECK: alloca <4 x float>
// CHECK-NOT: alloca
Expand All @@ -174,7 +174,7 @@ struct foo26 {
};

struct foo26 f26(struct foo26 *P) {
// CHECK: define{{.*}} { i32*, float* } @f26(%struct.foo26* noundef %P)
// CHECK: define{{.*}} { i32*, float* } @f26(%struct.foo26* %P)
return *P;
}

Expand Down Expand Up @@ -246,7 +246,7 @@ float f31(struct f31foo X) {

_Complex float f32(_Complex float A, _Complex float B) {
// rdar://6379669
// CHECK-LABEL: define{{.*}} <2 x float> @f32(<2 x float> noundef %A.coerce, <2 x float> noundef %B.coerce)
// CHECK-LABEL: define{{.*}} <2 x float> @f32(<2 x float> %A.coerce, <2 x float> %B.coerce)
return A+B;
}

Expand All @@ -261,17 +261,17 @@ void f33(va_list X) {
typedef unsigned long long v1i64 __attribute__((__vector_size__(8)));

// rdar://8359248
// CHECK-LABEL: define{{.*}} double @f34(double noundef %arg.coerce)
// CHECK-LABEL: define{{.*}} double @f34(double %arg.coerce)
v1i64 f34(v1i64 arg) { return arg; }


// rdar://8358475
// CHECK-LABEL: define{{.*}} double @f35(double noundef %arg.coerce)
// CHECK-LABEL: define{{.*}} double @f35(double %arg.coerce)
typedef unsigned long v1i64_2 __attribute__((__vector_size__(8)));
v1i64_2 f35(v1i64_2 arg) { return arg+arg; }

// rdar://9122143
// CHECK: declare void @func(%struct._str* noundef byval(%struct._str) align 16)
// CHECK: declare void @func(%struct._str* byval(%struct._str) align 16)
typedef struct _str {
union {
long double a;
Expand All @@ -286,14 +286,14 @@ void f9122143()
func(ss);
}

// CHECK-LABEL: define{{.*}} double @f36(double noundef %arg.coerce)
// CHECK-LABEL: define{{.*}} double @f36(double %arg.coerce)
typedef unsigned v2i32 __attribute((__vector_size__(8)));
v2i32 f36(v2i32 arg) { return arg; }

// AVX: declare void @f38(<8 x float>)
// AVX: declare void @f37(<8 x float> noundef)
// SSE: declare void @f38(%struct.s256* noundef byval(%struct.s256) align 32)
// SSE: declare void @f37(<8 x float>* noundef byval(<8 x float>) align 32)
// AVX: declare void @f37(<8 x float>)
// SSE: declare void @f38(%struct.s256* byval(%struct.s256) align 32)
// SSE: declare void @f37(<8 x float>* byval(<8 x float>) align 32)
typedef float __m256 __attribute__ ((__vector_size__ (32)));
typedef struct {
__m256 m;
Expand All @@ -309,7 +309,7 @@ void f39() { f38(x38); f37(x37); }
// The two next tests make sure that the struct below is passed
// in the same way regardless of avx being used

// CHECK: declare void @func40(%struct.t128* noundef byval(%struct.t128) align 16)
// CHECK: declare void @func40(%struct.t128* byval(%struct.t128) align 16)
typedef float __m128 __attribute__ ((__vector_size__ (16)));
typedef struct t128 {
__m128 m;
Expand All @@ -321,7 +321,7 @@ void func41(two128 s) {
func40(s);
}

// CHECK: declare void @func42(%struct.t128_2* noundef byval(%struct.t128_2) align 16)
// CHECK: declare void @func42(%struct.t128_2* byval(%struct.t128_2) align 16)
typedef struct xxx {
__m128 array[2];
} Atwo128;
Expand Down Expand Up @@ -350,7 +350,7 @@ int f44(int i, ...) {
}

// Text that vec3 returns the correct LLVM IR type.
// AVX-LABEL: define{{.*}} i32 @foo(<3 x i64> noundef %X)
// AVX-LABEL: define{{.*}} i32 @foo(<3 x i64> %X)
typedef long long3 __attribute((ext_vector_type(3)));
int foo(long3 X)
{
Expand All @@ -368,7 +368,7 @@ void test45() { f45(x45); }
// Make sure we use byval to pass 64-bit vectors in memory; the LLVM call
// lowering can't handle this case correctly because it runs after legalization.
// CHECK: @test46
// CHECK: call void @f46({{.*}}<2 x float>* noundef byval(<2 x float>) align 8 {{.*}}, <2 x float>* noundef byval(<2 x float>) align 8 {{.*}})
// CHECK: call void @f46({{.*}}<2 x float>* byval(<2 x float>) align 8 {{.*}}, <2 x float>* byval(<2 x float>) align 8 {{.*}})
typedef float v46 __attribute((vector_size(8)));
void f46(v46,v46,v46,v46,v46,v46,v46,v46,v46,v46);
void test46() { v46 x = {1,2}; f46(x,x,x,x,x,x,x,x,x,x); }
Expand Down Expand Up @@ -409,7 +409,7 @@ void test49(double d, double e) {
// CHECK-LABEL: define{{.*}} void @test49(
// CHECK: [[T0:%.*]] = load double, double*
// CHECK-NEXT: [[T1:%.*]] = load double, double*
// CHECK-NEXT: call void (double, ...) @test49_helper(double noundef [[T0]], double noundef [[T1]])
// CHECK-NEXT: call void (double, ...) @test49_helper(double [[T0]], double [[T1]])

void test50_helper();
void test50(double d, double e) {
Expand All @@ -418,7 +418,7 @@ void test50(double d, double e) {
// CHECK-LABEL: define{{.*}} void @test50(
// CHECK: [[T0:%.*]] = load double, double*
// CHECK-NEXT: [[T1:%.*]] = load double, double*
// CHECK-NEXT: call void (double, double, ...) bitcast (void (...)* @test50_helper to void (double, double, ...)*)(double noundef [[T0]], double noundef [[T1]])
// CHECK-NEXT: call void (double, double, ...) bitcast (void (...)* @test50_helper to void (double, double, ...)*)(double [[T0]], double [[T1]])

struct test51_s { __uint128_t intval; };
void test51(struct test51_s *s, __builtin_va_list argList) {
Expand All @@ -444,7 +444,7 @@ __m256 x52;
void test52() {
test52_helper(0, x52, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i);
}
// AVX: @test52_helper(i32 noundef 0, <8 x float> noundef {{%[a-zA-Z0-9]+}}, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef {{%[a-zA-Z0-9]+}}, double noundef {{%[a-zA-Z0-9]+}})
// AVX: @test52_helper(i32 0, <8 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}})

void test53(__m256 *m, __builtin_va_list argList) {
*m = __builtin_va_arg(argList, __m256);
Expand All @@ -459,8 +459,8 @@ void test54() {
test54_helper(x54, x54, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i);
test54_helper(x54, x54, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i);
}
// AVX: @test54_helper(<8 x float> noundef {{%[a-zA-Z0-9]+}}, <8 x float> noundef {{%[a-zA-Z0-9]+}}, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef {{%[a-zA-Z0-9]+}}, double noundef {{%[a-zA-Z0-9]+}})
// AVX: @test54_helper(<8 x float> noundef {{%[a-zA-Z0-9]+}}, <8 x float> noundef {{%[a-zA-Z0-9]+}}, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, { double, double }* noundef byval({ double, double }) align 8 {{%[^)]+}})
// AVX: @test54_helper(<8 x float> {{%[a-zA-Z0-9]+}}, <8 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}})
// AVX: @test54_helper(<8 x float> {{%[a-zA-Z0-9]+}}, <8 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, { double, double }* byval({ double, double }) align 8 {{%[^)]+}})

typedef float __m512 __attribute__ ((__vector_size__ (64)));
typedef struct {
Expand All @@ -474,20 +474,20 @@ __m512 x56;
// as per https://github.com/hjl-tools/x86-psABI/commit/30f9c9 3.2.3p2 Rule 1
//
// AVX512: declare void @f55(<16 x float>)
// NO-AVX512: declare void @f55(%struct.s512* noundef byval(%struct.s512) align 64)
// NO-AVX512: declare void @f55(%struct.s512* byval(%struct.s512) align 64)
void f55(s512 x);

// __m512 has type SSE/SSEUP on AVX512.
//
// AVX512: declare void @f56(<16 x float> noundef)
// NO-AVX512: declare void @f56(<16 x float>* noundef byval(<16 x float>) align 64)
// AVX512: declare void @f56(<16 x float>)
// NO-AVX512: declare void @f56(<16 x float>* byval(<16 x float>) align 64)
void f56(__m512 x);
void f57() { f55(x55); f56(x56); }

// Like for __m128 on AVX, check that the struct below is passed
// in the same way regardless of AVX512 being used.
//
// CHECK: declare void @f58(%struct.t256* noundef byval(%struct.t256) align 32)
// CHECK: declare void @f58(%struct.t256* byval(%struct.t256) align 32)
typedef struct t256 {
__m256 m;
__m256 n;
Expand All @@ -498,7 +498,7 @@ void f59(two256 s) {
f58(s);
}

// CHECK: declare void @f60(%struct.sat256* noundef byval(%struct.sat256) align 32)
// CHECK: declare void @f60(%struct.sat256* byval(%struct.sat256) align 32)
typedef struct at256 {
__m256 array[2];
} Atwo256;
Expand All @@ -511,7 +511,7 @@ void f61(SAtwo256 s) {
f60(s);
}

// AVX512: @f62_helper(i32 noundef 0, <16 x float> noundef {{%[a-zA-Z0-9]+}}, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef {{%[a-zA-Z0-9]+}}, double noundef {{%[a-zA-Z0-9]+}})
// AVX512: @f62_helper(i32 0, <16 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}})
void f62_helper(int, ...);
__m512 x62;
void f62() {
Expand All @@ -528,8 +528,8 @@ void f63(__m512 *m, __builtin_va_list argList) {
*m = __builtin_va_arg(argList, __m512);
}

// AVX512: @f64_helper(<16 x float> noundef {{%[a-zA-Z0-9]+}}, <16 x float> noundef {{%[a-zA-Z0-9]+}}, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef {{%[a-zA-Z0-9]+}}, double noundef {{%[a-zA-Z0-9]+}})
// AVX512: @f64_helper(<16 x float> noundef {{%[a-zA-Z0-9]+}}, <16 x float> noundef {{%[a-zA-Z0-9]+}}, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, double noundef 1.000000e+00, { double, double }* noundef byval({ double, double }) align 8 {{%[^)]+}})
// AVX512: @f64_helper(<16 x float> {{%[a-zA-Z0-9]+}}, <16 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}})
// AVX512: @f64_helper(<16 x float> {{%[a-zA-Z0-9]+}}, <16 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, { double, double }* byval({ double, double }) align 8 {{%[^)]+}})
void f64_helper(__m512, ...);
__m512 x64;
void f64() {
Expand All @@ -541,7 +541,7 @@ struct t65 {
__m256 m;
int : 0;
};
// SSE-LABEL: @f65(%struct.t65* noundef byval(%struct.t65) align 32 %{{[^,)]+}})
// SSE-LABEL: @f65(%struct.t65* byval(%struct.t65) align 32 %{{[^,)]+}})
// AVX: @f65(<8 x float> %{{[^,)]+}})
void f65(struct t65 a0) {
}
Expand Down
36 changes: 18 additions & 18 deletions clang/test/CodeGen/X86/x86_64-longdouble.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,16 +20,16 @@ long double _Complex dataLDC = {1.0L, 1.0L};

long double TestLD(long double x) {
return x * x;
// ANDROID: define{{.*}} fp128 @TestLD(fp128 noundef %x)
// GNU: define{{.*}} x86_fp80 @TestLD(x86_fp80 noundef %x)
// NACL: define{{.*}} double @TestLD(double noundef %x)
// ANDROID: define{{.*}} fp128 @TestLD(fp128 %x)
// GNU: define{{.*}} x86_fp80 @TestLD(x86_fp80 %x)
// NACL: define{{.*}} double @TestLD(double %x)
}

long double _Complex TestLDC(long double _Complex x) {
return x * x;
// ANDROID: define{{.*}} void @TestLDC({ fp128, fp128 }* {{.*}}, { fp128, fp128 }* {{.*}} %x)
// GNU: define{{.*}} { x86_fp80, x86_fp80 } @TestLDC({ x86_fp80, x86_fp80 }* {{.*}} %x)
// NACL: define{{.*}} { double, double } @TestLDC(double noundef %x{{.*}}, double noundef %x{{.*}})
// NACL: define{{.*}} { double, double } @TestLDC(double %x{{.*}}, double %x{{.*}})
}

typedef __builtin_va_list va_list;
Expand Down Expand Up @@ -94,30 +94,30 @@ void TestVarArg(const char *s, ...);

void TestPassVarInt(int x) {
TestVarArg("A", x);
// CHECK: define{{.*}} void @TestPassVarInt(i32 noundef %x)
// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, i32 noundef %x)
// CHECK: define{{.*}} void @TestPassVarInt(i32 %x)
// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, i32 %x)
}

void TestPassVarFloat(float x) {
TestVarArg("A", x);
// CHECK: define{{.*}} void @TestPassVarFloat(float noundef %x)
// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, double noundef %
// CHECK: define{{.*}} void @TestPassVarFloat(float %x)
// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, double %
}

void TestPassVarDouble(double x) {
TestVarArg("A", x);
// CHECK: define{{.*}} void @TestPassVarDouble(double noundef %x)
// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, double noundef %x
// CHECK: define{{.*}} void @TestPassVarDouble(double %x)
// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, double %x
}

void TestPassVarLD(long double x) {
TestVarArg("A", x);
// ANDROID: define{{.*}} void @TestPassVarLD(fp128 noundef %x)
// ANDROID: call {{.*}} @TestVarArg(i8* {{.*}}, fp128 noundef %x
// GNU: define{{.*}} void @TestPassVarLD(x86_fp80 noundef %x)
// GNU: call {{.*}} @TestVarArg(i8* {{.*}}, x86_fp80 noundef %x
// NACL: define{{.*}} void @TestPassVarLD(double noundef %x)
// NACL: call {{.*}} @TestVarArg(i8* {{.*}}, double noundef %x
// ANDROID: define{{.*}} void @TestPassVarLD(fp128 %x)
// ANDROID: call {{.*}} @TestVarArg(i8* {{.*}}, fp128 %x
// GNU: define{{.*}} void @TestPassVarLD(x86_fp80 %x)
// GNU: call {{.*}} @TestVarArg(i8* {{.*}}, x86_fp80 %x
// NACL: define{{.*}} void @TestPassVarLD(double %x)
// NACL: call {{.*}} @TestVarArg(i8* {{.*}}, double %x
}

void TestPassVarLDC(long double _Complex x) {
Expand All @@ -130,6 +130,6 @@ void TestPassVarLDC(long double _Complex x) {
// GNU: store x86_fp80 %{{.*}}, x86_fp80* %
// GNU-NEXT: store x86_fp80 %{{.*}}, x86_fp80* %
// GNU-NEXT: call {{.*}} @TestVarArg(i8* {{.*}}, { x86_fp80, x86_fp80 }* {{.*}} %
// NACL: define{{.*}} void @TestPassVarLDC(double noundef %x{{.*}}, double noundef %x{{.*}})
// NACL: call {{.*}} @TestVarArg(i8* {{.*}}, double noundef %x{{.*}}, double noundef %x{{.*}})
// NACL: define{{.*}} void @TestPassVarLDC(double %x{{.*}}, double %x{{.*}})
// NACL: call {{.*}} @TestVarArg(i8* {{.*}}, double %x{{.*}}, double %x{{.*}})
}
56 changes: 28 additions & 28 deletions clang/test/CodeGen/aapcs-align.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,10 +19,10 @@ void g0() {
f0m(1, 2, 3, 4, 5, s);
}
// CHECK: define{{.*}} void @g0
// CHECK: call void @f0(i32 noundef 1, [2 x i32] [i32 6, i32 7]
// CHECK: call void @f0m(i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, [2 x i32] [i32 6, i32 7]
// CHECK: declare void @f0(i32 noundef, [2 x i32])
// CHECK: declare void @f0m(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, [2 x i32])
// CHECK: call void @f0(i32 1, [2 x i32] [i32 6, i32 7]
// CHECK: call void @f0m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i32] [i32 6, i32 7]
// CHECK: declare void @f0(i32, [2 x i32])
// CHECK: declare void @f0m(i32, i32, i32, i32, i32, [2 x i32])

// Aligned struct, passed according to its natural alignment.
struct __attribute__((aligned(8))) S8 {
Expand All @@ -37,10 +37,10 @@ void g1() {
f1m(1, 2, 3, 4, 5, s);
}
// CHECK: define{{.*}} void @g1
// CHECK: call void @f1(i32 noundef 1, [2 x i32] [i32 6, i32 7]
// CHECK: call void @f1m(i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, [2 x i32] [i32 6, i32 7]
// CHECK: declare void @f1(i32 noundef, [2 x i32])
// CHECK: declare void @f1m(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, [2 x i32])
// CHECK: call void @f1(i32 1, [2 x i32] [i32 6, i32 7]
// CHECK: call void @f1m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i32] [i32 6, i32 7]
// CHECK: declare void @f1(i32, [2 x i32])
// CHECK: declare void @f1m(i32, i32, i32, i32, i32, [2 x i32])

// Aligned struct, passed according to its natural alignment.
struct alignas(16) S16 {
Expand All @@ -56,10 +56,10 @@ void g2() {
f2m(1, 2, 3, 4, 5, s);
}
// CHECK: define{{.*}} void @g2
// CHECK: call void @f2(i32 noundef 1, [4 x i32] [i32 6, i32 7
// CHECK: call void @f2m(i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, [4 x i32] [i32 6, i32 7
// CHECK: declare void @f2(i32 noundef, [4 x i32])
// CHECK: declare void @f2m(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, [4 x i32])
// CHECK: call void @f2(i32 1, [4 x i32] [i32 6, i32 7
// CHECK: call void @f2m(i32 1, i32 2, i32 3, i32 4, i32 5, [4 x i32] [i32 6, i32 7
// CHECK: declare void @f2(i32, [4 x i32])
// CHECK: declare void @f2m(i32, i32, i32, i32, i32, [4 x i32])

// Increased natural alignment.
struct SF8 {
Expand All @@ -75,10 +75,10 @@ void g3() {
f3m(1, 2, 3, 4, 5, s);
}
// CHECK: define{{.*}} void @g3
// CHECK: call void @f3(i32 noundef 1, [1 x i64] [i64 30064771078]
// CHECK: call void @f3m(i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, [1 x i64] [i64 30064771078]
// CHECK: declare void @f3(i32 noundef, [1 x i64])
// CHECK: declare void @f3m(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, [1 x i64])
// CHECK: call void @f3(i32 1, [1 x i64] [i64 30064771078]
// CHECK: call void @f3m(i32 1, i32 2, i32 3, i32 4, i32 5, [1 x i64] [i64 30064771078]
// CHECK: declare void @f3(i32, [1 x i64])
// CHECK: declare void @f3m(i32, i32, i32, i32, i32, [1 x i64])

// Increased natural alignment, capped to 8 though.
struct SF16 {
Expand All @@ -95,10 +95,10 @@ void g4() {
f4m(1, 2, 3, 4, 5, s);
}
// CHECK: define{{.*}} void @g4
// CHECK: call void @f4(i32 noundef 1, %struct.SF16* noundef nonnull byval(%struct.SF16) align 8
// CHECK: call void @f4m(i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, %struct.SF16* noundef nonnull byval(%struct.SF16) align 8
// CHECK: declare void @f4(i32 noundef, %struct.SF16* noundef byval(%struct.SF16) align 8)
// CHECK: declare void @f4m(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, %struct.SF16* noundef byval(%struct.SF16) align 8)
// CHECK: call void @f4(i32 1, %struct.SF16* nonnull byval(%struct.SF16) align 8
// CHECK: call void @f4m(i32 1, i32 2, i32 3, i32 4, i32 5, %struct.SF16* nonnull byval(%struct.SF16) align 8
// CHECK: declare void @f4(i32, %struct.SF16* byval(%struct.SF16) align 8)
// CHECK: declare void @f4m(i32, i32, i32, i32, i32, %struct.SF16* byval(%struct.SF16) align 8)

// Packed structure.
struct __attribute__((packed)) P {
Expand All @@ -114,10 +114,10 @@ void g5() {
f5m(1, 2, 3, 4, 5, s);
}
// CHECK: define{{.*}} void @g5
// CHECK: call void @f5(i32 noundef 1, [3 x i32] [i32 6, i32 7, i32 0])
// CHECK: call void @f5m(i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, [3 x i32] [i32 6, i32 7, i32 0])
// CHECK: declare void @f5(i32 noundef, [3 x i32])
// CHECK: declare void @f5m(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, [3 x i32])
// CHECK: call void @f5(i32 1, [3 x i32] [i32 6, i32 7, i32 0])
// CHECK: call void @f5m(i32 1, i32 2, i32 3, i32 4, i32 5, [3 x i32] [i32 6, i32 7, i32 0])
// CHECK: declare void @f5(i32, [3 x i32])
// CHECK: declare void @f5m(i32, i32, i32, i32, i32, [3 x i32])


// Packed and aligned, alignement causes padding at the end.
Expand All @@ -134,8 +134,8 @@ void g6() {
f6m(1, 2, 3, 4, 5, s);
}
// CHECK: define{{.*}} void @g6
// CHECK: call void @f6(i32 noundef 1, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
// CHECK: call void @f6m(i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
// CHECK: declare void @f6(i32 noundef, [4 x i32])
// CHECK: declare void @f6m(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, [4 x i32])
// CHECK: call void @f6(i32 1, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
// CHECK: call void @f6m(i32 1, i32 2, i32 3, i32 4, i32 5, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
// CHECK: declare void @f6(i32, [4 x i32])
// CHECK: declare void @f6m(i32, i32, i32, i32, i32, [4 x i32])
}
34 changes: 17 additions & 17 deletions clang/test/CodeGen/aapcs64-align.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -18,10 +18,10 @@ void g0() {
f0m(1, 2, 3, 4, 5, s);
}
// CHECK: define{{.*}} void @g0
// CHECK: call void @f0(i64 noundef 1, [2 x i64] [i64 6, i64 7]
// CHECK: call void @f0(i64 1, [2 x i64] [i64 6, i64 7]
// CHECK: call void @f0m{{.*}}[2 x i64] [i64 6, i64 7]
// CHECK: declare void @f0(i64 noundef, [2 x i64])
// CHECK: declare void @f0m(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, [2 x i64])
// CHECK: declare void @f0(i64, [2 x i64])
// CHECK: declare void @f0m(i64, i64, i64, i64, i64, [2 x i64])

// Aligned struct, passed according to its natural alignment.
struct __attribute__((aligned(16))) S16 {
Expand All @@ -38,8 +38,8 @@ void g1() {
// CHECK: define{{.*}} void @g1
// CHECK: call void @f1{{.*}}[2 x i64] [i64 6, i64 7]
// CHECK: call void @f1m{{.*}}[2 x i64] [i64 6, i64 7]
// CHECK: declare void @f1(i64 noundef, [2 x i64])
// CHECK: declare void @f1m(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, [2 x i64])
// CHECK: declare void @f1(i64, [2 x i64])
// CHECK: declare void @f1m(i64, i64, i64, i64, i64, [2 x i64])

// Increased natural alignment.
struct SF16 {
Expand All @@ -55,10 +55,10 @@ void g3() {
f3m(1, 2, 3, 4, 5, s);
}
// CHECK: define{{.*}} void @g3
// CHECK: call void @f3(i64 noundef 1, i128 129127208515966861318)
// CHECK: call void @f3m(i64 noundef 1, i64 noundef 2, i64 noundef 3, i64 noundef 4, i64 noundef 5, i128 129127208515966861318)
// CHECK: declare void @f3(i64 noundef, i128)
// CHECK: declare void @f3m(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i128)
// CHECK: call void @f3(i64 1, i128 129127208515966861318)
// CHECK: call void @f3m(i64 1, i64 2, i64 3, i64 4, i64 5, i128 129127208515966861318)
// CHECK: declare void @f3(i64, i128)
// CHECK: declare void @f3m(i64, i64, i64, i64, i64, i128)


// Packed structure.
Expand All @@ -75,10 +75,10 @@ void g4() {
f4m(1, 2, 3, 4, 5, s);
}
// CHECK: define{{.*}} void @g4()
// CHECK: call void @f4(i32 noundef 1, [2 x i64] [i64 30064771078, i64 0])
// CHECK: void @f4m(i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, [2 x i64] [i64 30064771078, i64 0])
// CHECK: declare void @f4(i32 noundef, [2 x i64])
// CHECK: declare void @f4m(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, [2 x i64])
// CHECK: call void @f4(i32 1, [2 x i64] [i64 30064771078, i64 0])
// CHECK: void @f4m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i64] [i64 30064771078, i64 0])
// CHECK: declare void @f4(i32, [2 x i64])
// CHECK: declare void @f4m(i32, i32, i32, i32, i32, [2 x i64])


// Packed structure, overaligned, same as above.
Expand All @@ -95,9 +95,9 @@ void f5m(int, int, int, int, int, P16);
f5m(1, 2, 3, 4, 5, s);
}
// CHECK: define{{.*}} void @g5()
// CHECK: call void @f5(i32 noundef 1, [2 x i64] [i64 30064771078, i64 0])
// CHECK: void @f5m(i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, [2 x i64] [i64 30064771078, i64 0])
// CHECK: declare void @f5(i32 noundef, [2 x i64])
// CHECK: declare void @f5m(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, [2 x i64])
// CHECK: call void @f5(i32 1, [2 x i64] [i64 30064771078, i64 0])
// CHECK: void @f5m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i64] [i64 30064771078, i64 0])
// CHECK: declare void @f5(i32, [2 x i64])
// CHECK: declare void @f5m(i32, i32, i32, i32, i32, [2 x i64])

}
18 changes: 9 additions & 9 deletions clang/test/CodeGen/aarch64-args.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -15,9 +15,9 @@

struct Empty {};

// CHECK: define{{.*}} i32 @empty_arg(i32 noundef %a)
// CHECK-GNU-C: define{{.*}} i32 @empty_arg(i32 noundef %a)
// CHECK-GNU-CXX: define{{.*}} i32 @empty_arg(i8 %e.coerce, i32 noundef %a)
// CHECK: define{{.*}} i32 @empty_arg(i32 %a)
// CHECK-GNU-C: define{{.*}} i32 @empty_arg(i32 %a)
// CHECK-GNU-CXX: define{{.*}} i32 @empty_arg(i8 %e.coerce, i32 %a)
EXTERNC int empty_arg(struct Empty e, int a) {
return a;
}
Expand All @@ -38,9 +38,9 @@ struct SuperEmpty {
int arr[0];
};

// CHECK: define{{.*}} i32 @super_empty_arg(i32 noundef %a)
// CHECK-GNU-C: define{{.*}} i32 @super_empty_arg(i32 noundef %a)
// CHECK-GNU-CXX: define{{.*}} i32 @super_empty_arg(i32 noundef %a)
// CHECK: define{{.*}} i32 @super_empty_arg(i32 %a)
// CHECK-GNU-C: define{{.*}} i32 @super_empty_arg(i32 %a)
// CHECK-GNU-CXX: define{{.*}} i32 @super_empty_arg(i32 %a)
EXTERNC int super_empty_arg(struct SuperEmpty e, int a) {
return a;
}
Expand All @@ -51,9 +51,9 @@ struct SortOfEmpty {
struct SuperEmpty e;
};

// CHECK: define{{.*}} i32 @sort_of_empty_arg(i32 noundef %a)
// CHECK-GNU-C: define{{.*}} i32 @sort_of_empty_arg(i32 noundef %a)
// CHECK-GNU-CXX: define{{.*}} i32 @sort_of_empty_arg(i8 %e.coerce, i32 noundef %a)
// CHECK: define{{.*}} i32 @sort_of_empty_arg(i32 %a)
// CHECK-GNU-C: define{{.*}} i32 @sort_of_empty_arg(i32 %a)
// CHECK-GNU-CXX: define{{.*}} i32 @sort_of_empty_arg(i8 %e.coerce, i32 %a)
EXTERNC int sort_of_empty_arg(struct Empty e, int a) {
return a;
}
Expand Down
8 changes: 4 additions & 4 deletions clang/test/CodeGen/aarch64-byval-temp.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -32,12 +32,12 @@ void example() {
// CHECK-O0-NEXT: %[[dst:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[l]] to i8*
// CHECK-O0-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %[[src]], i8* align 8 %[[dst]], i64 64, i1 false)
// Finally, call using a pointer to the temporary stack space.
// CHECK-O0-NEXT: call void @pass_large(%struct.large* noundef %[[byvaltemp]])
// CHECK-O0-NEXT: call void @pass_large(%struct.large* %[[byvaltemp]])
// Now, do the same for the second call, using the second temporary alloca.
// CHECK-O0-NEXT: %[[src:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[byvaltemp1]] to i8*
// CHECK-O0-NEXT: %[[dst:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[l]] to i8*
// CHECK-O0-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %[[src]], i8* align 8 %[[dst]], i64 64, i1 false)
// CHECK-O0-NEXT: call void @pass_large(%struct.large* noundef %[[byvaltemp1]])
// CHECK-O0-NEXT: call void @pass_large(%struct.large* %[[byvaltemp1]])
// CHECK-O0-NEXT: ret void
//
// At O3, we should have lifetime markers to help the optimizer re-use the temporary allocas.
Expand Down Expand Up @@ -67,7 +67,7 @@ void example() {
// CHECK-O3-NEXT: %[[dst:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[l]] to i8*
// CHECK-O3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %[[src]], i8* align 8 %[[dst]], i64 64, i1 false)
// Finally, call using a pointer to the temporary stack space.
// CHECK-O3-NEXT: call void @pass_large(%struct.large* noundef %[[byvaltemp]])
// CHECK-O3-NEXT: call void @pass_large(%struct.large* %[[byvaltemp]])
//
// The lifetime of the temporary used to pass a pointer to the struct ends here.
// CHECK-O3-NEXT: %[[bitcastbyvaltemp:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[byvaltemp]] to i8*
Expand All @@ -79,7 +79,7 @@ void example() {
// CHECK-O3-NEXT: %[[src:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[byvaltemp1]] to i8*
// CHECK-O3-NEXT: %[[dst:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[l]] to i8*
// CHECK-O3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %[[src]], i8* align 8 %[[dst]], i64 64, i1 false)
// CHECK-O3-NEXT: call void @pass_large(%struct.large* noundef %[[byvaltemp1]])
// CHECK-O3-NEXT: call void @pass_large(%struct.large* %[[byvaltemp1]])
// CHECK-O3-NEXT: %[[bitcastbyvaltemp:[0-9A-Za-z-]+]] = bitcast %struct.large* %[[byvaltemp1]] to i8*
// CHECK-O3-NEXT: call void @llvm.lifetime.end.p0i8(i64 64, i8* %[[bitcastbyvaltemp]])
//
Expand Down
160 changes: 80 additions & 80 deletions clang/test/CodeGen/aarch64-neon-3v.c
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88 changes: 44 additions & 44 deletions clang/test/CodeGen/aarch64-neon-across.c
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24 changes: 12 additions & 12 deletions clang/test/CodeGen/aarch64-neon-dot-product.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -8,35 +8,35 @@
#include <arm_neon.h>

uint32x2_t test_vdot_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_u32(<2 x i32> noundef %a, <8 x i8> noundef %b, <8 x i8> noundef %c)
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: ret <2 x i32> [[RESULT]]
return vdot_u32(a, b, c);
}

uint32x4_t test_vdotq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_u32(<4 x i32> noundef %a, <16 x i8> noundef %b, <16 x i8> noundef %c)
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: ret <4 x i32> [[RESULT]]
return vdotq_u32(a, b, c);
}

int32x2_t test_vdot_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_s32(<2 x i32> noundef %a, <8 x i8> noundef %b, <8 x i8> noundef %c)
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: ret <2 x i32> [[RESULT]]
return vdot_s32(a, b, c);
}

int32x4_t test_vdotq_s32(int32x4_t a, int8x16_t b, int8x16_t c) {
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_s32(<4 x i32> noundef %a, <16 x i8> noundef %b, <16 x i8> noundef %c)
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: ret <4 x i32> [[RESULT]]
return vdotq_s32(a, b, c);
}

uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_lane_u32(<2 x i32> noundef %a, <8 x i8> noundef %b, <8 x i8> noundef %c)
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> poison, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
Expand All @@ -46,7 +46,7 @@ uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
}

uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) {
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_lane_u32(<4 x i32> noundef %a, <16 x i8> noundef %b, <8 x i8> noundef %c)
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
Expand All @@ -56,7 +56,7 @@ uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) {
}

uint32x2_t test_vdot_laneq_u32(uint32x2_t a, uint8x8_t b, uint8x16_t c) {
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_laneq_u32(<2 x i32> noundef %a, <8 x i8> noundef %b, <16 x i8> noundef %c)
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_laneq_u32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> poison, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
Expand All @@ -66,7 +66,7 @@ uint32x2_t test_vdot_laneq_u32(uint32x2_t a, uint8x8_t b, uint8x16_t c) {
}

uint32x4_t test_vdotq_laneq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_laneq_u32(<4 x i32> noundef %a, <16 x i8> noundef %b, <16 x i8> noundef %c)
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_laneq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
Expand All @@ -76,7 +76,7 @@ uint32x4_t test_vdotq_laneq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
}

int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_lane_s32(<2 x i32> noundef %a, <8 x i8> noundef %b, <8 x i8> noundef %c)
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> poison, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
Expand All @@ -86,7 +86,7 @@ int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
}

int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) {
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_lane_s32(<4 x i32> noundef %a, <16 x i8> noundef %b, <8 x i8> noundef %c)
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
Expand All @@ -96,7 +96,7 @@ int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) {
}

int32x2_t test_vdot_laneq_s32(int32x2_t a, int8x8_t b, int8x16_t c) {
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_laneq_s32(<2 x i32> noundef %a, <8 x i8> noundef %b, <16 x i8> noundef %c)
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_laneq_s32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> poison, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
Expand All @@ -106,7 +106,7 @@ int32x2_t test_vdot_laneq_s32(int32x2_t a, int8x8_t b, int8x16_t c) {
}

int32x4_t test_vdotq_laneq_s32(int32x4_t a, int8x16_t b, int8x16_t c) {
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_laneq_s32(<4 x i32> noundef %a, <16 x i8> noundef %b, <16 x i8> noundef %c)
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_laneq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
Expand Down
48 changes: 24 additions & 24 deletions clang/test/CodeGen/aarch64-neon-extract.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,14 +6,14 @@

#include <arm_neon.h>

// CHECK-LABEL: define{{.*}} <8 x i8> @test_vext_s8(<8 x i8> noundef %a, <8 x i8> noundef %b) #0 {
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vext_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
// CHECK: ret <8 x i8> [[VEXT]]
int8x8_t test_vext_s8(int8x8_t a, int8x8_t b) {
return vext_s8(a, b, 2);
}

// CHECK-LABEL: define{{.*}} <4 x i16> @test_vext_s16(<4 x i16> noundef %a, <4 x i16> noundef %b) #0 {
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vext_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
Expand All @@ -24,7 +24,7 @@ int16x4_t test_vext_s16(int16x4_t a, int16x4_t b) {
return vext_s16(a, b, 3);
}

// CHECK-LABEL: define{{.*}} <2 x i32> @test_vext_s32(<2 x i32> noundef %a, <2 x i32> noundef %b) #0 {
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vext_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
Expand All @@ -35,7 +35,7 @@ int32x2_t test_vext_s32(int32x2_t a, int32x2_t b) {
return vext_s32(a, b, 1);
}

// CHECK-LABEL: define{{.*}} <1 x i64> @test_vext_s64(<1 x i64> noundef %a, <1 x i64> noundef %b) #0 {
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vext_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
Expand All @@ -46,14 +46,14 @@ int64x1_t test_vext_s64(int64x1_t a, int64x1_t b) {
return vext_s64(a, b, 0);
}

// CHECK-LABEL: define{{.*}} <16 x i8> @test_vextq_s8(<16 x i8> noundef %a, <16 x i8> noundef %b) #1 {
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vextq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
// CHECK: ret <16 x i8> [[VEXT]]
int8x16_t test_vextq_s8(int8x16_t a, int8x16_t b) {
return vextq_s8(a, b, 2);
}

// CHECK-LABEL: define{{.*}} <8 x i16> @test_vextq_s16(<8 x i16> noundef %a, <8 x i16> noundef %b) #1 {
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vextq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
Expand All @@ -64,7 +64,7 @@ int16x8_t test_vextq_s16(int16x8_t a, int16x8_t b) {
return vextq_s16(a, b, 3);
}

// CHECK-LABEL: define{{.*}} <4 x i32> @test_vextq_s32(<4 x i32> noundef %a, <4 x i32> noundef %b) #1 {
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vextq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
Expand All @@ -75,7 +75,7 @@ int32x4_t test_vextq_s32(int32x4_t a, int32x4_t b) {
return vextq_s32(a, b, 1);
}

// CHECK-LABEL: define{{.*}} <2 x i64> @test_vextq_s64(<2 x i64> noundef %a, <2 x i64> noundef %b) #1 {
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vextq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
Expand All @@ -86,14 +86,14 @@ int64x2_t test_vextq_s64(int64x2_t a, int64x2_t b) {
return vextq_s64(a, b, 1);
}

// CHECK-LABEL: define{{.*}} <8 x i8> @test_vext_u8(<8 x i8> noundef %a, <8 x i8> noundef %b) #0 {
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vext_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
// CHECK: ret <8 x i8> [[VEXT]]
uint8x8_t test_vext_u8(uint8x8_t a, uint8x8_t b) {
return vext_u8(a, b, 2);
}

// CHECK-LABEL: define{{.*}} <4 x i16> @test_vext_u16(<4 x i16> noundef %a, <4 x i16> noundef %b) #0 {
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vext_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
Expand All @@ -104,7 +104,7 @@ uint16x4_t test_vext_u16(uint16x4_t a, uint16x4_t b) {
return vext_u16(a, b, 3);
}

// CHECK-LABEL: define{{.*}} <2 x i32> @test_vext_u32(<2 x i32> noundef %a, <2 x i32> noundef %b) #0 {
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vext_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
Expand All @@ -115,7 +115,7 @@ uint32x2_t test_vext_u32(uint32x2_t a, uint32x2_t b) {
return vext_u32(a, b, 1);
}

// CHECK-LABEL: define{{.*}} <1 x i64> @test_vext_u64(<1 x i64> noundef %a, <1 x i64> noundef %b) #0 {
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vext_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
Expand All @@ -126,14 +126,14 @@ uint64x1_t test_vext_u64(uint64x1_t a, uint64x1_t b) {
return vext_u64(a, b, 0);
}

// CHECK-LABEL: define{{.*}} <16 x i8> @test_vextq_u8(<16 x i8> noundef %a, <16 x i8> noundef %b) #1 {
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vextq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
// CHECK: ret <16 x i8> [[VEXT]]
uint8x16_t test_vextq_u8(uint8x16_t a, uint8x16_t b) {
return vextq_u8(a, b, 2);
}

// CHECK-LABEL: define{{.*}} <8 x i16> @test_vextq_u16(<8 x i16> noundef %a, <8 x i16> noundef %b) #1 {
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vextq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
Expand All @@ -144,7 +144,7 @@ uint16x8_t test_vextq_u16(uint16x8_t a, uint16x8_t b) {
return vextq_u16(a, b, 3);
}

// CHECK-LABEL: define{{.*}} <4 x i32> @test_vextq_u32(<4 x i32> noundef %a, <4 x i32> noundef %b) #1 {
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vextq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
Expand All @@ -155,7 +155,7 @@ uint32x4_t test_vextq_u32(uint32x4_t a, uint32x4_t b) {
return vextq_u32(a, b, 1);
}

// CHECK-LABEL: define{{.*}} <2 x i64> @test_vextq_u64(<2 x i64> noundef %a, <2 x i64> noundef %b) #1 {
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vextq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
Expand All @@ -166,7 +166,7 @@ uint64x2_t test_vextq_u64(uint64x2_t a, uint64x2_t b) {
return vextq_u64(a, b, 1);
}

// CHECK-LABEL: define{{.*}} <2 x float> @test_vext_f32(<2 x float> noundef %a, <2 x float> noundef %b) #0 {
// CHECK-LABEL: define{{.*}} <2 x float> @test_vext_f32(<2 x float> %a, <2 x float> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
Expand All @@ -177,7 +177,7 @@ float32x2_t test_vext_f32(float32x2_t a, float32x2_t b) {
return vext_f32(a, b, 1);
}

// CHECK-LABEL: define{{.*}} <1 x double> @test_vext_f64(<1 x double> noundef %a, <1 x double> noundef %b) #0 {
// CHECK-LABEL: define{{.*}} <1 x double> @test_vext_f64(<1 x double> %a, <1 x double> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x double>
Expand All @@ -188,7 +188,7 @@ float64x1_t test_vext_f64(float64x1_t a, float64x1_t b) {
return vext_f64(a, b, 0);
}

// CHECK-LABEL: define{{.*}} <4 x float> @test_vextq_f32(<4 x float> noundef %a, <4 x float> noundef %b) #1 {
// CHECK-LABEL: define{{.*}} <4 x float> @test_vextq_f32(<4 x float> %a, <4 x float> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
Expand All @@ -199,7 +199,7 @@ float32x4_t test_vextq_f32(float32x4_t a, float32x4_t b) {
return vextq_f32(a, b, 1);
}

// CHECK-LABEL: define{{.*}} <2 x double> @test_vextq_f64(<2 x double> noundef %a, <2 x double> noundef %b) #1 {
// CHECK-LABEL: define{{.*}} <2 x double> @test_vextq_f64(<2 x double> %a, <2 x double> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x double>
Expand All @@ -210,14 +210,14 @@ float64x2_t test_vextq_f64(float64x2_t a, float64x2_t b) {
return vextq_f64(a, b, 1);
}

// CHECK-LABEL: define{{.*}} <8 x i8> @test_vext_p8(<8 x i8> noundef %a, <8 x i8> noundef %b) #0 {
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vext_p8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
// CHECK: ret <8 x i8> [[VEXT]]
poly8x8_t test_vext_p8(poly8x8_t a, poly8x8_t b) {
return vext_p8(a, b, 2);
}

// CHECK-LABEL: define{{.*}} <4 x i16> @test_vext_p16(<4 x i16> noundef %a, <4 x i16> noundef %b) #0 {
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vext_p16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
Expand All @@ -228,14 +228,14 @@ poly16x4_t test_vext_p16(poly16x4_t a, poly16x4_t b) {
return vext_p16(a, b, 3);
}

// CHECK-LABEL: define{{.*}} <16 x i8> @test_vextq_p8(<16 x i8> noundef %a, <16 x i8> noundef %b) #1 {
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vextq_p8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
// CHECK: ret <16 x i8> [[VEXT]]
poly8x16_t test_vextq_p8(poly8x16_t a, poly8x16_t b) {
return vextq_p8(a, b, 2);
}

// CHECK-LABEL: define{{.*}} <8 x i16> @test_vextq_p16(<8 x i16> noundef %a, <8 x i16> noundef %b) #1 {
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vextq_p16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
Expand Down
42 changes: 21 additions & 21 deletions clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,147 +5,147 @@

#include <arm_neon.h>

// CHECK-LABEL: define{{.*}} float @test_vcvtxd_f32_f64(double noundef %a) #0 {
// CHECK-LABEL: define{{.*}} float @test_vcvtxd_f32_f64(double %a) #0 {
// CHECK: [[VCVTXD_F32_F64_I:%.*]] = call float @llvm.aarch64.sisd.fcvtxn(double %a) #2
// CHECK: ret float [[VCVTXD_F32_F64_I]]
float32_t test_vcvtxd_f32_f64(float64_t a) {
return (float32_t)vcvtxd_f32_f64(a);
}

// CHECK-LABEL: define{{.*}} i32 @test_vcvtas_s32_f32(float noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i32 @test_vcvtas_s32_f32(float %a) #0 {
// CHECK: [[VCVTAS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtas.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTAS_S32_F32_I]]
int32_t test_vcvtas_s32_f32(float32_t a) {
return (int32_t)vcvtas_s32_f32(a);
}

// CHECK-LABEL: define{{.*}} i64 @test_test_vcvtad_s64_f64(double noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i64 @test_test_vcvtad_s64_f64(double %a) #0 {
// CHECK: [[VCVTAD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtas.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTAD_S64_F64_I]]
int64_t test_test_vcvtad_s64_f64(float64_t a) {
return (int64_t)vcvtad_s64_f64(a);
}

// CHECK-LABEL: define{{.*}} i32 @test_vcvtas_u32_f32(float noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i32 @test_vcvtas_u32_f32(float %a) #0 {
// CHECK: [[VCVTAS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtau.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTAS_U32_F32_I]]
uint32_t test_vcvtas_u32_f32(float32_t a) {
return (uint32_t)vcvtas_u32_f32(a);
}

// CHECK-LABEL: define{{.*}} i64 @test_vcvtad_u64_f64(double noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i64 @test_vcvtad_u64_f64(double %a) #0 {
// CHECK: [[VCVTAD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtau.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTAD_U64_F64_I]]
uint64_t test_vcvtad_u64_f64(float64_t a) {
return (uint64_t)vcvtad_u64_f64(a);
}

// CHECK-LABEL: define{{.*}} i32 @test_vcvtms_s32_f32(float noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i32 @test_vcvtms_s32_f32(float %a) #0 {
// CHECK: [[VCVTMS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtms.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTMS_S32_F32_I]]
int32_t test_vcvtms_s32_f32(float32_t a) {
return (int32_t)vcvtms_s32_f32(a);
}

// CHECK-LABEL: define{{.*}} i64 @test_vcvtmd_s64_f64(double noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i64 @test_vcvtmd_s64_f64(double %a) #0 {
// CHECK: [[VCVTMD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtms.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTMD_S64_F64_I]]
int64_t test_vcvtmd_s64_f64(float64_t a) {
return (int64_t)vcvtmd_s64_f64(a);
}

// CHECK-LABEL: define{{.*}} i32 @test_vcvtms_u32_f32(float noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i32 @test_vcvtms_u32_f32(float %a) #0 {
// CHECK: [[VCVTMS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTMS_U32_F32_I]]
uint32_t test_vcvtms_u32_f32(float32_t a) {
return (uint32_t)vcvtms_u32_f32(a);
}

// CHECK-LABEL: define{{.*}} i64 @test_vcvtmd_u64_f64(double noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i64 @test_vcvtmd_u64_f64(double %a) #0 {
// CHECK: [[VCVTMD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTMD_U64_F64_I]]
uint64_t test_vcvtmd_u64_f64(float64_t a) {
return (uint64_t)vcvtmd_u64_f64(a);
}

// CHECK-LABEL: define{{.*}} i32 @test_vcvtns_s32_f32(float noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i32 @test_vcvtns_s32_f32(float %a) #0 {
// CHECK: [[VCVTNS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtns.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTNS_S32_F32_I]]
int32_t test_vcvtns_s32_f32(float32_t a) {
return (int32_t)vcvtns_s32_f32(a);
}

// CHECK-LABEL: define{{.*}} i64 @test_vcvtnd_s64_f64(double noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i64 @test_vcvtnd_s64_f64(double %a) #0 {
// CHECK: [[VCVTND_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtns.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTND_S64_F64_I]]
int64_t test_vcvtnd_s64_f64(float64_t a) {
return (int64_t)vcvtnd_s64_f64(a);
}

// CHECK-LABEL: define{{.*}} i32 @test_vcvtns_u32_f32(float noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i32 @test_vcvtns_u32_f32(float %a) #0 {
// CHECK: [[VCVTNS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtnu.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTNS_U32_F32_I]]
uint32_t test_vcvtns_u32_f32(float32_t a) {
return (uint32_t)vcvtns_u32_f32(a);
}

// CHECK-LABEL: define{{.*}} i64 @test_vcvtnd_u64_f64(double noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i64 @test_vcvtnd_u64_f64(double %a) #0 {
// CHECK: [[VCVTND_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtnu.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTND_U64_F64_I]]
uint64_t test_vcvtnd_u64_f64(float64_t a) {
return (uint64_t)vcvtnd_u64_f64(a);
}

// CHECK-LABEL: define{{.*}} i32 @test_vcvtps_s32_f32(float noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i32 @test_vcvtps_s32_f32(float %a) #0 {
// CHECK: [[VCVTPS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtps.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTPS_S32_F32_I]]
int32_t test_vcvtps_s32_f32(float32_t a) {
return (int32_t)vcvtps_s32_f32(a);
}

// CHECK-LABEL: define{{.*}} i64 @test_vcvtpd_s64_f64(double noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i64 @test_vcvtpd_s64_f64(double %a) #0 {
// CHECK: [[VCVTPD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtps.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTPD_S64_F64_I]]
int64_t test_vcvtpd_s64_f64(float64_t a) {
return (int64_t)vcvtpd_s64_f64(a);
}

// CHECK-LABEL: define{{.*}} i32 @test_vcvtps_u32_f32(float noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i32 @test_vcvtps_u32_f32(float %a) #0 {
// CHECK: [[VCVTPS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTPS_U32_F32_I]]
uint32_t test_vcvtps_u32_f32(float32_t a) {
return (uint32_t)vcvtps_u32_f32(a);
}

// CHECK-LABEL: define{{.*}} i64 @test_vcvtpd_u64_f64(double noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i64 @test_vcvtpd_u64_f64(double %a) #0 {
// CHECK: [[VCVTPD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTPD_U64_F64_I]]
uint64_t test_vcvtpd_u64_f64(float64_t a) {
return (uint64_t)vcvtpd_u64_f64(a);
}

// CHECK-LABEL: define{{.*}} i32 @test_vcvts_s32_f32(float noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i32 @test_vcvts_s32_f32(float %a) #0 {
// CHECK: [[TMP0:%.*]] = call i32 @llvm.aarch64.neon.fcvtzs.i32.f32(float %a)
// CHECK: ret i32 [[TMP0]]
int32_t test_vcvts_s32_f32(float32_t a) {
return (int32_t)vcvts_s32_f32(a);
}

// CHECK-LABEL: define{{.*}} i64 @test_vcvtd_s64_f64(double noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i64 @test_vcvtd_s64_f64(double %a) #0 {
// CHECK: [[TMP0:%.*]] = call i64 @llvm.aarch64.neon.fcvtzs.i64.f64(double %a)
// CHECK: ret i64 [[TMP0]]
int64_t test_vcvtd_s64_f64(float64_t a) {
return (int64_t)vcvtd_s64_f64(a);
}

// CHECK-LABEL: define{{.*}} i32 @test_vcvts_u32_f32(float noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i32 @test_vcvts_u32_f32(float %a) #0 {
// CHECK: [[TMP0:%.*]] = call i32 @llvm.aarch64.neon.fcvtzu.i32.f32(float %a)
// CHECK: ret i32 [[TMP0]]
uint32_t test_vcvts_u32_f32(float32_t a) {
return (uint32_t)vcvts_u32_f32(a);
}

// CHECK-LABEL: define{{.*}} i64 @test_vcvtd_u64_f64(double noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i64 @test_vcvtd_u64_f64(double %a) #0 {
// CHECK: [[TMP0:%.*]] = call i64 @llvm.aarch64.neon.fcvtzu.i64.f64(double %a)
// CHECK: ret i64 [[TMP0]]
uint64_t test_vcvtd_u64_f64(float64_t a) {
Expand Down
44 changes: 22 additions & 22 deletions clang/test/CodeGen/aarch64-neon-fma.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@

#include <arm_neon.h>

// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_n_f32(<2 x float> noundef %a, <2 x float> noundef %b, float noundef %c) #0 {
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %c, i32 1
// CHECK: [[MUL_I:%.*]] = fmul <2 x float> %b, [[VECINIT1_I]]
Expand All @@ -14,7 +14,7 @@ float32x2_t test_vmla_n_f32(float32x2_t a, float32x2_t b, float32_t c) {
return vmla_n_f32(a, b, c);
}

// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_n_f32(<4 x float> noundef %a, <4 x float> noundef %b, float noundef %c) #1 {
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %c, i32 1
// CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %c, i32 2
Expand All @@ -26,7 +26,7 @@ float32x4_t test_vmlaq_n_f32(float32x4_t a, float32x4_t b, float32_t c) {
return vmlaq_n_f32(a, b, c);
}

// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_n_f32(<4 x float> noundef %a, <4 x float> noundef %b, float noundef %c) #1 {
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %c, i32 1
// CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %c, i32 2
Expand All @@ -38,7 +38,7 @@ float32x4_t test_vmlsq_n_f32(float32x4_t a, float32x4_t b, float32_t c) {
return vmlsq_n_f32(a, b, c);
}

// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_n_f32(<2 x float> noundef %a, <2 x float> noundef %b, float noundef %c) #0 {
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %c, i32 1
// CHECK: [[MUL_I:%.*]] = fmul <2 x float> %b, [[VECINIT1_I]]
Expand All @@ -48,7 +48,7 @@ float32x2_t test_vmls_n_f32(float32x2_t a, float32x2_t b, float32_t c) {
return vmls_n_f32(a, b, c);
}

// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_lane_f32_0(<2 x float> noundef %a, <2 x float> noundef %b, <2 x float> noundef %v) #0 {
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> zeroinitializer
Expand All @@ -59,7 +59,7 @@ float32x2_t test_vmla_lane_f32_0(float32x2_t a, float32x2_t b, float32x2_t v) {
return vmla_lane_f32(a, b, v, 0);
}

// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_lane_f32_0(<4 x float> noundef %a, <4 x float> noundef %b, <2 x float> noundef %v) #1 {
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> zeroinitializer
Expand All @@ -70,7 +70,7 @@ float32x4_t test_vmlaq_lane_f32_0(float32x4_t a, float32x4_t b, float32x2_t v) {
return vmlaq_lane_f32(a, b, v, 0);
}

// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_laneq_f32_0(<2 x float> noundef %a, <2 x float> noundef %b, <4 x float> noundef %v) #1 {
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> zeroinitializer
Expand All @@ -81,7 +81,7 @@ float32x2_t test_vmla_laneq_f32_0(float32x2_t a, float32x2_t b, float32x4_t v) {
return vmla_laneq_f32(a, b, v, 0);
}

// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_laneq_f32_0(<4 x float> noundef %a, <4 x float> noundef %b, <4 x float> noundef %v) #1 {
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> zeroinitializer
Expand All @@ -92,7 +92,7 @@ float32x4_t test_vmlaq_laneq_f32_0(float32x4_t a, float32x4_t b, float32x4_t v)
return vmlaq_laneq_f32(a, b, v, 0);
}

// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_lane_f32_0(<2 x float> noundef %a, <2 x float> noundef %b, <2 x float> noundef %v) #0 {
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> zeroinitializer
Expand All @@ -103,7 +103,7 @@ float32x2_t test_vmls_lane_f32_0(float32x2_t a, float32x2_t b, float32x2_t v) {
return vmls_lane_f32(a, b, v, 0);
}

// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_lane_f32_0(<4 x float> noundef %a, <4 x float> noundef %b, <2 x float> noundef %v) #1 {
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> zeroinitializer
Expand All @@ -114,7 +114,7 @@ float32x4_t test_vmlsq_lane_f32_0(float32x4_t a, float32x4_t b, float32x2_t v) {
return vmlsq_lane_f32(a, b, v, 0);
}

// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_laneq_f32_0(<2 x float> noundef %a, <2 x float> noundef %b, <4 x float> noundef %v) #1 {
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> zeroinitializer
Expand All @@ -125,7 +125,7 @@ float32x2_t test_vmls_laneq_f32_0(float32x2_t a, float32x2_t b, float32x4_t v) {
return vmls_laneq_f32(a, b, v, 0);
}

// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_laneq_f32_0(<4 x float> noundef %a, <4 x float> noundef %b, <4 x float> noundef %v) #1 {
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> zeroinitializer
Expand All @@ -136,7 +136,7 @@ float32x4_t test_vmlsq_laneq_f32_0(float32x4_t a, float32x4_t b, float32x4_t v)
return vmlsq_laneq_f32(a, b, v, 0);
}

// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_lane_f32(<2 x float> noundef %a, <2 x float> noundef %b, <2 x float> noundef %v) #0 {
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> <i32 1, i32 1>
Expand All @@ -147,7 +147,7 @@ float32x2_t test_vmla_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) {
return vmla_lane_f32(a, b, v, 1);
}

// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_lane_f32(<4 x float> noundef %a, <4 x float> noundef %b, <2 x float> noundef %v) #1 {
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> <i32 1, i32 1, i32 1, i32 1>
Expand All @@ -158,7 +158,7 @@ float32x4_t test_vmlaq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) {
return vmlaq_lane_f32(a, b, v, 1);
}

// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_laneq_f32(<2 x float> noundef %a, <2 x float> noundef %b, <4 x float> noundef %v) #1 {
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> <i32 3, i32 3>
Expand All @@ -169,7 +169,7 @@ float32x2_t test_vmla_laneq_f32(float32x2_t a, float32x2_t b, float32x4_t v) {
return vmla_laneq_f32(a, b, v, 3);
}

// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_laneq_f32(<4 x float> noundef %a, <4 x float> noundef %b, <4 x float> noundef %v) #1 {
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> <i32 3, i32 3, i32 3, i32 3>
Expand All @@ -180,7 +180,7 @@ float32x4_t test_vmlaq_laneq_f32(float32x4_t a, float32x4_t b, float32x4_t v) {
return vmlaq_laneq_f32(a, b, v, 3);
}

// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_lane_f32(<2 x float> noundef %a, <2 x float> noundef %b, <2 x float> noundef %v) #0 {
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> <i32 1, i32 1>
Expand All @@ -191,7 +191,7 @@ float32x2_t test_vmls_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) {
return vmls_lane_f32(a, b, v, 1);
}

// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_lane_f32(<4 x float> noundef %a, <4 x float> noundef %b, <2 x float> noundef %v) #1 {
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> <i32 1, i32 1, i32 1, i32 1>
Expand All @@ -202,7 +202,7 @@ float32x2_t test_vmls_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) {
float32x4_t test_vmlsq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) {
return vmlsq_lane_f32(a, b, v, 1);
}
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_laneq_f32(<2 x float> noundef %a, <2 x float> noundef %b, <4 x float> noundef %v) #1 {
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> <i32 3, i32 3>
Expand All @@ -213,7 +213,7 @@ float32x2_t test_vmls_laneq_f32(float32x2_t a, float32x2_t b, float32x4_t v) {
return vmls_laneq_f32(a, b, v, 3);
}

// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_laneq_f32(<4 x float> noundef %a, <4 x float> noundef %b, <4 x float> noundef %v) #1 {
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> <i32 3, i32 3, i32 3, i32 3>
Expand All @@ -224,7 +224,7 @@ float32x4_t test_vmlsq_laneq_f32(float32x4_t a, float32x4_t b, float32x4_t v) {
return vmlsq_laneq_f32(a, b, v, 3);
}

// CHECK-LABEL: define{{.*}} <2 x double> @test_vfmaq_n_f64(<2 x double> noundef %a, <2 x double> noundef %b, double noundef %c) #1 {
// CHECK-LABEL: define{{.*}} <2 x double> @test_vfmaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1
// CHECK: [[TMP6:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %b, <2 x double> [[VECINIT1_I]], <2 x double> %a)
Expand All @@ -233,7 +233,7 @@ float64x2_t test_vfmaq_n_f64(float64x2_t a, float64x2_t b, float64_t c) {
return vfmaq_n_f64(a, b, c);
}

// CHECK-LABEL: define{{.*}} <2 x double> @test_vfmsq_n_f64(<2 x double> noundef %a, <2 x double> noundef %b, double noundef %c) #1 {
// CHECK-LABEL: define{{.*}} <2 x double> @test_vfmsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
// CHECK: [[SUB_I:%.*]] = fneg <2 x double> %b
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1
Expand Down
540 changes: 270 additions & 270 deletions clang/test/CodeGen/aarch64-neon-ldst-one.c
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Large diffs are not rendered by default.

48 changes: 24 additions & 24 deletions clang/test/CodeGen/aarch64-neon-scalar-copy.c
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Original file line number Diff line number Diff line change
Expand Up @@ -3,186 +3,186 @@

#include <arm_neon.h>

// CHECK-LABEL: define{{.*}} float @test_vdups_lane_f32(<2 x float> noundef %a) #0 {
// CHECK-LABEL: define{{.*}} float @test_vdups_lane_f32(<2 x float> %a) #0 {
// CHECK: [[VDUPS_LANE:%.*]] = extractelement <2 x float> %a, i32 1
// CHECK: ret float [[VDUPS_LANE]]
float32_t test_vdups_lane_f32(float32x2_t a) {
return vdups_lane_f32(a, 1);
}


// CHECK-LABEL: define{{.*}} double @test_vdupd_lane_f64(<1 x double> noundef %a) #0 {
// CHECK-LABEL: define{{.*}} double @test_vdupd_lane_f64(<1 x double> %a) #0 {
// CHECK: [[VDUPD_LANE:%.*]] = extractelement <1 x double> %a, i32 0
// CHECK: ret double [[VDUPD_LANE]]
float64_t test_vdupd_lane_f64(float64x1_t a) {
return vdupd_lane_f64(a, 0);
}


// CHECK-LABEL: define{{.*}} float @test_vdups_laneq_f32(<4 x float> noundef %a) #1 {
// CHECK-LABEL: define{{.*}} float @test_vdups_laneq_f32(<4 x float> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %a, i32 3
// CHECK: ret float [[VGETQ_LANE]]
float32_t test_vdups_laneq_f32(float32x4_t a) {
return vdups_laneq_f32(a, 3);
}


// CHECK-LABEL: define{{.*}} double @test_vdupd_laneq_f64(<2 x double> noundef %a) #1 {
// CHECK-LABEL: define{{.*}} double @test_vdupd_laneq_f64(<2 x double> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %a, i32 1
// CHECK: ret double [[VGETQ_LANE]]
float64_t test_vdupd_laneq_f64(float64x2_t a) {
return vdupd_laneq_f64(a, 1);
}


// CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_s8(<8 x i8> noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_s8(<8 x i8> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
// CHECK: ret i8 [[VGET_LANE]]
int8_t test_vdupb_lane_s8(int8x8_t a) {
return vdupb_lane_s8(a, 7);
}


// CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_s16(<4 x i16> noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_s16(<4 x i16> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
// CHECK: ret i16 [[VGET_LANE]]
int16_t test_vduph_lane_s16(int16x4_t a) {
return vduph_lane_s16(a, 3);
}


// CHECK-LABEL: define{{.*}} i32 @test_vdups_lane_s32(<2 x i32> noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i32 @test_vdups_lane_s32(<2 x i32> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1
// CHECK: ret i32 [[VGET_LANE]]
int32_t test_vdups_lane_s32(int32x2_t a) {
return vdups_lane_s32(a, 1);
}


// CHECK-LABEL: define{{.*}} i64 @test_vdupd_lane_s64(<1 x i64> noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i64 @test_vdupd_lane_s64(<1 x i64> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0
// CHECK: ret i64 [[VGET_LANE]]
int64_t test_vdupd_lane_s64(int64x1_t a) {
return vdupd_lane_s64(a, 0);
}


// CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_u8(<8 x i8> noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_u8(<8 x i8> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
// CHECK: ret i8 [[VGET_LANE]]
uint8_t test_vdupb_lane_u8(uint8x8_t a) {
return vdupb_lane_u8(a, 7);
}


// CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_u16(<4 x i16> noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_u16(<4 x i16> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
// CHECK: ret i16 [[VGET_LANE]]
uint16_t test_vduph_lane_u16(uint16x4_t a) {
return vduph_lane_u16(a, 3);
}


// CHECK-LABEL: define{{.*}} i32 @test_vdups_lane_u32(<2 x i32> noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i32 @test_vdups_lane_u32(<2 x i32> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1
// CHECK: ret i32 [[VGET_LANE]]
uint32_t test_vdups_lane_u32(uint32x2_t a) {
return vdups_lane_u32(a, 1);
}


// CHECK-LABEL: define{{.*}} i64 @test_vdupd_lane_u64(<1 x i64> noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i64 @test_vdupd_lane_u64(<1 x i64> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0
// CHECK: ret i64 [[VGET_LANE]]
uint64_t test_vdupd_lane_u64(uint64x1_t a) {
return vdupd_lane_u64(a, 0);
}

// CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_s8(<16 x i8> noundef %a) #1 {
// CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_s8(<16 x i8> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
// CHECK: ret i8 [[VGETQ_LANE]]
int8_t test_vdupb_laneq_s8(int8x16_t a) {
return vdupb_laneq_s8(a, 15);
}


// CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_s16(<8 x i16> noundef %a) #1 {
// CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_s16(<8 x i16> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
// CHECK: ret i16 [[VGETQ_LANE]]
int16_t test_vduph_laneq_s16(int16x8_t a) {
return vduph_laneq_s16(a, 7);
}


// CHECK-LABEL: define{{.*}} i32 @test_vdups_laneq_s32(<4 x i32> noundef %a) #1 {
// CHECK-LABEL: define{{.*}} i32 @test_vdups_laneq_s32(<4 x i32> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3
// CHECK: ret i32 [[VGETQ_LANE]]
int32_t test_vdups_laneq_s32(int32x4_t a) {
return vdups_laneq_s32(a, 3);
}


// CHECK-LABEL: define{{.*}} i64 @test_vdupd_laneq_s64(<2 x i64> noundef %a) #1 {
// CHECK-LABEL: define{{.*}} i64 @test_vdupd_laneq_s64(<2 x i64> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1
// CHECK: ret i64 [[VGETQ_LANE]]
int64_t test_vdupd_laneq_s64(int64x2_t a) {
return vdupd_laneq_s64(a, 1);
}


// CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_u8(<16 x i8> noundef %a) #1 {
// CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_u8(<16 x i8> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
// CHECK: ret i8 [[VGETQ_LANE]]
uint8_t test_vdupb_laneq_u8(uint8x16_t a) {
return vdupb_laneq_u8(a, 15);
}


// CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_u16(<8 x i16> noundef %a) #1 {
// CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_u16(<8 x i16> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
// CHECK: ret i16 [[VGETQ_LANE]]
uint16_t test_vduph_laneq_u16(uint16x8_t a) {
return vduph_laneq_u16(a, 7);
}


// CHECK-LABEL: define{{.*}} i32 @test_vdups_laneq_u32(<4 x i32> noundef %a) #1 {
// CHECK-LABEL: define{{.*}} i32 @test_vdups_laneq_u32(<4 x i32> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3
// CHECK: ret i32 [[VGETQ_LANE]]
uint32_t test_vdups_laneq_u32(uint32x4_t a) {
return vdups_laneq_u32(a, 3);
}


// CHECK-LABEL: define{{.*}} i64 @test_vdupd_laneq_u64(<2 x i64> noundef %a) #1 {
// CHECK-LABEL: define{{.*}} i64 @test_vdupd_laneq_u64(<2 x i64> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1
// CHECK: ret i64 [[VGETQ_LANE]]
uint64_t test_vdupd_laneq_u64(uint64x2_t a) {
return vdupd_laneq_u64(a, 1);
}

// CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_p8(<8 x i8> noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_p8(<8 x i8> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
// CHECK: ret i8 [[VGET_LANE]]
poly8_t test_vdupb_lane_p8(poly8x8_t a) {
return vdupb_lane_p8(a, 7);
}

// CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_p16(<4 x i16> noundef %a) #0 {
// CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_p16(<4 x i16> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
// CHECK: ret i16 [[VGET_LANE]]
poly16_t test_vduph_lane_p16(poly16x4_t a) {
return vduph_lane_p16(a, 3);
}

// CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_p8(<16 x i8> noundef %a) #1 {
// CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_p8(<16 x i8> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
// CHECK: ret i8 [[VGETQ_LANE]]
poly8_t test_vdupb_laneq_p8(poly8x16_t a) {
return vdupb_laneq_p8(a, 15);
}

// CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_p16(<8 x i16> noundef %a) #1 {
// CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_p16(<8 x i16> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
// CHECK: ret i16 [[VGETQ_LANE]]
poly16_t test_vduph_laneq_p16(poly16x8_t a) {
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