9 changes: 9 additions & 0 deletions llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,7 @@
# FULL-NEXT: workGroupIDX: { reg: '$sgpr6' }
# FULL-NEXT: workGroupIDY: { reg: '$sgpr13' }
# FULL-NEXT: workGroupIDZ: { reg: '$sgpr14' }
# FULL-NEXT: LDSKernelId: { reg: '$sgpr15' }
# FULL-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr7' }
# FULL-NEXT: implicitArgPtr: { reg: '$sgpr8_sgpr9' }
# FULL-NEXT: workItemIDX: { reg: '$vgpr0' }
Expand Down Expand Up @@ -67,6 +68,7 @@
# SIMPLE-NEXT: workGroupIDX: { reg: '$sgpr6' }
# SIMPLE-NEXT: workGroupIDY: { reg: '$sgpr13' }
# SIMPLE-NEXT: workGroupIDZ: { reg: '$sgpr14' }
# SIMPLE-NEXT: LDSKernelId: { reg: '$sgpr15' }
# SIMPLE-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr7' }
# SIMPLE-NEXT: implicitArgPtr: { reg: '$sgpr8_sgpr9' }
# SIMPLE-NEXT: workItemIDX: { reg: '$vgpr0' }
Expand Down Expand Up @@ -127,6 +129,7 @@ body: |
# FULL-NEXT: workGroupIDX: { reg: '$sgpr12' }
# FULL-NEXT: workGroupIDY: { reg: '$sgpr13' }
# FULL-NEXT: workGroupIDZ: { reg: '$sgpr14' }
# FULL-NEXT: LDSKernelId: { reg: '$sgpr15' }
# FULL-NEXT: implicitArgPtr: { reg: '$sgpr8_sgpr9' }
# FULL-NEXT: workItemIDX: { reg: '$vgpr31', mask: 1023 }
# FULL-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
Expand All @@ -153,6 +156,7 @@ body: |
# SIMPLE-NEXT: workGroupIDX: { reg: '$sgpr12' }
# SIMPLE-NEXT: workGroupIDY: { reg: '$sgpr13' }
# SIMPLE-NEXT: workGroupIDZ: { reg: '$sgpr14' }
# SIMPLE-NEXT: LDSKernelId: { reg: '$sgpr15' }
# SIMPLE-NEXT: implicitArgPtr: { reg: '$sgpr8_sgpr9' }
# SIMPLE-NEXT: workItemIDX: { reg: '$vgpr31', mask: 1023 }
# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
Expand Down Expand Up @@ -194,6 +198,7 @@ body: |
# FULL-NEXT: workGroupIDX: { reg: '$sgpr12' }
# FULL-NEXT: workGroupIDY: { reg: '$sgpr13' }
# FULL-NEXT: workGroupIDZ: { reg: '$sgpr14' }
# FULL-NEXT: LDSKernelId: { reg: '$sgpr15' }
# FULL-NEXT: implicitArgPtr: { reg: '$sgpr8_sgpr9' }
# FULL-NEXT: workItemIDX: { reg: '$vgpr31', mask: 1023 }
# FULL-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
Expand All @@ -220,6 +225,7 @@ body: |
# SIMPLE-NEXT: workGroupIDX: { reg: '$sgpr12' }
# SIMPLE-NEXT: workGroupIDY: { reg: '$sgpr13' }
# SIMPLE-NEXT: workGroupIDZ: { reg: '$sgpr14' }
# SIMPLE-NEXT: LDSKernelId: { reg: '$sgpr15' }
# SIMPLE-NEXT: implicitArgPtr: { reg: '$sgpr8_sgpr9' }
# SIMPLE-NEXT: workItemIDX: { reg: '$vgpr31', mask: 1023 }
# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
Expand Down Expand Up @@ -262,6 +268,7 @@ body: |
# FULL-NEXT: workGroupIDX: { reg: '$sgpr12' }
# FULL-NEXT: workGroupIDY: { reg: '$sgpr13' }
# FULL-NEXT: workGroupIDZ: { reg: '$sgpr14' }
# FULL-NEXT: LDSKernelId: { reg: '$sgpr15' }
# FULL-NEXT: implicitArgPtr: { reg: '$sgpr8_sgpr9' }
# FULL-NEXT: workItemIDX: { reg: '$vgpr31', mask: 1023 }
# FULL-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
Expand Down Expand Up @@ -289,6 +296,7 @@ body: |
# SIMPLE-NEXT: workGroupIDX: { reg: '$sgpr12' }
# SIMPLE-NEXT: workGroupIDY: { reg: '$sgpr13' }
# SIMPLE-NEXT: workGroupIDZ: { reg: '$sgpr14' }
# SIMPLE-NEXT: LDSKernelId: { reg: '$sgpr15' }
# SIMPLE-NEXT: implicitArgPtr: { reg: '$sgpr8_sgpr9' }
# SIMPLE-NEXT: workItemIDX: { reg: '$vgpr31', mask: 1023 }
# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
Expand Down Expand Up @@ -341,6 +349,7 @@ body: |
# SIMPLE-NEXT: workGroupIDX: { reg: '$sgpr12' }
# SIMPLE-NEXT: workGroupIDY: { reg: '$sgpr13' }
# SIMPLE-NEXT: workGroupIDZ: { reg: '$sgpr14' }
# SIMPLE-NEXT: LDSKernelId: { reg: '$sgpr15' }
# SIMPLE-NEXT: implicitArgPtr: { reg: '$sgpr8_sgpr9' }
# SIMPLE-NEXT: workItemIDX: { reg: '$vgpr31', mask: 1023 }
# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr0', mask: 65280 }
Expand Down
2 changes: 2 additions & 0 deletions llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -119,6 +119,7 @@ define amdgpu_ps void @gds_size_shader(i32 %arg0, i32 inreg %arg1) #5 {
; CHECK-NEXT: workGroupIDX: { reg: '$sgpr12' }
; CHECK-NEXT: workGroupIDY: { reg: '$sgpr13' }
; CHECK-NEXT: workGroupIDZ: { reg: '$sgpr14' }
; CHECK-NEXT: LDSKernelId: { reg: '$sgpr15' }
; CHECK-NEXT: implicitArgPtr: { reg: '$sgpr8_sgpr9' }
; CHECK-NEXT: workItemIDX: { reg: '$vgpr31', mask: 1023 }
; CHECK-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
Expand Down Expand Up @@ -164,6 +165,7 @@ define void @function() {
; CHECK-NEXT: workGroupIDX: { reg: '$sgpr12' }
; CHECK-NEXT: workGroupIDY: { reg: '$sgpr13' }
; CHECK-NEXT: workGroupIDZ: { reg: '$sgpr14' }
; CHECK-NEXT: LDSKernelId: { reg: '$sgpr15' }
; CHECK-NEXT: implicitArgPtr: { reg: '$sgpr8_sgpr9' }
; CHECK-NEXT: workItemIDX: { reg: '$vgpr31', mask: 1023 }
; CHECK-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
Expand Down
1 change: 1 addition & 0 deletions llvm/test/tools/llvm-reduce/mir/preserve-machine-function-info-amdgpu.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,7 @@
# RESULT-NEXT: workGroupIDX: { reg: '$sgpr20' }
# RESULT-NEXT: workGroupIDY: { reg: '$sgpr19' }
# RESULT-NEXT: workGroupIDZ: { reg: '$sgpr18' }
# RESULT-NEXT: LDSKernelId: { reg: '$sgpr15' }
# RESULT-NEXT: implicitArgPtr: { reg: '$sgpr10_sgpr11' }
# RESULT-NEXT: workItemIDX: { reg: '$vgpr34', mask: 1023 }
# RESULT-NEXT: workItemIDY: { reg: '$vgpr34', mask: 1047552 }
Expand Down