47 changes: 28 additions & 19 deletions llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -11,12 +11,15 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x4
; CHECK-NEXT: %carry_in:_(s1) = G_TRUNC [[COPY4]](s64)
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[COPY]], [[COPY2]], %carry_in
; CHECK-NEXT: %19:_(s64), %carry_out:_(s1) = G_UADDE [[COPY1]], [[COPY3]], [[UADDE1]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT %carry_out(s1)
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE [[COPY]], [[COPY2]], %24
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY4]](s64)
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s64), [[UADDE3:%[0-9]+]]:_(s32) = G_UADDE [[COPY1]], [[COPY3]], %22
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UADDE1]], [[C]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT [[UADDE3]](s32)
; CHECK-NEXT: $x0 = COPY [[UADDE]](s64)
; CHECK-NEXT: $x1 = COPY %19(s64)
; CHECK-NEXT: $x1 = COPY [[UADDE2]](s64)
; CHECK-NEXT: $x2 = COPY %carry_out_ext(s64)
%0:_(s64) = COPY $x0
%1:_(s64) = COPY $x1
Expand Down Expand Up @@ -44,14 +47,18 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x4
; CHECK-NEXT: %carry_in:_(s1) = G_TRUNC [[COPY4]](s64)
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[COPY]], [[COPY1]], %carry_in
; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s64), [[UADDE3:%[0-9]+]]:_(s1) = G_UADDE [[COPY1]], [[COPY2]], [[UADDE1]]
; CHECK-NEXT: %24:_(s64), %carry_out:_(s1) = G_UADDE [[COPY2]], [[COPY3]], [[UADDE3]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT %carry_out(s1)
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE [[COPY]], [[COPY1]], %31
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY4]](s64)
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s64), [[UADDE3:%[0-9]+]]:_(s32) = G_UADDE [[COPY1]], [[COPY2]], %29
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UADDE1]], [[C]]
; CHECK-NEXT: [[UADDE4:%[0-9]+]]:_(s64), [[UADDE5:%[0-9]+]]:_(s32) = G_UADDE [[COPY2]], [[COPY3]], %27
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[UADDE3]], [[C]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT [[UADDE5]](s32)
; CHECK-NEXT: $x0 = COPY [[UADDE]](s64)
; CHECK-NEXT: $x1 = COPY [[UADDE2]](s64)
; CHECK-NEXT: $x2 = COPY %24(s64)
; CHECK-NEXT: $x2 = COPY [[UADDE4]](s64)
; CHECK-NEXT: $x3 = COPY %carry_out_ext(s64)
%0:_(s64) = COPY $x0
%1:_(s64) = COPY $x1
Expand All @@ -78,15 +85,17 @@ body: |
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
; CHECK-NEXT: %carry_in:_(s1) = G_TRUNC [[COPY2]](s64)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[AND]], [[AND1]], %carry_in
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[UADDE]], [[C]]
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[UADDE]](s32), [[AND2]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE [[AND]], [[AND1]], %18
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64)
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[TRUNC2]], [[C1]]
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[UADDE]], [[C]]
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[UADDE]](s32), [[AND3]]
; CHECK-NEXT: %add_ext:_(s64) = G_ANYEXT [[UADDE]](s32)
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT [[ICMP]](s32)
; CHECK-NEXT: $x0 = COPY %add_ext(s64)
Expand All @@ -112,11 +121,11 @@ body: |
; CHECK: %lhs:_(s32) = COPY $w0
; CHECK-NEXT: %rhs:_(s32) = COPY $w1
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w2
; CHECK-NEXT: %carry_in:_(s1) = G_TRUNC [[COPY]](s32)
; CHECK-NEXT: %add:_(s32), %carry_out:_(s1) = G_UADDE %lhs, %rhs, %carry_in
; CHECK-NEXT: %carry_out_ext:_(s32) = G_ANYEXT %carry_out(s1)
; CHECK-NEXT: %add:_(s32), %7:_(s32) = G_UADDE %lhs, %rhs, %8
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: $w0 = COPY %add(s32)
; CHECK-NEXT: $w1 = COPY %carry_out_ext(s32)
; CHECK-NEXT: $w1 = COPY %7(s32)
%lhs:_(s32) = COPY $w0
%rhs:_(s32) = COPY $w1
%2:_(s32) = COPY $w2
Expand Down
28 changes: 16 additions & 12 deletions llvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,11 +10,13 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[COPY]], [[COPY2]]
; CHECK-NEXT: %17:_(s64), %carry_out:_(s1) = G_UADDE [[COPY1]], [[COPY3]], [[UADDO1]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT %carry_out(s1)
; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO [[COPY]], [[COPY2]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE [[COPY1]], [[COPY3]], %20
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UADDO1]], [[C]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT [[UADDE1]](s32)
; CHECK-NEXT: $x0 = COPY [[UADDO]](s64)
; CHECK-NEXT: $x1 = COPY %17(s64)
; CHECK-NEXT: $x1 = COPY [[UADDE]](s64)
; CHECK-NEXT: $x2 = COPY %carry_out_ext(s64)
%0:_(s64) = COPY $x0
%1:_(s64) = COPY $x1
Expand All @@ -39,13 +41,16 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[COPY]], [[COPY1]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[COPY1]], [[COPY2]], [[UADDO1]]
; CHECK-NEXT: %22:_(s64), %carry_out:_(s1) = G_UADDE [[COPY2]], [[COPY3]], [[UADDE1]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT %carry_out(s1)
; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO [[COPY]], [[COPY1]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE [[COPY1]], [[COPY2]], %27
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UADDO1]], [[C]]
; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s64), [[UADDE3:%[0-9]+]]:_(s32) = G_UADDE [[COPY2]], [[COPY3]], %25
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UADDE1]], [[C]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT [[UADDE3]](s32)
; CHECK-NEXT: $x0 = COPY [[UADDO]](s64)
; CHECK-NEXT: $x1 = COPY [[UADDE]](s64)
; CHECK-NEXT: $x2 = COPY %22(s64)
; CHECK-NEXT: $x2 = COPY [[UADDE2]](s64)
; CHECK-NEXT: $x3 = COPY %carry_out_ext(s64)
%0:_(s64) = COPY $x0
%1:_(s64) = COPY $x1
Expand Down Expand Up @@ -99,10 +104,9 @@ body: |
; CHECK-LABEL: name: test_scalar_uaddo_32
; CHECK: %lhs:_(s32) = COPY $w0
; CHECK-NEXT: %rhs:_(s32) = COPY $w1
; CHECK-NEXT: %add:_(s32), %carry_out:_(s1) = G_UADDO %lhs, %rhs
; CHECK-NEXT: %carry_out_ext:_(s32) = G_ANYEXT %carry_out(s1)
; CHECK-NEXT: %add:_(s32), %5:_(s32) = G_UADDO %lhs, %rhs
; CHECK-NEXT: $w0 = COPY %add(s32)
; CHECK-NEXT: $w1 = COPY %carry_out_ext(s32)
; CHECK-NEXT: $w1 = COPY %5(s32)
%lhs:_(s32) = COPY $w0
%rhs:_(s32) = COPY $w1
%add:_(s32), %carry_out:_(s1) = G_UADDO %lhs, %rhs
Expand Down
27 changes: 17 additions & 10 deletions llvm/test/CodeGen/AArch64/GlobalISel/legalize-usub-sat.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -16,9 +16,11 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[COPY]], [[COPY1]]
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO [[COPY]], [[COPY1]]
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[USUBO1]](s1), [[C]], [[USUBO]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C1]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[C]], [[USUBO]]
; CHECK-NEXT: $w0 = COPY [[SELECT]](s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%0:_(s32) = COPY $w0
Expand All @@ -44,9 +46,11 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[COPY]], [[COPY1]]
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO [[COPY]], [[COPY1]]
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[USUBO1]](s1), [[C]], [[USUBO]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C1]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s32), [[C]], [[USUBO]]
; CHECK-NEXT: $x0 = COPY [[SELECT]](s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%0:_(s64) = COPY $x0
Expand Down Expand Up @@ -78,9 +82,10 @@ body: |
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[AND]], [[AND1]]
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C]]
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[SUB]](s32), [[AND2]]
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[C1]], [[SUB]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND3]](s32), [[C1]], [[SUB]]
; CHECK-NEXT: $w0 = COPY [[SELECT]](s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%2:_(s32) = COPY $w0
Expand Down Expand Up @@ -115,9 +120,10 @@ body: |
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[AND]], [[AND1]]
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C]]
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[SUB]](s32), [[AND2]]
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[C1]], [[SUB]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND3]](s32), [[C1]], [[SUB]]
; CHECK-NEXT: $w0 = COPY [[SELECT]](s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%2:_(s32) = COPY $w0
Expand Down Expand Up @@ -152,9 +158,10 @@ body: |
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[AND]], [[AND1]]
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C]]
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[SUB]](s32), [[AND2]]
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[C1]], [[SUB]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND3]](s32), [[C1]], [[SUB]]
; CHECK-NEXT: $w0 = COPY [[SELECT]](s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%2:_(s32) = COPY $w0
Expand Down
47 changes: 28 additions & 19 deletions llvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -11,12 +11,15 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x4
; CHECK-NEXT: %carry_in:_(s1) = G_TRUNC [[COPY4]](s64)
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[COPY]], [[COPY2]], %carry_in
; CHECK-NEXT: %19:_(s64), %carry_out:_(s1) = G_USUBE [[COPY1]], [[COPY3]], [[USUBE1]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT %carry_out(s1)
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE [[COPY]], [[COPY2]], %24
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY4]](s64)
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
; CHECK-NEXT: [[USUBE2:%[0-9]+]]:_(s64), [[USUBE3:%[0-9]+]]:_(s32) = G_USUBE [[COPY1]], [[COPY3]], %22
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[USUBE1]], [[C]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT [[USUBE3]](s32)
; CHECK-NEXT: $x0 = COPY [[USUBE]](s64)
; CHECK-NEXT: $x1 = COPY %19(s64)
; CHECK-NEXT: $x1 = COPY [[USUBE2]](s64)
; CHECK-NEXT: $x2 = COPY %carry_out_ext(s64)
%0:_(s64) = COPY $x0
%1:_(s64) = COPY $x1
Expand Down Expand Up @@ -44,14 +47,18 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x4
; CHECK-NEXT: %carry_in:_(s1) = G_TRUNC [[COPY4]](s64)
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[COPY]], [[COPY1]], %carry_in
; CHECK-NEXT: [[USUBE2:%[0-9]+]]:_(s64), [[USUBE3:%[0-9]+]]:_(s1) = G_USUBE [[COPY1]], [[COPY2]], [[USUBE1]]
; CHECK-NEXT: %24:_(s64), %carry_out:_(s1) = G_USUBE [[COPY2]], [[COPY3]], [[USUBE3]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT %carry_out(s1)
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE [[COPY]], [[COPY1]], %31
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY4]](s64)
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
; CHECK-NEXT: [[USUBE2:%[0-9]+]]:_(s64), [[USUBE3:%[0-9]+]]:_(s32) = G_USUBE [[COPY1]], [[COPY2]], %29
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[USUBE1]], [[C]]
; CHECK-NEXT: [[USUBE4:%[0-9]+]]:_(s64), [[USUBE5:%[0-9]+]]:_(s32) = G_USUBE [[COPY2]], [[COPY3]], %27
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[USUBE3]], [[C]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT [[USUBE5]](s32)
; CHECK-NEXT: $x0 = COPY [[USUBE]](s64)
; CHECK-NEXT: $x1 = COPY [[USUBE2]](s64)
; CHECK-NEXT: $x2 = COPY %24(s64)
; CHECK-NEXT: $x2 = COPY [[USUBE4]](s64)
; CHECK-NEXT: $x3 = COPY %carry_out_ext(s64)
%0:_(s64) = COPY $x0
%1:_(s64) = COPY $x1
Expand All @@ -78,15 +85,17 @@ body: |
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
; CHECK-NEXT: %carry_in:_(s1) = G_TRUNC [[COPY2]](s64)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[AND]], [[AND1]], %carry_in
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[USUBE]], [[C]]
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[USUBE]](s32), [[AND2]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE [[AND]], [[AND1]], %18
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64)
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[TRUNC2]], [[C1]]
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[USUBE]], [[C]]
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[USUBE]](s32), [[AND3]]
; CHECK-NEXT: %sub_ext:_(s64) = G_ANYEXT [[USUBE]](s32)
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT [[ICMP]](s32)
; CHECK-NEXT: $x0 = COPY %sub_ext(s64)
Expand All @@ -112,11 +121,11 @@ body: |
; CHECK: %lhs:_(s32) = COPY $w0
; CHECK-NEXT: %rhs:_(s32) = COPY $w1
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w2
; CHECK-NEXT: %carry_in:_(s1) = G_TRUNC [[COPY]](s32)
; CHECK-NEXT: %sub:_(s32), %carry_out:_(s1) = G_USUBE %lhs, %rhs, %carry_in
; CHECK-NEXT: %carry_out_ext:_(s32) = G_ANYEXT %carry_out(s1)
; CHECK-NEXT: %sub:_(s32), %7:_(s32) = G_USUBE %lhs, %rhs, %8
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
; CHECK-NEXT: $w0 = COPY %sub(s32)
; CHECK-NEXT: $w1 = COPY %carry_out_ext(s32)
; CHECK-NEXT: $w1 = COPY %7(s32)
%lhs:_(s32) = COPY $w0
%rhs:_(s32) = COPY $w1
%2:_(s32) = COPY $w2
Expand Down
28 changes: 16 additions & 12 deletions llvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,11 +10,13 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[COPY]], [[COPY2]]
; CHECK-NEXT: %17:_(s64), %carry_out:_(s1) = G_USUBE [[COPY1]], [[COPY3]], [[USUBO1]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT %carry_out(s1)
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO [[COPY]], [[COPY2]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE [[COPY1]], [[COPY3]], %20
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT [[USUBE1]](s32)
; CHECK-NEXT: $x0 = COPY [[USUBO]](s64)
; CHECK-NEXT: $x1 = COPY %17(s64)
; CHECK-NEXT: $x1 = COPY [[USUBE]](s64)
; CHECK-NEXT: $x2 = COPY %carry_out_ext(s64)
%0:_(s64) = COPY $x0
%1:_(s64) = COPY $x1
Expand All @@ -39,13 +41,16 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[COPY]], [[COPY1]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[COPY1]], [[COPY2]], [[USUBO1]]
; CHECK-NEXT: %22:_(s64), %carry_out:_(s1) = G_USUBE [[COPY2]], [[COPY3]], [[USUBE1]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT %carry_out(s1)
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO [[COPY]], [[COPY1]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE [[COPY1]], [[COPY2]], %27
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C]]
; CHECK-NEXT: [[USUBE2:%[0-9]+]]:_(s64), [[USUBE3:%[0-9]+]]:_(s32) = G_USUBE [[COPY2]], [[COPY3]], %25
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[USUBE1]], [[C]]
; CHECK-NEXT: %carry_out_ext:_(s64) = G_ANYEXT [[USUBE3]](s32)
; CHECK-NEXT: $x0 = COPY [[USUBO]](s64)
; CHECK-NEXT: $x1 = COPY [[USUBE]](s64)
; CHECK-NEXT: $x2 = COPY %22(s64)
; CHECK-NEXT: $x2 = COPY [[USUBE2]](s64)
; CHECK-NEXT: $x3 = COPY %carry_out_ext(s64)
%0:_(s64) = COPY $x0
%1:_(s64) = COPY $x1
Expand Down Expand Up @@ -99,10 +104,9 @@ body: |
; CHECK-LABEL: name: test_scalar_usubo_32
; CHECK: %lhs:_(s32) = COPY $w0
; CHECK-NEXT: %rhs:_(s32) = COPY $w1
; CHECK-NEXT: %sub:_(s32), %carry_out:_(s1) = G_USUBO %lhs, %rhs
; CHECK-NEXT: %carry_out_ext:_(s32) = G_ANYEXT %carry_out(s1)
; CHECK-NEXT: %sub:_(s32), %5:_(s32) = G_USUBO %lhs, %rhs
; CHECK-NEXT: $w0 = COPY %sub(s32)
; CHECK-NEXT: $w1 = COPY %carry_out_ext(s32)
; CHECK-NEXT: $w1 = COPY %5(s32)
%lhs:_(s32) = COPY $w0
%rhs:_(s32) = COPY $w1
%sub:_(s32), %carry_out:_(s1) = G_USUBO %lhs, %rhs
Expand Down
9 changes: 5 additions & 4 deletions llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner-zext-trunc-crash.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ body: |
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s16) = G_PHI %32(s16), %bb.2, [[DEF]](s16), %bb.0
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s16) = G_PHI %33(s16), %bb.2, [[DEF]](s16), %bb.0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[PHI]](s16)
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]]
Expand All @@ -33,13 +33,14 @@ body: |
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 26
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[AND2]](s32), [[C4]]
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[ICMP1]], [[OR]]
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[OR1]](s32)
; CHECK-NEXT: G_BRCOND [[TRUNC]](s1), %bb.2
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[OR1]], [[C5]]
; CHECK-NEXT: G_BRCOND [[AND3]](s32), %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s16) = G_CONSTANT i16 64
; CHECK-NEXT: [[C6:%[0-9]+]]:_(s16) = G_CONSTANT i16 64
; CHECK-NEXT: G_BR %bb.1
bb.1:
%1:_(s8) = G_CONSTANT i8 46
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -28,8 +28,8 @@ define i32 @foo() {
; CHECK-NEXT: [[LOAD:%[0-9]+]]:gpr(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load (s32) from @var1)
; CHECK-NEXT: [[C3:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[ICMP:%[0-9]+]]:gpr(s32) = G_ICMP intpred(ne), [[LOAD]](s32), [[C3]]
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[ICMP]](s32)
; CHECK-NEXT: G_BRCOND [[TRUNC]](s1), %bb.3
; CHECK-NEXT: [[AND:%[0-9]+]]:gpr(s32) = G_AND [[ICMP]], [[C3]]
; CHECK-NEXT: G_BRCOND [[AND]](s32), %bb.3
; CHECK-NEXT: G_BR %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.if.then:
Expand Down Expand Up @@ -84,8 +84,8 @@ define i32 @darwin_tls() {
; CHECK-NEXT: [[LOAD:%[0-9]+]]:gpr(s32) = G_LOAD [[GV2]](p0) :: (dereferenceable load (s32) from @var1)
; CHECK-NEXT: [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[ICMP:%[0-9]+]]:gpr(s32) = G_ICMP intpred(ne), [[LOAD]](s32), [[C1]]
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[ICMP]](s32)
; CHECK-NEXT: G_BRCOND [[TRUNC]](s1), %bb.3
; CHECK-NEXT: [[AND:%[0-9]+]]:gpr(s32) = G_AND [[ICMP]], [[C1]]
; CHECK-NEXT: G_BRCOND [[AND]](s32), %bb.3
; CHECK-NEXT: G_BR %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.if.then:
Expand Down
24 changes: 8 additions & 16 deletions llvm/test/CodeGen/AArch64/GlobalISel/opt-and-tbnz-tbz.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -33,8 +33,7 @@ body: |
%3:gpr(s64) = G_CONSTANT i64 0
%2:gpr(s64) = G_AND %0, %1
%5:gpr(s32) = G_ICMP intpred(ne), %2(s64), %3
%4:gpr(s1) = G_TRUNC %5(s32)
G_BRCOND %4(s1), %bb.1
G_BRCOND %5, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -66,8 +65,7 @@ body: |
%3:gpr(s64) = G_CONSTANT i64 0
%2:gpr(s64) = G_AND %0, %1
%5:gpr(s32) = G_ICMP intpred(eq), %2(s64), %3
%4:gpr(s1) = G_TRUNC %5(s32)
G_BRCOND %4(s1), %bb.1
G_BRCOND %5, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -99,8 +97,7 @@ body: |
%3:gpr(s32) = G_CONSTANT i32 0
%2:gpr(s32) = G_AND %0, %1
%5:gpr(s32) = G_ICMP intpred(ne), %2(s32), %3
%4:gpr(s1) = G_TRUNC %5(s32)
G_BRCOND %4(s1), %bb.1
G_BRCOND %5, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -132,8 +129,7 @@ body: |
%3:gpr(s32) = G_CONSTANT i32 0
%2:gpr(s32) = G_AND %0, %1
%5:gpr(s32) = G_ICMP intpred(eq), %2(s32), %3
%4:gpr(s1) = G_TRUNC %5(s32)
G_BRCOND %4(s1), %bb.1
G_BRCOND %5, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -166,8 +162,7 @@ body: |
%3:gpr(s32) = G_CONSTANT i32 0
%2:gpr(s32) = G_AND %0, %1
%5:gpr(s32) = G_ICMP intpred(slt), %2(s32), %3
%4:gpr(s1) = G_TRUNC %5(s32)
G_BRCOND %4(s1), %bb.1
G_BRCOND %5, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -200,8 +195,7 @@ body: |
%3:gpr(s32) = G_CONSTANT i32 0
%2:gpr(s32) = G_AND %0, %1
%5:gpr(s32) = G_ICMP intpred(sgt), %2(s32), %3
%4:gpr(s1) = G_TRUNC %5(s32)
G_BRCOND %4(s1), %bb.1
G_BRCOND %5, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -233,8 +227,7 @@ body: |
%3:gpr(s64) = G_CONSTANT i64 0
%2:gpr(s64) = G_AND %0, %1
%5:gpr(s32) = G_ICMP intpred(ne), %2(s64), %3
%4:gpr(s1) = G_TRUNC %5(s32)
G_BRCOND %4(s1), %bb.1
G_BRCOND %5, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -267,8 +260,7 @@ body: |
%3:gpr(s64) = G_CONSTANT i64 4
%2:gpr(s64) = G_AND %0, %1
%5:gpr(s32) = G_ICMP intpred(ne), %2(s64), %3
%4:gpr(s1) = G_TRUNC %5(s32)
G_BRCOND %4(s1), %bb.1
G_BRCOND %5, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
9 changes: 3 additions & 6 deletions llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-and-tbz-tbnz.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -33,8 +33,7 @@ body: |
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -68,8 +67,7 @@ body: |
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -105,8 +103,7 @@ body: |
%fold_me:gpr(s64) = G_AND %copy, %fold_cst
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
42 changes: 14 additions & 28 deletions llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-compare.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -55,8 +55,7 @@ body: |
%6:gpr(s32) = G_CONSTANT i32 1
%3:gpr(s32) = G_SUB %2, %1
%7:gpr(s32) = G_ICMP intpred(ne), %0(s32), %3
%4:gpr(s1) = G_TRUNC %7(s32)
%5:gpr(s32) = G_SELECT %4(s1), %6, %2
%5:gpr(s32) = G_SELECT %7, %6, %2
$w0 = COPY %5(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -86,8 +85,7 @@ body: |
%6:gpr(s32) = G_CONSTANT i32 1
%3:gpr(s32) = G_SUB %2, %0
%7:gpr(s32) = G_ICMP intpred(ne), %3(s32), %1
%4:gpr(s1) = G_TRUNC %7(s32)
%5:gpr(s32) = G_SELECT %4(s1), %6, %2
%5:gpr(s32) = G_SELECT %7, %6, %2
$w0 = COPY %5(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -118,8 +116,7 @@ body: |
%6:gpr(s32) = G_CONSTANT i32 1
%3:gpr(s32) = G_SUB %2, %1
%7:gpr(s32) = G_ICMP intpred(slt), %0(s32), %3
%4:gpr(s1) = G_TRUNC %7(s32)
%5:gpr(s32) = G_SELECT %4(s1), %6, %2
%5:gpr(s32) = G_SELECT %7, %6, %2
$w0 = COPY %5(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -150,8 +147,7 @@ body: |
%6:gpr(s32) = G_CONSTANT i32 1
%3:gpr(s32) = G_SUB %2, %0
%7:gpr(s32) = G_ICMP intpred(slt), %3(s32), %1
%4:gpr(s1) = G_TRUNC %7(s32)
%5:gpr(s32) = G_SELECT %4(s1), %6, %2
%5:gpr(s32) = G_SELECT %7, %6, %2
$w0 = COPY %5(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -181,8 +177,7 @@ body: |
%6:gpr(s64) = G_CONSTANT i64 1
%3:gpr(s64) = G_SUB %2, %1
%7:gpr(s32) = G_ICMP intpred(ne), %0(s64), %3
%4:gpr(s1) = G_TRUNC %7(s32)
%5:gpr(s64) = G_SELECT %4(s1), %6, %2
%5:gpr(s64) = G_SELECT %7, %6, %2
$x0 = COPY %5(s64)
RET_ReallyLR implicit $x0
Expand Down Expand Up @@ -212,8 +207,7 @@ body: |
%6:gpr(s64) = G_CONSTANT i64 1
%3:gpr(s64) = G_SUB %2, %0
%7:gpr(s32) = G_ICMP intpred(ne), %3(s64), %1
%4:gpr(s1) = G_TRUNC %7(s32)
%5:gpr(s64) = G_SELECT %4(s1), %6, %2
%5:gpr(s64) = G_SELECT %7, %6, %2
$x0 = COPY %5(s64)
RET_ReallyLR implicit $x0
Expand Down Expand Up @@ -244,8 +238,7 @@ body: |
%6:gpr(s64) = G_CONSTANT i64 1
%3:gpr(s64) = G_SUB %2, %1
%7:gpr(s32) = G_ICMP intpred(slt), %0(s64), %3
%4:gpr(s1) = G_TRUNC %7(s32)
%5:gpr(s64) = G_SELECT %4(s1), %6, %2
%5:gpr(s64) = G_SELECT %7, %6, %2
$x0 = COPY %5(s64)
RET_ReallyLR implicit $x0
Expand Down Expand Up @@ -276,8 +269,7 @@ body: |
%6:gpr(s64) = G_CONSTANT i64 1
%3:gpr(s64) = G_SUB %2, %0
%7:gpr(s32) = G_ICMP intpred(slt), %3(s64), %1
%4:gpr(s1) = G_TRUNC %7(s32)
%5:gpr(s64) = G_SELECT %4(s1), %6, %2
%5:gpr(s64) = G_SELECT %7, %6, %2
$x0 = COPY %5(s64)
RET_ReallyLR implicit $x0
Expand Down Expand Up @@ -306,8 +298,7 @@ body: |
%3:gpr(s32) = G_AND %2, %1
%8:gpr(s32) = G_CONSTANT i32 0
%7:gpr(s32) = G_ICMP intpred(eq), %3(s32), %8
%4:gpr(s1) = G_TRUNC %7(s32)
%5:gpr(s32) = G_SELECT %4(s1), %6, %2
%5:gpr(s32) = G_SELECT %7, %6, %2
$w0 = COPY %5(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -336,8 +327,7 @@ body: |
%3:gpr(s64) = G_AND %2, %1
%8:gpr(s64) = G_CONSTANT i64 0
%7:gpr(s32) = G_ICMP intpred(eq), %3(s64), %8
%4:gpr(s1) = G_TRUNC %7(s32)
%5:gpr(s64) = G_SELECT %4(s1), %6, %2
%5:gpr(s64) = G_SELECT %7, %6, %2
$x0 = COPY %5(s64)
RET_ReallyLR implicit $x0
Expand Down Expand Up @@ -367,8 +357,7 @@ body: |
%3:gpr(s32) = G_AND %2, %1
%8:gpr(s32) = G_CONSTANT i32 0
%7:gpr(s32) = G_ICMP intpred(ugt), %3(s32), %8
%4:gpr(s1) = G_TRUNC %7(s32)
%5:gpr(s32) = G_SELECT %4(s1), %6, %2
%5:gpr(s32) = G_SELECT %7, %6, %2
$w0 = COPY %5(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -398,8 +387,7 @@ body: |
%3:gpr(s32) = G_AND %2, %1
%8:gpr(s32) = G_CONSTANT i32 42
%7:gpr(s32) = G_ICMP intpred(ugt), %3(s32), %8
%4:gpr(s1) = G_TRUNC %7(s32)
%5:gpr(s32) = G_SELECT %4(s1), %6, %2
%5:gpr(s32) = G_SELECT %7, %6, %2
$w0 = COPY %5(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -521,8 +509,7 @@ body: |
%shift:gpr(s64) = G_SHL %copy(s64), %cst(s64)
%and:gpr(s64) = G_AND %zero, %shift
%cmp:gpr(s32) = G_ICMP intpred(eq), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
%select:gpr(s64) = G_SELECT %cmp_trunc(s1), %one, %zero
%select:gpr(s64) = G_SELECT %cmp, %one, %zero
$x0 = COPY %select(s64)
RET_ReallyLR implicit $x0
Expand Down Expand Up @@ -553,8 +540,7 @@ body: |
%shift:gpr(s32) = G_SHL %copy(s32), %cst(s32)
%and:gpr(s32) = G_AND %zero, %shift
%cmp:gpr(s32) = G_ICMP intpred(eq), %and(s32), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
%select:gpr(s32) = G_SELECT %cmp_trunc(s1), %one, %zero
%select:gpr(s32) = G_SELECT %cmp, %one, %zero
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
Expand Down
12 changes: 4 additions & 8 deletions llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -31,8 +31,7 @@ body: |
%fold_me:gpr(s64) = G_ZEXT %copy(s32)
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -64,8 +63,7 @@ body: |
%fold_me:gpr(s64) = G_ANYEXT %copy(s32)
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -100,8 +98,7 @@ body: |
%ext2:gpr(s64) = G_ANYEXT %ext1(s32)
%and:gpr(s64) = G_AND %ext2, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -138,8 +135,7 @@ body: |
%zext:gpr(s64) = G_ZEXT %copy(s32)
%and:gpr(s64) = G_AND %zext, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
$x0 = COPY %zext:gpr(s64)
Expand Down
33 changes: 11 additions & 22 deletions llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-shift-tbz-tbnz.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -35,8 +35,7 @@ body: |
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -74,8 +73,7 @@ body: |
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -114,8 +112,7 @@ body: |
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -155,8 +152,7 @@ body: |
%shl:gpr(s64) = G_SHL %copy, %fold_cst
%and:gpr(s64) = G_AND %shl, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
Expand Down Expand Up @@ -198,8 +194,7 @@ body: |
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -235,8 +230,7 @@ body: |
%and:gpr(s32) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s32), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -272,8 +266,7 @@ body: |
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -309,8 +302,7 @@ body: |
%and:gpr(s32) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s32), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -347,8 +339,7 @@ body: |
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -387,8 +378,7 @@ body: |
%and:gpr(s32) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s32), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -425,8 +415,7 @@ body: |
%and:gpr(s32) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s32), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
3 changes: 1 addition & 2 deletions llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-trunc-tbz-tbnz.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -28,8 +28,7 @@ body: |
%fold_me:gpr(s32) = G_TRUNC %copy(s64)
%and:gpr(s32) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s32), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
18 changes: 6 additions & 12 deletions llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-xor-tbz-tbnz.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -38,8 +38,7 @@ body: |
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(eq), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -76,8 +75,7 @@ body: |
%fold_me:gpr(s64) = G_XOR %copy, %fold_cst
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -119,8 +117,7 @@ body: |
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(eq), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -153,8 +150,7 @@ body: |
%5:gpr(s64) = G_ZEXT %4(s32)
%15:gpr(s64) = G_CONSTANT i64 0
%13:gpr(s32) = G_ICMP intpred(slt), %5(s64), %15
%7:gpr(s1) = G_TRUNC %13(s32)
G_BRCOND %7(s1), %bb.1
G_BRCOND %13, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -191,8 +187,7 @@ body: |
%fold_me:gpr(s64) = G_XOR %fold_cst, %copy
%and:gpr(s64) = G_AND %fold_me, %bit
%cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
Expand Down Expand Up @@ -230,8 +225,7 @@ body: |
%and:gpr(s64) = G_AND %xor2, %bit
%cmp:gpr(s32) = G_ICMP intpred(eq), %and(s64), %zero
%cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
G_BRCOND %cmp_trunc(s1), %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
RET_ReallyLR
6 changes: 2 additions & 4 deletions llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-adjust-icmp-imm.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -657,8 +657,7 @@ body: |
; LOWER-NEXT: %reg1:_(s32) = COPY $w1
; LOWER-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(slt), %reg0(s32), [[C]]
; LOWER-NEXT: %trunc:_(s1) = G_TRUNC %cmp(s32)
; LOWER-NEXT: %select:_(s32) = G_SELECT %trunc(s1), %reg0, %reg1
; LOWER-NEXT: %select:_(s32) = G_SELECT %cmp(s32), %reg0, %reg1
; LOWER-NEXT: $w0 = COPY %select(s32)
; LOWER-NEXT: RET_ReallyLR implicit $w0
; SELECT-LABEL: name: cmp_and_select
Expand All @@ -674,8 +673,7 @@ body: |
%reg1:_(s32) = COPY $w1
%cst:_(s32) = G_CONSTANT i32 -1
%cmp:_(s32) = G_ICMP intpred(sle), %reg0(s32), %cst
%trunc:_(s1) = G_TRUNC %cmp(s32)
%select:_(s32) = G_SELECT %trunc(s1), %reg0, %reg1
%select:_(s32) = G_SELECT %cmp, %reg0, %reg1
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -39,15 +39,15 @@ body: |
bb.0:
successors: %bb.1(0x80000000)
%0:gpr(s1) = G_IMPLICIT_DEF
%0:gpr(s32) = G_IMPLICIT_DEF
%4:gpr(p0) = G_IMPLICIT_DEF
%8:fpr(s32) = G_FCONSTANT float 0x7FF8000000000000
bb.1:
successors: %bb.2(0x80000000)
%6:gpr(s32) = G_IMPLICIT_DEF
%7:gpr(s32) = G_SELECT %0(s1), %6, %6
%7:gpr(s32) = G_SELECT %0(s32), %6, %6
%1:gpr(s16) = G_TRUNC %7(s32)
bb.2:
Expand Down Expand Up @@ -98,15 +98,15 @@ body: |
bb.0:
successors: %bb.1(0x80000000)
%0:gpr(s1) = G_IMPLICIT_DEF
%0:gpr(s32) = G_IMPLICIT_DEF
%4:gpr(p0) = G_IMPLICIT_DEF
%8:fpr(s32) = G_FCONSTANT float 0x7FF8000000000000
bb.1:
successors: %bb.2(0x80000000)
%6:gpr(s32) = G_IMPLICIT_DEF
%7:gpr(s32) = G_SELECT %0(s1), %6, %6
%7:gpr(s32) = G_SELECT %0(s32), %6, %6
%1:gpr(s16) = G_TRUNC %7(s32)
bb.2:
Expand Down Expand Up @@ -183,14 +183,14 @@ body: |
successors: %bb.2, %bb.6
liveins: $w0, $w1, $x2
%ptr:gpr(p0) = COPY $x2
%cond_1:gpr(s1) = G_IMPLICIT_DEF
%cond_1:gpr(s32) = G_IMPLICIT_DEF
%gpr_1:gpr(s16) = G_IMPLICIT_DEF
G_BRCOND %cond_1(s1), %bb.6
G_BRCOND %cond_1(s32), %bb.6
G_BR %bb.2
bb.2:
successors: %bb.3, %bb.4
%cond_2:gpr(s1) = G_IMPLICIT_DEF
G_BRCOND %cond_2(s1), %bb.4
%cond_2:gpr(s32) = G_IMPLICIT_DEF
G_BRCOND %cond_2(s32), %bb.4
G_BR %bb.3
bb.3:
%gpr_2:gpr(s16) = G_IMPLICIT_DEF
Expand Down
18 changes: 6 additions & 12 deletions llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-sext.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -166,20 +166,18 @@ body: |
; CHECK: liveins: $d0, $x1, $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %w0:gpr(s32) = COPY $w0
; CHECK-NEXT: %cond:gpr(s1) = G_TRUNC %w0(s32)
; CHECK-NEXT: %fpr:fpr(s64) = COPY $d0
; CHECK-NEXT: %fpr_assert_sext:fpr(s64) = G_ASSERT_SEXT %fpr, 32
; CHECK-NEXT: %gpr:gpr(s64) = COPY $x1
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(s64) = COPY %gpr(s64)
; CHECK-NEXT: %select:fpr(s64) = G_SELECT %cond(s1), %fpr_assert_sext, [[COPY]]
; CHECK-NEXT: %select:fpr(s64) = G_SELECT %w0(s32), %fpr_assert_sext, [[COPY]]
; CHECK-NEXT: $d0 = COPY %select(s64)
; CHECK-NEXT: RET_ReallyLR implicit $d0
%w0:_(s32) = COPY $w0
%cond:_(s1) = G_TRUNC %w0(s32)
%fpr:_(s64) = COPY $d0
%fpr_assert_sext:_(s64) = G_ASSERT_SEXT %fpr, 32
%gpr:_(s64) = COPY $x1
%select:_(s64) = G_SELECT %cond(s1), %fpr_assert_sext, %gpr
%select:_(s64) = G_SELECT %w0, %fpr_assert_sext, %gpr
$d0 = COPY %select(s64)
RET_ReallyLR implicit $d0
Expand All @@ -200,8 +198,7 @@ body: |
; CHECK-NEXT: %copy_assert_sext:fpr(s32) = G_ASSERT_SEXT %copy1, 16
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY %copy1(s32)
; CHECK-NEXT: %cmp:gpr(s32) = G_ICMP intpred(eq), [[COPY]](s32), %copy2
; CHECK-NEXT: %cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
; CHECK-NEXT: G_BRCOND %cmp_trunc(s1), %bb.1
; CHECK-NEXT: G_BRCOND %cmp(s32), %bb.1
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
Expand All @@ -225,8 +222,7 @@ body: |
%copy_assert_sext:_(s32) = G_ASSERT_SEXT %copy1(s32), 16
%cmp:_(s32) = G_ICMP intpred(eq), %copy1, %copy2
%cmp_trunc:_(s1) = G_TRUNC %cmp
G_BRCOND %cmp_trunc, %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.1
bb.1:
successors: %bb.2
Expand Down Expand Up @@ -255,8 +251,7 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY %copy1(s32)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr(s32) = COPY %copy2(s32)
; CHECK-NEXT: %cmp:gpr(s32) = G_ICMP intpred(eq), [[COPY]](s32), [[COPY1]]
; CHECK-NEXT: %cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
; CHECK-NEXT: G_BRCOND %cmp_trunc(s1), %bb.1
; CHECK-NEXT: G_BRCOND %cmp(s32), %bb.1
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
Expand All @@ -277,8 +272,7 @@ body: |
%copy1:_(s32) = COPY $s0
%copy2:_(s32) = COPY $s1
%cmp:_(s32) = G_ICMP intpred(eq), %copy1, %copy2
%cmp_trunc:_(s1) = G_TRUNC %cmp
G_BRCOND %cmp_trunc, %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.1
bb.1:
successors: %bb.2
Expand Down
18 changes: 6 additions & 12 deletions llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-zext.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -166,20 +166,18 @@ body: |
; CHECK: liveins: $d0, $x1, $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %w0:gpr(s32) = COPY $w0
; CHECK-NEXT: %cond:gpr(s1) = G_TRUNC %w0(s32)
; CHECK-NEXT: %fpr:fpr(s64) = COPY $d0
; CHECK-NEXT: %fpr_assert_zext:fpr(s64) = G_ASSERT_ZEXT %fpr, 32
; CHECK-NEXT: %gpr:gpr(s64) = COPY $x1
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(s64) = COPY %gpr(s64)
; CHECK-NEXT: %select:fpr(s64) = G_SELECT %cond(s1), %fpr_assert_zext, [[COPY]]
; CHECK-NEXT: %select:fpr(s64) = G_SELECT %w0(s32), %fpr_assert_zext, [[COPY]]
; CHECK-NEXT: $d0 = COPY %select(s64)
; CHECK-NEXT: RET_ReallyLR implicit $d0
%w0:_(s32) = COPY $w0
%cond:_(s1) = G_TRUNC %w0(s32)
%fpr:_(s64) = COPY $d0
%fpr_assert_zext:_(s64) = G_ASSERT_ZEXT %fpr, 32
%gpr:_(s64) = COPY $x1
%select:_(s64) = G_SELECT %cond(s1), %fpr_assert_zext, %gpr
%select:_(s64) = G_SELECT %w0, %fpr_assert_zext, %gpr
$d0 = COPY %select(s64)
RET_ReallyLR implicit $d0
Expand All @@ -200,8 +198,7 @@ body: |
; CHECK-NEXT: %copy_assert_zext:fpr(s32) = G_ASSERT_ZEXT %copy1, 16
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY %copy1(s32)
; CHECK-NEXT: %cmp:gpr(s32) = G_ICMP intpred(eq), [[COPY]](s32), %copy2
; CHECK-NEXT: %cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
; CHECK-NEXT: G_BRCOND %cmp_trunc(s1), %bb.1
; CHECK-NEXT: G_BRCOND %cmp(s32), %bb.1
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
Expand All @@ -225,8 +222,7 @@ body: |
%copy_assert_zext:_(s32) = G_ASSERT_ZEXT %copy1(s32), 16
%cmp:_(s32) = G_ICMP intpred(eq), %copy1, %copy2
%cmp_trunc:_(s1) = G_TRUNC %cmp
G_BRCOND %cmp_trunc, %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.1
bb.1:
successors: %bb.2
Expand Down Expand Up @@ -255,8 +251,7 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY %copy1(s32)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr(s32) = COPY %copy2(s32)
; CHECK-NEXT: %cmp:gpr(s32) = G_ICMP intpred(eq), [[COPY]](s32), [[COPY1]]
; CHECK-NEXT: %cmp_trunc:gpr(s1) = G_TRUNC %cmp(s32)
; CHECK-NEXT: G_BRCOND %cmp_trunc(s1), %bb.1
; CHECK-NEXT: G_BRCOND %cmp(s32), %bb.1
; CHECK-NEXT: G_BR %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
Expand All @@ -277,8 +272,7 @@ body: |
%copy1:_(s32) = COPY $s0
%copy2:_(s32) = COPY $s1
%cmp:_(s32) = G_ICMP intpred(eq), %copy1, %copy2
%cmp_trunc:_(s1) = G_TRUNC %cmp
G_BRCOND %cmp_trunc, %bb.1
G_BRCOND %cmp, %bb.1
G_BR %bb.1
bb.1:
successors: %bb.2
Expand Down
51 changes: 19 additions & 32 deletions llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -91,19 +91,17 @@ body: |
; CHECK: liveins: $w0, $w1, $w2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC %2(s32)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr(s32) = COPY $w1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr(s32) = COPY $w2
; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fpr(s32) = G_SITOFP [[COPY1]](s32)
; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr(s32) = COPY [[COPY2]](s32)
; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s32) = G_SELECT [[TRUNC]](s1), [[COPY3]], [[SITOFP]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s32) = G_SELECT [[COPY2]](s32), [[COPY3]], [[SITOFP]]
; CHECK-NEXT: [[FPTOSI:%[0-9]+]]:gpr(s32) = G_FPTOSI [[SELECT]](s32)
%0:_(s32) = COPY $w0
%1:_(s1) = G_TRUNC %3(s32)
%2:_(s32) = COPY $w1
%3:_(s32) = COPY $w2
%4:_(s32) = G_SITOFP %2
%6:_(s32) = G_SELECT %1(s1), %3, %4
%6:_(s32) = G_SELECT %3, %3, %4
%8:_(s32) = G_FPTOSI %6
...
Expand All @@ -118,10 +116,9 @@ body: |
; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
; CHECK-NEXT: %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0
; CHECK-NEXT: %ptr:gpr(p0) = COPY $x0
; CHECK-NEXT: G_BRCOND %cond(s1), %bb.1
; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
; CHECK-NEXT: G_BR %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
Expand All @@ -138,10 +135,9 @@ body: |
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $x0, $s0, $s1, $w0, $w1
%cond_wide:_(s32) = COPY $w0
%cond:_(s1) = G_TRUNC %cond_wide(s32)
%fpr_copy:_(s32) = COPY $s0
%ptr:_(p0) = COPY $x0
G_BRCOND %cond(s1), %bb.1
G_BRCOND %cond_wide, %bb.1
G_BR %bb.2
bb.1:
successors: %bb.2
Expand All @@ -164,10 +160,9 @@ body: |
; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
; CHECK-NEXT: %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1
; CHECK-NEXT: %ptr:gpr(p0) = COPY $x0
; CHECK-NEXT: G_BRCOND %cond(s1), %bb.1
; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
; CHECK-NEXT: G_BR %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
Expand All @@ -184,10 +179,9 @@ body: |
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $x0, $s0, $s1, $w0, $w1
%cond_wide:_(s32) = COPY $w0
%cond:_(s1) = G_TRUNC %cond_wide(s32)
%gpr_copy:_(s32) = COPY $w1
%ptr:_(p0) = COPY $x0
G_BRCOND %cond(s1), %bb.1
G_BRCOND %cond_wide, %bb.1
G_BR %bb.2
bb.1:
successors: %bb.2
Expand All @@ -210,17 +204,16 @@ body: |
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
; CHECK-NEXT: %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0
; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1
; CHECK-NEXT: G_BRCOND %cond(s1), %bb.1
; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
; CHECK-NEXT: G_BR %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(s32) = COPY %gpr_copy(s32)
; CHECK-NEXT: %select:fpr(s32) = G_SELECT %cond(s1), %fpr_copy, [[COPY]]
; CHECK-NEXT: %select:fpr(s32) = G_SELECT %cond_wide(s32), %fpr_copy, [[COPY]]
; CHECK-NEXT: G_BR %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
Expand All @@ -233,14 +226,13 @@ body: |
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $s0, $s1, $w0, $w1
%cond_wide:_(s32) = COPY $w0
%cond:_(s1) = G_TRUNC %cond_wide(s32)
%fpr_copy:_(s32) = COPY $s0
%gpr_copy:_(s32) = COPY $w1
G_BRCOND %cond(s1), %bb.1
G_BRCOND %cond_wide, %bb.1
G_BR %bb.2
bb.1:
successors: %bb.2
%select:_(s32) = G_SELECT %cond(s1), %fpr_copy, %gpr_copy
%select:_(s32) = G_SELECT %cond_wide, %fpr_copy, %gpr_copy
G_BR %bb.2
bb.2:
%phi:_(s32) = G_PHI %fpr_copy(s32), %bb.0, %select(s32), %bb.1
Expand All @@ -259,17 +251,16 @@ body: |
; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
; CHECK-NEXT: %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0
; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1
; CHECK-NEXT: G_BRCOND %cond(s1), %bb.1
; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
; CHECK-NEXT: G_BR %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY %fpr_copy(s32)
; CHECK-NEXT: %select:gpr(s32) = G_SELECT %cond(s1), [[COPY]], %gpr_copy
; CHECK-NEXT: %select:gpr(s32) = G_SELECT %cond_wide(s32), [[COPY]], %gpr_copy
; CHECK-NEXT: G_BR %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
Expand All @@ -282,14 +273,13 @@ body: |
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $s0, $s1, $w0, $w1
%cond_wide:_(s32) = COPY $w0
%cond:_(s1) = G_TRUNC %cond_wide(s32)
%fpr_copy:_(s32) = COPY $s0
%gpr_copy:_(s32) = COPY $w1
G_BRCOND %cond(s1), %bb.1
G_BRCOND %cond_wide, %bb.1
G_BR %bb.2
bb.1:
successors: %bb.2
%select:_(s32) = G_SELECT %cond(s1), %fpr_copy, %gpr_copy
%select:_(s32) = G_SELECT %cond_wide, %fpr_copy, %gpr_copy
G_BR %bb.2
bb.2:
%phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %select(s32), %bb.1
Expand All @@ -309,10 +299,9 @@ body: |
; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
; CHECK-NEXT: %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0
; CHECK-NEXT: %unmerge_src:gpr(s64) = COPY $x0
; CHECK-NEXT: G_BRCOND %cond(s1), %bb.1
; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
; CHECK-NEXT: G_BR %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
Expand All @@ -330,10 +319,10 @@ body: |
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $x0, $s0, $s1, $w0, $w1
%cond_wide:_(s32) = COPY $w0
%cond:_(s1) = G_TRUNC %cond_wide(s32)
%fpr_copy:_(s32) = COPY $s0
%unmerge_src:_(s64) = COPY $x0
G_BRCOND %cond(s1), %bb.1
G_BRCOND %cond_wide, %bb.1
G_BR %bb.2
bb.1:
successors: %bb.2
Expand All @@ -356,10 +345,9 @@ body: |
; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0
; CHECK-NEXT: %cond:gpr(s1) = G_TRUNC %cond_wide(s32)
; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1
; CHECK-NEXT: %unmerge_src:gpr(s64) = COPY $x0
; CHECK-NEXT: G_BRCOND %cond(s1), %bb.1
; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1
; CHECK-NEXT: G_BR %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
Expand All @@ -376,10 +364,9 @@ body: |
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $x0, $s0, $s1, $w0, $w1
%cond_wide:_(s32) = COPY $w0
%cond:_(s1) = G_TRUNC %cond_wide(s32)
%gpr_copy:_(s32) = COPY $w1
%unmerge_src:_(s64) = COPY $x0
G_BRCOND %cond(s1), %bb.1
G_BRCOND %cond_wide, %bb.1
G_BR %bb.2
bb.1:
successors: %bb.2
Expand Down
36 changes: 12 additions & 24 deletions llvm/test/CodeGen/AArch64/GlobalISel/regbank-select.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -16,17 +16,15 @@ body: |
; CHECK: liveins: $s0, $s1, $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY]](s32)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr(s32) = COPY $s0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr(s32) = COPY $s1
; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s32) = G_SELECT [[TRUNC]](s1), [[COPY1]], [[COPY2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s32) = G_SELECT [[COPY]](s32), [[COPY1]], [[COPY2]]
; CHECK-NEXT: $s0 = COPY [[SELECT]](s32)
; CHECK-NEXT: RET_ReallyLR implicit $s0
%3:_(s32) = COPY $w0
%0:_(s1) = G_TRUNC %3(s32)
%1:_(s32) = COPY $s0
%2:_(s32) = COPY $s1
%4:_(s32) = G_SELECT %0(s1), %1, %2
%4:_(s32) = G_SELECT %3, %1, %2
$s0 = COPY %4(s32)
RET_ReallyLR implicit $s0
Expand All @@ -45,17 +43,15 @@ body: |
; CHECK: liveins: $d0, $d1, $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY]](s32)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr(s64) = COPY $d0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr(s64) = COPY $d1
; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s64) = G_SELECT [[TRUNC]](s1), [[COPY1]], [[COPY2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s64) = G_SELECT [[COPY]](s32), [[COPY1]], [[COPY2]]
; CHECK-NEXT: $d0 = COPY [[SELECT]](s64)
; CHECK-NEXT: RET_ReallyLR implicit $d0
%3:_(s32) = COPY $w0
%0:_(s1) = G_TRUNC %3(s32)
%1:_(s64) = COPY $d0
%2:_(s64) = COPY $d1
%4:_(s64) = G_SELECT %0(s1), %1, %2
%4:_(s64) = G_SELECT %3, %1, %2
$d0 = COPY %4(s64)
RET_ReallyLR implicit $d0
Expand All @@ -80,17 +76,15 @@ body: |
; CHECK: liveins: $d0, $d1, $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY]](s32)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr(s64) = COPY $d0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr(s64) = COPY $d1
; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s64) = G_SELECT [[TRUNC]](s1), [[COPY1]], [[COPY2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s64) = G_SELECT [[COPY]](s32), [[COPY1]], [[COPY2]]
; CHECK-NEXT: $x0 = COPY [[SELECT]](s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%3:_(s32) = COPY $w0
%0:_(s1) = G_TRUNC %3(s32)
%1:_(s64) = COPY $d0
%2:_(s64) = COPY $d1
%4:_(s64) = G_SELECT %0(s1), %1, %2
%4:_(s64) = G_SELECT %3, %1, %2
$x0 = COPY %4(s64)
RET_ReallyLR implicit $x0
Expand All @@ -112,18 +106,16 @@ body: |
; CHECK: liveins: $d0, $x1, $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY]](s32)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr(s64) = COPY $d0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr(s64) = COPY $x1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr(s64) = COPY [[COPY2]](s64)
; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s64) = G_SELECT [[TRUNC]](s1), [[COPY1]], [[COPY3]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s64) = G_SELECT [[COPY]](s32), [[COPY1]], [[COPY3]]
; CHECK-NEXT: $d0 = COPY [[SELECT]](s64)
; CHECK-NEXT: RET_ReallyLR implicit $d0
%3:_(s32) = COPY $w0
%0:_(s1) = G_TRUNC %3(s32)
%1:_(s64) = COPY $d0
%2:_(s64) = COPY $x1
%4:_(s64) = G_SELECT %0(s1), %1, %2
%4:_(s64) = G_SELECT %3, %1, %2
$d0 = COPY %4(s64)
RET_ReallyLR implicit $d0
Expand All @@ -145,18 +137,16 @@ body: |
; CHECK: liveins: $d0, $x1, $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY]](s32)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr(s64) = COPY $d0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr(s64) = COPY $x1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr(s64) = COPY [[COPY1]](s64)
; CHECK-NEXT: [[SELECT:%[0-9]+]]:gpr(s64) = G_SELECT [[TRUNC]](s1), [[COPY3]], [[COPY2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:gpr(s64) = G_SELECT [[COPY]](s32), [[COPY3]], [[COPY2]]
; CHECK-NEXT: $x0 = COPY [[SELECT]](s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%3:_(s32) = COPY $w0
%0:_(s1) = G_TRUNC %3(s32)
%1:_(s64) = COPY $d0
%2:_(s64) = COPY $x1
%4:_(s64) = G_SELECT %0(s1), %1, %2
%4:_(s64) = G_SELECT %3, %1, %2
$x0 = COPY %4(s64)
RET_ReallyLR implicit $x0
Expand All @@ -177,16 +167,14 @@ body: |
; CHECK: liveins: $x0, $x1, $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY]](s32)
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr(s64) = COPY $x0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr(s64) = COPY $x1
; CHECK-NEXT: [[SELECT:%[0-9]+]]:gpr(s64) = G_SELECT [[TRUNC]](s1), [[COPY1]], [[COPY2]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:gpr(s64) = G_SELECT [[COPY]](s32), [[COPY1]], [[COPY2]]
; CHECK-NEXT: $d0 = COPY [[SELECT]](s64)
; CHECK-NEXT: RET_ReallyLR implicit $d0
%3:_(s32) = COPY $w0
%0:_(s1) = G_TRUNC %3(s32)
%1:_(s64) = COPY $x0
%2:_(s64) = COPY $x1
%4:_(s64) = G_SELECT %0(s1), %1, %2
%4:_(s64) = G_SELECT %3, %1, %2
$d0 = COPY %4(s64)
RET_ReallyLR implicit $d0
6 changes: 2 additions & 4 deletions llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -860,8 +860,7 @@ body: |
; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0
; CHECK: [[COPY1:%[0-9]+]]:gpr(p0) = COPY $x1
; CHECK: [[COPY2:%[0-9]+]]:gpr(s32) = COPY $w2
; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[COPY2]](s32)
; CHECK: G_BRCOND [[TRUNC]](s1), %bb.1
; CHECK: G_BRCOND [[COPY2]](s32), %bb.1
; CHECK: G_BR %bb.2
; CHECK: bb.1:
; CHECK: successors: %bb.2(0x80000000)
Expand All @@ -876,8 +875,7 @@ body: |
%0(p0) = COPY $x0
%1(p0) = COPY $x1
%4(s32) = COPY $w2
%2(s1) = G_TRUNC %4(s32)
G_BRCOND %2(s1), %bb.1
G_BRCOND %4, %bb.1
G_BR %bb.2
bb.1:
Expand Down
3 changes: 1 addition & 2 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-br.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -43,8 +43,7 @@ body: |
bb.0:
successors: %bb.0, %bb.1
%1(s32) = COPY $w0
%0(s1) = G_TRUNC %1
G_BRCOND %0(s1), %bb.1
G_BRCOND %1, %bb.1
G_BR %bb.0
bb.1:
Expand Down
23 changes: 9 additions & 14 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-brcond-of-binop.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,8 +30,7 @@ body: |
%4:gpr(s32) = G_ANYEXT %8(s8)
%5:gpr(s32) = G_CONSTANT i32 1
%6:gpr(s32) = G_XOR %4, %5
%3:gpr(s1) = G_TRUNC %6(s32)
G_BRCOND %3(s1), %bb.3
G_BRCOND %6, %bb.3
bb.2:
RET_ReallyLR
Expand Down Expand Up @@ -73,8 +72,8 @@ body: |
%4:gpr(s64) = G_ANYEXT %8(s8)
%5:gpr(s64) = G_CONSTANT i64 1
%6:gpr(s64) = G_XOR %4, %5
%3:gpr(s1) = G_TRUNC %6(s64)
G_BRCOND %3(s1), %bb.3
%3:gpr(s32) = G_TRUNC %6(s64)
G_BRCOND %3(s32), %bb.3
bb.2:
RET_ReallyLR
Expand Down Expand Up @@ -107,8 +106,7 @@ body: |
%lhs:gpr(s32) = COPY $w0
%rhs:gpr(s32) = G_CONSTANT i32 1
%op:gpr(s32) = G_AND %lhs, %rhs
%trunc:gpr(s1) = G_TRUNC %op(s32)
G_BRCOND %trunc(s1), %bb.3
G_BRCOND %op, %bb.3
bb.2:
RET_ReallyLR
Expand Down Expand Up @@ -143,8 +141,7 @@ body: |
%lhs:gpr(s32) = COPY $w0
%rhs:gpr(s32) = COPY $w1
%op:gpr(s32) = G_AND %lhs, %rhs
%trunc:gpr(s1) = G_TRUNC %op(s32)
G_BRCOND %trunc(s1), %bb.3
G_BRCOND %op, %bb.3
bb.2:
RET_ReallyLR
Expand Down Expand Up @@ -182,8 +179,7 @@ body: |
%lhs:gpr(s32) = COPY $w0
%rhs:gpr(s32) = G_CONSTANT i32 1
%op:gpr(s32) = G_SHL %lhs, %rhs
%trunc:gpr(s1) = G_TRUNC %op(s32)
G_BRCOND %trunc(s1), %bb.3
G_BRCOND %op, %bb.3
bb.2:
RET_ReallyLR
Expand Down Expand Up @@ -220,8 +216,7 @@ body: |
%lhs:gpr(s32) = COPY $w0
%rhs:gpr(s32) = G_CONSTANT i32 1
%op:gpr(s32) = G_ASHR %lhs, %rhs
%trunc:gpr(s1) = G_TRUNC %op(s32)
G_BRCOND %trunc(s1), %bb.3
G_BRCOND %op, %bb.3
bb.2:
RET_ReallyLR
Expand Down Expand Up @@ -254,8 +249,8 @@ body: |
%lhs:gpr(s64) = COPY $x0
%rhs:gpr(s64) = G_CONSTANT i64 8589934592
%op:gpr(s64) = G_ASHR %lhs, %rhs
%trunc:gpr(s1) = G_TRUNC %op(s64)
G_BRCOND %trunc(s1), %bb.3
%trunc:gpr(s32) = G_TRUNC %op(s64)
G_BRCOND %trunc, %bb.3
bb.2:
RET_ReallyLR
bb.3:
Expand Down
18 changes: 6 additions & 12 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-cbz.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -24,8 +24,7 @@ body: |
%0:gpr(s32) = COPY $w0
%1:gpr(s32) = G_CONSTANT i32 0
%2:gpr(s32) = G_ICMP intpred(eq), %0, %1
%3:gpr(s1) = G_TRUNC %2(s32)
G_BRCOND %3(s1), %bb.1
G_BRCOND %2, %bb.1
G_BR %bb.0
bb.1:
Expand Down Expand Up @@ -54,8 +53,7 @@ body: |
%0:gpr(s64) = COPY $x0
%1:gpr(s64) = G_CONSTANT i64 0
%2:gpr(s32) = G_ICMP intpred(eq), %0, %1
%3:gpr(s1) = G_TRUNC %2(s32)
G_BRCOND %3(s1), %bb.1
G_BRCOND %2, %bb.1
G_BR %bb.0
bb.1:
Expand Down Expand Up @@ -84,8 +82,7 @@ body: |
%0:gpr(s32) = COPY $w0
%1:gpr(s32) = G_CONSTANT i32 0
%2:gpr(s32) = G_ICMP intpred(ne), %0, %1
%3:gpr(s1) = G_TRUNC %2(s32)
G_BRCOND %3(s1), %bb.1
G_BRCOND %2, %bb.1
G_BR %bb.0
bb.1:
Expand Down Expand Up @@ -114,8 +111,7 @@ body: |
%0:gpr(s64) = COPY $x0
%1:gpr(s64) = G_CONSTANT i64 0
%2:gpr(s32) = G_ICMP intpred(ne), %0, %1
%3:gpr(s1) = G_TRUNC %2(s32)
G_BRCOND %3(s1), %bb.1
G_BRCOND %2, %bb.1
G_BR %bb.0
bb.1:
Expand Down Expand Up @@ -150,8 +146,7 @@ body: |
%2:gpr(s64) = G_CONSTANT i64 0
%1:gpr(p0) = G_INTTOPTR %2(s64)
%4:gpr(s32) = G_ICMP intpred(eq), %0(p0), %1
%3:gpr(s1) = G_TRUNC %4(s32)
G_BRCOND %3(s1), %bb.3
G_BRCOND %4, %bb.3
bb.2:
%5:gpr(s64) = G_CONSTANT i64 0
Expand Down Expand Up @@ -194,8 +189,7 @@ body: |
%4:gpr(s64) = G_CONSTANT i64 0
%1:gpr(s64) = G_LOAD %0(p0) :: (load (s64))
%5:gpr(s32) = G_ICMP intpred(eq), %1(s64), %2
%3:gpr(s1) = G_TRUNC %5(s32)
G_BRCOND %3(s1), %bb.3
G_BRCOND %5, %bb.3
bb.2:
%6:gpr(s64) = G_CONSTANT i64 0
Expand Down
23 changes: 0 additions & 23 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-int-ptr-casts.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,6 @@
define void @ptrtoint_s32_p0() { ret void }
define void @ptrtoint_s16_p0() { ret void }
define void @ptrtoint_s8_p0() { ret void }
define void @ptrtoint_s1_p0() { ret void }
define void @inttoptr_v2p0_v2s64() { ret void }
define void @ptrtoint_v2s64_v2p0() { ret void }
...
Expand Down Expand Up @@ -116,28 +115,6 @@ body: |
$w0 = COPY %2(s32)
...

---
name: ptrtoint_s1_p0
legalized: true
regBankSelected: true

registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: ptrtoint_s1_p0
; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]
; CHECK-NEXT: $w0 = COPY [[COPY2]]
%0(p0) = COPY $x0
%1(s1) = G_PTRTOINT %0
%2:gpr(s32) = G_ANYEXT %1
$w0 = COPY %2(s32)
...

---
name: inttoptr_v2p0_v2s64
legalized: true
Expand Down
7 changes: 3 additions & 4 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -69,8 +69,8 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
; CHECK-NEXT: [[MOVaddrJT:%[0-9]+]]:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0
; CHECK-NEXT: early-clobber %18:gpr64, early-clobber %19:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0
; CHECK-NEXT: BR %18
; CHECK-NEXT: early-clobber %17:gpr64, early-clobber %18:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0
; CHECK-NEXT: BR %17
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2.sw.bb:
; CHECK-NEXT: successors: %bb.4(0x80000000)
Expand Down Expand Up @@ -101,8 +101,7 @@ body: |
%3:gpr(s64) = G_ZEXT %2(s32)
%5:gpr(s64) = G_ZEXT %4(s32)
%14:gpr(s32) = G_ICMP intpred(ugt), %3(s64), %5
%6:gpr(s1) = G_TRUNC %14(s32)
G_BRCOND %6(s1), %bb.4
G_BRCOND %14, %bb.4
bb.5.entry:
successors: %bb.3, %bb.4, %bb.2
Expand Down
8 changes: 3 additions & 5 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -60,8 +60,7 @@ body: |
%3(s32) = G_CONSTANT i32 1
%5(s32) = G_CONSTANT i32 2
%8(s32) = G_ICMP intpred(ugt), %0(s32), %1
%2(s1) = G_TRUNC %8(s32)
G_BRCOND %2(s1), %bb.2.case1
G_BRCOND %8, %bb.2.case1
G_BR %bb.3.case2
bb.2.case1:
Expand Down Expand Up @@ -106,9 +105,8 @@ body: |
%0(p0) = COPY $x0
%1(p0) = COPY $x1
%6:gpr(s32) = COPY $w2
%2(s1) = G_TRUNC %6
G_BRCOND %2(s1), %bb.1
%2:gpr(s32) = COPY $w2
G_BRCOND %2, %bb.1
G_BR %bb.2
bb.1:
Expand Down
3 changes: 1 addition & 2 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-redundant-zext.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -163,8 +163,7 @@ body: |
%copy1:gpr(s32) = COPY $w0
%copy2:gpr(s32) = COPY $w1
%cond_wide:gpr(s32) = COPY $w2
%cond:gpr(s1) = G_TRUNC %cond_wide(s32)
G_BRCOND %cond(s1), %bb.1
G_BRCOND %cond_wide, %bb.1
G_BR %bb.2
bb.1:
Expand Down
40 changes: 18 additions & 22 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-saddo.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,17 +19,15 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-NEXT: [[ADDSWrr:%[0-9]+]]:gpr32 = ADDSWrr [[COPY]], [[COPY1]], implicit-def $nzcv
; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv
; CHECK-NEXT: [[UBFMWri:%[0-9]+]]:gpr32 = UBFMWri [[CSINCWr]], 0, 0
; CHECK-NEXT: [[UBFMWri1:%[0-9]+]]:gpr32 = UBFMWri [[UBFMWri]], 0, 7
; CHECK-NEXT: $w0 = COPY [[UBFMWri1]]
; CHECK-NEXT: RET_ReallyLR implicit $w0
; CHECK-NEXT: $w0 = COPY [[ADDSWrr]]
; CHECK-NEXT: $w1 = COPY [[CSINCWr]]
; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1
%0:gpr(s32) = COPY $w0
%1:gpr(s32) = COPY $w1
%3:gpr(s32), %4:gpr(s1) = G_SADDO %0, %1
%5:gpr(s8) = G_ZEXT %4(s1)
%6:gpr(s32) = G_ZEXT %5(s8)
$w0 = COPY %6(s32)
RET_ReallyLR implicit $w0
%3:gpr(s32), %4:gpr(s32) = G_SADDO %0, %1
$w0 = COPY %3
$w1 = COPY %4
RET_ReallyLR implicit $w0, implicit $w1
...
---
Expand All @@ -49,17 +47,15 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
; CHECK-NEXT: [[ADDSXrr:%[0-9]+]]:gpr64 = ADDSXrr [[COPY]], [[COPY1]], implicit-def $nzcv
; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv
; CHECK-NEXT: [[UBFMWri:%[0-9]+]]:gpr32 = UBFMWri [[CSINCWr]], 0, 0
; CHECK-NEXT: [[UBFMWri1:%[0-9]+]]:gpr32 = UBFMWri [[UBFMWri]], 0, 7
; CHECK-NEXT: $w0 = COPY [[UBFMWri1]]
; CHECK-NEXT: RET_ReallyLR implicit $w0
; CHECK-NEXT: $x0 = COPY [[ADDSXrr]]
; CHECK-NEXT: $w1 = COPY [[CSINCWr]]
; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $w1
%0:gpr(s64) = COPY $x0
%1:gpr(s64) = COPY $x1
%3:gpr(s64), %4:gpr(s1) = G_SADDO %0, %1
%5:gpr(s8) = G_ZEXT %4(s1)
%6:gpr(s32) = G_ZEXT %5(s8)
$w0 = COPY %6(s32)
RET_ReallyLR implicit $w0
%3:gpr(s64), %4:gpr(s32) = G_SADDO %0, %1
$x0 = COPY %3
$w1 = COPY %4
RET_ReallyLR implicit $x0, implicit $w1
...
---
Expand All @@ -83,7 +79,7 @@ body: |
; CHECK-NEXT: RET_ReallyLR implicit $w0
%copy:gpr(s32) = COPY $w0
%constant:gpr(s32) = G_CONSTANT i32 16
%add:gpr(s32), %overflow:gpr(s1) = G_SADDO %copy, %constant
%add:gpr(s32), %overflow:gpr(s32) = G_SADDO %copy, %constant
$w0 = COPY %add(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -112,7 +108,7 @@ body: |
%copy2:gpr(s32) = COPY $w1
%constant:gpr(s32) = G_CONSTANT i32 16
%shift:gpr(s32) = G_SHL %copy2(s32), %constant(s32)
%add:gpr(s32), %overflow:gpr(s1) = G_SADDO %copy1, %shift
%add:gpr(s32), %overflow:gpr(s32) = G_SADDO %copy1, %shift
$w0 = COPY %add(s32)
RET_ReallyLR implicit $w0
Expand All @@ -138,7 +134,7 @@ body: |
; CHECK-NEXT: RET_ReallyLR implicit $w0
%copy:gpr(s32) = COPY $w0
%constant:gpr(s32) = G_CONSTANT i32 -16
%add:gpr(s32), %overflow:gpr(s1) = G_SADDO %copy, %constant
%add:gpr(s32), %overflow:gpr(s32) = G_SADDO %copy, %constant
$w0 = COPY %add(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -167,6 +163,6 @@ body: |
%ext:gpr(s64) = G_ZEXT %reg1(s32)
%cst:gpr(s64) = G_CONSTANT i64 2
%shift:gpr(s64) = G_SHL %ext, %cst(s64)
%add:gpr(s64), %flags:gpr(s1) = G_SADDO %reg0, %shift
%add:gpr(s64), %flags:gpr(s32) = G_SADDO %reg0, %shift
$x0 = COPY %add(s64)
RET_ReallyLR implicit $x0
111 changes: 43 additions & 68 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-select.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,18 +19,14 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $s0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr32 = COPY $s1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr32 = COPY [[COPY]]
; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32 = COPY [[COPY3]]
; CHECK-NEXT: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri [[COPY4]], 0, implicit-def $nzcv
; CHECK-NEXT: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri [[COPY]], 0, implicit-def $nzcv
; CHECK-NEXT: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[COPY1]], [[COPY2]], 1, implicit $nzcv
; CHECK-NEXT: $s0 = COPY [[FCSELSrrr]]
; CHECK-NEXT: RET_ReallyLR implicit $s0
%3:gpr(s32) = COPY $w0
%0:gpr(s1) = G_TRUNC %3(s32)
%0:gpr(s32) = COPY $w0
%1:fpr(s32) = COPY $s0
%2:fpr(s32) = COPY $s1
%5:fpr(s1) = COPY %0(s1)
%4:fpr(s32) = G_SELECT %5(s1), %1, %2
%4:fpr(s32) = G_SELECT %0, %1, %2
$s0 = COPY %4(s32)
RET_ReallyLR implicit $s0
Expand All @@ -52,18 +48,14 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY $d1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr32 = COPY [[COPY]]
; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32 = COPY [[COPY3]]
; CHECK-NEXT: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri [[COPY4]], 0, implicit-def $nzcv
; CHECK-NEXT: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri [[COPY]], 0, implicit-def $nzcv
; CHECK-NEXT: [[FCSELDrrr:%[0-9]+]]:fpr64 = FCSELDrrr [[COPY1]], [[COPY2]], 1, implicit $nzcv
; CHECK-NEXT: $d0 = COPY [[FCSELDrrr]]
; CHECK-NEXT: RET_ReallyLR implicit $d0
%3:gpr(s32) = COPY $w0
%0:gpr(s1) = G_TRUNC %3(s32)
%0:gpr(s32) = COPY $w0
%1:fpr(s64) = COPY $d0
%2:fpr(s64) = COPY $d1
%5:fpr(s1) = COPY %0(s1)
%4:fpr(s64) = G_SELECT %5(s1), %1, %2
%4:fpr(s64) = G_SELECT %0, %1, %2
$d0 = COPY %4(s64)
RET_ReallyLR implicit $d0
...
Expand All @@ -89,10 +81,9 @@ body: |
%reg0:gpr(s32) = COPY $w0
%reg1:gpr(s32) = COPY $w1
%cmp:gpr(s32) = G_ICMP intpred(ne), %reg0(s32), %reg1
%cond:gpr(s1) = G_TRUNC %cmp(s32)
%t:gpr(s32) = COPY $w2
%f:gpr(s32) = COPY $w3
%select:gpr(s32) = G_SELECT %cond(s1), %t, %f
%select:gpr(s32) = G_SELECT %cmp, %t, %f
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
...
Expand All @@ -118,10 +109,9 @@ body: |
%reg0:gpr(s32) = COPY $w0
%reg1:gpr(s32) = COPY $w1
%cmp:gpr(s32) = G_ICMP intpred(ne), %reg0(s32), %reg1
%cond:gpr(s1) = G_TRUNC %cmp(s32)
%t:gpr(s32) = G_CONSTANT i32 0
%f:gpr(s32) = G_CONSTANT i32 1
%select:gpr(s32) = G_SELECT %cond(s1), %t, %f
%select:gpr(s32) = G_SELECT %cmp, %t, %f
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
...
Expand All @@ -147,10 +137,9 @@ body: |
%reg0:gpr(s32) = COPY $w0
%reg1:gpr(s32) = COPY $w1
%cmp:gpr(s32) = G_ICMP intpred(ne), %reg0(s32), %reg1
%cond:gpr(s1) = G_TRUNC %cmp(s32)
%t:gpr(s32) = G_CONSTANT i32 0
%f:gpr(s32) = G_CONSTANT i32 -1
%select:gpr(s32) = G_SELECT %cond(s1), %t, %f
%select:gpr(s32) = G_SELECT %cmp, %t, %f
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
...
Expand All @@ -177,10 +166,9 @@ body: |
%reg0:gpr(s32) = COPY $w0
%reg1:gpr(s32) = COPY $w1
%cmp:gpr(s32) = G_ICMP intpred(ne), %reg0(s32), %reg1
%cond:gpr(s1) = G_TRUNC %cmp(s32)
%t:gpr(s32) = G_CONSTANT i32 1
%f:gpr(s32) = COPY $w2
%select:gpr(s32) = G_SELECT %cond(s1), %t, %f
%select:gpr(s32) = G_SELECT %cmp, %t, %f
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
...
Expand All @@ -207,10 +195,9 @@ body: |
%reg0:gpr(s32) = COPY $w0
%reg1:gpr(s32) = COPY $w1
%cmp:gpr(s32) = G_ICMP intpred(ne), %reg0(s32), %reg1
%cond:gpr(s1) = G_TRUNC %cmp(s32)
%t:gpr(s32) = G_CONSTANT i32 -1
%f:gpr(s32) = COPY $w2
%select:gpr(s32) = G_SELECT %cond(s1), %t, %f
%select:gpr(s32) = G_SELECT %cmp, %t, %f
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
...
Expand All @@ -237,10 +224,9 @@ body: |
%reg0:gpr(s32) = COPY $w0
%reg1:gpr(s32) = COPY $w1
%cmp:gpr(s32) = G_ICMP intpred(ne), %reg0(s32), %reg1
%cond:gpr(s1) = G_TRUNC %cmp(s32)
%t:gpr(s32) = COPY $w2
%f:gpr(s32) = G_CONSTANT i32 1
%select:gpr(s32) = G_SELECT %cond(s1), %t, %f
%select:gpr(s32) = G_SELECT %cmp, %t, %f
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
...
Expand All @@ -267,10 +253,9 @@ body: |
%reg0:gpr(s32) = COPY $w0
%reg1:gpr(s32) = COPY $w1
%cmp:gpr(s32) = G_ICMP intpred(ne), %reg0(s32), %reg1
%cond:gpr(s1) = G_TRUNC %cmp(s32)
%t:gpr(s32) = COPY $w2
%f:gpr(s32) = G_CONSTANT i32 -1
%select:gpr(s32) = G_SELECT %cond(s1), %t, %f
%select:gpr(s32) = G_SELECT %cmp, %t, %f
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
...
Expand All @@ -294,10 +279,9 @@ body: |
; CHECK-NEXT: $w0 = COPY %select
; CHECK-NEXT: RET_ReallyLR implicit $w0
%reg0:gpr(s32) = COPY $w0
%cond:gpr(s1) = G_TRUNC %reg0(s32)
%t:gpr(s32) = G_CONSTANT i32 1
%f:gpr(s32) = COPY $w1
%select:gpr(s32) = G_SELECT %cond(s1), %t, %f
%select:gpr(s32) = G_SELECT %reg0, %t, %f
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
Expand All @@ -322,10 +306,9 @@ body: |
; CHECK-NEXT: $w0 = COPY %select
; CHECK-NEXT: RET_ReallyLR implicit $w0
%reg0:gpr(s32) = COPY $w0
%cond:gpr(s1) = G_TRUNC %reg0(s32)
%t:gpr(s32) = COPY $w1
%f:gpr(s32) = G_CONSTANT i32 1
%select:gpr(s32) = G_SELECT %cond(s1), %t, %f
%select:gpr(s32) = G_SELECT %reg0, %t, %f
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
Expand All @@ -343,18 +326,18 @@ body: |
; CHECK-LABEL: name: csinc_t_1_no_cmp_s64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg0:gpr64 = COPY $x0
; CHECK-NEXT: %cond:gpr32 = COPY %reg0.sub_32
; CHECK-NEXT: %reg0:gpr64sp = COPY $x0
; CHECK-NEXT: %cond:gpr32common = COPY %reg0.sub_32
; CHECK-NEXT: %f:gpr64 = COPY $x1
; CHECK-NEXT: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri %cond, 0, implicit-def $nzcv
; CHECK-NEXT: %select:gpr64 = CSINCXr %f, $xzr, 0, implicit $nzcv
; CHECK-NEXT: $x0 = COPY %select
; CHECK-NEXT: RET_ReallyLR implicit $x0
%reg0:gpr(s64) = COPY $x0
%cond:gpr(s1) = G_TRUNC %reg0(s64)
%cond:gpr(s32) = G_TRUNC %reg0(s64)
%t:gpr(s64) = G_CONSTANT i64 1
%f:gpr(s64) = COPY $x1
%select:gpr(s64) = G_SELECT %cond(s1), %t, %f
%select:gpr(s64) = G_SELECT %cond, %t, %f
$x0 = COPY %select(s64)
RET_ReallyLR implicit $x0
Expand All @@ -380,12 +363,11 @@ body: |
; CHECK-NEXT: $w0 = COPY %select
; CHECK-NEXT: RET_ReallyLR implicit $w0
%reg0:gpr(s32) = COPY $w0
%cond:gpr(s1) = G_TRUNC %reg0(s32)
%reg1:gpr(s32) = COPY $w1
%t:gpr(s32) = COPY $w2
%zero:gpr(s32) = G_CONSTANT i32 0
%sub:gpr(s32) = G_SUB %zero(s32), %reg1
%select:gpr(s32) = G_SELECT %cond(s1), %t, %sub
%select:gpr(s32) = G_SELECT %reg0, %t, %sub
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
Expand All @@ -411,12 +393,11 @@ body: |
; CHECK-NEXT: $w0 = COPY %select
; CHECK-NEXT: RET_ReallyLR implicit $w0
%reg0:gpr(s32) = COPY $w0
%cond:gpr(s1) = G_TRUNC %reg0(s32)
%reg1:gpr(s32) = COPY $w1
%f:gpr(s32) = COPY $w2
%zero:gpr(s32) = G_CONSTANT i32 0
%sub:gpr(s32) = G_SUB %zero(s32), %reg1
%select:gpr(s32) = G_SELECT %cond(s1), %sub, %f
%select:gpr(s32) = G_SELECT %reg0, %sub, %f
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
Expand All @@ -434,21 +415,21 @@ body: |
; CHECK-LABEL: name: csneg_s64
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg0:gpr64 = COPY $x0
; CHECK-NEXT: %cond:gpr32 = COPY %reg0.sub_32
; CHECK-NEXT: %reg0:gpr64sp = COPY $x0
; CHECK-NEXT: %cond:gpr32common = COPY %reg0.sub_32
; CHECK-NEXT: %reg1:gpr64 = COPY $x1
; CHECK-NEXT: %t:gpr64 = COPY $x2
; CHECK-NEXT: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri %cond, 0, implicit-def $nzcv
; CHECK-NEXT: %select:gpr64 = CSNEGXr %t, %reg1, 1, implicit $nzcv
; CHECK-NEXT: $x0 = COPY %select
; CHECK-NEXT: RET_ReallyLR implicit $x0
%reg0:gpr(s64) = COPY $x0
%cond:gpr(s1) = G_TRUNC %reg0(s64)
%cond:gpr(s32) = G_TRUNC %reg0(s64)
%reg1:gpr(s64) = COPY $x1
%t:gpr(s64) = COPY $x2
%zero:gpr(s64) = G_CONSTANT i64 0
%sub:gpr(s64) = G_SUB %zero(s64), %reg1
%select:gpr(s64) = G_SELECT %cond(s1), %t, %sub
%select:gpr(s64) = G_SELECT %cond, %t, %sub
$x0 = COPY %select(s64)
RET_ReallyLR implicit $x0
...
Expand All @@ -474,13 +455,12 @@ body: |
; CHECK-NEXT: $w0 = COPY %select
; CHECK-NEXT: RET_ReallyLR implicit $w0
%reg0:gpr(s32) = COPY $w0
%cond:gpr(s1) = G_TRUNC %reg0(s32)
%reg1:gpr(s32) = COPY $w1
%t:gpr(s32) = G_CONSTANT i32 1
%zero:gpr(s32) = G_CONSTANT i32 0
%reg2:gpr(s32) = COPY $w2
%sub:gpr(s32) = G_SUB %zero(s32), %reg2
%select:gpr(s32) = G_SELECT %cond(s1), %t, %sub
%select:gpr(s32) = G_SELECT %reg0, %t, %sub
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
...
Expand All @@ -506,11 +486,10 @@ body: |
; CHECK-NEXT: RET_ReallyLR implicit $w0
%reg0:gpr(s32) = COPY $w0
%reg1:gpr(s32) = COPY $w1
%cond:gpr(s1) = G_TRUNC %reg0(s32)
%t:gpr(s32) = COPY $w2
%negative_one:gpr(s32) = G_CONSTANT i32 -1
%xor:gpr(s32) = G_XOR %reg1(s32), %negative_one
%select:gpr(s32) = G_SELECT %cond(s1), %t, %xor
%select:gpr(s32) = G_SELECT %reg0, %t, %xor
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
Expand All @@ -537,11 +516,10 @@ body: |
; CHECK-NEXT: RET_ReallyLR implicit $w0
%reg0:gpr(s32) = COPY $w0
%reg1:gpr(s32) = COPY $w1
%cond:gpr(s1) = G_TRUNC %reg0(s32)
%f:gpr(s32) = COPY $w2
%negative_one:gpr(s32) = G_CONSTANT i32 -1
%xor:gpr(s32) = G_XOR %reg1(s32), %negative_one
%select:gpr(s32) = G_SELECT %cond(s1), %xor, %f
%select:gpr(s32) = G_SELECT %reg0, %xor, %f
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
Expand All @@ -559,21 +537,21 @@ body: |
; CHECK-LABEL: name: csinv_s64
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg0:gpr64 = COPY $x0
; CHECK-NEXT: %reg0:gpr64sp = COPY $x0
; CHECK-NEXT: %reg1:gpr64 = COPY $x1
; CHECK-NEXT: %cond:gpr32 = COPY %reg0.sub_32
; CHECK-NEXT: %cond:gpr32common = COPY %reg0.sub_32
; CHECK-NEXT: %t:gpr64 = COPY $x2
; CHECK-NEXT: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri %cond, 0, implicit-def $nzcv
; CHECK-NEXT: %select:gpr64 = CSINVXr %t, %reg1, 1, implicit $nzcv
; CHECK-NEXT: $x0 = COPY %select
; CHECK-NEXT: RET_ReallyLR implicit $x0
%reg0:gpr(s64) = COPY $x0
%reg1:gpr(s64) = COPY $x1
%cond:gpr(s1) = G_TRUNC %reg0(s64)
%cond:gpr(s32) = G_TRUNC %reg0(s64)
%t:gpr(s64) = COPY $x2
%negative_one:gpr(s64) = G_CONSTANT i64 -1
%xor:gpr(s64) = G_XOR %reg1(s64), %negative_one
%select:gpr(s64) = G_SELECT %cond(s1), %t, %xor
%select:gpr(s64) = G_SELECT %cond, %t, %xor
$x0 = COPY %select(s64)
RET_ReallyLR implicit $x0
Expand All @@ -591,9 +569,9 @@ body: |
; CHECK-LABEL: name: xor_not_negative_one
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg0:gpr64 = COPY $x0
; CHECK-NEXT: %reg0:gpr64sp = COPY $x0
; CHECK-NEXT: %reg1:gpr64 = COPY $x1
; CHECK-NEXT: %cond:gpr32 = COPY %reg0.sub_32
; CHECK-NEXT: %cond:gpr32common = COPY %reg0.sub_32
; CHECK-NEXT: %t:gpr64 = COPY $x2
; CHECK-NEXT: %negative_one:gpr32 = MOVi32imm -1
; CHECK-NEXT: %zext:gpr64 = SUBREG_TO_REG 0, %negative_one, %subreg.sub_32
Expand All @@ -604,12 +582,12 @@ body: |
; CHECK-NEXT: RET_ReallyLR implicit $x0
%reg0:gpr(s64) = COPY $x0
%reg1:gpr(s64) = COPY $x1
%cond:gpr(s1) = G_TRUNC %reg0(s64)
%cond:gpr(s32) = G_TRUNC %reg0(s64)
%t:gpr(s64) = COPY $x2
%negative_one:gpr(s32) = G_CONSTANT i32 -1
%zext:gpr(s64) = G_ZEXT %negative_one(s32)
%xor:gpr(s64) = G_XOR %reg1(s64), %zext
%select:gpr(s64) = G_SELECT %cond(s1), %t, %xor
%select:gpr(s64) = G_SELECT %cond(s32), %t, %xor
$x0 = COPY %select(s64)
RET_ReallyLR implicit $x0
Expand All @@ -635,11 +613,10 @@ body: |
; CHECK-NEXT: RET_ReallyLR implicit $w0
%reg0:gpr(s32) = COPY $w0
%reg1:gpr(s32) = COPY $w1
%cond:gpr(s1) = G_TRUNC %reg0(s32)
%t:gpr(s32) = COPY $w2
%one:gpr(s32) = G_CONSTANT i32 1
%add:gpr(s32) = G_ADD %reg1(s32), %one
%select:gpr(s32) = G_SELECT %cond(s1), %t, %add
%select:gpr(s32) = G_SELECT %reg0, %t, %add
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
Expand All @@ -665,11 +642,10 @@ body: |
; CHECK-NEXT: RET_ReallyLR implicit $w0
%reg0:gpr(s32) = COPY $w0
%reg1:gpr(s32) = COPY $w1
%cond:gpr(s1) = G_TRUNC %reg0(s32)
%f:gpr(s32) = COPY $w2
%one:gpr(s32) = G_CONSTANT i32 1
%add:gpr(s32) = G_ADD %reg1(s32), %one
%select:gpr(s32) = G_SELECT %cond(s1), %add, %f
%select:gpr(s32) = G_SELECT %reg0, %add, %f
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
Expand All @@ -687,21 +663,21 @@ body: |
; CHECK-LABEL: name: csinc_ptr_add
; CHECK: liveins: $x0, $x1, $x2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %reg0:gpr64 = COPY $x0
; CHECK-NEXT: %reg0:gpr64sp = COPY $x0
; CHECK-NEXT: %reg1:gpr64 = COPY $x1
; CHECK-NEXT: %cond:gpr32 = COPY %reg0.sub_32
; CHECK-NEXT: %cond:gpr32common = COPY %reg0.sub_32
; CHECK-NEXT: %t:gpr64 = COPY $x2
; CHECK-NEXT: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri %cond, 0, implicit-def $nzcv
; CHECK-NEXT: %select:gpr64 = CSINCXr %t, %reg1, 1, implicit $nzcv
; CHECK-NEXT: $x0 = COPY %select
; CHECK-NEXT: RET_ReallyLR implicit $x0
%reg0:gpr(s64) = COPY $x0
%reg1:gpr(p0) = COPY $x1
%cond:gpr(s1) = G_TRUNC %reg0(s64)
%cond:gpr(s32) = G_TRUNC %reg0(s64)
%t:gpr(p0) = COPY $x2
%one:gpr(s64) = G_CONSTANT i64 1
%ptr_add:gpr(p0) = G_PTR_ADD %reg1(p0), %one
%select:gpr(p0) = G_SELECT %cond(s1), %t, %ptr_add
%select:gpr(p0) = G_SELECT %cond(s32), %t, %ptr_add
$x0 = COPY %select(p0)
RET_ReallyLR implicit $x0
Expand All @@ -728,12 +704,11 @@ body: |
%reg0:gpr(s32) = COPY $w0
%reg1:gpr(s32) = COPY $w1
%reg2:gpr(s32) = COPY $w2
%cond:gpr(s1) = G_TRUNC %reg0(s32)
%f:gpr(s32) = COPY $w2
%negative_one:gpr(s32) = G_CONSTANT i32 -1
%xor:gpr(s32) = G_XOR %reg1(s32), %negative_one
%zero:gpr(s32) = G_CONSTANT i32 0
%sub:gpr(s32) = G_SUB %zero(s32), %reg2
%select:gpr(s32) = G_SELECT %cond(s1), %xor, %sub
%select:gpr(s32) = G_SELECT %reg0, %xor, %sub
$w0 = COPY %select(s32)
RET_ReallyLR implicit $w0
40 changes: 18 additions & 22 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-ssubo.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,17 +19,15 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY]], [[COPY1]], implicit-def $nzcv
; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv
; CHECK-NEXT: [[UBFMWri:%[0-9]+]]:gpr32 = UBFMWri [[CSINCWr]], 0, 0
; CHECK-NEXT: [[UBFMWri1:%[0-9]+]]:gpr32 = UBFMWri [[UBFMWri]], 0, 7
; CHECK-NEXT: $w0 = COPY [[UBFMWri1]]
; CHECK-NEXT: RET_ReallyLR implicit $w0
; CHECK-NEXT: $w0 = COPY [[SUBSWrr]]
; CHECK-NEXT: $w1 = COPY [[CSINCWr]]
; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1
%0:gpr(s32) = COPY $w0
%1:gpr(s32) = COPY $w1
%3:gpr(s32), %4:gpr(s1) = G_SSUBO %0, %1
%5:gpr(s8) = G_ZEXT %4(s1)
%6:gpr(s32) = G_ZEXT %5(s8)
$w0 = COPY %6(s32)
RET_ReallyLR implicit $w0
%3:gpr(s32), %4:gpr(s32) = G_SSUBO %0, %1
$w0 = COPY %3
$w1 = COPY %4
RET_ReallyLR implicit $w0, implicit $w1
...
---
Expand All @@ -49,17 +47,15 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
; CHECK-NEXT: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr [[COPY]], [[COPY1]], implicit-def $nzcv
; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv
; CHECK-NEXT: [[UBFMWri:%[0-9]+]]:gpr32 = UBFMWri [[CSINCWr]], 0, 0
; CHECK-NEXT: [[UBFMWri1:%[0-9]+]]:gpr32 = UBFMWri [[UBFMWri]], 0, 7
; CHECK-NEXT: $w0 = COPY [[UBFMWri1]]
; CHECK-NEXT: RET_ReallyLR implicit $w0
; CHECK-NEXT: $x0 = COPY [[SUBSXrr]]
; CHECK-NEXT: $w1 = COPY [[CSINCWr]]
; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $w1
%0:gpr(s64) = COPY $x0
%1:gpr(s64) = COPY $x1
%3:gpr(s64), %4:gpr(s1) = G_SSUBO %0, %1
%5:gpr(s8) = G_ZEXT %4(s1)
%6:gpr(s32) = G_ZEXT %5(s8)
$w0 = COPY %6(s32)
RET_ReallyLR implicit $w0
%3:gpr(s64), %4:gpr(s32) = G_SSUBO %0, %1
$x0 = COPY %3
$w1 = COPY %4
RET_ReallyLR implicit $x0, implicit $w1
...
---
Expand All @@ -83,7 +79,7 @@ body: |
; CHECK-NEXT: RET_ReallyLR implicit $w0
%copy:gpr(s32) = COPY $w0
%constant:gpr(s32) = G_CONSTANT i32 16
%add:gpr(s32), %overflow:gpr(s1) = G_SSUBO %copy, %constant
%add:gpr(s32), %overflow:gpr(s32) = G_SSUBO %copy, %constant
$w0 = COPY %add(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -112,7 +108,7 @@ body: |
%copy2:gpr(s32) = COPY $w1
%constant:gpr(s32) = G_CONSTANT i32 16
%shift:gpr(s32) = G_SHL %copy2(s32), %constant(s32)
%add:gpr(s32), %overflow:gpr(s1) = G_SSUBO %copy1, %shift
%add:gpr(s32), %overflow:gpr(s32) = G_SSUBO %copy1, %shift
$w0 = COPY %add(s32)
RET_ReallyLR implicit $w0
Expand All @@ -138,7 +134,7 @@ body: |
; CHECK-NEXT: RET_ReallyLR implicit $w0
%copy:gpr(s32) = COPY $w0
%constant:gpr(s32) = G_CONSTANT i32 -16
%add:gpr(s32), %overflow:gpr(s1) = G_SSUBO %copy, %constant
%add:gpr(s32), %overflow:gpr(s32) = G_SSUBO %copy, %constant
$w0 = COPY %add(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -167,6 +163,6 @@ body: |
%ext:gpr(s64) = G_ZEXT %reg1(s32)
%cst:gpr(s64) = G_CONSTANT i64 2
%shift:gpr(s64) = G_SHL %ext, %cst(s64)
%add:gpr(s64), %flags:gpr(s1) = G_SSUBO %reg0, %shift
%add:gpr(s64), %flags:gpr(s32) = G_SSUBO %reg0, %shift
$x0 = COPY %add(s64)
RET_ReallyLR implicit $x0
36 changes: 10 additions & 26 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-static.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -141,21 +141,15 @@ body: |
%0(s32) = COPY $w0
%1(s32) = G_ICMP intpred(eq), %0, %0
%6(s1) = G_TRUNC %1(s32)
%9(s32) = G_ANYEXT %6
$w0 = COPY %9(s32)
$w0 = COPY %1
%2(s64) = COPY $x0
%3(s32) = G_ICMP intpred(uge), %2, %2
%7(s1) = G_TRUNC %3(s32)
%10(s32) = G_ANYEXT %7
$w0 = COPY %10(s32)
$w0 = COPY %3
%4(p0) = COPY $x0
%5(s32) = G_ICMP intpred(ne), %4, %4
%8(s1) = G_TRUNC %5(s32)
%11(s32) = G_ANYEXT %8
$w0 = COPY %11(s32)
$w0 = COPY %5
...

---
Expand All @@ -176,10 +170,6 @@ registers:
- { id: 1, class: gpr }
- { id: 2, class: fpr }
- { id: 3, class: gpr }
- { id: 4, class: gpr }
- { id: 5, class: gpr }
- { id: 6, class: gpr }
- { id: 7, class: gpr }

# CHECK: body:
# CHECK: nofpexcept FCMPSrr %0, %0, implicit-def $nzcv
Expand All @@ -196,15 +186,11 @@ body: |
%0(s32) = COPY $s0
%1(s32) = G_FCMP floatpred(one), %0, %0
%4(s1) = G_TRUNC %1(s32)
%6(s32) = G_ANYEXT %4
$w0 = COPY %6(s32)
$w0 = COPY %1
%2(s64) = COPY $d0
%3(s32) = G_FCMP floatpred(uge), %2, %2
%5(s1) = G_TRUNC %3(s32)
%7(s32) = G_ANYEXT %5
$w0 = COPY %7(s32)
$w0 = COPY %3
...

Expand Down Expand Up @@ -235,12 +221,11 @@ body: |
successors: %bb.1
%0(s32) = COPY $s0
%3:gpr(s32) = COPY $w0
%1(s1) = G_TRUNC %3
bb.1:
successors: %bb.1, %bb.2
%2(s32) = PHI %0, %bb.0, %2, %bb.1
G_BRCOND %1, %bb.1
G_BRCOND %3, %bb.1
bb.2:
$s0 = COPY %2
Expand Down Expand Up @@ -278,17 +263,16 @@ registers:
- { id: 9, class: gpr }

# CHECK: body:
# CHECK: ANDSWri %10, 0, implicit-def $nzcv
# CHECK: ANDSWri %0, 0, implicit-def $nzcv
# CHECK: %3:gpr32 = CSELWr %1, %2, 1, implicit $nzcv
# CHECK: ANDSWri %10, 0, implicit-def $nzcv
# CHECK: ANDSWri %0, 0, implicit-def $nzcv
# CHECK: %6:gpr64 = CSELXr %4, %5, 1, implicit $nzcv
# CHECK: ANDSWri %10, 0, implicit-def $nzcv
# CHECK: ANDSWri %0, 0, implicit-def $nzcv
# CHECK: %9:gpr64 = CSELXr %7, %8, 1, implicit $nzcv
body: |
bb.0:
liveins: $w0, $w1, $w2
%10:gpr(s32) = COPY $w0
%0(s1) = G_TRUNC %10
%0:gpr(s32) = COPY $w0
%1(s32) = COPY $w1
%2(s32) = COPY $w2
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-trunc.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@

define void @trunc_s32_s64() { ret void }
define void @trunc_s8_s64() { ret void }
define void @trunc_s1_s32() { ret void }
define void @trunc_s8_s32() { ret void }
define void @trunc_s64_s128() { ret void }
define void @trunc_s32_s128() { ret void }
...
Expand Down Expand Up @@ -58,7 +58,7 @@ body: |
...

---
name: trunc_s1_s32
name: trunc_s8_s32
legalized: true
regBankSelected: true

Expand All @@ -70,12 +70,12 @@ body: |
bb.0:
liveins: $w0
; CHECK-LABEL: name: trunc_s1_s32
; CHECK-LABEL: name: trunc_s8_s32
; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[COPY]]
; CHECK-NEXT: $w0 = COPY [[COPY1]]
%0(s32) = COPY $w0
%1(s1) = G_TRUNC %0
%1(s8) = G_TRUNC %0
%2:gpr(s32) = G_ANYEXT %1
$w0 = COPY %2(s32)
...
Expand Down
15 changes: 3 additions & 12 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-truncstore-atomic.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -36,10 +36,7 @@ body: |
%0:gpr(p0) = COPY $x0
%3:gpr(s32) = COPY $w1
%2:gpr(s8) = G_TRUNC %3(s32)
%4:gpr(s8) = G_ASSERT_ZEXT %2, 1
%1:gpr(s1) = G_TRUNC %4(s8)
G_BRCOND %1(s1), %bb.3
G_BRCOND %3, %bb.3
G_BR %bb.2
bb.2:
Expand Down Expand Up @@ -85,10 +82,7 @@ body: |
%0:gpr(p0) = COPY $x0
%3:gpr(s32) = COPY $w1
%2:gpr(s8) = G_TRUNC %3(s32)
%4:gpr(s8) = G_ASSERT_ZEXT %2, 1
%1:gpr(s1) = G_TRUNC %4(s8)
G_BRCOND %1(s1), %bb.3
G_BRCOND %3, %bb.3
G_BR %bb.2
bb.2:
Expand Down Expand Up @@ -134,10 +128,7 @@ body: |
%0:gpr(p0) = COPY $x0
%3:gpr(s32) = COPY $w1
%2:gpr(s8) = G_TRUNC %3(s32)
%4:gpr(s8) = G_ASSERT_ZEXT %2, 1
%1:gpr(s1) = G_TRUNC %4(s8)
G_BRCOND %1(s1), %bb.3
G_BRCOND %3, %bb.3
G_BR %bb.2
bb.2:
Expand Down
40 changes: 18 additions & 22 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-uaddo.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,17 +19,15 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-NEXT: [[ADDSWrr:%[0-9]+]]:gpr32 = ADDSWrr [[COPY]], [[COPY1]], implicit-def $nzcv
; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
; CHECK-NEXT: [[UBFMWri:%[0-9]+]]:gpr32 = UBFMWri [[CSINCWr]], 0, 0
; CHECK-NEXT: [[UBFMWri1:%[0-9]+]]:gpr32 = UBFMWri [[UBFMWri]], 0, 7
; CHECK-NEXT: $w0 = COPY [[UBFMWri1]]
; CHECK-NEXT: RET_ReallyLR implicit $w0
; CHECK-NEXT: $w0 = COPY [[ADDSWrr]]
; CHECK-NEXT: $w1 = COPY [[CSINCWr]]
; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1
%0:gpr(s32) = COPY $w0
%1:gpr(s32) = COPY $w1
%3:gpr(s32), %4:gpr(s1) = G_UADDO %0, %1
%5:gpr(s8) = G_ZEXT %4(s1)
%6:gpr(s32) = G_ZEXT %5(s8)
$w0 = COPY %6(s32)
RET_ReallyLR implicit $w0
%3:gpr(s32), %4:gpr(s32) = G_UADDO %0, %1
$w0 = COPY %3
$w1 = COPY %4
RET_ReallyLR implicit $w0, implicit $w1
...
---
Expand All @@ -49,17 +47,15 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
; CHECK-NEXT: [[ADDSXrr:%[0-9]+]]:gpr64 = ADDSXrr [[COPY]], [[COPY1]], implicit-def $nzcv
; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
; CHECK-NEXT: [[UBFMWri:%[0-9]+]]:gpr32 = UBFMWri [[CSINCWr]], 0, 0
; CHECK-NEXT: [[UBFMWri1:%[0-9]+]]:gpr32 = UBFMWri [[UBFMWri]], 0, 7
; CHECK-NEXT: $w0 = COPY [[UBFMWri1]]
; CHECK-NEXT: RET_ReallyLR implicit $w0
; CHECK-NEXT: $x0 = COPY [[ADDSXrr]]
; CHECK-NEXT: $w1 = COPY [[CSINCWr]]
; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $w1
%0:gpr(s64) = COPY $x0
%1:gpr(s64) = COPY $x1
%3:gpr(s64), %4:gpr(s1) = G_UADDO %0, %1
%5:gpr(s8) = G_ZEXT %4(s1)
%6:gpr(s32) = G_ZEXT %5(s8)
$w0 = COPY %6(s32)
RET_ReallyLR implicit $w0
%3:gpr(s64), %4:gpr(s32) = G_UADDO %0, %1
$x0 = COPY %3
$w1 = COPY %4
RET_ReallyLR implicit $x0, implicit $w1
...
---
Expand All @@ -83,7 +79,7 @@ body: |
; CHECK-NEXT: RET_ReallyLR implicit $w0
%copy:gpr(s32) = COPY $w0
%constant:gpr(s32) = G_CONSTANT i32 16
%add:gpr(s32), %overflow:gpr(s1) = G_UADDO %copy, %constant
%add:gpr(s32), %overflow:gpr(s32) = G_UADDO %copy, %constant
$w0 = COPY %add(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -112,7 +108,7 @@ body: |
%copy2:gpr(s32) = COPY $w1
%constant:gpr(s32) = G_CONSTANT i32 16
%shift:gpr(s32) = G_SHL %copy2(s32), %constant(s32)
%add:gpr(s32), %overflow:gpr(s1) = G_UADDO %copy1, %shift
%add:gpr(s32), %overflow:gpr(s32) = G_UADDO %copy1, %shift
$w0 = COPY %add(s32)
RET_ReallyLR implicit $w0
Expand All @@ -138,7 +134,7 @@ body: |
; CHECK-NEXT: RET_ReallyLR implicit $w0
%copy:gpr(s32) = COPY $w0
%constant:gpr(s32) = G_CONSTANT i32 -16
%add:gpr(s32), %overflow:gpr(s1) = G_UADDO %copy, %constant
%add:gpr(s32), %overflow:gpr(s32) = G_UADDO %copy, %constant
$w0 = COPY %add(s32)
RET_ReallyLR implicit $w0
Expand Down Expand Up @@ -167,6 +163,6 @@ body: |
%ext:gpr(s64) = G_ZEXT %reg1(s32)
%cst:gpr(s64) = G_CONSTANT i64 2
%shift:gpr(s64) = G_SHL %ext, %cst(s64)
%add:gpr(s64), %flags:gpr(s1) = G_UADDO %reg0, %shift
%add:gpr(s64), %flags:gpr(s32) = G_UADDO %reg0, %shift
$x0 = COPY %add(s64)
RET_ReallyLR implicit $x0
54 changes: 27 additions & 27 deletions llvm/test/CodeGen/AArch64/GlobalISel/select-usubo.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,16 +19,12 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY]], [[COPY1]], implicit-def $nzcv
; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 2, implicit $nzcv
; CHECK-NEXT: [[UBFMWri:%[0-9]+]]:gpr32 = UBFMWri [[CSINCWr]], 0, 0
; CHECK-NEXT: [[UBFMWri1:%[0-9]+]]:gpr32 = UBFMWri [[UBFMWri]], 0, 7
; CHECK-NEXT: $w0 = COPY [[UBFMWri1]]
; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
; CHECK-NEXT: RET_ReallyLR implicit $w0
%0:gpr(s32) = COPY $w0
%1:gpr(s32) = COPY $w1
%3:gpr(s32), %4:gpr(s1) = G_USUBO %0, %1
%5:gpr(s8) = G_ZEXT %4(s1)
%6:gpr(s32) = G_ZEXT %5(s8)
$w0 = COPY %6(s32)
%3:gpr(s32), %4:gpr(s32) = G_USUBO %0, %1
$w0 = COPY %4(s32)
RET_ReallyLR implicit $w0
...
Expand All @@ -49,16 +45,12 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
; CHECK-NEXT: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr [[COPY]], [[COPY1]], implicit-def $nzcv
; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 2, implicit $nzcv
; CHECK-NEXT: [[UBFMWri:%[0-9]+]]:gpr32 = UBFMWri [[CSINCWr]], 0, 0
; CHECK-NEXT: [[UBFMWri1:%[0-9]+]]:gpr32 = UBFMWri [[UBFMWri]], 0, 7
; CHECK-NEXT: $w0 = COPY [[UBFMWri1]]
; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
; CHECK-NEXT: RET_ReallyLR implicit $w0
%0:gpr(s64) = COPY $x0
%1:gpr(s64) = COPY $x1
%3:gpr(s64), %4:gpr(s1) = G_USUBO %0, %1
%5:gpr(s8) = G_ZEXT %4(s1)
%6:gpr(s32) = G_ZEXT %5(s8)
$w0 = COPY %6(s32)
%3:gpr(s64), %4:gpr(s32) = G_USUBO %0, %1
$w0 = COPY %4
RET_ReallyLR implicit $w0
...
Expand All @@ -80,12 +72,14 @@ body: |
; CHECK-NEXT: %add:gpr32 = SUBSWri %copy, 16, 0, implicit-def $nzcv
; CHECK-NEXT: %overflow:gpr32 = CSINCWr $wzr, $wzr, 2, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %add
; CHECK-NEXT: RET_ReallyLR implicit $w0
; CHECK-NEXT: $w1 = COPY %overflow
; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1
%copy:gpr(s32) = COPY $w0
%constant:gpr(s32) = G_CONSTANT i32 16
%add:gpr(s32), %overflow:gpr(s1) = G_USUBO %copy, %constant
$w0 = COPY %add(s32)
RET_ReallyLR implicit $w0
%add:gpr(s32), %overflow:gpr(s32) = G_USUBO %copy, %constant
$w0 = COPY %add
$w1 = COPY %overflow
RET_ReallyLR implicit $w0, implicit $w1
...
---
Expand All @@ -107,14 +101,16 @@ body: |
; CHECK-NEXT: %add:gpr32 = SUBSWrs %copy1, %copy2, 16, implicit-def $nzcv
; CHECK-NEXT: %overflow:gpr32 = CSINCWr $wzr, $wzr, 2, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %add
; CHECK-NEXT: RET_ReallyLR implicit $w0
; CHECK-NEXT: $w1 = COPY %overflow
; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1
%copy1:gpr(s32) = COPY $w0
%copy2:gpr(s32) = COPY $w1
%constant:gpr(s32) = G_CONSTANT i32 16
%shift:gpr(s32) = G_SHL %copy2(s32), %constant(s32)
%add:gpr(s32), %overflow:gpr(s1) = G_USUBO %copy1, %shift
%add:gpr(s32), %overflow:gpr(s32) = G_USUBO %copy1, %shift
$w0 = COPY %add(s32)
RET_ReallyLR implicit $w0
$w1 = COPY %overflow(s32)
RET_ReallyLR implicit $w0, implicit $w1
...
---
Expand All @@ -135,12 +131,14 @@ body: |
; CHECK-NEXT: %add:gpr32 = ADDSWri %copy, 16, 0, implicit-def $nzcv
; CHECK-NEXT: %overflow:gpr32 = CSINCWr $wzr, $wzr, 2, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %add
; CHECK-NEXT: RET_ReallyLR implicit $w0
; CHECK-NEXT: $w1 = COPY %overflow
; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1
%copy:gpr(s32) = COPY $w0
%constant:gpr(s32) = G_CONSTANT i32 -16
%add:gpr(s32), %overflow:gpr(s1) = G_USUBO %copy, %constant
%add:gpr(s32), %overflow:gpr(s32) = G_USUBO %copy, %constant
$w0 = COPY %add(s32)
RET_ReallyLR implicit $w0
$w1 = COPY %overflow(s32)
RET_ReallyLR implicit $w0, implicit $w1
...
---
Expand All @@ -161,12 +159,14 @@ body: |
; CHECK-NEXT: %add:gpr64 = SUBSXrx %reg0, %reg1, 18, implicit-def $nzcv
; CHECK-NEXT: %flags:gpr32 = CSINCWr $wzr, $wzr, 2, implicit $nzcv
; CHECK-NEXT: $x0 = COPY %add
; CHECK-NEXT: RET_ReallyLR implicit $x0
; CHECK-NEXT: $w1 = COPY %flags
; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $w1
%reg0:gpr(s64) = COPY $x0
%reg1:gpr(s32) = COPY $w0
%ext:gpr(s64) = G_ZEXT %reg1(s32)
%cst:gpr(s64) = G_CONSTANT i64 2
%shift:gpr(s64) = G_SHL %ext, %cst(s64)
%add:gpr(s64), %flags:gpr(s1) = G_USUBO %reg0, %shift
%add:gpr(s64), %flags:gpr(s32) = G_USUBO %reg0, %shift
$x0 = COPY %add(s64)
RET_ReallyLR implicit $x0
$w1 = COPY %flags
RET_ReallyLR implicit $x0, implicit $w1
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