31 changes: 26 additions & 5 deletions clang/test/CodeGen/X86/mmx-builtins.c
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Original file line number Diff line number Diff line change
@@ -1,10 +1,15 @@
// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +ssse3 -emit-llvm -o - -Wall -Werror | FileCheck %s --implicit-check-not=x86mmx
// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +ssse3 -emit-llvm -o - -Wall -Werror | FileCheck %s --implicit-check-not=x86mmx
// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +ssse3 -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --implicit-check-not=x86mmx
// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +ssse3 -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --implicit-check-not=x86mmx
// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +ssse3 -emit-llvm -o - -Wall -Werror | FileCheck %s --implicit-check-not=x86mmx
// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +ssse3 -emit-llvm -o - -Wall -Werror | FileCheck %s --implicit-check-not=x86mmx
// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +ssse3 -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --implicit-check-not=x86mmx
// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +ssse3 -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --implicit-check-not=x86mmx
// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +ssse3 -emit-llvm -o - -Wall -Werror | FileCheck %s --implicit-check-not=x86mmx
// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +ssse3 -emit-llvm -o - -Wall -Werror | FileCheck %s --implicit-check-not=x86mmx
// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +ssse3 -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --implicit-check-not=x86mmx
// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +ssse3 -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --implicit-check-not=x86mmx


#include <immintrin.h>
#include "builtin_test_helpers.h"

__m64 test_mm_abs_pi8(__m64 a) {
// CHECK-LABEL: test_mm_abs_pi8
Expand Down Expand Up @@ -327,7 +332,7 @@ __m64 test_mm_min_pu8(__m64 a, __m64 b) {

int test_mm_movemask_pi8(__m64 a) {
// CHECK-LABEL: test_mm_movemask_pi8
// CHECK: call i32 @llvm.x86.sse2.pmovmskb.128(
// CHECK: call {{.*}}i32 @llvm.x86.sse2.pmovmskb.128(
return _mm_movemask_pi8(a);
}

Expand Down Expand Up @@ -405,6 +410,7 @@ __m64 test_mm_set_pi8(char a, char b, char c, char d, char e, char f, char g, ch
// CHECK: insertelement <8 x i8>
return _mm_set_pi8(a, b, c, d, e, f, g, h);
}
TEST_CONSTEXPR(match_v8qi(_mm_set_pi8(0, -1, 2, -3, 4, -5, 6, -7), -7, 6, -5, 4, -3, 2, -1, 0));

__m64 test_mm_set_pi16(short a, short b, short c, short d) {
// CHECK-LABEL: test_mm_set_pi16
Expand All @@ -414,13 +420,15 @@ __m64 test_mm_set_pi16(short a, short b, short c, short d) {
// CHECK: insertelement <4 x i16>
return _mm_set_pi16(a, b, c, d);
}
TEST_CONSTEXPR(match_v4hi(_mm_set_pi16(101, 102, -103, -104), -104, -103, 102, 101));

__m64 test_mm_set_pi32(int a, int b) {
// CHECK-LABEL: test_mm_set_pi32
// CHECK: insertelement <2 x i32>
// CHECK: insertelement <2 x i32>
return _mm_set_pi32(a, b);
}
TEST_CONSTEXPR(match_v2si(_mm_set_pi32(5000, -1500), -1500, 5000));

__m64 test_mm_setr_pi8(char a, char b, char c, char d, char e, char f, char g, char h) {
// CHECK-LABEL: test_mm_setr_pi8
Expand All @@ -434,6 +442,7 @@ __m64 test_mm_setr_pi8(char a, char b, char c, char d, char e, char f, char g, c
// CHECK: insertelement <8 x i8>
return _mm_setr_pi8(a, b, c, d, e, f, g, h);
}
TEST_CONSTEXPR(match_v8qi(_mm_setr_pi8(0, -1, 2, -3, 4, -5, 6, -7), 0, -1, 2, -3, 4, -5, 6, -7));

__m64 test_mm_setr_pi16(short a, short b, short c, short d) {
// CHECK-LABEL: test_mm_setr_pi16
Expand All @@ -443,13 +452,22 @@ __m64 test_mm_setr_pi16(short a, short b, short c, short d) {
// CHECK: insertelement <4 x i16>
return _mm_setr_pi16(a, b, c, d);
}
TEST_CONSTEXPR(match_v4hi(_mm_setr_pi16(101, 102, -103, -104), 101, 102, -103, -104));

__m64 test_mm_setr_pi32(int a, int b) {
// CHECK-LABEL: test_mm_setr_pi32
// CHECK: insertelement <2 x i32>
// CHECK: insertelement <2 x i32>
return _mm_setr_pi32(a, b);
}
TEST_CONSTEXPR(match_v2si(_mm_setr_pi32(5000, -1500), 5000, -1500));

__m64 test_mm_setzero_si64() {
// CHECK-LABEL: test_mm_setzero_si64
// CHECK: zeroinitializer
return _mm_setzero_si64();
}
TEST_CONSTEXPR(match_m64(_mm_setzero_si64(), 0ULL));

__m64 test_mm_set1_pi8(char a) {
// CHECK-LABEL: test_mm_set1_pi8
Expand All @@ -463,6 +481,7 @@ __m64 test_mm_set1_pi8(char a) {
// CHECK: insertelement <8 x i8>
return _mm_set1_pi8(a);
}
TEST_CONSTEXPR(match_v8qi(_mm_set1_pi8(99), 99, 99, 99, 99, 99, 99, 99, 99));

__m64 test_mm_set1_pi16(short a) {
// CHECK-LABEL: test_mm_set1_pi16
Expand All @@ -472,13 +491,15 @@ __m64 test_mm_set1_pi16(short a) {
// CHECK: insertelement <4 x i16>
return _mm_set1_pi16(a);
}
TEST_CONSTEXPR(match_v4hi(_mm_set1_pi16(-128), -128, -128, -128, -128));

__m64 test_mm_set1_pi32(int a) {
// CHECK-LABEL: test_mm_set1_pi32
// CHECK: insertelement <2 x i32>
// CHECK: insertelement <2 x i32>
return _mm_set1_pi32(a);
}
TEST_CONSTEXPR(match_v2si(_mm_set1_pi32(55), 55, 55));

__m64 test_mm_shuffle_pi8(__m64 a, __m64 b) {
// CHECK-LABEL: test_mm_shuffle_pi8
Expand Down
11 changes: 4 additions & 7 deletions clang/test/CodeGen/X86/sse2-builtins.c
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Original file line number Diff line number Diff line change
Expand Up @@ -867,22 +867,19 @@ __m128d test_mm_min_sd(__m128d A, __m128d B) {
return _mm_min_sd(A, B);
}

__m64 test_mm_movepi64_pi64(__m128i A)
{
__m64 test_mm_movepi64_pi64(__m128i A) {
// CHECK-LABEL: test_mm_movepi64_pi64
// CHECK: [[EXT:%.*]] = extractelement <2 x i64> %1, i32 0
return _mm_movepi64_pi64(A);
}
TEST_CONSTEXPR(match_m64(_mm_movepi64_pi64((__m128i){8, -8}), 8ULL));

__m128i test_mm_movpi64_epi64(__m64 A)
{
__m128i test_mm_movpi64_epi64(__m64 A) {
// CHECK-LABEL: test_mm_movpi64_epi64
// CHECK: [[CAST:%.*]] = bitcast <1 x i64> %{{.*}} to i64
// CHECK: [[INS:%.*]] = insertelement <2 x i64> poison, i64 [[CAST]], i32 0
// CHECK: insertelement <2 x i64> [[INS]], i64 0, i32 1
// CHECK: shufflevector <1 x i64> %{{.*}}, <1 x i64> %{{.*}}, <2 x i32> <i32 0, i32 1>
return _mm_movpi64_epi64(A);
}
TEST_CONSTEXPR(match_m128i(_mm_movpi64_epi64((__m64){5LL}), 5ULL, 0ULL));

__m128i test_mm_move_epi64(__m128i A) {
// CHECK-LABEL: test_mm_move_epi64
Expand Down
2 changes: 1 addition & 1 deletion clang/test/CodeGen/aarch64-cpu-supports-target.c
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ int check_all_feature() {
return 2;
else if (__builtin_cpu_supports("aes+pmull+fp16+dit+dpb+dpb2+jscvt"))
return 3;
else if (__builtin_cpu_supports("fcma+rcpc+rcpc2+rcpc3+frintts+dgh"))
else if (__builtin_cpu_supports("fcma+rcpc+rcpc2+rcpc3+frintts"))
return 4;
else if (__builtin_cpu_supports("i8mm+bf16+sve"))
return 5;
Expand Down
5 changes: 1 addition & 4 deletions clang/test/CodeGen/aarch64-fmv-dependencies.c
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Original file line number Diff line number Diff line change
Expand Up @@ -15,9 +15,6 @@ __attribute__((target_version("bti"))) int fmv(void) { return 0; }
// CHECK: define dso_local i32 @fmv._Mcrc() #[[crc:[0-9]+]] {
__attribute__((target_version("crc"))) int fmv(void) { return 0; }

// CHECK: define dso_local i32 @fmv._Mdgh() #[[ATTR0:[0-9]+]] {
__attribute__((target_version("dgh"))) int fmv(void) { return 0; }

// CHECK: define dso_local i32 @fmv._Mdit() #[[dit:[0-9]+]] {
__attribute__((target_version("dit"))) int fmv(void) { return 0; }

Expand Down Expand Up @@ -157,7 +154,6 @@ int caller() {
// CHECK: attributes #[[bf16]] = { {{.*}} "target-features"="+bf16,+fp-armv8,+neon,+outline-atomics,+v8a"
// CHECK: attributes #[[bti]] = { {{.*}} "target-features"="+bti,+fp-armv8,+neon,+outline-atomics,+v8a"
// CHECK: attributes #[[crc]] = { {{.*}} "target-features"="+crc,+fp-armv8,+neon,+outline-atomics,+v8a"
// CHECK: attributes #[[ATTR0]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+v8a"
// CHECK: attributes #[[dit]] = { {{.*}} "target-features"="+dit,+fp-armv8,+neon,+outline-atomics,+v8a"
// CHECK: attributes #[[dotprod]] = { {{.*}} "target-features"="+dotprod,+fp-armv8,+neon,+outline-atomics,+v8a"
// CHECK: attributes #[[dpb]] = { {{.*}} "target-features"="+ccpp,+fp-armv8,+neon,+outline-atomics,+v8a"
Expand All @@ -167,6 +163,7 @@ int caller() {
// CHECK: attributes #[[fcma]] = { {{.*}} "target-features"="+complxnum,+fp-armv8,+neon,+outline-atomics,+v8a"
// CHECK: attributes #[[flagm]] = { {{.*}} "target-features"="+flagm,+fp-armv8,+neon,+outline-atomics,+v8a"
// CHECK: attributes #[[flagm2]] = { {{.*}} "target-features"="+altnzcv,+flagm,+fp-armv8,+neon,+outline-atomics,+v8a"
// CHECK: attributes #[[ATTR0]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+v8a"
// CHECK: attributes #[[fp16]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+v8a"
// CHECK: attributes #[[fp16fml]] = { {{.*}} "target-features"="+fp-armv8,+fp16fml,+fullfp16,+neon,+outline-atomics,+v8a"
// CHECK: attributes #[[frintts]] = { {{.*}} "target-features"="+fp-armv8,+fptoint,+neon,+outline-atomics,+v8a"
Expand Down
28 changes: 6 additions & 22 deletions clang/test/CodeGen/attr-target-version.c
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,6 @@ int __attribute__((target_version("dpb"))) fmv_one(void) { return 2; }
int __attribute__((target_version("default"))) fmv_one(void) { return 0; }
int __attribute__((target_version("fp"))) fmv_two(void) { return 1; }
int __attribute__((target_version("simd"))) fmv_two(void) { return 2; }
int __attribute__((target_version("dgh"))) fmv_two(void) { return 3; }
int __attribute__((target_version("fp16+simd"))) fmv_two(void) { return 4; }
int __attribute__((target_version("default"))) fmv_two(void) { return 0; }
int foo() {
Expand Down Expand Up @@ -255,13 +254,6 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
//
//
// CHECK: Function Attrs: noinline nounwind optnone
// CHECK-LABEL: define {{[^@]+}}@fmv_two._Mdgh
// CHECK-SAME: () #[[ATTR9]] {
// CHECK-NEXT: entry:
// CHECK-NEXT: ret i32 3
//
//
// CHECK: Function Attrs: noinline nounwind optnone
// CHECK-LABEL: define {{[^@]+}}@fmv_two._Mfp16Msimd
// CHECK-SAME: () #[[ATTR13:[0-9]+]] {
// CHECK-NEXT: entry:
Expand Down Expand Up @@ -576,29 +568,21 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
// CHECK-NEXT: ret ptr @fmv_two._Mfp16Msimd
// CHECK: resolver_else:
// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
// CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 33554432
// CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 33554432
// CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 512
// CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 512
// CHECK-NEXT: [[TMP7:%.*]] = and i1 true, [[TMP6]]
// CHECK-NEXT: br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]
// CHECK: resolver_return1:
// CHECK-NEXT: ret ptr @fmv_two._Mdgh
// CHECK-NEXT: ret ptr @fmv_two._Msimd
// CHECK: resolver_else2:
// CHECK-NEXT: [[TMP8:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
// CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], 512
// CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 512
// CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], 256
// CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 256
// CHECK-NEXT: [[TMP11:%.*]] = and i1 true, [[TMP10]]
// CHECK-NEXT: br i1 [[TMP11]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]]
// CHECK: resolver_return3:
// CHECK-NEXT: ret ptr @fmv_two._Msimd
// CHECK: resolver_else4:
// CHECK-NEXT: [[TMP12:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
// CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], 256
// CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[TMP13]], 256
// CHECK-NEXT: [[TMP15:%.*]] = and i1 true, [[TMP14]]
// CHECK-NEXT: br i1 [[TMP15]], label [[RESOLVER_RETURN5:%.*]], label [[RESOLVER_ELSE6:%.*]]
// CHECK: resolver_return5:
// CHECK-NEXT: ret ptr @fmv_two._Mfp
// CHECK: resolver_else6:
// CHECK: resolver_else4:
// CHECK-NEXT: ret ptr @fmv_two.default
//
//
Expand Down
8 changes: 4 additions & 4 deletions clang/test/CodeGen/attr-target-x86.c
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Original file line number Diff line number Diff line change
Expand Up @@ -59,10 +59,10 @@ void __attribute__((target("avx10.1-512"))) avx10_1_512(void) {}
// CHECK: #0 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87" "tune-cpu"="i686"
// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cmov,+crc32,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"
// CHECK-NOT: tune-cpu
// CHECK: #2 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-aes,-avx,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512f,-avx512fp16,-avx512ifma,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint16,-avxvnniint8,-f16c,-fma,-fma4,-gfni,-kl,-pclmul,-sha,-sha512,-sm3,-sm4,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-widekl,-xop" "tune-cpu"="i686"
// CHECK: #2 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-aes,-amx-avx512,-avx,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512f,-avx512fp16,-avx512ifma,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint16,-avxvnniint8,-f16c,-fma,-fma4,-gfni,-kl,-pclmul,-sha,-sha512,-sm3,-sm4,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-widekl,-xop" "tune-cpu"="i686"
// CHECK: #3 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+crc32,+cx8,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87" "tune-cpu"="i686"
// CHECK: #4 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-avx,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512f,-avx512fp16,-avx512ifma,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint16,-avxvnniint8,-f16c,-fma,-fma4,-sha512,-sm3,-sm4,-sse4.1,-sse4.2,-vaes,-vpclmulqdq,-xop" "tune-cpu"="i686"
// CHECK: #5 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cmov,+crc32,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-aes,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-vaes"
// CHECK: #4 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-amx-avx512,-avx,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512f,-avx512fp16,-avx512ifma,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint16,-avxvnniint8,-f16c,-fma,-fma4,-sha512,-sm3,-sm4,-sse4.1,-sse4.2,-vaes,-vpclmulqdq,-xop" "tune-cpu"="i686"
// CHECK: #5 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cmov,+crc32,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-aes,-amx-avx512,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-vaes"
// CHECK-NOT: tune-cpu
// CHECK: #6 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-mmx"
// CHECK: #7 = {{.*}}"target-cpu"="lakemont" "target-features"="+cx8,+mmx"
Expand All @@ -76,5 +76,5 @@ void __attribute__((target("avx10.1-512"))) avx10_1_512(void) {}
// CHECK: "target-cpu"="x86-64-v4"
// CHECK-SAME: "target-features"="+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+cmov,+crc32,+cx16,+cx8,+evex512,+f16c,+fma,+fxsr,+lzcnt,+mmx,+movbe,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave"

// CHECK: #12 = {{.*}}"target-cpu"="i686" "target-features"="+aes,+avx,+avx10.1-256,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512fp16,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+cmov,+crc32,+cx8,+f16c,+fma,+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+vaes,+vpclmulqdq,+x87,+xsave,-avx10.1-512,-avx10.2-512,-evex512"
// CHECK: #12 = {{.*}}"target-cpu"="i686" "target-features"="+aes,+avx,+avx10.1-256,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512fp16,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+cmov,+crc32,+cx8,+f16c,+fma,+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+vaes,+vpclmulqdq,+x87,+xsave,-amx-avx512,-avx10.1-512,-avx10.2-512,-evex512"
// CHECK: #13 = {{.*}}"target-cpu"="i686" "target-features"="+aes,+avx,+avx10.1-256,+avx10.1-512,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512fp16,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+cmov,+crc32,+cx8,+evex512,+f16c,+fma,+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+vaes,+vpclmulqdq,+x87,+xsave"
30 changes: 0 additions & 30 deletions clang/test/CodeGenHIP/default-attributes.hip
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,6 @@
// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -x hip -fno-ident -fcuda-is-device \
// RUN: -emit-llvm -o - %s | FileCheck -check-prefix=OPTNONE %s

// RUN: %clang_cc1 -O3 -triple amdgcn-amd-amdhsa -x hip -fno-ident -fcuda-is-device \
// RUN: -emit-llvm -o - %s | FileCheck -check-prefix=OPT %s

#define __device__ __attribute__((device))
#define __global__ __attribute__((global))

Expand All @@ -13,10 +10,6 @@
// OPTNONE: @llvm.compiler.used = appending addrspace(1) global [1 x ptr] [ptr addrspacecast (ptr addrspace(1) @__hip_cuid_ to ptr)], section "llvm.metadata"
// OPTNONE: @__oclc_ABI_version = weak_odr hidden local_unnamed_addr addrspace(4) constant i32 500
//.
// OPT: @__hip_cuid_ = addrspace(1) global i8 0
// OPT: @__oclc_ABI_version = weak_odr hidden local_unnamed_addr addrspace(4) constant i32 500
// OPT: @llvm.compiler.used = appending addrspace(1) global [1 x ptr] [ptr addrspacecast (ptr addrspace(1) @__hip_cuid_ to ptr)], section "llvm.metadata"
//.
__device__ void extern_func();

// OPTNONE: Function Attrs: convergent mustprogress noinline nounwind optnone
Expand All @@ -26,13 +19,6 @@ __device__ void extern_func();
// OPTNONE-NEXT: call void @_Z11extern_funcv() #[[ATTR3:[0-9]+]]
// OPTNONE-NEXT: ret void
//
// OPT: Function Attrs: convergent mustprogress nounwind
// OPT-LABEL: define {{[^@]+}}@_Z4funcv
// OPT-SAME: () local_unnamed_addr #[[ATTR0:[0-9]+]] {
// OPT-NEXT: entry:
// OPT-NEXT: tail call void @_Z11extern_funcv() #[[ATTR3:[0-9]+]]
// OPT-NEXT: ret void
//
__device__ void func() {
extern_func();
}
Expand All @@ -44,13 +30,6 @@ __device__ void func() {
// OPTNONE-NEXT: call void @_Z11extern_funcv() #[[ATTR3]]
// OPTNONE-NEXT: ret void
//
// OPT: Function Attrs: convergent mustprogress norecurse nounwind
// OPT-LABEL: define {{[^@]+}}@_Z6kernelv
// OPT-SAME: () local_unnamed_addr #[[ATTR2:[0-9]+]] {
// OPT-NEXT: entry:
// OPT-NEXT: tail call void @_Z11extern_funcv() #[[ATTR3]]
// OPT-NEXT: ret void
//
__global__ void kernel() {
extern_func();
}
Expand All @@ -60,16 +39,7 @@ __global__ void kernel() {
// OPTNONE: attributes #[[ATTR2]] = { convergent mustprogress noinline norecurse nounwind optnone "amdgpu-flat-work-group-size"="1,1024" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "uniform-work-group-size"="true" }
// OPTNONE: attributes #[[ATTR3]] = { convergent nounwind }
//.
// OPT: attributes #[[ATTR0]] = { convergent mustprogress nounwind "amdgpu-waves-per-eu"="4,10" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "uniform-work-group-size"="false" }
// OPT: attributes #[[ATTR1:[0-9]+]] = { convergent nounwind "amdgpu-waves-per-eu"="4,10" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "uniform-work-group-size"="false" }
// OPT: attributes #[[ATTR2]] = { convergent mustprogress norecurse nounwind "amdgpu-flat-work-group-size"="1,1024" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "uniform-work-group-size"="true" }
// OPT: attributes #[[ATTR3]] = { convergent nounwind }
//.
// OPTNONE: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
// OPTNONE: [[META1:![0-9]+]] = !{i32 1, !"amdgpu_printf_kind", !"hostcall"}
// OPTNONE: [[META2:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
//.
// OPT: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
// OPT: [[META1:![0-9]+]] = !{i32 1, !"amdgpu_printf_kind", !"hostcall"}
// OPT: [[META2:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
//.
46 changes: 46 additions & 0 deletions clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl
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Original file line number Diff line number Diff line change
@@ -0,0 +1,46 @@
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.2-compute -finclude-default-header -fnative-half-type -emit-llvm -o - %s | FileCheck %s -check-prefixes=DXIL

struct MyStruct {
float4 a;
int2 b;
};

// DXIL: %"class.hlsl::AppendStructuredBuffer" = type { target("dx.RawBuffer", i16, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.0" = type { target("dx.RawBuffer", i16, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.1" = type { target("dx.RawBuffer", i32, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.2" = type { target("dx.RawBuffer", i32, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.3" = type { target("dx.RawBuffer", i64, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.4" = type { target("dx.RawBuffer", i64, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.5" = type { target("dx.RawBuffer", half, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.6" = type { target("dx.RawBuffer", float, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.7" = type { target("dx.RawBuffer", double, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.8" = type { target("dx.RawBuffer", <4 x i16>, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.9" = type { target("dx.RawBuffer", <3 x i32>, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.10" = type { target("dx.RawBuffer", <2 x half>, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.11" = type { target("dx.RawBuffer", <3 x float>, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.12" = type { target("dx.RawBuffer", %struct.MyStruct = type { <4 x float>, <2 x i32>, [8 x i8] }, 1, 0)

AppendStructuredBuffer<int16_t> BufI16;
AppendStructuredBuffer<uint16_t> BufU16;
AppendStructuredBuffer<int> BufI32;
AppendStructuredBuffer<uint> BufU32;
AppendStructuredBuffer<int64_t> BufI64;
AppendStructuredBuffer<uint64_t> BufU64;
AppendStructuredBuffer<half> BufF16;
AppendStructuredBuffer<float> BufF32;
AppendStructuredBuffer<double> BufF64;
AppendStructuredBuffer< vector<int16_t, 4> > BufI16x4;
AppendStructuredBuffer< vector<uint, 3> > BufU32x3;
AppendStructuredBuffer<half2> BufF16x2;
AppendStructuredBuffer<float3> BufF32x3;
// TODO: AppendStructuredBuffer<snorm half> BufSNormF16;
// TODO: AppendStructuredBuffer<unorm half> BufUNormF16;
// TODO: AppendStructuredBuffer<snorm float> BufSNormF32;
// TODO: AppendStructuredBuffer<unorm float> BufUNormF32;
// TODO: AppendStructuredBuffer<snorm double> BufSNormF64;
// TODO: AppendStructuredBuffer<unorm double> BufUNormF64;
AppendStructuredBuffer<MyStruct> BufMyStruct;

[numthreads(1,1,1)]
void main(int GI : SV_GroupIndex) {
}
46 changes: 46 additions & 0 deletions clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl
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Original file line number Diff line number Diff line change
@@ -0,0 +1,46 @@
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.2-compute -finclude-default-header -fnative-half-type -emit-llvm -o - %s | FileCheck %s -check-prefixes=DXIL

struct MyStruct {
float4 a;
int2 b;
};

// DXIL: %"class.hlsl::ConsumeStructuredBuffer" = type { target("dx.RawBuffer", i16, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.0" = type { target("dx.RawBuffer", i16, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.1" = type { target("dx.RawBuffer", i32, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.2" = type { target("dx.RawBuffer", i32, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.3" = type { target("dx.RawBuffer", i64, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.4" = type { target("dx.RawBuffer", i64, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.5" = type { target("dx.RawBuffer", half, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.6" = type { target("dx.RawBuffer", float, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.7" = type { target("dx.RawBuffer", double, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.8" = type { target("dx.RawBuffer", <4 x i16>, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.9" = type { target("dx.RawBuffer", <3 x i32>, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.10" = type { target("dx.RawBuffer", <2 x half>, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.11" = type { target("dx.RawBuffer", <3 x float>, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.12" = type { target("dx.RawBuffer", %struct.MyStruct = type { <4 x float>, <2 x i32>, [8 x i8] }, 1, 0)

ConsumeStructuredBuffer<int16_t> BufI16;
ConsumeStructuredBuffer<uint16_t> BufU16;
ConsumeStructuredBuffer<int> BufI32;
ConsumeStructuredBuffer<uint> BufU32;
ConsumeStructuredBuffer<int64_t> BufI64;
ConsumeStructuredBuffer<uint64_t> BufU64;
ConsumeStructuredBuffer<half> BufF16;
ConsumeStructuredBuffer<float> BufF32;
ConsumeStructuredBuffer<double> BufF64;
ConsumeStructuredBuffer< vector<int16_t, 4> > BufI16x4;
ConsumeStructuredBuffer< vector<uint, 3> > BufU32x3;
ConsumeStructuredBuffer<half2> BufF16x2;
ConsumeStructuredBuffer<float3> BufF32x3;
// TODO: ConsumeStructuredBuffer<snorm half> BufSNormF16;
// TODO: ConsumeStructuredBuffer<unorm half> BufUNormF16;
// TODO: ConsumeStructuredBuffer<snorm float> BufSNormF32;
// TODO: ConsumeStructuredBuffer<unorm float> BufUNormF32;
// TODO: ConsumeStructuredBuffer<snorm double> BufSNormF64;
// TODO: ConsumeStructuredBuffer<unorm double> BufUNormF64;
ConsumeStructuredBuffer<MyStruct> BufMyStruct;

[numthreads(1,1,1)]
void main(int GI : SV_GroupIndex) {
}
22 changes: 20 additions & 2 deletions clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
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Original file line number Diff line number Diff line change
Expand Up @@ -5,20 +5,29 @@

StructuredBuffer<float> Buf : register(t10);
RWStructuredBuffer<float> Buf2 : register(u5, space1);
AppendStructuredBuffer<float> Buf3 : register(u3);
ConsumeStructuredBuffer<float> Buf4 : register(u4);
RasterizerOrderedStructuredBuffer<float> Buf5 : register(u1, space2);

// CHECK: %"class.hlsl::StructuredBuffer" = type { target("dx.RawBuffer", float, 0, 0), float }
// CHECK: %"class.hlsl::RWStructuredBuffer" = type { target("dx.RawBuffer", float, 1, 0), float }
// CHECK: %"class.hlsl::StructuredBuffer" = type { target("dx.RawBuffer", float, 0, 0)
// CHECK: %"class.hlsl::RWStructuredBuffer" = type { target("dx.RawBuffer", float, 1, 0)
// CHECK: %"class.hlsl::AppendStructuredBuffer" = type { target("dx.RawBuffer", float, 1, 0)
// CHECK: %"class.hlsl::ConsumeStructuredBuffer" = type { target("dx.RawBuffer", float, 1, 0)
// CHECK: %"class.hlsl::RasterizerOrderedStructuredBuffer" = type { target("dx.RawBuffer", float, 1, 1), float }

// CHECK: @Buf = global %"class.hlsl::StructuredBuffer" zeroinitializer, align 4
// CHECK: @Buf2 = global %"class.hlsl::RWStructuredBuffer" zeroinitializer, align 4
// CHECK: @Buf3 = global %"class.hlsl::AppendStructuredBuffer" zeroinitializer, align 4
// CHECK: @Buf4 = global %"class.hlsl::ConsumeStructuredBuffer" zeroinitializer, align 4
// CHECK: @Buf5 = global %"class.hlsl::RasterizerOrderedStructuredBuffer" zeroinitializer, align 4

// CHECK: define linkonce_odr void @_ZN4hlsl16StructuredBufferIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(8) %this)
// CHECK-NEXT: entry:
// CHECK: define linkonce_odr void @_ZN4hlsl18RWStructuredBufferIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(8) %this)
// CHECK-NEXT: entry:
// CHECK: define linkonce_odr void @_ZN4hlsl22AppendStructuredBufferIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) %this)
// CHECK-NEXT: entry:
// CHECK: define linkonce_odr void @_ZN4hlsl23ConsumeStructuredBufferIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) %this)
// CHECK: define linkonce_odr void @_ZN4hlsl33RasterizerOrderedStructuredBufferIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(8) %this)
// CHECK-NEXT: entry:

Expand All @@ -32,11 +41,20 @@ RasterizerOrderedStructuredBuffer<float> Buf5 : register(u1, space2);
// CHECK-DXIL-NEXT: store target("dx.RawBuffer", float, 0, 0) %Buf_h, ptr @Buf, align 4
// CHECK-DXIL-NEXT: %Buf2_h = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.handle.fromBinding.tdx.RawBuffer_f32_1_0t(i32 1, i32 5, i32 1, i32 0, i1 false)
// CHECK-DXIL-NEXT: store target("dx.RawBuffer", float, 1, 0) %Buf2_h, ptr @Buf2, align 4
// CHECK-DXIL-NEXT: %Buf3_h = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.handle.fromBinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 3, i32 1, i32 0, i1 false)
// CHECK-DXIL-NEXT: store target("dx.RawBuffer", float, 1, 0) %Buf3_h, ptr @Buf3, align 4
// CHECK-DXIL-NEXT: %Buf4_h = call target("dx.RawBuffer", float, 1, 0) @llvm.dx.handle.fromBinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 4, i32 1, i32 0, i1 false)
// CHECK-DXIL-NEXT: store target("dx.RawBuffer", float, 1, 0) %Buf4_h, ptr @Buf4, align 4
// CHECK-DXIL-NEXT: %Buf5_h = call target("dx.RawBuffer", float, 1, 1) @llvm.dx.handle.fromBinding.tdx.RawBuffer_f32_1_1t(i32 2, i32 1, i32 1, i32 0, i1 false)
// CHECK-DXIL-NEXT: store target("dx.RawBuffer", float, 1, 1) %Buf5_h, ptr @Buf5, align 4

// CHECK-SPIRV-NEXT: %Buf_h = call target("dx.RawBuffer", float, 0, 0) @llvm.spv.handle.fromBinding.tdx.RawBuffer_f32_0_0t(i32 0, i32 10, i32 1, i32 0, i1 false)
// CHECK-SPIRV-NEXT: store target("dx.RawBuffer", float, 0, 0) %Buf_h, ptr @Buf", align 4
// CHECK-SPIRV-NEXT: %Buf2_h = call target("dx.RawBuffer", float, 1, 0) @llvm.spv.handle.fromBinding.tdx.RawBuffer_f32_1_0t(i32 1, i32 5, i32 1, i32 0, i1 false)
// CHECK-SPIRV-NEXT: store target("dx.RawBuffer", float, 1, 0) %Buf2_h, ptr @Buf2", align 4
// CHECK-SPIRV-NEXT: %Buf3_h = call target("dx.RawBuffer", float, 0, 0) @llvm.spv.handle.fromBinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 3, i32 1, i32 0, i1 false)
// CHECK-SPIRV-NEXT: store target("dx.RawBuffer", float, 0, 0) %Buf3_h, ptr @Buf3, align 4
// CHECK-SPIRV-NEXT: %Buf4_h = call target("dx.RawBuffer", float, 1, 0) @llvm.spv.handle.fromBinding.tdx.RawBuffer_f32_1_0t(i32 0, i32 4, i32 1, i32 0, i1 false)
// CHECK-SPIRV-NEXT: store target("dx.RawBuffer", float, 1, 0) %Buf4_h, ptr @Buf4, align 4
// CHECK-SPIRV-NEXT: %Buf5_h = call target("dx.RawBuffer", float, 1, 1) @llvm.spv.handle.fromBinding.tdx.RawBuffer_f32_1_1t(i32 2, i32 1, i32 1, i32 0, i1 false)
// CHECK-SPIRV-NEXT: store target("dx.RawBuffer", float, 1, 1) %Buf5_h, ptr @Buf5, align 4
16 changes: 11 additions & 5 deletions clang/test/Driver/XRay/xray-shared.cpp
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Original file line number Diff line number Diff line change
@@ -1,15 +1,21 @@
// Check supported targets
// RUN: %clang -### --target=x86_64-unknown-linux-gnu -fPIC -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s
// RUN: %clang -### --target=aarch64-unknown-linux-gnu -fPIC -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s

// Check unsupported targets
// RUN: not %clang -### --target=arm-unknown-linux-gnu -fPIC -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-TARGET
// RUN: not %clang -### --target=mips-unknown-linux-gnu -fPIC -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-TARGET
// RUN: not %clang -### --target=loongarch64-unknown-linux-gnu -fPIC -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-TARGET
// RUN: not %clang -### --target=hexagon-unknown-linux-gnu -fPIC -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-TARGET
// RUN: not %clang -### --target=powerpc64le-unknown-linux-gnu -fPIC -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-TARGET

// Check PIC requirement
// RUN: %clang -### --target=x86_64-unknown-linux-gnu -fpic -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s
// RUN: not %clang -### --target=x86_64-unknown-linux-gnu -fno-PIC -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-PIC
// RUN: not %clang -### --target=x86_64-unknown-linux-gnu -fno-pic -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-PIC

// On 64 bit darwin, PIC is always enabled
// RUN: %clang -### --target=x86_64-apple-darwin -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s

// Check unsupported targets
// RUN: not %clang -### --target=aarch64-pc-freebsd -fPIC -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-TARGET
// RUN: not %clang -### --target=arm64-apple-macos -fPIC -fxray-instrument -fxray-shared -c %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=ERR-TARGET

// CHECK: "-cc1" {{.*}}"-fxray-instrument" {{.*}}"-fxray-shared"
// ERR-TARGET: error: unsupported option '-fxray-shared' for target
// ERR-PIC: error: option '-fxray-shared' cannot be specified without '-fPIC'
Expand Down
1 change: 1 addition & 0 deletions clang/test/Driver/print-enabled-extensions/aarch64-ampere1b.c
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Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,7 @@
// CHECK-NEXT: FEAT_SHA3, FEAT_SHA512 Enable SHA512 and SHA3 support
// CHECK-NEXT: FEAT_SM4, FEAT_SM3 Enable SM3 and SM4 support
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
// CHECK-NEXT: FEAT_TLBIOS, FEAT_TLBIRANGE Enable Armv8.4-A TLB Range and Maintenance instructions
// CHECK-NEXT: FEAT_TRF Enable Armv8.4-A Trace extension
Expand Down
1 change: 1 addition & 0 deletions clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
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Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,7 @@
// CHECK-NEXT: FEAT_SME_F64F64 Enable Scalable Matrix Extension (SME) F64F64 instructions
// CHECK-NEXT: FEAT_SME_I16I64 Enable Scalable Matrix Extension (SME) I16I64 instructions
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
// CHECK-NEXT: FEAT_TLBIOS, FEAT_TLBIRANGE Enable Armv8.4-A TLB Range and Maintenance instructions
// CHECK-NEXT: FEAT_TRF Enable Armv8.4-A Trace extension
// CHECK-NEXT: FEAT_UAO Enable Armv8.2-A UAO PState
Expand Down
1 change: 1 addition & 0 deletions clang/test/Driver/print-enabled-extensions/aarch64-armv8.7-a.c
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Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,7 @@
// CHECK-NEXT: FEAT_SB Enable Armv8.5-A Speculation Barrier
// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
// CHECK-NEXT: FEAT_TLBIOS, FEAT_TLBIRANGE Enable Armv8.4-A TLB Range and Maintenance instructions
// CHECK-NEXT: FEAT_TRBE Enable Trace Buffer Extension
Expand Down
1 change: 1 addition & 0 deletions clang/test/Driver/print-enabled-extensions/aarch64-armv8.8-a.c
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Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,7 @@
// CHECK-NEXT: FEAT_SB Enable Armv8.5-A Speculation Barrier
// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
// CHECK-NEXT: FEAT_TLBIOS, FEAT_TLBIRANGE Enable Armv8.4-A TLB Range and Maintenance instructions
// CHECK-NEXT: FEAT_TRBE Enable Trace Buffer Extension
Expand Down
1 change: 1 addition & 0 deletions clang/test/Driver/print-enabled-extensions/aarch64-armv8.9-a.c
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Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,7 @@
// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
// CHECK-NEXT: FEAT_SPECRES2 Enable Speculation Restriction Instruction
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
// CHECK-NEXT: FEAT_TLBIOS, FEAT_TLBIRANGE Enable Armv8.4-A TLB Range and Maintenance instructions
// CHECK-NEXT: FEAT_TRBE Enable Trace Buffer Extension
Expand Down
1 change: 1 addition & 0 deletions clang/test/Driver/print-enabled-extensions/aarch64-armv9.2-a.c
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Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,7 @@
// CHECK-NEXT: FEAT_SB Enable Armv8.5-A Speculation Barrier
// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
// CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions
// CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions
Expand Down
1 change: 1 addition & 0 deletions clang/test/Driver/print-enabled-extensions/aarch64-armv9.3-a.c
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Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,7 @@
// CHECK-NEXT: FEAT_SB Enable Armv8.5-A Speculation Barrier
// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
// CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions
// CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions
Expand Down
1 change: 1 addition & 0 deletions clang/test/Driver/print-enabled-extensions/aarch64-armv9.4-a.c
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Original file line number Diff line number Diff line change
Expand Up @@ -54,6 +54,7 @@
// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
// CHECK-NEXT: FEAT_SPECRES2 Enable Speculation Restriction Instruction
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
// CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions
// CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions
Expand Down
1 change: 1 addition & 0 deletions clang/test/Driver/print-enabled-extensions/aarch64-armv9.5-a.c
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Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,7 @@
// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
// CHECK-NEXT: FEAT_SPECRES2 Enable Speculation Restriction Instruction
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
// CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions
// CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions
Expand Down
1 change: 1 addition & 0 deletions clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520.c
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Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,7 @@
// CHECK-NEXT: FEAT_SB Enable Armv8.5-A Speculation Barrier
// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
// CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions
// CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions
Expand Down
1 change: 1 addition & 0 deletions clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520ae.c
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Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,7 @@
// CHECK-NEXT: FEAT_SB Enable Armv8.5-A Speculation Barrier
// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
// CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions
// CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions
Expand Down
2 changes: 2 additions & 0 deletions clang/test/Driver/print-supported-extensions-riscv.c
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Original file line number Diff line number Diff line change
Expand Up @@ -120,6 +120,7 @@
// CHECK-NEXT: smaia 1.0 'Smaia' (Advanced Interrupt Architecture Machine Level)
// CHECK-NEXT: smcdeleg 1.0 'Smcdeleg' (Counter Delegation Machine Level)
// CHECK-NEXT: smcsrind 1.0 'Smcsrind' (Indirect CSR Access Machine Level)
// CHECK-NEXT: smdbltrp 1.0 'Smdbltrp' (Double Trap Machine Level)
// CHECK-NEXT: smepmp 1.0 'Smepmp' (Enhanced Physical Memory Protection)
// CHECK-NEXT: smmpm 1.0 'Smmpm' (Machine-level Pointer Masking for M-mode)
// CHECK-NEXT: smnpm 1.0 'Smnpm' (Machine-level Pointer Masking for next lower privilege mode)
Expand All @@ -131,6 +132,7 @@
// CHECK-NEXT: sscofpmf 1.0 'Sscofpmf' (Count Overflow and Mode-Based Filtering)
// CHECK-NEXT: sscounterenw 1.0 'Sscounterenw' (Support writeable scounteren enable bit for any hpmcounter that is not read-only zero)
// CHECK-NEXT: sscsrind 1.0 'Sscsrind' (Indirect CSR Access Supervisor Level)
// CHECK-NEXT: ssdbltrp 1.0 'Ssdbltrp' (Double Trap Supervisor Level)
// CHECK-NEXT: ssnpm 1.0 'Ssnpm' (Supervisor-level Pointer Masking for next lower privilege mode)
// CHECK-NEXT: sspm 1.0 'Sspm' (Indicates Supervisor-mode Pointer Masking)
// CHECK-NEXT: ssqosid 1.0 'Ssqosid' (Quality-of-Service (QoS) Identifiers)
Expand Down
8 changes: 8 additions & 0 deletions clang/test/Driver/riscv-profiles.c
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Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,7 @@
// RVA22U64: "-target-feature" "+f"
// RVA22U64: "-target-feature" "+d"
// RVA22U64: "-target-feature" "+c"
// RVA22U64: "-target-feature" "+b"
// RVA22U64: "-target-feature" "+zic64b"
// RVA22U64: "-target-feature" "+zicbom"
// RVA22U64: "-target-feature" "+zicbop"
Expand All @@ -83,6 +84,7 @@
// RVA22S64: "-target-feature" "+f"
// RVA22S64: "-target-feature" "+d"
// RVA22S64: "-target-feature" "+c"
// RVA22S64: "-target-feature" "+b"
// RVA22S64: "-target-feature" "+zic64b"
// RVA22S64: "-target-feature" "+zicbom"
// RVA22S64: "-target-feature" "+zicbop"
Expand Down Expand Up @@ -118,6 +120,7 @@
// RVA23U64: "-target-feature" "+f"
// RVA23U64: "-target-feature" "+d"
// RVA23U64: "-target-feature" "+c"
// RVA23U64: "-target-feature" "+b"
// RVA23U64: "-target-feature" "+v"
// RVA23U64: "-target-feature" "+zic64b"
// RVA23U64: "-target-feature" "+zicbom"
Expand Down Expand Up @@ -156,6 +159,7 @@
// RVA23S64: "-target-feature" "+f"
// RVA23S64: "-target-feature" "+d"
// RVA23S64: "-target-feature" "+c"
// RVA23S64: "-target-feature" "+b"
// RVA23S64: "-target-feature" "+v"
// RVA23S64: "-target-feature" "+h"
// RVA23S64: "-target-feature" "+zic64b"
Expand Down Expand Up @@ -217,6 +221,7 @@
// RVB23U64: "-target-feature" "+f"
// RVB23U64: "-target-feature" "+d"
// RVB23U64: "-target-feature" "+c"
// RVB23U64: "-target-feature" "+b"
// RVB23U64: "-target-feature" "+zic64b"
// RVB23U64: "-target-feature" "+zicbom"
// RVB23U64: "-target-feature" "+zicbop"
Expand Down Expand Up @@ -249,6 +254,7 @@
// RVB23S64: "-target-feature" "+f"
// RVB23S64: "-target-feature" "+d"
// RVB23S64: "-target-feature" "+c"
// RVB23S64: "-target-feature" "+b"
// RVB23S64: "-target-feature" "+zic64b"
// RVB23S64: "-target-feature" "+zicbom"
// RVB23S64: "-target-feature" "+zicbop"
Expand Down Expand Up @@ -290,6 +296,7 @@
// RUN: %clang --target=riscv32 -### -c %s 2>&1 -march=rvm23u32 -menable-experimental-extensions \
// RUN: | FileCheck -check-prefix=RVM23U32 %s
// RVM23U32: "-target-feature" "+m"
// RVM23U32: "-target-feature" "+b"
// RVM23U32: "-target-feature" "+zicbop"
// RVM23U32: "-target-feature" "+zicond"
// RVM23U32: "-target-feature" "+zicsr"
Expand All @@ -309,6 +316,7 @@
// PROFILE-WITH-ADDITIONAL: "-target-feature" "+f"
// PROFILE-WITH-ADDITIONAL: "-target-feature" "+d"
// PROFILE-WITH-ADDITIONAL: "-target-feature" "+c"
// PROFILE-WITH-ADDITIONAL: "-target-feature" "+b"
// PROFILE-WITH-ADDITIONAL: "-target-feature" "+zicbom"
// PROFILE-WITH-ADDITIONAL: "-target-feature" "+zicbop"
// PROFILE-WITH-ADDITIONAL: "-target-feature" "+zicboz"
Expand Down
7 changes: 7 additions & 0 deletions clang/test/Driver/x86-target-features.c
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Original file line number Diff line number Diff line change
Expand Up @@ -311,6 +311,13 @@
// AMX-TRANSPOSE: "-target-feature" "+amx-transpose"
// NO-AMX-TRANSPOSE: "-target-feature" "-amx-transpose"

// RUN: %clang -target x86_64-unknown-linux-gnu -mamx-avx512 %s \
// RUN: -### -o %t.o 2>&1 | FileCheck -check-prefix=AMX-AVX512 %s
// RUN: %clang -target x86_64-unknown-linux-gnu -mno-amx-avx512 %s \
// RUN: -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-AMX-AVX512 %s
// AMX-AVX512: "-target-feature" "+amx-avx512"
// NO-AMX-AVX512: "-target-feature" "-amx-avx512"

// RUN: %clang --target=i386 -march=i386 -mhreset %s -### 2>&1 | FileCheck -check-prefix=HRESET %s
// RUN: %clang --target=i386 -march=i386 -mno-hreset %s -### 2>&1 | FileCheck -check-prefix=NO-HRESET %s
// HRESET: "-target-feature" "+hreset"
Expand Down
3 changes: 1 addition & 2 deletions clang/test/Misc/warning-flags.c
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Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ This test serves two purposes:

The list of warnings below should NEVER grow. It should gradually shrink to 0.

CHECK: Warnings without flags (62):
CHECK: Warnings without flags (61):

CHECK-NEXT: ext_expected_semi_decl_list
CHECK-NEXT: ext_missing_whitespace_after_macro_name
Expand Down Expand Up @@ -76,7 +76,6 @@ CHECK-NEXT: warn_register_objc_catch_parm
CHECK-NEXT: warn_related_result_type_compatibility_class
CHECK-NEXT: warn_related_result_type_compatibility_protocol
CHECK-NEXT: warn_template_export_unsupported
CHECK-NEXT: warn_typecheck_function_qualifiers
CHECK-NEXT: warn_undef_interface
CHECK-NEXT: warn_undef_interface_suggest
CHECK-NEXT: warn_undef_protocolref
Expand Down
85 changes: 85 additions & 0 deletions clang/test/Modules/prune-non-affecting-module-map-repeated.cpp
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Original file line number Diff line number Diff line change
@@ -0,0 +1,85 @@
// Check that the same module map file passed to -fmodule-map-file *and*
// available from one of the `-fmodule-file` does not allocate extra source
// location space. This optimization is important for using module maps in
// large codebases to avoid running out of source location space.

// RUN: rm -rf %t && mkdir %t
// RUN: split-file %s %t

// RUN: %clang_cc1 -xc++ -fmodules -fno-implicit-modules -fmodule-map-file=%t/base.map -fmodule-name=base -emit-module %t/base.map -o %t/base.pcm
// RUN: %clang_cc1 -xc++ -fmodules -fno-implicit-modules \
// RUN: -fmodule-map-file=%t/base.map -fmodule-map-file=%t/mod1.map \
// RUN: -fmodule-file=%t/base.pcm \
// RUN: -fmodule-name=mod1 -emit-module %t/mod1.map -o %t/mod1.pcm
// RUN: %clang_cc1 -xc++ -fmodules -fno-implicit-modules \
// RUN: -fmodule-map-file=%t/base.map -fmodule-map-file=%t/mod1.map -fmodule-map-file=%t/mod2.map \
// RUN: -fmodule-file=%t/mod1.pcm \
// RUN: -fmodule-name=mod2 -emit-module %t/mod2.map -o %t/mod2.pcm
// RUN: %clang_cc1 -xc++ -fmodules -fno-implicit-modules \
// RUN: -fmodule-map-file=%t/base.map -fmodule-map-file=%t/mod2.map -fmodule-map-file=%t/mod3.map \
// RUN: -fmodule-file=%t/mod2.pcm \
// RUN: -fmodule-name=mod3 -emit-module %t/mod3.map -o %t/mod3.pcm
// RUN: %clang_cc1 -xc++ -fmodules -fno-implicit-modules \
// RUN: -fmodule-map-file=%t/base.map -fmodule-map-file=%t/mod3.map -fmodule-map-file=%t/mod4.map \
// RUN: -fmodule-file=%t/mod3.pcm \
// RUN: -fmodule-name=mod4 -emit-module %t/mod4.map -o %t/mod4.pcm
// RUN: %clang_cc1 -xc++ -fmodules -fno-implicit-modules -fmodule-map-file=%t/base.map -fmodule-map-file=%t/mod4.map -fmodule-file=%t/mod4.pcm -fsyntax-only -verify %t/check_slocs.cc

//--- base.map
module base { header "vector.h" }
//--- mod1.map
module mod1 { header "mod1.h" }
//--- mod2.map
module mod2 { header "mod2.h" }
//--- mod3.map
module mod3 { header "mod3.h" }
//--- mod4.map
module mod4 { header "mod4.h" }
//--- check_slocs.cc
#include "mod4.h"
#pragma clang __debug sloc_usage // expected-remark {{source manager location address space usage}}
// expected-note@* {{% of available space}}

// Module map files files that were specified on the command line are entered twice (once when parsing command-line, once loaded from the .pcm)
// Those that not specified on the command line must be entered once.

// expected-note@base.map:1 {{file entered 2 times}}
// expected-note@mod4.map:1 {{file entered 2 times}}
// expected-note@mod1.map:1 {{file entered 1 time}}
// expected-note@mod2.map:1 {{file entered 1 time}}
// expected-note@mod3.map:1 {{file entered 1 time}}
// expected-note@* + {{file entered}}


//--- vector.h
#ifndef VECTOR_H
#define VECTOR_H
#endif

//--- mod1.h
#ifndef MOD1
#define MOD1
#include "vector.h"
int mod1();
#endif
//--- mod2.h
#ifndef MOD2
#define MOD2
#include "vector.h"
#include "mod1.h"
int mod2();
#endif
//--- mod3.h
#ifndef MOD3
#define MOD3
#include "vector.h"
#include "mod2.h"
int mod3();
#endif
//--- mod4.h
#ifndef MOD4
#define MOD4
#include "vector.h"
#include "mod3.h"
int mod4();
#endif
480 changes: 240 additions & 240 deletions clang/test/ParserOpenACC/parse-clauses.c
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Large diffs are not rendered by default.

24 changes: 12 additions & 12 deletions clang/test/ParserOpenACC/parse-clauses.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3,20 +3,20 @@
template<unsigned I, typename T>
void templ() {
#pragma acc loop collapse(I)
for(;;)
for(;;)
for(;;)
for(;;)
for(;;)
for(;;)
for(;;);
for(int i = 0; i < 5;++i)
for(int j = 0; j < 5; ++j)
for(int k = 0; k < 5; ++k)
for(int l = 0; l < 5; ++l)
for(int m = 0; m < 5; ++m)
for(int n = 0; n < 5; ++n)
for(int o = 0; o < 5; ++o);

#pragma acc loop collapse(T::value)
for(;;)
for(;;)
for(;;)
for(;;)
for(;;)
for(int i = 0;i < 5;++i)
for(int j = 0; j < 5; ++j)
for(int k = 0; k < 5; ++k)
for(int l = 0; l < 5; ++l)
for(int m = 0; m < 5;++m)
for(;;)
for(;;);

Expand Down
2 changes: 1 addition & 1 deletion clang/test/ParserOpenACC/parse-constructs.c
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Original file line number Diff line number Diff line change
Expand Up @@ -84,7 +84,7 @@ void func() {
for(;;){}
// expected-error@+1{{invalid OpenACC clause 'clause'}}
#pragma acc loop clause list
for(;;){}
for(int i = 0; i < 6;++i){}
// expected-error@+1{{invalid OpenACC clause 'invalid'}}
#pragma acc parallel invalid clause list
for(;;){}
Expand Down
18 changes: 18 additions & 0 deletions clang/test/Preprocessor/riscv-target-features.c
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Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,7 @@
// CHECK-NOT: __riscv_smaia {{.*$}}
// CHECK-NOT: __riscv_smcdeleg {{.*$}}
// CHECK-NOT: __riscv_smcsrind {{.*$}}
// CHECK-NOT: __riscv_smdbltrp {{.*$}}
// CHECK-NOT: __riscv_smepmp {{.*$}}
// CHECK-NOT: __riscv_smrnmi {{.*$}}
// CHECK-NOT: __riscv_smstateen {{.*$}}
Expand All @@ -39,6 +40,7 @@
// CHECK-NOT: __riscv_sscofpmf {{.*$}}
// CHECK-NOT: __riscv_sscounterenw {{.*$}}
// CHECK-NOT: __riscv_sscsrind {{.*$}}
// CHECK-NOT: __riscv_ssdbltrp {{.*$}}
// CHECK-NOT: __riscv_ssqosid{{.*$}}
// CHECK-NOT: __riscv_ssstateen {{.*$}}
// CHECK-NOT: __riscv_ssstrict {{.*$}}
Expand Down Expand Up @@ -1444,6 +1446,22 @@
// RUN: -o - | FileCheck --check-prefix=CHECK-SSCSRIND-EXT %s
// CHECK-SSCSRIND-EXT: __riscv_sscsrind 1000000{{$}}

// RUN: %clang --target=riscv32 \
// RUN: -march=rv32ismdbltrp1p0 -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-SMDBLTRP-EXT %s
// RUN: %clang --target=riscv64 \
// RUN: -march=rv64ismdbltrp1p0 -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-SMDBLTRP-EXT %s
// CHECK-SMDBLTRP-EXT: __riscv_smdbltrp 1000000{{$}}

// RUN: %clang --target=riscv32 \
// RUN: -march=rv32issdbltrp1p0 -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-SSDBLTRP-EXT %s
// RUN: %clang --target=riscv64 \
// RUN: -march=rv64issdbltrp1p0 -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-SSDBLTRP-EXT %s
// CHECK-SSDBLTRP-EXT: __riscv_ssdbltrp 1000000{{$}}

// RUN: %clang --target=riscv32 \
// RUN: -march=rv32i_ssqosid1p0 -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-SSQOSID-EXT %s
Expand Down
12 changes: 12 additions & 0 deletions clang/test/Preprocessor/x86_target_features.c
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Original file line number Diff line number Diff line change
Expand Up @@ -558,6 +558,18 @@

// NO-AMX-TRANSPOSE-NOT: #define __AMX_TRANSPOSE__ 1

// RUN: %clang -target x86_64-unknown-linux-gnu -march=x86-64 -mamx-avx512 -x c \
// RUN: -E -dM -o - %s | FileCheck -check-prefix=AMX-AVX512 %s

// AMX-AVX512: #define __AMX_AVX512__ 1

// RUN: %clang -target x86_64-unknown-linux-gnu -march=x86-64 -mno-amx-avx512 -x c \
// RUN: -E -dM -o - %s | FileCheck -check-prefix=NO-AMX-AVX512 %s
// RUN: %clang -target x86_64-unknown-linux-gnu -march=x86-64 -mamx-avx512 -mno-amx-tile \
// RUN: -x c -E -dM -o - %s | FileCheck -check-prefix=NO-AMX-AVX512 %s

// NO-AMX-AVX512-NOT: #define __AMX_AVX512__ 1

// RUN: %clang -target i386-unknown-unknown -march=atom -mavxvnni -x c -E -dM -o - %s | FileCheck -match-full-lines --check-prefix=AVXVNNI %s

// AVXVNNI: #define __AVX2__ 1
Expand Down
2 changes: 1 addition & 1 deletion clang/test/Sema/aarch64-cpu-supports.c
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Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ int test_aarch64_features(void) {
if (__builtin_cpu_supports("sve2,sve"))
return 4;
// expected-warning@+1 {{invalid cpu feature string}}
if (__builtin_cpu_supports("dgh+sve2-pmull"))
if (__builtin_cpu_supports("aes+sve2-pmull"))
return 5;
// expected-warning@+1 {{invalid cpu feature string}}
if (__builtin_cpu_supports("default"))
Expand Down
8 changes: 8 additions & 0 deletions clang/test/Sema/attr-lifetimebound.c
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@@ -0,0 +1,8 @@
// RUN: %clang_cc1 -std=c99 -verify %s

int *f(int* p __attribute__((lifetimebound)));

int *g() {
int i;
return f(&i); // expected-warning {{address of stack memory associated with local variable 'i' returned}}
}
14 changes: 12 additions & 2 deletions clang/test/Sema/attr-nonblocking-constraints.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -388,7 +388,7 @@ void nb26() [[clang::nonblocking]] {
abort_wrapper(); // no diagnostic
}

// --- Make sure we don't traverse a requires clause. ---
// --- Make sure we don't traverse requires and noexcept clauses. ---

// Apparently some requires clauses are able to be collapsed into a constant before the nonblocking
// analysis sees any function calls. This example (extracted from a real-world case where
Expand Down Expand Up @@ -420,6 +420,7 @@ class expected {
constexpr expected()
{}

// This is a deliberate corruption of the real implementation for simplicity.
constexpr expected(const expected&)
requires(is_copy_constructible_v<_Tp> && is_copy_constructible_v<_Err>)
= default;
Expand All @@ -428,11 +429,20 @@ class expected {
void test() [[clang::nonblocking]]
{
expected<int, int> a;
auto b = a;
auto b = a; // Copy constructor.
}

} // namespace ExpectedTest

// Make sure a function call in a noexcept() clause is ignored.
constexpr bool foo() [[clang::nonblocking(false)]] { return true; }
void nb27() noexcept(foo()) [[clang::nonblocking]] {}

// Make sure that simple type traits don't cause violations.
void nb28() [[clang::nonblocking]] {
bool x = __is_constructible(int, const int&);
}

// --- nonblocking implies noexcept ---
#pragma clang diagnostic warning "-Wperf-constraint-implies-noexcept"

Expand Down
5 changes: 2 additions & 3 deletions clang/test/Sema/attr-target-clones-aarch64.c
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Original file line number Diff line number Diff line change
Expand Up @@ -19,10 +19,9 @@ int __attribute__((target_clones("sve+dotprod"))) redecl3(void);
int redecl3(void);

int __attribute__((target_clones("rng", "fp16fml+fp", "default"))) redecl4(void);
// expected-error@+3 {{'target_clones' attribute does not match previous declaration}}
// expected-error@+2 {{'target_clones' attribute does not match previous declaration}}
// expected-note@-2 {{previous declaration is here}}
// expected-warning@+1 {{version list contains entries that don't impact code generation}}
int __attribute__((target_clones("dgh", "bf16+dpb", "default"))) redecl4(void) { return 1; }
int __attribute__((target_clones("dit", "bf16+dpb", "default"))) redecl4(void) { return 1; }

int __attribute__((target_version("flagm2"))) redef2(void) { return 1; }
// expected-error@+2 {{multiversioned function redeclarations require identical target attributes}}
Expand Down
4 changes: 2 additions & 2 deletions clang/test/Sema/declspec.c
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Original file line number Diff line number Diff line change
Expand Up @@ -16,9 +16,9 @@ int gv2;
static void buggy(int *x) { }

// Type qualifiers.
typedef int f(void);
typedef int f(void);
typedef f* fptr;
const f* v1; // expected-warning {{qualifier on function type 'f' (aka 'int (void)') has unspecified behavior}}
const f* v1; // expected-warning {{'const' qualifier on function type 'f' (aka 'int (void)') has no effect and is a Clang extension}}
__restrict__ f* v2; // expected-error {{restrict requires a pointer or reference ('f' (aka 'int (void)') is invalid)}}
__restrict__ fptr v3; // expected-error {{pointer to function type 'f' (aka 'int (void)') may not be 'restrict' qualified}}
f *__restrict__ v4; // expected-error {{pointer to function type 'f' (aka 'int (void)') may not be 'restrict' qualified}}
Expand Down
2 changes: 1 addition & 1 deletion clang/test/SemaOpenACC/compute-construct-async-clause.c
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Original file line number Diff line number Diff line change
Expand Up @@ -41,5 +41,5 @@ void Test() {

// expected-error@+1{{OpenACC 'async' clause is not valid on 'loop' directive}}
#pragma acc loop async(1)
for(;;);
for(int i = 5; i < 10;++i);
}
2 changes: 1 addition & 1 deletion clang/test/SemaOpenACC/compute-construct-attach-clause.c
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Original file line number Diff line number Diff line change
Expand Up @@ -61,5 +61,5 @@ void uses() {

// expected-error@+1{{OpenACC 'attach' clause is not valid on 'loop' directive}}
#pragma acc loop attach(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
}
6 changes: 3 additions & 3 deletions clang/test/SemaOpenACC/compute-construct-copy-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -62,11 +62,11 @@ void uses(int IntParam, short *PointerParam, float ArrayParam[5], Complete Compo

// expected-error@+1{{OpenACC 'copy' clause is not valid on 'loop' directive}}
#pragma acc loop copy(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
// expected-error@+1{{OpenACC 'pcopy' clause is not valid on 'loop' directive}}
#pragma acc loop pcopy(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
// expected-error@+1{{OpenACC 'present_or_copy' clause is not valid on 'loop' directive}}
#pragma acc loop present_or_copy(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
}
6 changes: 3 additions & 3 deletions clang/test/SemaOpenACC/compute-construct-copyin-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -68,11 +68,11 @@ void uses(int IntParam, short *PointerParam, float ArrayParam[5], Complete Compo

// expected-error@+1{{OpenACC 'copyin' clause is not valid on 'loop' directive}}
#pragma acc loop copyin(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
// expected-error@+1{{OpenACC 'pcopyin' clause is not valid on 'loop' directive}}
#pragma acc loop pcopyin(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
// expected-error@+1{{OpenACC 'present_or_copyin' clause is not valid on 'loop' directive}}
#pragma acc loop present_or_copyin(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
}
6 changes: 3 additions & 3 deletions clang/test/SemaOpenACC/compute-construct-copyout-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -68,11 +68,11 @@ void uses(int IntParam, short *PointerParam, float ArrayParam[5], Complete Compo

// expected-error@+1{{OpenACC 'copyout' clause is not valid on 'loop' directive}}
#pragma acc loop copyout(LocalInt)
for(;;);
for(int i = 0; i < 6;++i);
// expected-error@+1{{OpenACC 'pcopyout' clause is not valid on 'loop' directive}}
#pragma acc loop pcopyout(LocalInt)
for(;;);
for(int i = 0; i < 6;++i);
// expected-error@+1{{OpenACC 'present_or_copyout' clause is not valid on 'loop' directive}}
#pragma acc loop present_or_copyout(LocalInt)
for(;;);
for(int i = 0; i < 6;++i);
}
6 changes: 3 additions & 3 deletions clang/test/SemaOpenACC/compute-construct-create-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -69,11 +69,11 @@ void uses(int IntParam, short *PointerParam, float ArrayParam[5], Complete Compo

// expected-error@+1{{OpenACC 'create' clause is not valid on 'loop' directive}}
#pragma acc loop create(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
// expected-error@+1{{OpenACC 'pcreate' clause is not valid on 'loop' directive}}
#pragma acc loop pcreate(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
// expected-error@+1{{OpenACC 'present_or_create' clause is not valid on 'loop' directive}}
#pragma acc loop present_or_create(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
}
10 changes: 5 additions & 5 deletions clang/test/SemaOpenACC/compute-construct-default-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -23,18 +23,18 @@ void SingleOnly() {
// expected-warning@+2{{OpenACC clause 'default' not yet implemented}}
// expected-warning@+1{{OpenACC clause 'copy' not yet implemented}}
#pragma acc parallel loop self default(present) private(i) default(none) copy(i)
while(0);
for(int i = 0; i < 5; ++i);

// expected-warning@+3{{OpenACC clause 'self' not yet implemented, clause ignored}}
// expected-warning@+2{{OpenACC construct 'serial loop' not yet implemented}}
// expected-error@+1{{expected '('}}
#pragma acc serial loop self default private(i) default(none) if(i)
while(0);
for(int i = 0; i < 5; ++i);

// expected-warning@+2{{OpenACC construct 'kernels loop' not yet implemented}}
// expected-warning@+1{{OpenACC clause 'default' not yet implemented}}
#pragma acc kernels loop default(none)
while(0);
for(int i = 0; i < 5; ++i);

// expected-warning@+2{{OpenACC construct 'data' not yet implemented}}
// expected-warning@+1{{OpenACC clause 'default' not yet implemented}}
Expand All @@ -43,7 +43,7 @@ void SingleOnly() {

// expected-error@+1{{OpenACC 'default' clause is not valid on 'loop' directive}}
#pragma acc loop default(none)
for(;;);
for(int i = 5; i < 10;++i);

// expected-warning@+2{{OpenACC construct 'wait' not yet implemented}}
// expected-error@+1{{OpenACC 'default' clause is not valid on 'wait' directive}}
Expand All @@ -52,5 +52,5 @@ void SingleOnly() {

// expected-error@+1{{OpenACC 'default' clause is not valid on 'loop' directive}}
#pragma acc loop default(present)
for(;;);
for(int i = 5; i < 10;++i);
}
2 changes: 1 addition & 1 deletion clang/test/SemaOpenACC/compute-construct-deviceptr-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -61,5 +61,5 @@ void uses() {

// expected-error@+1{{OpenACC 'deviceptr' clause is not valid on 'loop' directive}}
#pragma acc loop deviceptr(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
}
2 changes: 1 addition & 1 deletion clang/test/SemaOpenACC/compute-construct-firstprivate-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -55,5 +55,5 @@ void uses(int IntParam, short *PointerParam, float ArrayParam[5], Complete Compo

// expected-error@+1{{OpenACC 'firstprivate' clause is not valid on 'loop' directive}}
#pragma acc loop firstprivate(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
}
8 changes: 4 additions & 4 deletions clang/test/SemaOpenACC/compute-construct-if-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -50,17 +50,17 @@ void BoolExpr(int *I, float *F) {
// expected-warning@+2{{OpenACC construct 'parallel loop' not yet implemented}}
// expected-warning@+1{{OpenACC clause 'if' not yet implemented}}
#pragma acc parallel loop if (*I < *F)
while(0);
for(int i = 0; i < 5; ++i);
// expected-warning@+2{{OpenACC construct 'serial loop' not yet implemented}}
// expected-warning@+1{{OpenACC clause 'if' not yet implemented}}
#pragma acc serial loop if (*I < *F)
while(0);
for(int i = 0; i < 5; ++i);
// expected-warning@+2{{OpenACC construct 'kernels loop' not yet implemented}}
// expected-warning@+1{{OpenACC clause 'if' not yet implemented}}
#pragma acc kernels loop if (*I < *F)
while(0);
for(int i = 0; i < 5; ++i);

// expected-error@+1{{OpenACC 'if' clause is not valid on 'loop' directive}}
#pragma acc loop if(I)
for(;;);
for(int i = 5; i < 10;++i);
}
2 changes: 1 addition & 1 deletion clang/test/SemaOpenACC/compute-construct-no_create-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -54,5 +54,5 @@ void uses(int IntParam, short *PointerParam, float ArrayParam[5], Complete Compo

// expected-error@+1{{OpenACC 'no_create' clause is not valid on 'loop' directive}}
#pragma acc loop no_create(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
}
2 changes: 1 addition & 1 deletion clang/test/SemaOpenACC/compute-construct-num_gangs-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -54,5 +54,5 @@ void Test() {

// expected-error@+1{{OpenACC 'num_gangs' clause is not valid on 'loop' directive}}
#pragma acc loop num_gangs(1)
for(;;);
for(int i = 5; i < 10;++i);
}
2 changes: 1 addition & 1 deletion clang/test/SemaOpenACC/compute-construct-num_workers-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -33,5 +33,5 @@ void Test() {

// expected-error@+1{{OpenACC 'num_workers' clause is not valid on 'loop' directive}}
#pragma acc loop num_workers(1)
for(;;);
for(int i = 5; i < 10;++i);
}
2 changes: 1 addition & 1 deletion clang/test/SemaOpenACC/compute-construct-present-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -54,5 +54,5 @@ void uses(int IntParam, short *PointerParam, float ArrayParam[5], Complete Compo

// expected-error@+1{{OpenACC 'present' clause is not valid on 'loop' directive}}
#pragma acc loop present(LocalInt)
for(;;);
for(int i = 5; i < 10;++i);
}
2 changes: 1 addition & 1 deletion clang/test/SemaOpenACC/compute-construct-self-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -82,5 +82,5 @@ void WarnMaybeNotUsed(int val1, int val2) {

// expected-error@+1{{OpenACC 'self' clause is not valid on 'loop' directive}}
#pragma acc loop self
for(;;);
for(int i = 5; i < 10;++i);
}
2 changes: 1 addition & 1 deletion clang/test/SemaOpenACC/compute-construct-vector_length-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -33,5 +33,5 @@ void Test() {

// expected-error@+1{{OpenACC 'vector_length' clause is not valid on 'loop' directive}}
#pragma acc loop vector_length(1)
for(;;);
for(int i = 5; i < 10;++i);
}
2 changes: 1 addition & 1 deletion clang/test/SemaOpenACC/compute-construct-wait-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -38,5 +38,5 @@ void uses() {

// expected-error@+1{{OpenACC 'wait' clause is not valid on 'loop' directive}}
#pragma acc loop wait
for(;;);
for(int i = 5; i < 10;++i);
}
104 changes: 70 additions & 34 deletions clang/test/SemaOpenACC/loop-ast.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13,13 +13,19 @@ void NormalFunc() {
// CHECK-NEXT: CompoundStmt

#pragma acc loop
for(;;);
for(int i = 0; i < 5;++i);
// CHECK-NEXT: OpenACCLoopConstruct{{.*}} <orphan>
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl {{.*}} used i 'int'
// CHECK-NEXT: IntegerLiteral {{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>
// CHECK-NEXT: BinaryOperator{{.*}}'bool' '<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr
// CHECK-NEXT: IntegerLiteral {{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}} prefix '++'
// CHECK-NEXT: DeclRefExpr{{.*}} 'i' 'int'
// CHECK-NEXT: NullStmt

int array[5];
Expand All @@ -36,17 +42,23 @@ void NormalFunc() {
// CHECK-NEXT: CompoundStmt
{
#pragma acc parallel
// CHECK-NEXT: OpenACCComputeConstruct [[PAR_ADDR:[0-9a-fx]+]] {{.*}}parallel
// CHECK-NEXT: OpenACCComputeConstruct {{.*}}parallel
// CHECK-NEXT: CompoundStmt
{
#pragma acc loop
for(;;);
// CHECK-NEXT: OpenACCLoopConstruct{{.*}} parent: [[PAR_ADDR]]
for(int i = 0; i < 5;++i);
// CHECK-NEXT: OpenACCLoopConstruct{{.*}} parent: parallel
// CHECK-NEXT: ForStmt
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl {{.*}} used i 'int'
// CHECK-NEXT: IntegerLiteral {{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'bool' '<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr
// CHECK-NEXT: IntegerLiteral {{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}} prefix '++'
// CHECK-NEXT: DeclRefExpr{{.*}} 'i' 'int'
// CHECK-NEXT: NullStmt
}
}
Expand Down Expand Up @@ -79,33 +91,45 @@ void TemplFunc() {

}

#pragma acc parallel
#pragma acc serial
{
// CHECK-NEXT: OpenACCComputeConstruct {{.*}}parallel
// CHECK-NEXT: OpenACCComputeConstruct {{.*}}serial
// CHECK-NEXT: CompoundStmt
#pragma acc parallel
{
// CHECK-NEXT: OpenACCComputeConstruct [[PAR_ADDR_UNINST:[0-9a-fx]+]] {{.*}}parallel
// CHECK-NEXT: OpenACCComputeConstruct {{.*}}parallel
// CHECK-NEXT: CompoundStmt
#pragma acc loop
// CHECK-NEXT: OpenACCLoopConstruct{{.*}} parent: [[PAR_ADDR_UNINST]]
// CHECK-NEXT: OpenACCLoopConstruct{{.*}} parent: parallel
// CHECK-NEXT: ForStmt
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl {{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral {{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'bool' '<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr
// CHECK-NEXT: IntegerLiteral {{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}} prefix '++'
// CHECK-NEXT: DeclRefExpr{{.*}} 'i' 'int'
// CHECK-NEXT: NullStmt
for(;;);
for(int i = 0; i < 5;++i);

#pragma acc loop
// CHECK-NEXT: OpenACCLoopConstruct{{.*}} parent: [[PAR_ADDR_UNINST]]
// CHECK-NEXT: OpenACCLoopConstruct{{.*}} parent: parallel
// CHECK-NEXT: ForStmt
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl {{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral {{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'bool' '<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr
// CHECK-NEXT: IntegerLiteral {{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}} prefix '++'
// CHECK-NEXT: DeclRefExpr{{.*}} 'i' 'int'
// CHECK-NEXT: NullStmt
for(;;);
for(int i = 0; i < 5;++i);
}
}

Expand Down Expand Up @@ -142,26 +166,38 @@ void TemplFunc() {
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} I 'typename S::type':'int'

// CHECK-NEXT: OpenACCComputeConstruct {{.*}}parallel
// CHECK-NEXT: OpenACCComputeConstruct {{.*}}serial
// CHECK-NEXT: CompoundStmt
//
// CHECK-NEXT: OpenACCComputeConstruct [[PAR_ADDR_INST:[0-9a-fx]+]] {{.*}}parallel
// CHECK-NEXT: OpenACCComputeConstruct {{.*}}parallel
// CHECK-NEXT: CompoundStmt

// CHECK-NEXT: OpenACCLoopConstruct{{.*}} parent: [[PAR_ADDR_INST]]
// CHECK-NEXT: OpenACCLoopConstruct{{.*}} parent: parallel
// CHECK-NEXT: ForStmt
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl {{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral {{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'bool' '<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr
// CHECK-NEXT: IntegerLiteral {{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}} prefix '++'
// CHECK-NEXT: DeclRefExpr{{.*}} 'i' 'int'
// CHECK-NEXT: NullStmt

// CHECK-NEXT: OpenACCLoopConstruct{{.*}} parent: [[PAR_ADDR_INST]]
// CHECK-NEXT: OpenACCLoopConstruct{{.*}} parent: parallel
// CHECK-NEXT: ForStmt
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl {{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral {{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'bool' '<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr
// CHECK-NEXT: IntegerLiteral {{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}} prefix '++'
// CHECK-NEXT: DeclRefExpr{{.*}} 'i' 'int'
// CHECK-NEXT: NullStmt

// CHECK-NEXT: DeclStmt
Expand Down
92 changes: 64 additions & 28 deletions clang/test/SemaOpenACC/loop-construct-auto_seq_independent-ast.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -11,14 +11,20 @@ void NormalUses() {
// CHECK-NEXT: CompoundStmt

#pragma acc loop auto
for(;;){}
for(int i = 0; i < 5; ++i){}
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: auto clause
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt

#pragma acc loop seq
Expand All @@ -33,14 +39,20 @@ void NormalUses() {
// CHECK-NEXT: CompoundStmt

#pragma acc loop independent
for(;;){}
for(int i = 0; i < 5; ++i){}
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: independent clause
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt
}

Expand All @@ -52,14 +64,20 @@ void TemplUses() {
// CHECK-NEXT: CompoundStmt

#pragma acc loop auto
for(;;){}
for(int i = 0; i < 5; ++i){}
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: auto clause
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt

#pragma acc loop seq
Expand All @@ -74,14 +92,20 @@ void TemplUses() {
// CHECK-NEXT: CompoundStmt

#pragma acc loop independent
for(;;){}
for(int i = 0; i < 5; ++i){}
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: independent clause
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt

// Instantiations.
Expand All @@ -93,10 +117,16 @@ void TemplUses() {
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: auto clause
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt

// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
Expand All @@ -111,10 +141,16 @@ void TemplUses() {
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: independent clause
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt
}

Expand Down
590 changes: 295 additions & 295 deletions clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
View file

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152 changes: 106 additions & 46 deletions clang/test/SemaOpenACC/loop-construct-collapse-ast.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -16,21 +16,27 @@ void NormalUses() {
// CHECK-NEXT: CompoundStmt

#pragma acc loop collapse(1)
for(;;);
for(int i = 0; i < 5; ++i);
// CHECK-NEXT: OpenACCLoopConstruct
// CHECK-NEXT: collapse clause
// CHECK-NEXT: ConstantExpr{{.*}}'int'
// CHECK-NEXT: value: Int 1
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 1
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: NullStmt

#pragma acc loop collapse(force:S{})
for(;;);
for(int i = 0; i < 5; ++i);
// CHECK-NEXT: OpenACCLoopConstruct
// CHECK-NEXT: collapse clause
// CHECK-NEXT: ConstantExpr{{.*}}'int'
Expand All @@ -41,10 +47,16 @@ void NormalUses() {
// CHECK-NEXT: MaterializeTemporaryExpr{{.*}}'S' lvalue
// CHECK-NEXT: CXXTemporaryObjectExpr{{.*}}'S' 'void ()' list
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: NullStmt
}

Expand All @@ -57,42 +69,66 @@ void TemplUses() {
// CHECK-NEXT: CompoundStmt

#pragma acc loop collapse(Value)
for(;;)
for(;;);
for(int i = 0; i < 5; ++i)
for(int j = 0; j < 5; ++j);
// CHECK-NEXT: OpenACCLoopConstruct
// CHECK-NEXT: collapse clause
// CHECK-NEXT: DeclRefExpr{{.*}} 'unsigned int' NonTypeTemplateParm{{.*}} 'Value'
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} j 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'j' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'j' 'int'
// CHECK-NEXT: NullStmt

#pragma acc loop collapse(force:T{} + S{})
for(;;)
for(;;);
for(int i = 0; i < 5; ++i)
for(int j = 0; j < 5; ++j);
// CHECK-NEXT: OpenACCLoopConstruct
// CHECK-NEXT: collapse clause
// CHECK-NEXT: BinaryOperator {{.*}}'+'
// CHECK-NEXT: CXXUnresolvedConstructExpr{{.*}}'T' 'T' list
// CHECK-NEXT: InitListExpr
// CHECK-NEXT: CXXTemporaryObjectExpr{{.*}}'S' 'void ()' list
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} j 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'j' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'j' 'int'
// CHECK-NEXT: NullStmt

// Instantiation:
Expand All @@ -111,15 +147,27 @@ void TemplUses() {
// CHECK-NEXT: NonTypeTemplateParmDecl
// CHECK-NEXT: IntegerLiteral {{.*}} 'unsigned int' 2
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} j 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'j' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'j' 'int'
// CHECK-NEXT: NullStmt

// CHECK-NEXT: OpenACCLoopConstruct
Expand All @@ -138,15 +186,27 @@ void TemplUses() {
// CHECK-NEXT: MaterializeTemporaryExpr{{.*}}'S' lvalue
// CHECK-NEXT: CXXTemporaryObjectExpr{{.*}}'S' 'void ()' list
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} j 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'j' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'j' 'int'
// CHECK-NEXT: NullStmt

}
Expand Down
248 changes: 133 additions & 115 deletions clang/test/SemaOpenACC/loop-construct-collapse-clause.cpp
View file

Large diffs are not rendered by default.

126 changes: 87 additions & 39 deletions clang/test/SemaOpenACC/loop-construct-device_type-ast.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,70 +20,106 @@ void NormalUses() {
// CHECK-NEXT: VarDecl{{.*}} SomeVar 'bool'

#pragma acc loop device_type(SomeS) dtype(SomeImpl)
for(;;){}
for(int i = 0; i < 5; ++i){}
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: device_type(SomeS)
// CHECK-NEXT: dtype(SomeImpl)
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt
#pragma acc loop device_type(SomeVar) dtype(int)
for(;;){}
for(int i = 0; i < 5; ++i){}
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: device_type(SomeVar)
// CHECK-NEXT: dtype(int)
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt
#pragma acc loop device_type(private) dtype(struct)
for(;;){}
for(int i = 0; i < 5; ++i){}
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: device_type(private)
// CHECK-NEXT: dtype(struct)
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt
#pragma acc loop device_type(private) dtype(class)
for(;;){}
for(int i = 0; i < 5; ++i){}
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: device_type(private)
// CHECK-NEXT: dtype(class)
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt
#pragma acc loop device_type(float) dtype(*)
for(;;){}
for(int i = 0; i < 5; ++i){}
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: device_type(float)
// CHECK-NEXT: dtype(*)
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt
#pragma acc loop device_type(float, int) dtype(*)
for(;;){}
for(int i = 0; i < 5; ++i){}
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: device_type(float, int)
// CHECK-NEXT: dtype(*)
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt
}

Expand All @@ -94,15 +130,21 @@ void TemplUses() {
// CHECK-NEXT: FunctionDecl{{.*}}TemplUses
// CHECK-NEXT: CompoundStmt
#pragma acc loop device_type(T) dtype(T)
for(;;){}
for(int i = 0; i < 5; ++i){}
// CHECK-NEXT: OpenACCLoopConstruct{{.*}}
// CHECK-NEXT: device_type(T)
// CHECK-NEXT: dtype(T)
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt


Expand All @@ -116,10 +158,16 @@ void TemplUses() {
// CHECK-NEXT: device_type(T)
// CHECK-NEXT: dtype(T)
// CHECK-NEXT: ForStmt
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: DeclStmt
// CHECK-NEXT: VarDecl{{.*}} i 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 0
// CHECK-NEXT: <<<NULL>>>
// CHECK-NEXT: BinaryOperator{{.*}}'<'
// CHECK-NEXT: ImplicitCastExpr
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: IntegerLiteral{{.*}} 'int' 5
// CHECK-NEXT: UnaryOperator{{.*}}++
// CHECK-NEXT: DeclRefExpr{{.*}}'i' 'int'
// CHECK-NEXT: CompoundStmt
}

Expand Down
118 changes: 59 additions & 59 deletions clang/test/SemaOpenACC/loop-construct-device_type-clause.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,193 +7,193 @@ void uses() {
STy SImpl;

#pragma acc loop device_type(I)
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop device_type(S) dtype(STy)
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop dtype(SImpl)
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop dtype(int) device_type(*)
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop dtype(true) device_type(false)
for(;;);
for(int i = 0; i < 5; ++i);

// expected-error@+1{{expected identifier}}
#pragma acc loop dtype(int, *)
for(;;);
for(int i = 0; i < 5; ++i);

#pragma acc loop device_type(I, int)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{expected ','}}
// expected-error@+1{{expected identifier}}
#pragma acc loop dtype(int{})
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{expected identifier}}
#pragma acc loop dtype(5)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{expected identifier}}
#pragma acc loop dtype(MACRO)
for(;;);
for(int i = 0; i < 5; ++i);


// Only 'collapse', 'gang', 'worker', 'vector', 'seq', 'independent', 'auto',
// and 'tile' allowed after 'device_type'.

#pragma acc loop device_type(*) vector
for(;;);
for(int i = 0; i < 5; ++i);

// expected-error@+2{{OpenACC clause 'finalize' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) finalize
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'if_present' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) if_present
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop device_type(*) seq
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop device_type(*) independent
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop device_type(*) auto
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop device_type(*) worker
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'nohost' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) nohost
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'default' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) default(none)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'if' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) if(1)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'self' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) self
for(;;);
for(int i = 0; i < 5; ++i);

int Var;
int *VarPtr;
// expected-error@+1{{OpenACC 'copy' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) copy(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'pcopy' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) pcopy(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'present_or_copy' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) present_or_copy(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'use_device' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) use_device(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'attach' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) attach(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'delete' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) delete(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'detach' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) detach(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'device' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) device(VarPtr)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'deviceptr' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) deviceptr(VarPtr)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'device_resident' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) device_resident(VarPtr)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'firstprivate' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) firstprivate(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'host' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) host(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'link' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) link(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'no_create' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) no_create(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'present' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) present(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'private' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) private(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'copyout' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) copyout(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'pcopyout' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) pcopyout(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'present_or_copyout' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) present_or_copyout(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'copyin' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) copyin(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'pcopyin' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) pcopyin(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'present_or_copyin' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) present_or_copyin(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'create' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) create(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'pcreate' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) pcreate(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'present_or_create' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) present_or_create(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'reduction' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) reduction(+:Var)
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop device_type(*) collapse(1)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'bind' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) bind(Var)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'vector_length' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) vector_length(1)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'num_gangs' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) num_gangs(1)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'num_workers' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) num_workers(1)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'device_num' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) device_num(1)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{OpenACC clause 'default_async' may not follow a 'device_type' clause in a 'loop' construct}}
// expected-note@+1{{previous clause is here}}
#pragma acc loop device_type(*) default_async(1)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'async' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) async
for(;;);
for(int i = 0; i < 5; ++i);

#pragma acc loop device_type(*) tile(*, 1)
for(;;)
for(;;);
for(int j = 0; j < 5; ++j)
for(int i = 0; i < 5; ++i);

#pragma acc loop dtype(*) gang
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+1{{OpenACC 'wait' clause is not valid on 'loop' directive}}
#pragma acc loop device_type(*) wait
for(;;);
for(int i = 0; i < 5; ++i);
}
14 changes: 7 additions & 7 deletions clang/test/SemaOpenACC/loop-construct-device_type-clause.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,21 +3,21 @@
template<typename T>
void TemplUses() {
#pragma acc loop device_type(I)
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop dtype(*)
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop device_type(class)
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop device_type(private)
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc loop device_type(bool)
for(;;);
for(int i = 0; i < 5; ++i);
#pragma acc kernels dtype(true) device_type(false)
for(;;);
for(int i = 0; i < 5; ++i);
// expected-error@+2{{expected ','}}
// expected-error@+1{{expected identifier}}
#pragma acc loop device_type(T::value)
for(;;);
for(int i = 0; i < 5; ++i);
}

void Inst() {
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