2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/emutls.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -211,7 +211,7 @@ define dso_local i8 @f13() {
; X86-LABEL: f13:
; X86: movl $__emutls_v.b1, (%esp)
; X86-NEXT: calll __emutls_get_address
; X86-NEXT: movzbl (%eax), %eax
; X86-NEXT: movb (%eax), %al
; X86-NEXT: addl $12, %esp
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
Expand Down
486 changes: 243 additions & 243 deletions llvm/test/CodeGen/X86/extract-bits.ll
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/extract-insert.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ define i32 @extractelt_undef_insertelt(i32 %x, i32 %y) {
define i8 @extractelt_bitcast(i32 %x) nounwind {
; X86-LABEL: extractelt_bitcast:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: retl
;
; X64-LABEL: extractelt_bitcast:
Expand Down Expand Up @@ -87,7 +87,7 @@ define i16 @trunc_i64_to_i16_le(i64 %x) {
define i8 @trunc_i32_to_i8_le(i32 %x) {
; X86-LABEL: trunc_i32_to_i8_le:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: retl
;
; X64-LABEL: trunc_i32_to_i8_le:
Expand Down
212 changes: 106 additions & 106 deletions llvm/test/CodeGen/X86/extract-lowbits.ll
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8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/extractelement-index.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -427,14 +427,14 @@ define i8 @extractelement_v16i8_var(<16 x i8> %a, i256 %i) nounwind {
; SSE: # %bb.0:
; SSE-NEXT: andl $15, %edi
; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; SSE-NEXT: movzbl -24(%rsp,%rdi), %eax
; SSE-NEXT: movb -24(%rsp,%rdi), %al
; SSE-NEXT: retq
;
; AVX-LABEL: extractelement_v16i8_var:
; AVX: # %bb.0:
; AVX-NEXT: andl $15, %edi
; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; AVX-NEXT: movzbl -24(%rsp,%rdi), %eax
; AVX-NEXT: movb -24(%rsp,%rdi), %al
; AVX-NEXT: retq
%b = extractelement <16 x i8> %a, i256 %i
ret i8 %b
Expand All @@ -446,7 +446,7 @@ define i8 @extractelement_v32i8_var(<32 x i8> %a, i256 %i) nounwind {
; SSE-NEXT: andl $31, %edi
; SSE-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; SSE-NEXT: movzbl -40(%rsp,%rdi), %eax
; SSE-NEXT: movb -40(%rsp,%rdi), %al
; SSE-NEXT: retq
;
; AVX-LABEL: extractelement_v32i8_var:
Expand All @@ -457,7 +457,7 @@ define i8 @extractelement_v32i8_var(<32 x i8> %a, i256 %i) nounwind {
; AVX-NEXT: subq $64, %rsp
; AVX-NEXT: andl $31, %edi
; AVX-NEXT: vmovaps %ymm0, (%rsp)
; AVX-NEXT: movzbl (%rsp,%rdi), %eax
; AVX-NEXT: movb (%rsp,%rdi), %al
; AVX-NEXT: movq %rbp, %rsp
; AVX-NEXT: popq %rbp
; AVX-NEXT: vzeroupper
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/fast-isel-call-bool.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ define i64 @foo(ptr %arg) {
; CHECK-LABEL: foo:
top:
%0 = load i8, ptr %arg
; CHECK: movzbl
; CHECK: movb
%1 = trunc i8 %0 to i1
; CHECK: andb $1,
%2 = call i64 @bar(i1 %1)
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/fast-isel-i1.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,7 @@ define void @test2(ptr %a) nounwind {
entry:
; clang uses i8 constants for booleans, so we test with an i8 1.
; CHECK-LABEL: test2:
; CHECK: movzbl {{.*}} %eax
; CHECK: movb {{.*}} %al
; CHECK-NEXT: xorb $1, %al
; CHECK-NEXT: testb $1
%tmp = load i8, ptr %a, align 1
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/fast-isel-sext-zext.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
define i8 @test1(i8 %x) nounwind {
; X32-LABEL: test1:
; X32: ## %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $1, %al
; X32-NEXT: negb %al
; X32-NEXT: retl
Expand Down Expand Up @@ -87,7 +87,7 @@ define i32 @test4(i32 %x) nounwind {
define i8 @test5(i8 %x) nounwind {
; X32-LABEL: test5:
; X32: ## %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $1, %al
; X32-NEXT: retl
;
Expand Down
13 changes: 4 additions & 9 deletions llvm/test/CodeGen/X86/fixup-bw-copy.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -13,15 +13,10 @@ define i8 @test_movb(i8 %a0) nounwind {
; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq
;
; BWON32-LABEL: test_movb:
; BWON32: # %bb.0:
; BWON32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; BWON32-NEXT: retl
;
; BWOFF32-LABEL: test_movb:
; BWOFF32: # %bb.0:
; BWOFF32-NEXT: movb {{[0-9]+}}(%esp), %al
; BWOFF32-NEXT: retl
; X32-LABEL: test_movb:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: retl
ret i8 %a0
}

Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/fixup-bw-inst.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -96,11 +96,11 @@ a4: ; preds = %3, %.lr.ph
ret void
}

; This test contains nothing but a simple byte load and store.
; movb encodes smaller, but we use movzbl for the load for better perf.
; This test contains nothing but a simple byte load and store. Since
; movb encodes smaller, we do not want to use movzbl unless in a tight loop.
; So this test checks that movb is used.
; CHECK-LABEL: foo3:
; BWON: movzbl
; BWOFF: movb
; CHECK: movb
; CHECK: movb
define void @foo3(ptr%dst, ptr%src) {
%t0 = load i8, ptr%src, align 1
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/X86/fold-and-shift-x86_64.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ define i8 @t1(ptr %X, i64 %i) {
; CHECK-LABEL: t1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andq $-255, %rsi
; CHECK-NEXT: movzbl (%rdi,%rsi,4), %eax
; CHECK-NEXT: movb (%rdi,%rsi,4), %al
; CHECK-NEXT: retq

entry:
Expand All @@ -20,7 +20,7 @@ define i8 @t2(ptr %X, i64 %i) {
; CHECK-LABEL: t2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andq $-14, %rsi
; CHECK-NEXT: movzbl (%rdi,%rsi,4), %eax
; CHECK-NEXT: movb (%rdi,%rsi,4), %al
; CHECK-NEXT: retq

entry:
Expand All @@ -35,7 +35,7 @@ define i8 @t3(ptr %X, i64 %i) {
; CHECK-LABEL: t3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: movzbl (%rdi,%rax,4), %eax
; CHECK-NEXT: movb (%rdi,%rax,4), %al
; CHECK-NEXT: retq

entry:
Expand All @@ -50,7 +50,7 @@ define i8 @t4(ptr %X, i64 %i) {
; CHECK-LABEL: t4:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andl $-2, %esi
; CHECK-NEXT: movzbl (%rdi,%rsi,4), %eax
; CHECK-NEXT: movb (%rdi,%rsi,4), %al
; CHECK-NEXT: retq

entry:
Expand All @@ -65,7 +65,7 @@ define i8 @t5(ptr %X, i64 %i) {
; CHECK-LABEL: t5:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andl $-250002, %esi # imm = 0xFFFC2F6E
; CHECK-NEXT: movzbl (%rdi,%rsi,4), %eax
; CHECK-NEXT: movb (%rdi,%rsi,4), %al
; CHECK-NEXT: retq

entry:
Expand All @@ -81,7 +81,7 @@ define i8 @t6(ptr %X, i32 %i) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
; CHECK-NEXT: andl $15, %esi
; CHECK-NEXT: movzbl (%rdi,%rsi,4), %eax
; CHECK-NEXT: movb (%rdi,%rsi,4), %al
; CHECK-NEXT: retq
entry:
%tmp2 = shl i32 %i, 2
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/fold-and-shift.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -94,7 +94,7 @@ define i8 @t5(ptr %X, i32 %i) {
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: andl $-14, %ecx
; CHECK-NEXT: movzbl (%eax,%ecx,4), %eax
; CHECK-NEXT: movb (%eax,%ecx,4), %al
; CHECK-NEXT: retl

entry:
Expand All @@ -111,7 +111,7 @@ define i8 @t6(ptr %X, i32 %i) {
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl $-255, %ecx
; CHECK-NEXT: andl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movzbl (%eax,%ecx,4), %eax
; CHECK-NEXT: movb (%eax,%ecx,4), %al
; CHECK-NEXT: retl

entry:
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/fp-intrinsics.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -935,7 +935,7 @@ define i8 @f20s8(double %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
Expand Down Expand Up @@ -1207,7 +1207,7 @@ define i8 @f20u8(double %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
Expand Down
14 changes: 7 additions & 7 deletions llvm/test/CodeGen/X86/fp-strict-scalar-fptoint.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,7 @@ define i1 @fptosi_f32toi1(float %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
Expand Down Expand Up @@ -114,7 +114,7 @@ define i8 @fptosi_f32toi8(float %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
Expand Down Expand Up @@ -339,7 +339,7 @@ define i1 @fptoui_f32toi1(float %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
Expand Down Expand Up @@ -386,7 +386,7 @@ define i8 @fptoui_f32toi8(float %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
Expand Down Expand Up @@ -754,7 +754,7 @@ define i8 @fptosi_f64toi8(double %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
Expand Down Expand Up @@ -979,7 +979,7 @@ define i1 @fptoui_f64toi1(double %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
Expand Down Expand Up @@ -1026,7 +1026,7 @@ define i8 @fptoui_f64toi8(double %x) #0 {
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: fistps {{[0-9]+}}(%esp)
; X87-NEXT: fldcw {{[0-9]+}}(%esp)
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: addl $8, %esp
; X87-NEXT: .cfi_def_cfa_offset 4
; X87-NEXT: retl
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ define half @sitofp_i1tof16(i1 %x) #0 {
;
; X86-LABEL: sitofp_i1tof16:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: andb $1, %al
; X86-NEXT: negb %al
; X86-NEXT: movsbl %al, %eax
Expand Down Expand Up @@ -231,7 +231,7 @@ define half @uitofp_i1tof16(i1 %x) #0 {
;
; X86-LABEL: uitofp_i1tof16:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: andb $1, %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: vcvtsi2sh %eax, %xmm0, %xmm0
Expand Down
18 changes: 9 additions & 9 deletions llvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@ define float @sitofp_i1tof32(i1 %x) #0 {
; SSE-X86: # %bb.0:
; SSE-X86-NEXT: pushl %eax
; SSE-X86-NEXT: .cfi_def_cfa_offset 8
; SSE-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; SSE-X86-NEXT: movb {{[0-9]+}}(%esp), %al
; SSE-X86-NEXT: andb $1, %al
; SSE-X86-NEXT: negb %al
; SSE-X86-NEXT: movsbl %al, %eax
Expand All @@ -58,7 +58,7 @@ define float @sitofp_i1tof32(i1 %x) #0 {
; AVX-X86: # %bb.0:
; AVX-X86-NEXT: pushl %eax
; AVX-X86-NEXT: .cfi_def_cfa_offset 8
; AVX-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; AVX-X86-NEXT: movb {{[0-9]+}}(%esp), %al
; AVX-X86-NEXT: andb $1, %al
; AVX-X86-NEXT: negb %al
; AVX-X86-NEXT: movsbl %al, %eax
Expand All @@ -82,7 +82,7 @@ define float @sitofp_i1tof32(i1 %x) #0 {
; X87: # %bb.0:
; X87-NEXT: pushl %eax
; X87-NEXT: .cfi_def_cfa_offset 8
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: andb $1, %al
; X87-NEXT: negb %al
; X87-NEXT: movsbl %al, %eax
Expand Down Expand Up @@ -313,7 +313,7 @@ define float @uitofp_i1tof32(i1 %x) #0 {
; SSE-X86: # %bb.0:
; SSE-X86-NEXT: pushl %eax
; SSE-X86-NEXT: .cfi_def_cfa_offset 8
; SSE-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; SSE-X86-NEXT: movb {{[0-9]+}}(%esp), %al
; SSE-X86-NEXT: andb $1, %al
; SSE-X86-NEXT: movzbl %al, %eax
; SSE-X86-NEXT: cvtsi2ss %eax, %xmm0
Expand All @@ -334,7 +334,7 @@ define float @uitofp_i1tof32(i1 %x) #0 {
; AVX-X86: # %bb.0:
; AVX-X86-NEXT: pushl %eax
; AVX-X86-NEXT: .cfi_def_cfa_offset 8
; AVX-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; AVX-X86-NEXT: movb {{[0-9]+}}(%esp), %al
; AVX-X86-NEXT: andb $1, %al
; AVX-X86-NEXT: movzbl %al, %eax
; AVX-X86-NEXT: vcvtsi2ss %eax, %xmm0, %xmm0
Expand All @@ -355,7 +355,7 @@ define float @uitofp_i1tof32(i1 %x) #0 {
; X87: # %bb.0:
; X87-NEXT: pushl %eax
; X87-NEXT: .cfi_def_cfa_offset 8
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: andb $1, %al
; X87-NEXT: movzbl %al, %eax
; X87-NEXT: movw %ax, {{[0-9]+}}(%esp)
Expand Down Expand Up @@ -965,7 +965,7 @@ define double @uitofp_i1tof64(i1 %x) #0 {
; SSE-X86-NEXT: .cfi_def_cfa_register %ebp
; SSE-X86-NEXT: andl $-8, %esp
; SSE-X86-NEXT: subl $8, %esp
; SSE-X86-NEXT: movzbl 8(%ebp), %eax
; SSE-X86-NEXT: movb 8(%ebp), %al
; SSE-X86-NEXT: andb $1, %al
; SSE-X86-NEXT: movzbl %al, %eax
; SSE-X86-NEXT: cvtsi2sd %eax, %xmm0
Expand All @@ -992,7 +992,7 @@ define double @uitofp_i1tof64(i1 %x) #0 {
; AVX-X86-NEXT: .cfi_def_cfa_register %ebp
; AVX-X86-NEXT: andl $-8, %esp
; AVX-X86-NEXT: subl $8, %esp
; AVX-X86-NEXT: movzbl 8(%ebp), %eax
; AVX-X86-NEXT: movb 8(%ebp), %al
; AVX-X86-NEXT: andb $1, %al
; AVX-X86-NEXT: movzbl %al, %eax
; AVX-X86-NEXT: vcvtsi2sd %eax, %xmm0, %xmm0
Expand All @@ -1014,7 +1014,7 @@ define double @uitofp_i1tof64(i1 %x) #0 {
; X87: # %bb.0:
; X87-NEXT: pushl %eax
; X87-NEXT: .cfi_def_cfa_offset 8
; X87-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X87-NEXT: movb {{[0-9]+}}(%esp), %al
; X87-NEXT: andb $1, %al
; X87-NEXT: movzbl %al, %eax
; X87-NEXT: movw %ax, {{[0-9]+}}(%esp)
Expand Down
20 changes: 10 additions & 10 deletions llvm/test/CodeGen/X86/fp80-strict-scalar.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -242,7 +242,7 @@ define i1 @fp80_to_sint1(x86_fp80 %x) #0 {
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistps {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: addl $8, %esp
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
Expand All @@ -258,7 +258,7 @@ define i1 @fp80_to_sint1(x86_fp80 %x) #0 {
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; X64-NEXT: movb -{{[0-9]+}}(%rsp), %al
; X64-NEXT: retq
%result = call i1 @llvm.experimental.constrained.fptosi.i1.f80(x86_fp80 %x,
metadata !"fpexcept.strict") #0
Expand All @@ -279,7 +279,7 @@ define i8 @fp80_to_sint8(x86_fp80 %x) #0 {
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistps {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: addl $8, %esp
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
Expand All @@ -295,7 +295,7 @@ define i8 @fp80_to_sint8(x86_fp80 %x) #0 {
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; X64-NEXT: movb -{{[0-9]+}}(%rsp), %al
; X64-NEXT: retq
%result = call i8 @llvm.experimental.constrained.fptosi.i8.f80(x86_fp80 %x,
metadata !"fpexcept.strict") #0
Expand Down Expand Up @@ -435,7 +435,7 @@ define i1 @fp80_to_uint1(x86_fp80 %x) #0 {
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistps {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: addl $8, %esp
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
Expand All @@ -451,7 +451,7 @@ define i1 @fp80_to_uint1(x86_fp80 %x) #0 {
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; X64-NEXT: movb -{{[0-9]+}}(%rsp), %al
; X64-NEXT: retq
%result = call i1 @llvm.experimental.constrained.fptoui.i1.f80(x86_fp80 %x,
metadata !"fpexcept.strict") #0
Expand All @@ -472,7 +472,7 @@ define i8 @fp80_to_uint8(x86_fp80 %x) #0 {
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistps {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: addl $8, %esp
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
Expand All @@ -488,7 +488,7 @@ define i8 @fp80_to_uint8(x86_fp80 %x) #0 {
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; X64-NEXT: movb -{{[0-9]+}}(%rsp), %al
; X64-NEXT: retq
%result = call i8 @llvm.experimental.constrained.fptoui.i8.f80(x86_fp80 %x,
metadata !"fpexcept.strict") #0
Expand Down Expand Up @@ -655,7 +655,7 @@ define x86_fp80 @sint1_to_fp80(i1 %x) #0 {
; X86: # %bb.0:
; X86-NEXT: pushl %eax
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: andb $1, %al
; X86-NEXT: negb %al
; X86-NEXT: movsbl %al, %eax
Expand Down Expand Up @@ -781,7 +781,7 @@ define x86_fp80 @uint1_to_fp80(i1 %x) #0 {
; X86: # %bb.0:
; X86-NEXT: pushl %eax
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: andb $1, %al
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/X86/fptosi-sat-scalar.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@ define i1 @test_signed_i1_f32(float %f) nounwind {
; X86-X87-NEXT: movb $-1, %dl
; X86-X87-NEXT: jb .LBB0_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: .LBB0_2:
; X86-X87-NEXT: fldz
; X86-X87-NEXT: fxch %st(1)
Expand Down Expand Up @@ -115,7 +115,7 @@ define i8 @test_signed_i8_f32(float %f) nounwind {
; X86-X87-NEXT: movb $-128, %dl
; X86-X87-NEXT: jb .LBB1_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: .LBB1_2:
; X86-X87-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
; X86-X87-NEXT: fxch %st(1)
Expand Down Expand Up @@ -1062,7 +1062,7 @@ define i1 @test_signed_i1_f64(double %f) nounwind {
; X86-X87-NEXT: movb $-1, %dl
; X86-X87-NEXT: jb .LBB10_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: .LBB10_2:
; X86-X87-NEXT: fldz
; X86-X87-NEXT: fxch %st(1)
Expand Down Expand Up @@ -1135,7 +1135,7 @@ define i8 @test_signed_i8_f64(double %f) nounwind {
; X86-X87-NEXT: movb $-128, %dl
; X86-X87-NEXT: jb .LBB11_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: .LBB11_2:
; X86-X87-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
; X86-X87-NEXT: fxch %st(1)
Expand Down Expand Up @@ -2079,7 +2079,7 @@ define i1 @test_signed_i1_f16(half %f) nounwind {
; X86-X87-NEXT: movb $-1, %dl
; X86-X87-NEXT: jb .LBB20_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: .LBB20_2:
; X86-X87-NEXT: fldz
; X86-X87-NEXT: fxch %st(1)
Expand Down Expand Up @@ -2176,7 +2176,7 @@ define i8 @test_signed_i8_f16(half %f) nounwind {
; X86-X87-NEXT: movb $-128, %dl
; X86-X87-NEXT: jb .LBB21_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: .LBB21_2:
; X86-X87-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
; X86-X87-NEXT: fxch %st(1)
Expand Down Expand Up @@ -3274,7 +3274,7 @@ define i1 @test_signed_i1_f80(x86_fp80 %f) nounwind {
; X86-X87-NEXT: movb $-1, %dl
; X86-X87-NEXT: jb .LBB30_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: .LBB30_2:
; X86-X87-NEXT: fldz
; X86-X87-NEXT: fxch %st(1)
Expand Down Expand Up @@ -3387,7 +3387,7 @@ define i8 @test_signed_i8_f80(x86_fp80 %f) nounwind {
; X86-X87-NEXT: movb $-128, %dl
; X86-X87-NEXT: jb .LBB31_2
; X86-X87-NEXT: # %bb.1:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-X87-NEXT: .LBB31_2:
; X86-X87-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}
; X86-X87-NEXT: fxch %st(1)
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/X86/fptoui-sat-scalar.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,7 @@ define i1 @test_unsigned_i1_f32(float %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB0_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: jmp .LBB0_3
; X86-X87-NEXT: .LBB0_1:
; X86-X87-NEXT: xorl %ecx, %ecx
Expand Down Expand Up @@ -102,7 +102,7 @@ define i8 @test_unsigned_i8_f32(float %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB1_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: jmp .LBB1_3
; X86-X87-NEXT: .LBB1_1:
; X86-X87-NEXT: xorl %ecx, %ecx
Expand Down Expand Up @@ -974,7 +974,7 @@ define i1 @test_unsigned_i1_f64(double %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB10_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: jmp .LBB10_3
; X86-X87-NEXT: .LBB10_1:
; X86-X87-NEXT: xorl %ecx, %ecx
Expand Down Expand Up @@ -1037,7 +1037,7 @@ define i8 @test_unsigned_i8_f64(double %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB11_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: jmp .LBB11_3
; X86-X87-NEXT: .LBB11_1:
; X86-X87-NEXT: xorl %ecx, %ecx
Expand Down Expand Up @@ -1900,7 +1900,7 @@ define i1 @test_unsigned_i1_f16(half %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB20_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: jmp .LBB20_3
; X86-X87-NEXT: .LBB20_1:
; X86-X87-NEXT: xorl %ecx, %ecx
Expand Down Expand Up @@ -1982,7 +1982,7 @@ define i8 @test_unsigned_i8_f16(half %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB21_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: jmp .LBB21_3
; X86-X87-NEXT: .LBB21_1:
; X86-X87-NEXT: xorl %ecx, %ecx
Expand Down Expand Up @@ -2995,7 +2995,7 @@ define i1 @test_unsigned_i1_f80(x86_fp80 %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB30_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: jmp .LBB30_3
; X86-X87-NEXT: .LBB30_1:
; X86-X87-NEXT: xorl %ecx, %ecx
Expand Down Expand Up @@ -3092,7 +3092,7 @@ define i8 @test_unsigned_i8_f80(x86_fp80 %f) nounwind {
; X86-X87-NEXT: sahf
; X86-X87-NEXT: jb .LBB31_1
; X86-X87-NEXT: # %bb.2:
; X86-X87-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-X87-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-X87-NEXT: jmp .LBB31_3
; X86-X87-NEXT: .LBB31_1:
; X86-X87-NEXT: xorl %ecx, %ecx
Expand Down
18 changes: 9 additions & 9 deletions llvm/test/CodeGen/X86/fshl.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ declare i128 @llvm.fshl.i128(i128, i128, i128) nounwind readnone
define i8 @var_shift_i8(i8 %x, i8 %y, i8 %z) nounwind {
; X86-LABEL: var_shift_i8:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $8, %eax
Expand Down Expand Up @@ -48,14 +48,14 @@ define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-FAST-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-FAST-NEXT: andb $15, %cl
; X86-FAST-NEXT: shldw %cl, %dx, %ax
; X86-FAST-NEXT: retl
;
; X86-SLOW-LABEL: var_shift_i16:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SLOW-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: shll $16, %eax
Expand Down Expand Up @@ -95,7 +95,7 @@ define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-FAST-LABEL: var_shift_i32:
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-FAST-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: shldl %cl, %edx, %eax
Expand All @@ -104,7 +104,7 @@ define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-SLOW-LABEL: var_shift_i32:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SLOW-NEXT: shll %cl, %edx
; X86-SLOW-NEXT: notb %cl
Expand Down Expand Up @@ -446,8 +446,8 @@ define i128 @var_shift_i128(i128 %x, i128 %y, i128 %z) nounwind {
define i8 @const_shift_i8(i8 %x, i8 %y) nounwind {
; X86-LABEL: const_shift_i8:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: shrb %cl
; X86-NEXT: shlb $7, %al
; X86-NEXT: orb %cl, %al
Expand Down Expand Up @@ -588,12 +588,12 @@ define i8 @combine_fshl_load_i8(ptr %p) nounwind {
; X86-LABEL: combine_fshl_load_i8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl 1(%eax), %eax
; X86-NEXT: movb 1(%eax), %al
; X86-NEXT: retl
;
; X64-LABEL: combine_fshl_load_i8:
; X64: # %bb.0:
; X64-NEXT: movzbl 1(%rdi), %eax
; X64-NEXT: movb 1(%rdi), %al
; X64-NEXT: retq
%p1 = getelementptr i8, ptr %p, i32 1
%ld0 = load i8, ptr%p
Expand Down
18 changes: 9 additions & 9 deletions llvm/test/CodeGen/X86/fshr.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ declare i128 @llvm.fshr.i128(i128, i128, i128) nounwind readnone
define i8 @var_shift_i8(i8 %x, i8 %y, i8 %z) nounwind {
; X86-LABEL: var_shift_i8:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $8, %eax
Expand Down Expand Up @@ -47,14 +47,14 @@ define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-FAST-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-FAST-NEXT: andb $15, %cl
; X86-FAST-NEXT: shrdw %cl, %dx, %ax
; X86-FAST-NEXT: retl
;
; X86-SLOW-LABEL: var_shift_i16:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SLOW-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: shll $16, %eax
Expand Down Expand Up @@ -92,7 +92,7 @@ define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-FAST-LABEL: var_shift_i32:
; X86-FAST: # %bb.0:
; X86-FAST-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-FAST-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-FAST-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-FAST-NEXT: shrdl %cl, %edx, %eax
Expand All @@ -101,7 +101,7 @@ define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-SLOW-LABEL: var_shift_i32:
; X86-SLOW: # %bb.0:
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SLOW-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SLOW-NEXT: shrl %cl, %edx
; X86-SLOW-NEXT: notb %cl
Expand Down Expand Up @@ -436,8 +436,8 @@ define i128 @var_shift_i128(i128 %x, i128 %y, i128 %z) nounwind {
define i8 @const_shift_i8(i8 %x, i8 %y) nounwind {
; X86-LABEL: const_shift_i8:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: shrb $7, %cl
; X86-NEXT: addb %al, %al
; X86-NEXT: orb %cl, %al
Expand Down Expand Up @@ -577,12 +577,12 @@ define i8 @combine_fshr_load_i8(ptr %p) nounwind {
; X86-LABEL: combine_fshr_load_i8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl (%eax), %eax
; X86-NEXT: movb (%eax), %al
; X86-NEXT: retl
;
; X64-LABEL: combine_fshr_load_i8:
; X64: # %bb.0:
; X64-NEXT: movzbl (%rdi), %eax
; X64-NEXT: movb (%rdi), %al
; X64-NEXT: retq
%p1 = getelementptr i8, ptr %p, i32 1
%ld0 = load i8, ptr%p
Expand Down
18 changes: 9 additions & 9 deletions llvm/test/CodeGen/X86/funnel-shift-rot.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@ declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
define i8 @rotl_i8_const_shift(i8 %x) nounwind {
; X86-SSE2-LABEL: rotl_i8_const_shift:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-SSE2-NEXT: rolb $3, %al
; X86-SSE2-NEXT: retl
;
Expand All @@ -36,7 +36,7 @@ define i8 @rotl_i8_const_shift(i8 %x) nounwind {
define i8 @rotl_i8_const_shift1(i8 %x) nounwind {
; X86-SSE2-LABEL: rotl_i8_const_shift1:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-SSE2-NEXT: rolb %al
; X86-SSE2-NEXT: retl
;
Expand All @@ -53,7 +53,7 @@ define i8 @rotl_i8_const_shift1(i8 %x) nounwind {
define i8 @rotl_i8_const_shift7(i8 %x) nounwind {
; X86-SSE2-LABEL: rotl_i8_const_shift7:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-SSE2-NEXT: rorb %al
; X86-SSE2-NEXT: retl
;
Expand Down Expand Up @@ -89,7 +89,7 @@ define i64 @rotl_i64_const_shift(i64 %x) nounwind {
define i16 @rotl_i16(i16 %x, i16 %z) nounwind {
; X86-SSE2-LABEL: rotl_i16:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: rolw %cl, %ax
; X86-SSE2-NEXT: retl
Expand All @@ -109,7 +109,7 @@ define i16 @rotl_i16(i16 %x, i16 %z) nounwind {
define i32 @rotl_i32(i32 %x, i32 %z) nounwind {
; X86-SSE2-LABEL: rotl_i32:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: roll %cl, %eax
; X86-SSE2-NEXT: retl
Expand Down Expand Up @@ -187,7 +187,7 @@ define <4 x i32> @rotl_v4i32_const_shift(<4 x i32> %x) nounwind {
define i8 @rotr_i8_const_shift(i8 %x) nounwind {
; X86-SSE2-LABEL: rotr_i8_const_shift:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-SSE2-NEXT: rorb $3, %al
; X86-SSE2-NEXT: retl
;
Expand All @@ -204,7 +204,7 @@ define i8 @rotr_i8_const_shift(i8 %x) nounwind {
define i8 @rotr_i8_const_shift1(i8 %x) nounwind {
; X86-SSE2-LABEL: rotr_i8_const_shift1:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-SSE2-NEXT: rorb %al
; X86-SSE2-NEXT: retl
;
Expand All @@ -221,7 +221,7 @@ define i8 @rotr_i8_const_shift1(i8 %x) nounwind {
define i8 @rotr_i8_const_shift7(i8 %x) nounwind {
; X86-SSE2-LABEL: rotr_i8_const_shift7:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-SSE2-NEXT: rolb %al
; X86-SSE2-NEXT: retl
;
Expand Down Expand Up @@ -256,7 +256,7 @@ define i32 @rotr_i32_const_shift(i32 %x) nounwind {
define i16 @rotr_i16(i16 %x, i16 %z) nounwind {
; X86-SSE2-LABEL: rotr_i16:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: rorw %cl, %ax
; X86-SSE2-NEXT: retl
Expand Down
44 changes: 22 additions & 22 deletions llvm/test/CodeGen/X86/funnel-shift.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
define i32 @fshl_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-SSE2-LABEL: fshl_i32:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shldl %cl, %edx, %eax
Expand Down Expand Up @@ -282,7 +282,7 @@ define i8 @fshl_i8_const_fold() nounwind {
define i32 @fshr_i32(i32 %x, i32 %y, i32 %z) nounwind {
; X86-SSE2-LABEL: fshr_i32:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shrdl %cl, %edx, %eax
Expand Down Expand Up @@ -419,7 +419,7 @@ define i32 @fshr_i32_demandedbits(i32 %a0, i32 %a1) nounwind {
define i32 @fshl_i32_undef0(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshl_i32_undef0:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shldl %cl, %eax, %eax
; X86-SSE2-NEXT: retl
Expand Down Expand Up @@ -475,7 +475,7 @@ define i32 @fshl_i32_undef0_cst(i32 %a0) nounwind {
define i32 @fshl_i32_undef1(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshl_i32_undef1:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shldl %cl, %eax, %eax
; X86-SSE2-NEXT: retl
Expand All @@ -495,7 +495,7 @@ define i32 @fshl_i32_undef1_msk(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshl_i32_undef1_msk:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: andb $7, %cl
; X86-SSE2-NEXT: shll %cl, %eax
; X86-SSE2-NEXT: retl
Expand Down Expand Up @@ -549,7 +549,7 @@ define i32 @fshl_i32_undef2(i32 %a0, i32 %a1) nounwind {
define i32 @fshr_i32_undef0(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshr_i32_undef0:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shrdl %cl, %eax, %eax
; X86-SSE2-NEXT: retl
Expand All @@ -569,7 +569,7 @@ define i32 @fshr_i32_undef0_msk(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshr_i32_undef0_msk:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: andb $7, %cl
; X86-SSE2-NEXT: shrl %cl, %eax
; X86-SSE2-NEXT: retl
Expand Down Expand Up @@ -606,7 +606,7 @@ define i32 @fshr_i32_undef0_cst(i32 %a0) nounwind {
define i32 @fshr_i32_undef1(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshr_i32_undef1:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shrdl %cl, %eax, %eax
; X86-SSE2-NEXT: retl
Expand Down Expand Up @@ -681,7 +681,7 @@ define i32 @fshr_i32_undef2(i32 %a0, i32 %a1) nounwind {
define i32 @fshl_i32_zero0(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshl_i32_zero0:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: xorl %eax, %eax
; X86-SSE2-NEXT: shldl %cl, %edx, %eax
Expand Down Expand Up @@ -717,7 +717,7 @@ define i32 @fshl_i32_zero0_cst(i32 %a0) nounwind {
define i32 @fshl_i32_zero1(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshl_i32_zero1:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: xorl %edx, %edx
; X86-SSE2-NEXT: shldl %cl, %edx, %eax
Expand Down Expand Up @@ -754,7 +754,7 @@ define i32 @fshl_i32_zero1_cst(i32 %a0) nounwind {
define i32 @fshr_i32_zero0(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshr_i32_zero0:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: xorl %edx, %edx
; X86-SSE2-NEXT: shrdl %cl, %edx, %eax
Expand Down Expand Up @@ -791,7 +791,7 @@ define i32 @fshr_i32_zero0_cst(i32 %a0) nounwind {
define i32 @fshr_i32_zero1(i32 %a0, i32 %a1) nounwind {
; X86-SSE2-LABEL: fshr_i32_zero1:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: xorl %eax, %eax
; X86-SSE2-NEXT: shrdl %cl, %edx, %eax
Expand Down Expand Up @@ -1047,7 +1047,7 @@ define i32 @or_shl_fshl(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: pushl %esi
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl %edx, %esi
; X86-SSE2-NEXT: shll %cl, %esi
Expand Down Expand Up @@ -1075,7 +1075,7 @@ define i32 @or_shl_rotl(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2-LABEL: or_shl_rotl:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: shll %cl, %edx
; X86-SSE2-NEXT: roll %cl, %eax
Expand All @@ -1102,7 +1102,7 @@ define i32 @or_shl_fshl_commute(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: pushl %esi
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl %edx, %esi
; X86-SSE2-NEXT: shll %cl, %esi
Expand Down Expand Up @@ -1130,7 +1130,7 @@ define i32 @or_shl_rotl_commute(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2-LABEL: or_shl_rotl_commute:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: shll %cl, %edx
; X86-SSE2-NEXT: roll %cl, %eax
Expand All @@ -1157,7 +1157,7 @@ define i32 @or_lshr_fshr(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: pushl %esi
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl %edx, %esi
; X86-SSE2-NEXT: shrl %cl, %esi
Expand Down Expand Up @@ -1185,7 +1185,7 @@ define i32 @or_lshr_rotr(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2-LABEL: or_lshr_rotr:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: shrl %cl, %edx
; X86-SSE2-NEXT: rorl %cl, %eax
Expand All @@ -1212,7 +1212,7 @@ define i32 @or_lshr_fshr_commute(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: pushl %esi
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl %edx, %esi
; X86-SSE2-NEXT: shrl %cl, %esi
Expand Down Expand Up @@ -1240,7 +1240,7 @@ define i32 @or_lshr_rotr_commute(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2-LABEL: or_lshr_rotr_commute:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: shrl %cl, %edx
; X86-SSE2-NEXT: rorl %cl, %eax
Expand All @@ -1265,7 +1265,7 @@ define i32 @or_lshr_rotr_commute(i32 %x, i32 %y, i32 %s) nounwind {
define i32 @or_shl_fshl_simplify(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2-LABEL: or_shl_fshl_simplify:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shldl %cl, %edx, %eax
Expand All @@ -1287,7 +1287,7 @@ define i32 @or_shl_fshl_simplify(i32 %x, i32 %y, i32 %s) nounwind {
define i32 @or_lshr_fshr_simplify(i32 %x, i32 %y, i32 %s) nounwind {
; X86-SSE2-LABEL: or_lshr_fshr_simplify:
; X86-SSE2: # %bb.0:
; X86-SSE2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE2-NEXT: shrdl %cl, %edx, %eax
Expand Down
22 changes: 11 additions & 11 deletions llvm/test/CodeGen/X86/gpr-to-mask.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -105,11 +105,11 @@ define void @test_load_add(i1 %cond, ptr %fptr, ptr %iptr1, ptr %iptr2, float %f
; X86-64-NEXT: testb $1, %dil
; X86-64-NEXT: je .LBB2_2
; X86-64-NEXT: # %bb.1: # %if
; X86-64-NEXT: movzbl (%rdx), %eax
; X86-64-NEXT: movb (%rdx), %al
; X86-64-NEXT: addb (%rcx), %al
; X86-64-NEXT: jmp .LBB2_3
; X86-64-NEXT: .LBB2_2: # %else
; X86-64-NEXT: movzbl (%rcx), %eax
; X86-64-NEXT: movb (%rcx), %al
; X86-64-NEXT: .LBB2_3: # %exit
; X86-64-NEXT: kmovd %eax, %k1
; X86-64-NEXT: vmovss %xmm0, %xmm1, %xmm1 {%k1}
Expand All @@ -126,11 +126,11 @@ define void @test_load_add(i1 %cond, ptr %fptr, ptr %iptr1, ptr %iptr2, float %f
; X86-32-NEXT: je .LBB2_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-32-NEXT: movzbl (%edx), %edx
; X86-32-NEXT: movb (%edx), %dl
; X86-32-NEXT: addb (%ecx), %dl
; X86-32-NEXT: jmp .LBB2_3
; X86-32-NEXT: .LBB2_2: # %else
; X86-32-NEXT: movzbl (%ecx), %edx
; X86-32-NEXT: movb (%ecx), %dl
; X86-32-NEXT: .LBB2_3: # %exit
; X86-32-NEXT: kmovd %edx, %k1
; X86-32-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
Expand Down Expand Up @@ -212,10 +212,10 @@ define void @test_loadi1_storei1(i1 %cond, ptr %iptr1, ptr %iptr2, ptr %iptr3)
; X86-64-NEXT: testb $1, %dil
; X86-64-NEXT: je .LBB4_2
; X86-64-NEXT: # %bb.1: # %if
; X86-64-NEXT: movzbl (%rsi), %eax
; X86-64-NEXT: movb (%rsi), %al
; X86-64-NEXT: jmp .LBB4_3
; X86-64-NEXT: .LBB4_2: # %else
; X86-64-NEXT: movzbl (%rdx), %eax
; X86-64-NEXT: movb (%rdx), %al
; X86-64-NEXT: .LBB4_3: # %exit
; X86-64-NEXT: andb $1, %al
; X86-64-NEXT: movb %al, (%rcx)
Expand All @@ -232,7 +232,7 @@ define void @test_loadi1_storei1(i1 %cond, ptr %iptr1, ptr %iptr2, ptr %iptr3)
; X86-32-NEXT: .LBB4_2: # %else
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: .LBB4_3: # %exit
; X86-32-NEXT: movzbl (%ecx), %ecx
; X86-32-NEXT: movb (%ecx), %cl
; X86-32-NEXT: andb $1, %cl
; X86-32-NEXT: movb %cl, (%eax)
; X86-32-NEXT: retl
Expand Down Expand Up @@ -320,11 +320,11 @@ define void @test_shr1(i1 %cond, ptr %ptr1, ptr %ptr2, <8 x float> %fvec1, <8 x
; X86-64-NEXT: testb $1, %dil
; X86-64-NEXT: je .LBB6_2
; X86-64-NEXT: # %bb.1: # %if
; X86-64-NEXT: movzbl (%rsi), %eax
; X86-64-NEXT: movb (%rsi), %al
; X86-64-NEXT: shrb %al
; X86-64-NEXT: jmp .LBB6_3
; X86-64-NEXT: .LBB6_2: # %else
; X86-64-NEXT: movzbl (%rdx), %eax
; X86-64-NEXT: movb (%rdx), %al
; X86-64-NEXT: .LBB6_3: # %exit
; X86-64-NEXT: kmovd %eax, %k1
; X86-64-NEXT: vmovaps %zmm0, %zmm1 {%k1}
Expand All @@ -341,12 +341,12 @@ define void @test_shr1(i1 %cond, ptr %ptr1, ptr %ptr2, <8 x float> %fvec1, <8 x
; X86-32-NEXT: je .LBB6_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: movzbl (%ecx), %ecx
; X86-32-NEXT: movb (%ecx), %cl
; X86-32-NEXT: shrb %cl
; X86-32-NEXT: jmp .LBB6_3
; X86-32-NEXT: .LBB6_2: # %else
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: movzbl (%ecx), %ecx
; X86-32-NEXT: movb (%ecx), %cl
; X86-32-NEXT: .LBB6_3: # %exit
; X86-32-NEXT: kmovd %ecx, %k1
; X86-32-NEXT: vmovaps %zmm0, %zmm1 {%k1}
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/h-register-addressing-32.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ define i8 @foo1(ptr nocapture inreg %p, i32 inreg %x) nounwind readonly {
; CHECK-LABEL: foo1:
; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dh, %ecx
; CHECK-NEXT: movzbl (%eax,%ecx), %eax
; CHECK-NEXT: movb (%eax,%ecx), %al
; CHECK-NEXT: retl
%t0 = lshr i32 %x, 8
%t1 = and i32 %t0, 255
Expand All @@ -59,7 +59,7 @@ define i8 @bar8(ptr nocapture inreg %p, i32 inreg %x) nounwind readonly {
; CHECK-LABEL: bar8:
; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dh, %ecx
; CHECK-NEXT: movzbl (%eax,%ecx,8), %eax
; CHECK-NEXT: movb (%eax,%ecx,8), %al
; CHECK-NEXT: retl
%t0 = lshr i32 %x, 5
%t1 = and i32 %t0, 2040
Expand All @@ -72,7 +72,7 @@ define i8 @bar4(ptr nocapture inreg %p, i32 inreg %x) nounwind readonly {
; CHECK-LABEL: bar4:
; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dh, %ecx
; CHECK-NEXT: movzbl (%eax,%ecx,4), %eax
; CHECK-NEXT: movb (%eax,%ecx,4), %al
; CHECK-NEXT: retl
%t0 = lshr i32 %x, 6
%t1 = and i32 %t0, 1020
Expand All @@ -85,7 +85,7 @@ define i8 @bar2(ptr nocapture inreg %p, i32 inreg %x) nounwind readonly {
; CHECK-LABEL: bar2:
; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dh, %ecx
; CHECK-NEXT: movzbl (%eax,%ecx,2), %eax
; CHECK-NEXT: movb (%eax,%ecx,2), %al
; CHECK-NEXT: retl
%t0 = lshr i32 %x, 7
%t1 = and i32 %t0, 510
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/h-register-addressing-64.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@ define i8 @foo1(ptr nocapture inreg %p, i64 inreg %x) nounwind readonly {
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rsi, %rax
; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: movzbl (%rdi,%rax), %eax
; CHECK-NEXT: movb (%rdi,%rax), %al
; CHECK-NEXT: retq
%t0 = lshr i64 %x, 8
%t1 = and i64 %t0, 255
Expand All @@ -64,7 +64,7 @@ define i8 @bar8(ptr nocapture inreg %p, i64 inreg %x) nounwind readonly {
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rsi, %rax
; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: movzbl (%rdi,%rax,8), %eax
; CHECK-NEXT: movb (%rdi,%rax,8), %al
; CHECK-NEXT: retq
%t0 = lshr i64 %x, 5
%t1 = and i64 %t0, 2040
Expand All @@ -78,7 +78,7 @@ define i8 @bar4(ptr nocapture inreg %p, i64 inreg %x) nounwind readonly {
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rsi, %rax
; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: movzbl (%rdi,%rax,4), %eax
; CHECK-NEXT: movb (%rdi,%rax,4), %al
; CHECK-NEXT: retq
%t0 = lshr i64 %x, 6
%t1 = and i64 %t0, 1020
Expand All @@ -92,7 +92,7 @@ define i8 @bar2(ptr nocapture inreg %p, i64 inreg %x) nounwind readonly {
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rsi, %rax
; CHECK-NEXT: movzbl %ah, %eax
; CHECK-NEXT: movzbl (%rdi,%rax,2), %eax
; CHECK-NEXT: movb (%rdi,%rax,2), %al
; CHECK-NEXT: retq
%t0 = lshr i64 %x, 7
%t1 = and i64 %t0, 510
Expand Down
58 changes: 29 additions & 29 deletions llvm/test/CodeGen/X86/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -22,8 +22,8 @@
define i1 @scalar_i8_signbit_eq(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_signbit_eq:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: shlb %cl, %al
; X86-NEXT: testb $-128, %al
; X86-NEXT: sete %al
Expand All @@ -46,8 +46,8 @@ define i1 @scalar_i8_signbit_eq(i8 %x, i8 %y) nounwind {
define i1 @scalar_i8_lowestbit_eq(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_lowestbit_eq:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: shlb %cl, %al
; X86-NEXT: testb $1, %al
; X86-NEXT: sete %al
Expand All @@ -70,8 +70,8 @@ define i1 @scalar_i8_lowestbit_eq(i8 %x, i8 %y) nounwind {
define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_bitsinmiddle_eq:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: shlb %cl, %al
; X86-NEXT: testb $24, %al
; X86-NEXT: sete %al
Expand All @@ -96,7 +96,7 @@ define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
; X86-BMI1-LABEL: scalar_i16_signbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testl $32768, %eax # imm = 0x8000
Expand All @@ -105,7 +105,7 @@ define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i16_signbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testl $32768, %eax # imm = 0x8000
; X86-BMI2-NEXT: sete %al
Expand Down Expand Up @@ -135,7 +135,7 @@ define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
define i1 @scalar_i16_lowestbit_eq(i16 %x, i16 %y) nounwind {
; X86-BMI1-LABEL: scalar_i16_lowestbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testb $1, %al
Expand All @@ -144,7 +144,7 @@ define i1 @scalar_i16_lowestbit_eq(i16 %x, i16 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i16_lowestbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testb $1, %al
; X86-BMI2-NEXT: sete %al
Expand Down Expand Up @@ -174,7 +174,7 @@ define i1 @scalar_i16_lowestbit_eq(i16 %x, i16 %y) nounwind {
define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
; X86-BMI1-LABEL: scalar_i16_bitsinmiddle_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testl $4080, %eax # imm = 0xFF0
Expand All @@ -183,7 +183,7 @@ define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i16_bitsinmiddle_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testl $4080, %eax # imm = 0xFF0
; X86-BMI2-NEXT: sete %al
Expand Down Expand Up @@ -215,7 +215,7 @@ define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_signbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testl $-2147483648, %eax # imm = 0x80000000
Expand All @@ -224,7 +224,7 @@ define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_signbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testl $-2147483648, %eax # imm = 0x80000000
; X86-BMI2-NEXT: sete %al
Expand Down Expand Up @@ -254,7 +254,7 @@ define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
define i1 @scalar_i32_lowestbit_eq(i32 %x, i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_lowestbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testb $1, %al
Expand All @@ -263,7 +263,7 @@ define i1 @scalar_i32_lowestbit_eq(i32 %x, i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_lowestbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testb $1, %al
; X86-BMI2-NEXT: sete %al
Expand Down Expand Up @@ -293,7 +293,7 @@ define i1 @scalar_i32_lowestbit_eq(i32 %x, i32 %y) nounwind {
define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_bitsinmiddle_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testl $16776960, %eax # imm = 0xFFFF00
Expand All @@ -302,7 +302,7 @@ define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_bitsinmiddle_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testl $16776960, %eax # imm = 0xFFFF00
; X86-BMI2-NEXT: sete %al
Expand Down Expand Up @@ -335,7 +335,7 @@ define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
; X86-BMI1-LABEL: scalar_i64_signbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI1-NEXT: movl %eax, %esi
Expand All @@ -350,7 +350,7 @@ define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i64_signbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: shldl %cl, %eax, %edx
Expand Down Expand Up @@ -385,7 +385,7 @@ define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
define i1 @scalar_i64_lowestbit_eq(i64 %x, i64 %y) nounwind {
; X86-BMI1-LABEL: scalar_i64_lowestbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: xorl %edx, %edx
Expand All @@ -397,7 +397,7 @@ define i1 @scalar_i64_lowestbit_eq(i64 %x, i64 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i64_lowestbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: shlxl %eax, {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: xorl %edx, %edx
; X86-BMI2-NEXT: testb $32, %al
Expand Down Expand Up @@ -431,7 +431,7 @@ define i1 @scalar_i64_bitsinmiddle_eq(i64 %x, i64 %y) nounwind {
; X86-BMI1-LABEL: scalar_i64_bitsinmiddle_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI1-NEXT: movl %eax, %esi
Expand All @@ -451,7 +451,7 @@ define i1 @scalar_i64_bitsinmiddle_eq(i64 %x, i64 %y) nounwind {
; X86-BMI2-LABEL: scalar_i64_bitsinmiddle_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: shldl %cl, %eax, %edx
Expand Down Expand Up @@ -772,8 +772,8 @@ define <4 x i1> @vec_4xi32_nonsplat_undef2_eq(<4 x i32> %x, <4 x i32> %y) nounwi
define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_signbit_ne:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: shlb %cl, %al
; X86-NEXT: shrb $7, %al
; X86-NEXT: retl
Expand Down Expand Up @@ -820,7 +820,7 @@ define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_x_is_const2_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl $1, %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: testl %eax, %eax
Expand All @@ -829,7 +829,7 @@ define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_x_is_const2_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movl $1, %ecx
; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
; X86-BMI2-NEXT: testl %eax, %eax
Expand Down Expand Up @@ -877,7 +877,7 @@ define i1 @negative_scalar_i8_bitsinmiddle_slt(i8 %x, i8 %y) nounwind {
define i1 @scalar_i8_signbit_eq_with_nonzero(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_signbit_eq_with_nonzero:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb $-128, %al
; X86-NEXT: shrb %cl, %al
; X86-NEXT: andb {{[0-9]+}}(%esp), %al
Expand Down
48 changes: 24 additions & 24 deletions llvm/test/CodeGen/X86/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -22,8 +22,8 @@
define i1 @scalar_i8_signbit_eq(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_signbit_eq:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: shrb %cl, %al
; X86-NEXT: testb $-128, %al
; X86-NEXT: sete %al
Expand Down Expand Up @@ -66,8 +66,8 @@ define i1 @scalar_i8_lowestbit_eq(i8 %x, i8 %y) nounwind {
define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_bitsinmiddle_eq:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: shrb %cl, %al
; X86-NEXT: testb $24, %al
; X86-NEXT: sete %al
Expand All @@ -92,7 +92,7 @@ define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
; X86-BMI1-LABEL: scalar_i16_signbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: testl $32768, %eax # imm = 0x8000
Expand All @@ -102,7 +102,7 @@ define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
; X86-BMI2-LABEL: scalar_i16_signbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: shrxl %ecx, %eax, %eax
; X86-BMI2-NEXT: testl $32768, %eax # imm = 0x8000
; X86-BMI2-NEXT: sete %al
Expand Down Expand Up @@ -154,7 +154,7 @@ define i1 @scalar_i16_lowestbit_eq(i16 %x, i16 %y) nounwind {
define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
; X86-BMI1-LABEL: scalar_i16_bitsinmiddle_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: testl $4080, %eax # imm = 0xFF0
Expand All @@ -164,7 +164,7 @@ define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
; X86-BMI2-LABEL: scalar_i16_bitsinmiddle_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: shrxl %ecx, %eax, %eax
; X86-BMI2-NEXT: testl $4080, %eax # imm = 0xFF0
; X86-BMI2-NEXT: sete %al
Expand Down Expand Up @@ -198,7 +198,7 @@ define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_signbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: testl $-2147483648, %eax # imm = 0x80000000
Expand All @@ -207,7 +207,7 @@ define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_signbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: shrxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testl $-2147483648, %eax # imm = 0x80000000
; X86-BMI2-NEXT: sete %al
Expand Down Expand Up @@ -257,7 +257,7 @@ define i1 @scalar_i32_lowestbit_eq(i32 %x, i32 %y) nounwind {
define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_bitsinmiddle_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: testl $16776960, %eax # imm = 0xFFFF00
Expand All @@ -266,7 +266,7 @@ define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_bitsinmiddle_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: shrxl %eax, {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: testl $16776960, %eax # imm = 0xFFFF00
; X86-BMI2-NEXT: sete %al
Expand Down Expand Up @@ -298,7 +298,7 @@ define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
; X86-BMI1-LABEL: scalar_i64_signbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: xorl %edx, %edx
Expand All @@ -310,7 +310,7 @@ define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i64_signbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: shrxl %eax, {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: xorl %edx, %edx
; X86-BMI2-NEXT: testb $32, %al
Expand Down Expand Up @@ -344,7 +344,7 @@ define i1 @scalar_i64_lowestbit_eq(i64 %x, i64 %y) nounwind {
; X86-BMI1-LABEL: scalar_i64_lowestbit_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl $1, %eax
; X86-BMI1-NEXT: xorl %esi, %esi
; X86-BMI1-NEXT: xorl %edx, %edx
Expand All @@ -363,7 +363,7 @@ define i1 @scalar_i64_lowestbit_eq(i64 %x, i64 %y) nounwind {
; X86-BMI2-LABEL: scalar_i64_lowestbit_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movl $1, %eax
; X86-BMI2-NEXT: xorl %edx, %edx
; X86-BMI2-NEXT: xorl %esi, %esi
Expand Down Expand Up @@ -394,7 +394,7 @@ define i1 @scalar_i64_bitsinmiddle_eq(i64 %x, i64 %y) nounwind {
; X86-BMI1-LABEL: scalar_i64_bitsinmiddle_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: pushl %esi
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI1-NEXT: movl %edx, %esi
Expand All @@ -414,7 +414,7 @@ define i1 @scalar_i64_bitsinmiddle_eq(i64 %x, i64 %y) nounwind {
; X86-BMI2-LABEL: scalar_i64_bitsinmiddle_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: shrdl %cl, %edx, %eax
Expand Down Expand Up @@ -709,8 +709,8 @@ define <4 x i1> @vec_4xi32_nonsplat_undef2_eq(<4 x i32> %x, <4 x i32> %y) nounwi
define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_signbit_ne:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: shrb %cl, %al
; X86-NEXT: shrb $7, %al
; X86-NEXT: retl
Expand All @@ -737,7 +737,7 @@ define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
; X86-BMI1-LABEL: scalar_i32_x_is_const_eq:
; X86-BMI1: # %bb.0:
; X86-BMI1-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
; X86-BMI1-NEXT: shll %cl, %eax
; X86-BMI1-NEXT: testb $1, %al
Expand All @@ -746,7 +746,7 @@ define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
;
; X86-BMI2-LABEL: scalar_i32_x_is_const_eq:
; X86-BMI2: # %bb.0:
; X86-BMI2-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movl $-1437226411, %ecx # imm = 0xAA55AA55
; X86-BMI2-NEXT: shlxl %eax, %ecx, %eax
; X86-BMI2-NEXT: testb $1, %al
Expand Down Expand Up @@ -803,7 +803,7 @@ define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
define i1 @negative_scalar_i8_bitsinmiddle_slt(i8 %x, i8 %y) nounwind {
; X86-LABEL: negative_scalar_i8_bitsinmiddle_slt:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb $24, %al
; X86-NEXT: shlb %cl, %al
; X86-NEXT: andb {{[0-9]+}}(%esp), %al
Expand All @@ -828,7 +828,7 @@ define i1 @negative_scalar_i8_bitsinmiddle_slt(i8 %x, i8 %y) nounwind {
define i1 @scalar_i8_signbit_eq_with_nonzero(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8_signbit_eq_with_nonzero:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movb $-128, %al
; X86-NEXT: shlb %cl, %al
; X86-NEXT: andb {{[0-9]+}}(%esp), %al
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/iabs.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
define i8 @test_i8(i8 %a) nounwind {
; X86-LABEL: test_i8:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: sarb $7, %cl
; X86-NEXT: xorb %cl, %al
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/inc-of-add.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
define i8 @scalar_i8(i8 %x, i8 %y) nounwind {
; X86-LABEL: scalar_i8:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: addb {{[0-9]+}}(%esp), %al
; X86-NEXT: incb %al
; X86-NEXT: retl
Expand Down
22 changes: 11 additions & 11 deletions llvm/test/CodeGen/X86/insertelement-var-index.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -638,7 +638,7 @@ define <32 x i8> @load_i8_v32i8_undef(ptr %p, i32 %y) nounwind {
; SSE-LABEL: load_i8_v32i8_undef:
; SSE: # %bb.0:
; SSE-NEXT: # kill: def $esi killed $esi def $rsi
; SSE-NEXT: movzbl (%rdi), %eax
; SSE-NEXT: movb (%rdi), %al
; SSE-NEXT: andl $31, %esi
; SSE-NEXT: movb %al, -40(%rsp,%rsi)
; SSE-NEXT: movaps -{{[0-9]+}}(%rsp), %xmm0
Expand Down Expand Up @@ -865,7 +865,7 @@ define <16 x i8> @arg_i8_v16i8(<16 x i8> %v, i8 %x, i32 %y) nounwind {
; X86AVX2-NEXT: subl $32, %esp
; X86AVX2-NEXT: movl 12(%ebp), %eax
; X86AVX2-NEXT: andl $15, %eax
; X86AVX2-NEXT: movzbl 8(%ebp), %ecx
; X86AVX2-NEXT: movb 8(%ebp), %cl
; X86AVX2-NEXT: vmovaps %xmm0, (%esp)
; X86AVX2-NEXT: movb %cl, (%esp,%eax)
; X86AVX2-NEXT: vmovaps (%esp), %xmm0
Expand Down Expand Up @@ -1160,7 +1160,7 @@ define <16 x i8> @load_i8_v16i8(<16 x i8> %v, ptr %p, i32 %y) nounwind {
; SSE-LABEL: load_i8_v16i8:
; SSE: # %bb.0:
; SSE-NEXT: # kill: def $esi killed $esi def $rsi
; SSE-NEXT: movzbl (%rdi), %eax
; SSE-NEXT: movb (%rdi), %al
; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; SSE-NEXT: andl $15, %esi
; SSE-NEXT: movb %al, -24(%rsp,%rsi)
Expand All @@ -1170,7 +1170,7 @@ define <16 x i8> @load_i8_v16i8(<16 x i8> %v, ptr %p, i32 %y) nounwind {
; AVX1OR2-LABEL: load_i8_v16i8:
; AVX1OR2: # %bb.0:
; AVX1OR2-NEXT: # kill: def $esi killed $esi def $rsi
; AVX1OR2-NEXT: movzbl (%rdi), %eax
; AVX1OR2-NEXT: movb (%rdi), %al
; AVX1OR2-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; AVX1OR2-NEXT: andl $15, %esi
; AVX1OR2-NEXT: movb %al, -24(%rsp,%rsi)
Expand All @@ -1180,7 +1180,7 @@ define <16 x i8> @load_i8_v16i8(<16 x i8> %v, ptr %p, i32 %y) nounwind {
; AVX512F-LABEL: load_i8_v16i8:
; AVX512F: # %bb.0:
; AVX512F-NEXT: # kill: def $esi killed $esi def $rsi
; AVX512F-NEXT: movzbl (%rdi), %eax
; AVX512F-NEXT: movb (%rdi), %al
; AVX512F-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; AVX512F-NEXT: andl $15, %esi
; AVX512F-NEXT: movb %al, -24(%rsp,%rsi)
Expand All @@ -1203,7 +1203,7 @@ define <16 x i8> @load_i8_v16i8(<16 x i8> %v, ptr %p, i32 %y) nounwind {
; X86AVX2-NEXT: movl 12(%ebp), %eax
; X86AVX2-NEXT: andl $15, %eax
; X86AVX2-NEXT: movl 8(%ebp), %ecx
; X86AVX2-NEXT: movzbl (%ecx), %ecx
; X86AVX2-NEXT: movb (%ecx), %cl
; X86AVX2-NEXT: vmovaps %xmm0, (%esp)
; X86AVX2-NEXT: movb %cl, (%esp,%eax)
; X86AVX2-NEXT: vmovaps (%esp), %xmm0
Expand Down Expand Up @@ -1572,7 +1572,7 @@ define <32 x i8> @arg_i8_v32i8(<32 x i8> %v, i8 %x, i32 %y) nounwind {
; X86AVX2-NEXT: subl $64, %esp
; X86AVX2-NEXT: movl 12(%ebp), %eax
; X86AVX2-NEXT: andl $31, %eax
; X86AVX2-NEXT: movzbl 8(%ebp), %ecx
; X86AVX2-NEXT: movb 8(%ebp), %cl
; X86AVX2-NEXT: vmovaps %ymm0, (%esp)
; X86AVX2-NEXT: movb %cl, (%esp,%eax)
; X86AVX2-NEXT: vmovaps (%esp), %ymm0
Expand Down Expand Up @@ -1884,7 +1884,7 @@ define <32 x i8> @load_i8_v32i8(<32 x i8> %v, ptr %p, i32 %y) nounwind {
; SSE-LABEL: load_i8_v32i8:
; SSE: # %bb.0:
; SSE-NEXT: # kill: def $esi killed $esi def $rsi
; SSE-NEXT: movzbl (%rdi), %eax
; SSE-NEXT: movb (%rdi), %al
; SSE-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
; SSE-NEXT: andl $31, %esi
Expand All @@ -1900,7 +1900,7 @@ define <32 x i8> @load_i8_v32i8(<32 x i8> %v, ptr %p, i32 %y) nounwind {
; AVX1OR2-NEXT: andq $-32, %rsp
; AVX1OR2-NEXT: subq $64, %rsp
; AVX1OR2-NEXT: # kill: def $esi killed $esi def $rsi
; AVX1OR2-NEXT: movzbl (%rdi), %eax
; AVX1OR2-NEXT: movb (%rdi), %al
; AVX1OR2-NEXT: vmovaps %ymm0, (%rsp)
; AVX1OR2-NEXT: andl $31, %esi
; AVX1OR2-NEXT: movb %al, (%rsp,%rsi)
Expand All @@ -1916,7 +1916,7 @@ define <32 x i8> @load_i8_v32i8(<32 x i8> %v, ptr %p, i32 %y) nounwind {
; AVX512F-NEXT: andq $-32, %rsp
; AVX512F-NEXT: subq $64, %rsp
; AVX512F-NEXT: # kill: def $esi killed $esi def $rsi
; AVX512F-NEXT: movzbl (%rdi), %eax
; AVX512F-NEXT: movb (%rdi), %al
; AVX512F-NEXT: vmovaps %ymm0, (%rsp)
; AVX512F-NEXT: andl $31, %esi
; AVX512F-NEXT: movb %al, (%rsp,%rsi)
Expand All @@ -1941,7 +1941,7 @@ define <32 x i8> @load_i8_v32i8(<32 x i8> %v, ptr %p, i32 %y) nounwind {
; X86AVX2-NEXT: movl 12(%ebp), %eax
; X86AVX2-NEXT: andl $31, %eax
; X86AVX2-NEXT: movl 8(%ebp), %ecx
; X86AVX2-NEXT: movzbl (%ecx), %ecx
; X86AVX2-NEXT: movb (%ecx), %cl
; X86AVX2-NEXT: vmovaps %ymm0, (%esp)
; X86AVX2-NEXT: movb %cl, (%esp,%eax)
; X86AVX2-NEXT: vmovaps (%esp), %ymm0
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/isel-sink2.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ define i8 @test(ptr%P) nounwind {
; CHECK-NEXT: cmpb $0, 4(%eax)
; CHECK-NEXT: je .LBB0_1
; CHECK-NEXT: # %bb.2: # %F
; CHECK-NEXT: movzbl 7(%eax), %eax
; CHECK-NEXT: movb 7(%eax), %al
; CHECK-NEXT: retl
; CHECK-NEXT: .LBB0_1: # %TB
; CHECK-NEXT: movb $4, %al
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/legalize-shift-64.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ define i64 @test1(i32 %xx, i32 %test) nounwind {
; CHECK-LABEL: test1:
; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK-NEXT: andb $7, %cl
; CHECK-NEXT: movl %edx, %eax
; CHECK-NEXT: shll %cl, %eax
Expand All @@ -26,7 +26,7 @@ define i64 @test2(i64 %xx, i32 %test) nounwind {
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK-NEXT: andb $7, %cl
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: shll %cl, %eax
Expand All @@ -44,7 +44,7 @@ define i64 @test3(i64 %xx, i32 %test) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK-NEXT: andb $7, %cl
; CHECK-NEXT: shrdl %cl, %edx, %eax
; CHECK-NEXT: shrl %cl, %edx
Expand All @@ -60,7 +60,7 @@ define i64 @test4(i64 %xx, i32 %test) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
; CHECK-NEXT: andb $7, %cl
; CHECK-NEXT: shrdl %cl, %edx, %eax
; CHECK-NEXT: sarl %cl, %edx
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/lifetime-alias.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -55,9 +55,9 @@ define i8 @main() local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
; CHECK-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movb -{{[0-9]+}}(%rsp), %al
; CHECK-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movb -{{[0-9]+}}(%rsp), %al
; CHECK-NEXT: movb %al, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
Expand All @@ -81,7 +81,7 @@ define i8 @main() local_unnamed_addr #0 personality ptr @__gxx_personality_v0 {
; CHECK-NEXT: .LBB0_1:
; CHECK-NEXT: leaq -{{[0-9]+}}(%rsp), %rax
; CHECK-NEXT: .LBB0_3: # %_ZNSt3__312basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEED2Ev.exit50
; CHECK-NEXT: movzbl 16(%rax), %eax
; CHECK-NEXT: movb 16(%rax), %al
; CHECK-NEXT: popq %rcx
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/load-local-v3i1.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -94,7 +94,7 @@ define void @local_load_v3i1(ptr addrspace(1) %out, ptr addrspace(1) %in, ptr %p
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: movq %rdi, %r14
; CHECK-NEXT: movzbl (%rdx), %eax
; CHECK-NEXT: movb (%rdx), %al
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: shrb %cl
; CHECK-NEXT: andb $1, %cl
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/load-local-v4i5.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ define void @_start() {
; CHECK: # %bb.0: # %Entry
; CHECK-NEXT: movl __unnamed_1(%rip), %eax
; CHECK-NEXT: movl %eax, -12(%rsp)
; CHECK-NEXT: movzbl -9(%rsp), %ecx
; CHECK-NEXT: movb -9(%rsp), %cl
; CHECK-NEXT: movzbl -10(%rsp), %edx
; CHECK-NEXT: movzbl -11(%rsp), %esi
; CHECK-NEXT: andl $31, %eax
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/X86/load-scalar-as-vector.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -90,15 +90,15 @@ define <2 x i64> @sub_op0_constant(ptr %p) nounwind {
define <16 x i8> @sub_op1_constant(ptr %p) nounwind {
; SSE-LABEL: sub_op1_constant:
; SSE: # %bb.0:
; SSE-NEXT: movzbl (%rdi), %eax
; SSE-NEXT: movb (%rdi), %al
; SSE-NEXT: addb $-42, %al
; SSE-NEXT: movzbl %al, %eax
; SSE-NEXT: movd %eax, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: sub_op1_constant:
; AVX: # %bb.0:
; AVX-NEXT: movzbl (%rdi), %eax
; AVX-NEXT: movb (%rdi), %al
; AVX-NEXT: addb $-42, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vmovd %eax, %xmm0
Expand Down Expand Up @@ -210,15 +210,15 @@ define <8 x i16> @xor_op1_constant(ptr %p) nounwind {
define <4 x i32> @shl_op0_constant(ptr %p) nounwind {
; SSE-LABEL: shl_op0_constant:
; SSE: # %bb.0:
; SSE-NEXT: movzbl (%rdi), %ecx
; SSE-NEXT: movb (%rdi), %cl
; SSE-NEXT: movl $42, %eax
; SSE-NEXT: shll %cl, %eax
; SSE-NEXT: movd %eax, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: shl_op0_constant:
; AVX: # %bb.0:
; AVX-NEXT: movzbl (%rdi), %ecx
; AVX-NEXT: movb (%rdi), %cl
; AVX-NEXT: movl $42, %eax
; AVX-NEXT: shll %cl, %eax
; AVX-NEXT: vmovd %eax, %xmm0
Expand All @@ -232,15 +232,15 @@ define <4 x i32> @shl_op0_constant(ptr %p) nounwind {
define <16 x i8> @shl_op1_constant(ptr %p) nounwind {
; SSE-LABEL: shl_op1_constant:
; SSE: # %bb.0:
; SSE-NEXT: movzbl (%rdi), %eax
; SSE-NEXT: movb (%rdi), %al
; SSE-NEXT: shlb $5, %al
; SSE-NEXT: movzbl %al, %eax
; SSE-NEXT: movd %eax, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: shl_op1_constant:
; AVX: # %bb.0:
; AVX-NEXT: movzbl (%rdi), %eax
; AVX-NEXT: movb (%rdi), %al
; AVX-NEXT: shlb $5, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vmovd %eax, %xmm0
Expand All @@ -254,15 +254,15 @@ define <16 x i8> @shl_op1_constant(ptr %p) nounwind {
define <2 x i64> @lshr_op0_constant(ptr %p) nounwind {
; SSE-LABEL: lshr_op0_constant:
; SSE: # %bb.0:
; SSE-NEXT: movzbl (%rdi), %ecx
; SSE-NEXT: movb (%rdi), %cl
; SSE-NEXT: movl $42, %eax
; SSE-NEXT: shrq %cl, %rax
; SSE-NEXT: movq %rax, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: lshr_op0_constant:
; AVX: # %bb.0:
; AVX-NEXT: movzbl (%rdi), %ecx
; AVX-NEXT: movb (%rdi), %cl
; AVX-NEXT: movl $42, %eax
; AVX-NEXT: shrq %cl, %rax
; AVX-NEXT: vmovq %rax, %xmm0
Expand Down Expand Up @@ -296,15 +296,15 @@ define <4 x i32> @lshr_op1_constant(ptr %p) nounwind {
define <8 x i16> @ashr_op0_constant(ptr %p) nounwind {
; SSE-LABEL: ashr_op0_constant:
; SSE: # %bb.0:
; SSE-NEXT: movzbl (%rdi), %ecx
; SSE-NEXT: movb (%rdi), %cl
; SSE-NEXT: movl $-42, %eax
; SSE-NEXT: sarl %cl, %eax
; SSE-NEXT: movd %eax, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: ashr_op0_constant:
; AVX: # %bb.0:
; AVX-NEXT: movzbl (%rdi), %ecx
; AVX-NEXT: movb (%rdi), %cl
; AVX-NEXT: movl $-42, %eax
; AVX-NEXT: sarl %cl, %eax
; AVX-NEXT: vmovd %eax, %xmm0
Expand Down Expand Up @@ -520,7 +520,7 @@ define <2 x i64> @urem_op0_constant(ptr %p) nounwind {
define <16 x i8> @urem_op1_constant(ptr %p) nounwind {
; SSE-LABEL: urem_op1_constant:
; SSE: # %bb.0:
; SSE-NEXT: movzbl (%rdi), %eax
; SSE-NEXT: movb (%rdi), %al
; SSE-NEXT: movl %eax, %ecx
; SSE-NEXT: shrb %cl
; SSE-NEXT: movzbl %cl, %ecx
Expand All @@ -534,7 +534,7 @@ define <16 x i8> @urem_op1_constant(ptr %p) nounwind {
;
; AVX-LABEL: urem_op1_constant:
; AVX: # %bb.0:
; AVX-NEXT: movzbl (%rdi), %eax
; AVX-NEXT: movb (%rdi), %al
; AVX-NEXT: movl %eax, %ecx
; AVX-NEXT: shrb %cl
; AVX-NEXT: movzbl %cl, %ecx
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/X86/masked_gather_scatter.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2519,19 +2519,19 @@ define <3 x i32> @test30(<3 x ptr> %base, <3 x i32> %ind, <3 x i1> %mask, <3 x i
; KNL_32-NEXT: # kill: def $xmm2 killed $xmm2 def $zmm2
; KNL_32-NEXT: movw $-3, %ax
; KNL_32-NEXT: kmovw %eax, %k0
; KNL_32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; KNL_32-NEXT: movb {{[0-9]+}}(%esp), %al
; KNL_32-NEXT: andl $1, %eax
; KNL_32-NEXT: kmovw %eax, %k1
; KNL_32-NEXT: kandw %k0, %k1, %k0
; KNL_32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; KNL_32-NEXT: movb {{[0-9]+}}(%esp), %al
; KNL_32-NEXT: kmovw %eax, %k1
; KNL_32-NEXT: kshiftlw $15, %k1, %k1
; KNL_32-NEXT: kshiftrw $14, %k1, %k1
; KNL_32-NEXT: korw %k1, %k0, %k0
; KNL_32-NEXT: movw $-5, %ax
; KNL_32-NEXT: kmovw %eax, %k1
; KNL_32-NEXT: kandw %k1, %k0, %k0
; KNL_32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; KNL_32-NEXT: movb {{[0-9]+}}(%esp), %al
; KNL_32-NEXT: kmovw %eax, %k1
; KNL_32-NEXT: kshiftlw $15, %k1, %k1
; KNL_32-NEXT: kshiftrw $13, %k1, %k1
Expand Down Expand Up @@ -2576,20 +2576,20 @@ define <3 x i32> @test30(<3 x ptr> %base, <3 x i32> %ind, <3 x i1> %mask, <3 x i
; SKX_32: # %bb.0:
; SKX_32-NEXT: movb $-3, %al
; SKX_32-NEXT: kmovw %eax, %k0
; SKX_32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; SKX_32-NEXT: movb {{[0-9]+}}(%esp), %al
; SKX_32-NEXT: kmovw %eax, %k1
; SKX_32-NEXT: kshiftlb $7, %k1, %k1
; SKX_32-NEXT: kshiftrb $7, %k1, %k1
; SKX_32-NEXT: kandw %k0, %k1, %k0
; SKX_32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; SKX_32-NEXT: movb {{[0-9]+}}(%esp), %al
; SKX_32-NEXT: kmovw %eax, %k1
; SKX_32-NEXT: kshiftlb $7, %k1, %k1
; SKX_32-NEXT: kshiftrb $6, %k1, %k1
; SKX_32-NEXT: korw %k1, %k0, %k0
; SKX_32-NEXT: movb $-5, %al
; SKX_32-NEXT: kmovw %eax, %k1
; SKX_32-NEXT: kandw %k1, %k0, %k0
; SKX_32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; SKX_32-NEXT: movb {{[0-9]+}}(%esp), %al
; SKX_32-NEXT: kmovw %eax, %k1
; SKX_32-NEXT: kshiftlb $7, %k1, %k1
; SKX_32-NEXT: kshiftrb $5, %k1, %k1
Expand Down Expand Up @@ -2642,19 +2642,19 @@ define void @test30b(<3 x ptr> %base, <3 x i32> %ind, <3 x i1> %mask, <3 x i32>
; KNL_32-NEXT: # kill: def $xmm2 killed $xmm2 def $zmm2
; KNL_32-NEXT: movw $-3, %ax
; KNL_32-NEXT: kmovw %eax, %k0
; KNL_32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; KNL_32-NEXT: movb {{[0-9]+}}(%esp), %al
; KNL_32-NEXT: andl $1, %eax
; KNL_32-NEXT: kmovw %eax, %k1
; KNL_32-NEXT: kandw %k0, %k1, %k0
; KNL_32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; KNL_32-NEXT: movb {{[0-9]+}}(%esp), %al
; KNL_32-NEXT: kmovw %eax, %k1
; KNL_32-NEXT: kshiftlw $15, %k1, %k1
; KNL_32-NEXT: kshiftrw $14, %k1, %k1
; KNL_32-NEXT: korw %k1, %k0, %k0
; KNL_32-NEXT: movw $-5, %ax
; KNL_32-NEXT: kmovw %eax, %k1
; KNL_32-NEXT: kandw %k1, %k0, %k0
; KNL_32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; KNL_32-NEXT: movb {{[0-9]+}}(%esp), %al
; KNL_32-NEXT: kmovw %eax, %k1
; KNL_32-NEXT: kshiftlw $15, %k1, %k1
; KNL_32-NEXT: kshiftrw $13, %k1, %k1
Expand Down Expand Up @@ -2697,20 +2697,20 @@ define void @test30b(<3 x ptr> %base, <3 x i32> %ind, <3 x i1> %mask, <3 x i32>
; SKX_32: # %bb.0:
; SKX_32-NEXT: movb $-3, %al
; SKX_32-NEXT: kmovw %eax, %k0
; SKX_32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; SKX_32-NEXT: movb {{[0-9]+}}(%esp), %al
; SKX_32-NEXT: kmovw %eax, %k1
; SKX_32-NEXT: kshiftlb $7, %k1, %k1
; SKX_32-NEXT: kshiftrb $7, %k1, %k1
; SKX_32-NEXT: kandw %k0, %k1, %k0
; SKX_32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; SKX_32-NEXT: movb {{[0-9]+}}(%esp), %al
; SKX_32-NEXT: kmovw %eax, %k1
; SKX_32-NEXT: kshiftlb $7, %k1, %k1
; SKX_32-NEXT: kshiftrb $6, %k1, %k1
; SKX_32-NEXT: korw %k1, %k0, %k0
; SKX_32-NEXT: movb $-5, %al
; SKX_32-NEXT: kmovw %eax, %k1
; SKX_32-NEXT: kandw %k1, %k0, %k0
; SKX_32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; SKX_32-NEXT: movb {{[0-9]+}}(%esp), %al
; SKX_32-NEXT: kmovw %eax, %k1
; SKX_32-NEXT: kshiftlb $7, %k1, %k1
; SKX_32-NEXT: kshiftrb $5, %k1, %k1
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/memcmp-more-load-pairs-x32.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -176,7 +176,7 @@ define i1 @length3_eq(ptr %X, ptr %Y) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzwl (%ecx), %edx
; X86-NEXT: xorw (%eax), %dx
; X86-NEXT: movzbl 2(%ecx), %ecx
; X86-NEXT: movb 2(%ecx), %cl
; X86-NEXT: xorb 2(%eax), %cl
; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: orw %dx, %ax
Expand Down Expand Up @@ -308,7 +308,7 @@ define i1 @length5_eq(ptr %X, ptr %Y) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl (%ecx), %edx
; X86-NEXT: xorl (%eax), %edx
; X86-NEXT: movzbl 4(%ecx), %ecx
; X86-NEXT: movb 4(%ecx), %cl
; X86-NEXT: xorb 4(%eax), %cl
; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: orl %edx, %eax
Expand Down Expand Up @@ -510,7 +510,7 @@ define i1 @length9_eq(ptr %X, ptr %Y) nounwind {
; X86-NEXT: xorl (%eax), %edx
; X86-NEXT: xorl 4(%eax), %esi
; X86-NEXT: orl %edx, %esi
; X86-NEXT: movzbl 8(%ecx), %ecx
; X86-NEXT: movb 8(%ecx), %cl
; X86-NEXT: xorb 8(%eax), %cl
; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: orl %esi, %eax
Expand Down Expand Up @@ -641,7 +641,7 @@ define i1 @length13_eq(ptr %X, ptr %Y) nounwind {
; X86-NEXT: orl %esi, %eax
; X86-NEXT: movl 8(%edx), %esi
; X86-NEXT: xorl 8(%ecx), %esi
; X86-NEXT: movzbl 12(%edx), %edx
; X86-NEXT: movb 12(%edx), %dl
; X86-NEXT: xorb 12(%ecx), %dl
; X86-NEXT: movzbl %dl, %ecx
; X86-NEXT: orl %esi, %ecx
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -165,7 +165,7 @@ define i1 @length3_eq(ptr %X, ptr %Y) nounwind {
; X64: # %bb.0:
; X64-NEXT: movzwl (%rdi), %eax
; X64-NEXT: xorw (%rsi), %ax
; X64-NEXT: movzbl 2(%rdi), %ecx
; X64-NEXT: movb 2(%rdi), %cl
; X64-NEXT: xorb 2(%rsi), %cl
; X64-NEXT: movzbl %cl, %ecx
; X64-NEXT: orw %ax, %cx
Expand Down Expand Up @@ -281,7 +281,7 @@ define i1 @length5_eq(ptr %X, ptr %Y) nounwind {
; X64: # %bb.0:
; X64-NEXT: movl (%rdi), %eax
; X64-NEXT: xorl (%rsi), %eax
; X64-NEXT: movzbl 4(%rdi), %ecx
; X64-NEXT: movb 4(%rdi), %cl
; X64-NEXT: xorb 4(%rsi), %cl
; X64-NEXT: movzbl %cl, %ecx
; X64-NEXT: orl %eax, %ecx
Expand Down Expand Up @@ -439,7 +439,7 @@ define i1 @length9_eq(ptr %X, ptr %Y) nounwind {
; X64: # %bb.0:
; X64-NEXT: movq (%rdi), %rax
; X64-NEXT: xorq (%rsi), %rax
; X64-NEXT: movzbl 8(%rdi), %ecx
; X64-NEXT: movb 8(%rdi), %cl
; X64-NEXT: xorb 8(%rsi), %cl
; X64-NEXT: movzbl %cl, %ecx
; X64-NEXT: orq %rax, %rcx
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/memcmp-x32.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -204,7 +204,7 @@ define i1 @length3_eq(ptr %X, ptr %Y) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzwl (%ecx), %edx
; X86-NEXT: xorw (%eax), %dx
; X86-NEXT: movzbl 2(%ecx), %ecx
; X86-NEXT: movb 2(%ecx), %cl
; X86-NEXT: xorb 2(%eax), %cl
; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: orw %dx, %ax
Expand Down Expand Up @@ -336,7 +336,7 @@ define i1 @length5_eq(ptr %X, ptr %Y) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl (%ecx), %edx
; X86-NEXT: xorl (%eax), %edx
; X86-NEXT: movzbl 4(%ecx), %ecx
; X86-NEXT: movb 4(%ecx), %cl
; X86-NEXT: xorb 4(%eax), %cl
; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: orl %edx, %eax
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/memcmp.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -191,7 +191,7 @@ define i1 @length3_eq(ptr %X, ptr %Y) nounwind {
; X64: # %bb.0:
; X64-NEXT: movzwl (%rdi), %eax
; X64-NEXT: xorw (%rsi), %ax
; X64-NEXT: movzbl 2(%rdi), %ecx
; X64-NEXT: movb 2(%rdi), %cl
; X64-NEXT: xorb 2(%rsi), %cl
; X64-NEXT: movzbl %cl, %ecx
; X64-NEXT: orw %ax, %cx
Expand Down Expand Up @@ -307,7 +307,7 @@ define i1 @length5_eq(ptr %X, ptr %Y) nounwind {
; X64: # %bb.0:
; X64-NEXT: movl (%rdi), %eax
; X64-NEXT: xorl (%rsi), %eax
; X64-NEXT: movzbl 4(%rdi), %ecx
; X64-NEXT: movb 4(%rdi), %cl
; X64-NEXT: xorb 4(%rsi), %cl
; X64-NEXT: movzbl %cl, %ecx
; X64-NEXT: orl %eax, %ecx
Expand Down Expand Up @@ -465,7 +465,7 @@ define i1 @length9_eq(ptr %X, ptr %Y) nounwind {
; X64: # %bb.0:
; X64-NEXT: movq (%rdi), %rax
; X64-NEXT: xorq (%rsi), %rax
; X64-NEXT: movzbl 8(%rdi), %ecx
; X64-NEXT: movb 8(%rdi), %cl
; X64-NEXT: xorb 8(%rsi), %cl
; X64-NEXT: movzbl %cl, %ecx
; X64-NEXT: orq %rax, %rcx
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/X86/memcpy.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -467,7 +467,7 @@ define void @PR15348(ptr %a, ptr %b) {
; unaligned loads and stores.
; DARWIN-LABEL: PR15348:
; DARWIN: ## %bb.0:
; DARWIN-NEXT: movzbl 16(%rsi), %eax
; DARWIN-NEXT: movb 16(%rsi), %al
; DARWIN-NEXT: movb %al, 16(%rdi)
; DARWIN-NEXT: movq (%rsi), %rax
; DARWIN-NEXT: movq 8(%rsi), %rcx
Expand All @@ -477,7 +477,7 @@ define void @PR15348(ptr %a, ptr %b) {
;
; LINUX-LABEL: PR15348:
; LINUX: # %bb.0:
; LINUX-NEXT: movzbl 16(%rsi), %eax
; LINUX-NEXT: movb 16(%rsi), %al
; LINUX-NEXT: movb %al, 16(%rdi)
; LINUX-NEXT: movq (%rsi), %rax
; LINUX-NEXT: movq 8(%rsi), %rcx
Expand All @@ -487,31 +487,31 @@ define void @PR15348(ptr %a, ptr %b) {
;
; LINUX-SKL-LABEL: PR15348:
; LINUX-SKL: # %bb.0:
; LINUX-SKL-NEXT: movzbl 16(%rsi), %eax
; LINUX-SKL-NEXT: movb 16(%rsi), %al
; LINUX-SKL-NEXT: movb %al, 16(%rdi)
; LINUX-SKL-NEXT: vmovups (%rsi), %xmm0
; LINUX-SKL-NEXT: vmovups %xmm0, (%rdi)
; LINUX-SKL-NEXT: retq
;
; LINUX-SKX-LABEL: PR15348:
; LINUX-SKX: # %bb.0:
; LINUX-SKX-NEXT: movzbl 16(%rsi), %eax
; LINUX-SKX-NEXT: movb 16(%rsi), %al
; LINUX-SKX-NEXT: movb %al, 16(%rdi)
; LINUX-SKX-NEXT: vmovups (%rsi), %xmm0
; LINUX-SKX-NEXT: vmovups %xmm0, (%rdi)
; LINUX-SKX-NEXT: retq
;
; LINUX-KNL-LABEL: PR15348:
; LINUX-KNL: # %bb.0:
; LINUX-KNL-NEXT: movzbl 16(%rsi), %eax
; LINUX-KNL-NEXT: movb 16(%rsi), %al
; LINUX-KNL-NEXT: movb %al, 16(%rdi)
; LINUX-KNL-NEXT: vmovups (%rsi), %xmm0
; LINUX-KNL-NEXT: vmovups %xmm0, (%rdi)
; LINUX-KNL-NEXT: retq
;
; LINUX-AVX512BW-LABEL: PR15348:
; LINUX-AVX512BW: # %bb.0:
; LINUX-AVX512BW-NEXT: movzbl 16(%rsi), %eax
; LINUX-AVX512BW-NEXT: movb 16(%rsi), %al
; LINUX-AVX512BW-NEXT: movb %al, 16(%rdi)
; LINUX-AVX512BW-NEXT: vmovups (%rsi), %xmm0
; LINUX-AVX512BW-NEXT: vmovups %xmm0, (%rdi)
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -893,8 +893,8 @@ define <16 x i8> @merge_16i8_i8_01u3456789ABCDuF(ptr %ptr) nounwind uwtable noin
; X86-SSE1-NEXT: movl 3(%ecx), %esi
; X86-SSE1-NEXT: movl 7(%ecx), %edi
; X86-SSE1-NEXT: movzwl 11(%ecx), %ebx
; X86-SSE1-NEXT: movzbl 13(%ecx), %edx
; X86-SSE1-NEXT: movzbl 15(%ecx), %ecx
; X86-SSE1-NEXT: movb 13(%ecx), %dl
; X86-SSE1-NEXT: movb 15(%ecx), %cl
; X86-SSE1-NEXT: movb %dl, 13(%eax)
; X86-SSE1-NEXT: movb %cl, 15(%eax)
; X86-SSE1-NEXT: movw %bx, 11(%eax)
Expand Down Expand Up @@ -976,7 +976,7 @@ define <16 x i8> @merge_16i8_i8_01u3uuzzuuuuuzzz(ptr %ptr) nounwind uwtable noin
; X86-SSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-SSE1-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-SSE1-NEXT: movzwl (%ecx), %edx
; X86-SSE1-NEXT: movzbl 3(%ecx), %ecx
; X86-SSE1-NEXT: movb 3(%ecx), %cl
; X86-SSE1-NEXT: movb %cl, 3(%eax)
; X86-SSE1-NEXT: movw %dx, (%eax)
; X86-SSE1-NEXT: movb $0, 15(%eax)
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,10 +7,10 @@

; X86-LABEL: {{^}}merge_store_partial_overlap_load:
; X86-DAG: movzwl ([[BASEREG:%[a-z]+]]), %e[[LO2:[a-z]+]]
; X86-DAG: movzbl 2([[BASEREG]]), %e[[HI1:[a-z]]]
; X86-DAG: movb 2([[BASEREG]]), [[HI1:%[a-z]+]]

; X86-NEXT: movw %[[LO2]], 1([[BASEREG]])
; X86-NEXT: movb %[[HI1]]l, 3([[BASEREG]])
; X86-NEXT: movb [[HI1]], 3([[BASEREG]])
; X86-NEXT: retq

; DBGDAG-LABEL: Optimized legalized selection DAG: %bb.0 'merge_store_partial_overlap_load:'
Expand Down
20 changes: 10 additions & 10 deletions llvm/test/CodeGen/X86/midpoint-int.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -967,8 +967,8 @@ define i8 @scalar_i8_signed_reg_reg(i8 %a1, i8 %a2) nounwind {
;
; X86-LABEL: scalar_i8_signed_reg_reg:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: cmpb %al, %cl
; X86-NEXT: setle %dl
; X86-NEXT: jg .LBB15_1
Expand Down Expand Up @@ -1017,8 +1017,8 @@ define i8 @scalar_i8_unsigned_reg_reg(i8 %a1, i8 %a2) nounwind {
;
; X86-LABEL: scalar_i8_unsigned_reg_reg:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: cmpb %al, %cl
; X86-NEXT: setbe %dl
; X86-NEXT: ja .LBB16_1
Expand Down Expand Up @@ -1070,9 +1070,9 @@ define i8 @scalar_i8_signed_mem_reg(ptr %a1_addr, i8 %a2) nounwind {
;
; X86-LABEL: scalar_i8_signed_mem_reg:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl (%ecx), %ecx
; X86-NEXT: movb (%ecx), %cl
; X86-NEXT: cmpb %al, %cl
; X86-NEXT: setle %dl
; X86-NEXT: jg .LBB17_1
Expand Down Expand Up @@ -1122,9 +1122,9 @@ define i8 @scalar_i8_signed_reg_mem(i8 %a1, ptr %a2_addr) nounwind {
;
; X86-LABEL: scalar_i8_signed_reg_mem:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl (%eax), %eax
; X86-NEXT: movb (%eax), %al
; X86-NEXT: cmpb %al, %cl
; X86-NEXT: setle %dl
; X86-NEXT: jg .LBB18_1
Expand Down Expand Up @@ -1177,8 +1177,8 @@ define i8 @scalar_i8_signed_mem_mem(ptr %a1_addr, ptr %a2_addr) nounwind {
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl (%ecx), %ecx
; X86-NEXT: movzbl (%eax), %eax
; X86-NEXT: movb (%ecx), %cl
; X86-NEXT: movb (%eax), %al
; X86-NEXT: cmpb %al, %cl
; X86-NEXT: setle %dl
; X86-NEXT: jg .LBB19_1
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/misched_phys_reg_assign_order.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@ define void @g() #0 {
; CHECK-NEXT: .cfi_offset %esi, -16
; CHECK-NEXT: .cfi_offset %ebx, -12
; CHECK-NEXT: movl f, %esi
; CHECK-NEXT: movzbl (%esi), %eax
; CHECK-NEXT: movb (%esi), %al
; CHECK-NEXT: movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %edx, %edx
Expand Down
22 changes: 11 additions & 11 deletions llvm/test/CodeGen/X86/movmsk-cmp.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4293,7 +4293,7 @@ define i1 @movmsk_v16i8_var(<16 x i8> %x, <16 x i8> %y, i32 %z) {
; SKX-NEXT: vpmovm2b %k0, %xmm0
; SKX-NEXT: vmovdqa %xmm0, -{{[0-9]+}}(%rsp)
; SKX-NEXT: andl $15, %edi
; SKX-NEXT: movzbl -24(%rsp,%rdi), %eax
; SKX-NEXT: movb -24(%rsp,%rdi), %al
; SKX-NEXT: retq
%cmp = icmp eq <16 x i8> %x, %y
%val = extractelement <16 x i1> %cmp, i32 %z
Expand Down Expand Up @@ -4329,7 +4329,7 @@ define i1 @movmsk_v8i16_var(<8 x i16> %x, <8 x i16> %y, i32 %z) {
; KNL-NEXT: vpmovdw %zmm0, %ymm0
; KNL-NEXT: vmovdqa %xmm0, -{{[0-9]+}}(%rsp)
; KNL-NEXT: andl $7, %edi
; KNL-NEXT: movzbl -24(%rsp,%rdi,2), %eax
; KNL-NEXT: movb -24(%rsp,%rdi,2), %al
; KNL-NEXT: vzeroupper
; KNL-NEXT: retq
;
Expand All @@ -4340,7 +4340,7 @@ define i1 @movmsk_v8i16_var(<8 x i16> %x, <8 x i16> %y, i32 %z) {
; SKX-NEXT: vpmovm2w %k0, %xmm0
; SKX-NEXT: vmovdqa %xmm0, -{{[0-9]+}}(%rsp)
; SKX-NEXT: andl $7, %edi
; SKX-NEXT: movzbl -24(%rsp,%rdi,2), %eax
; SKX-NEXT: movb -24(%rsp,%rdi,2), %al
; SKX-NEXT: retq
%cmp = icmp sgt <8 x i16> %x, %y
%val = extractelement <8 x i1> %cmp, i32 %z
Expand Down Expand Up @@ -4373,7 +4373,7 @@ define i1 @movmsk_v4i32_var(<4 x i32> %x, <4 x i32> %y, i32 %z) {
; KNL-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
; KNL-NEXT: vmovdqa %xmm0, -{{[0-9]+}}(%rsp)
; KNL-NEXT: andl $3, %edi
; KNL-NEXT: movzbl -24(%rsp,%rdi,4), %eax
; KNL-NEXT: movb -24(%rsp,%rdi,4), %al
; KNL-NEXT: vzeroupper
; KNL-NEXT: retq
;
Expand All @@ -4384,7 +4384,7 @@ define i1 @movmsk_v4i32_var(<4 x i32> %x, <4 x i32> %y, i32 %z) {
; SKX-NEXT: vpmovm2d %k0, %xmm0
; SKX-NEXT: vmovdqa %xmm0, -{{[0-9]+}}(%rsp)
; SKX-NEXT: andl $3, %edi
; SKX-NEXT: movzbl -24(%rsp,%rdi,4), %eax
; SKX-NEXT: movb -24(%rsp,%rdi,4), %al
; SKX-NEXT: retq
%cmp = icmp slt <4 x i32> %x, %y
%val = extractelement <4 x i1> %cmp, i32 %z
Expand Down Expand Up @@ -4430,7 +4430,7 @@ define i1 @movmsk_v2i64_var(<2 x i64> %x, <2 x i64> %y, i32 %z) {
; KNL-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
; KNL-NEXT: vmovdqa %xmm0, -{{[0-9]+}}(%rsp)
; KNL-NEXT: andl $1, %edi
; KNL-NEXT: movzbl -24(%rsp,%rdi,8), %eax
; KNL-NEXT: movb -24(%rsp,%rdi,8), %al
; KNL-NEXT: vzeroupper
; KNL-NEXT: retq
;
Expand All @@ -4441,7 +4441,7 @@ define i1 @movmsk_v2i64_var(<2 x i64> %x, <2 x i64> %y, i32 %z) {
; SKX-NEXT: vpmovm2q %k0, %xmm0
; SKX-NEXT: vmovdqa %xmm0, -{{[0-9]+}}(%rsp)
; SKX-NEXT: andl $1, %edi
; SKX-NEXT: movzbl -24(%rsp,%rdi,8), %eax
; SKX-NEXT: movb -24(%rsp,%rdi,8), %al
; SKX-NEXT: retq
%cmp = icmp ne <2 x i64> %x, %y
%val = extractelement <2 x i1> %cmp, i32 %z
Expand Down Expand Up @@ -4477,7 +4477,7 @@ define i1 @movmsk_v4f32_var(<4 x float> %x, <4 x float> %y, i32 %z) {
; KNL-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
; KNL-NEXT: vmovdqa %xmm0, -{{[0-9]+}}(%rsp)
; KNL-NEXT: andl $3, %edi
; KNL-NEXT: movzbl -24(%rsp,%rdi,4), %eax
; KNL-NEXT: movb -24(%rsp,%rdi,4), %al
; KNL-NEXT: vzeroupper
; KNL-NEXT: retq
;
Expand All @@ -4488,7 +4488,7 @@ define i1 @movmsk_v4f32_var(<4 x float> %x, <4 x float> %y, i32 %z) {
; SKX-NEXT: vpmovm2d %k0, %xmm0
; SKX-NEXT: vmovdqa %xmm0, -{{[0-9]+}}(%rsp)
; SKX-NEXT: andl $3, %edi
; SKX-NEXT: movzbl -24(%rsp,%rdi,4), %eax
; SKX-NEXT: movb -24(%rsp,%rdi,4), %al
; SKX-NEXT: retq
%cmp = fcmp ueq <4 x float> %x, %y
%val = extractelement <4 x i1> %cmp, i32 %z
Expand Down Expand Up @@ -4521,7 +4521,7 @@ define i1 @movmsk_v2f64_var(<2 x double> %x, <2 x double> %y, i32 %z) {
; KNL-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
; KNL-NEXT: vmovdqa %xmm0, -{{[0-9]+}}(%rsp)
; KNL-NEXT: andl $1, %edi
; KNL-NEXT: movzbl -24(%rsp,%rdi,8), %eax
; KNL-NEXT: movb -24(%rsp,%rdi,8), %al
; KNL-NEXT: vzeroupper
; KNL-NEXT: retq
;
Expand All @@ -4532,7 +4532,7 @@ define i1 @movmsk_v2f64_var(<2 x double> %x, <2 x double> %y, i32 %z) {
; SKX-NEXT: vpmovm2q %k0, %xmm0
; SKX-NEXT: vmovdqa %xmm0, -{{[0-9]+}}(%rsp)
; SKX-NEXT: andl $1, %edi
; SKX-NEXT: movzbl -24(%rsp,%rdi,8), %eax
; SKX-NEXT: movb -24(%rsp,%rdi,8), %al
; SKX-NEXT: retq
%cmp = fcmp oge <2 x double> %x, %y
%val = extractelement <2 x i1> %cmp, i32 %z
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/musttail-varargs.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -82,7 +82,7 @@ define void @f_thunk(ptr %this, ...) {
; LINUX-NEXT: movq %rbp, %rdx
; LINUX-NEXT: movq %r13, %rcx
; LINUX-NEXT: movq %r12, %r8
; LINUX-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload
; LINUX-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
; LINUX-NEXT: movq %r15, %r9
; LINUX-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; LINUX-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
Expand Down Expand Up @@ -175,7 +175,7 @@ define void @f_thunk(ptr %this, ...) {
; LINUX-X32-NEXT: movq %rbp, %rdx
; LINUX-X32-NEXT: movq %r13, %rcx
; LINUX-X32-NEXT: movq %r12, %r8
; LINUX-X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; LINUX-X32-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
; LINUX-X32-NEXT: movq %r15, %r9
; LINUX-X32-NEXT: movaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 # 16-byte Reload
; LINUX-X32-NEXT: movaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 # 16-byte Reload
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/neg-abs.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ declare i128 @llvm.abs.i128(i128, i1)
define i8 @neg_abs_i8(i8 %x) nounwind {
; X86-LABEL: neg_abs_i8:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: sarb $7, %al
; X86-NEXT: xorb %al, %cl
Expand Down Expand Up @@ -154,7 +154,7 @@ define i128 @neg_abs_i128(i128 %x) nounwind {
define i8 @sub_abs_i8(i8 %x, i8 %y) nounwind {
; X86-LABEL: sub_abs_i8:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: sarb $7, %al
; X86-NEXT: xorb %al, %cl
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/negate-i1.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ define i8 @select_i8_neg1_or_0(i1 %a) {
;
; X32-LABEL: select_i8_neg1_or_0:
; X32: # %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $1, %al
; X32-NEXT: negb %al
; X32-NEXT: retl
Expand All @@ -31,7 +31,7 @@ define i8 @select_i8_neg1_or_0_zeroext(i1 zeroext %a) {
;
; X32-LABEL: select_i8_neg1_or_0_zeroext:
; X32: # %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: negb %al
; X32-NEXT: retl
%b = sext i1 %a to i8
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/oddshuffles.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -237,7 +237,7 @@ define void @v7i8(<4 x i8> %a, <4 x i8> %b, ptr %p) nounwind {
; SSE2-NEXT: pand %xmm2, %xmm1
; SSE2-NEXT: pandn %xmm0, %xmm2
; SSE2-NEXT: por %xmm1, %xmm2
; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al
; SSE2-NEXT: movb %al, 6(%rdi)
; SSE2-NEXT: movd %xmm2, (%rdi)
; SSE2-NEXT: pextrw $2, %xmm2, %eax
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/or-with-overflow.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
define i8 @or_i8_ri(i8 zeroext %0, i8 zeroext %1) {
; X86-LABEL: or_i8_ri:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: orb $-17, %cl
; X86-NEXT: je .LBB0_2
Expand All @@ -35,8 +35,8 @@ define i8 @or_i8_ri(i8 zeroext %0, i8 zeroext %1) {
define i8 @or_i8_rr(i8 zeroext %0, i8 zeroext %1) {
; X86-LABEL: or_i8_rr:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: orb %al, %cl
; X86-NEXT: je .LBB1_2
; X86-NEXT: # %bb.1:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/packed_struct.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,7 @@ entry:
define i8 @bar() nounwind {
; CHECK-LABEL: bar:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzbl bara+19, %eax
; CHECK-NEXT: movb bara+19, %al
; CHECK-NEXT: addb bara+4, %al
; CHECK-NEXT: retl
entry:
Expand Down
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