4 changes: 3 additions & 1 deletion clang/lib/Sema/SemaDeclAttr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -7368,7 +7368,9 @@ void Sema::ProcessDeclAttributeList(
// good to have a way to specify "these attributes must appear as a group",
// for these. Additionally, it would be good to have a way to specify "these
// attribute must never appear as a group" for attributes like cold and hot.
if (!D->hasAttr<OpenCLKernelAttr>()) {
if (!(D->hasAttr<OpenCLKernelAttr>() ||
(D->hasAttr<CUDAGlobalAttr>() &&
Context.getTargetInfo().getTriple().isSPIRV()))) {
// These attributes cannot be applied to a non-kernel function.
if (const auto *A = D->getAttr<ReqdWorkGroupSizeAttr>()) {
// FIXME: This emits a different error message than
Expand Down
2 changes: 1 addition & 1 deletion clang/lib/Sema/SemaExpr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -13821,7 +13821,7 @@ QualType Sema::CheckAssignmentOperands(Expr *LHSExpr, ExprResult &RHS,
CheckForNullPointerDereference(*this, LHSExpr);

AssignedEntity AE{LHSExpr};
checkExprLifetime(*this, AE, RHS.get());
checkAssignmentLifetime(*this, AE, RHS.get());

if (getLangOpts().CPlusPlus20 && LHSType.isVolatileQualified()) {
if (CompoundType.isNull()) {
Expand Down
3 changes: 2 additions & 1 deletion clang/lib/Sema/SemaFunctionEffects.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -807,7 +807,8 @@ class Analyzer {

auto MaybeAddTemplateNote = [&](const Decl *D) {
if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
while (FD != nullptr && FD->isTemplateInstantiation()) {
while (FD != nullptr && FD->isTemplateInstantiation() &&
FD->getPointOfInstantiation().isValid()) {
S.Diag(FD->getPointOfInstantiation(),
diag::note_func_effect_from_template);
FD = FD->getTemplateInstantiationPattern();
Expand Down
2 changes: 1 addition & 1 deletion clang/lib/Sema/SemaInit.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -7401,7 +7401,7 @@ PerformConstructorInitialization(Sema &S,

void Sema::checkInitializerLifetime(const InitializedEntity &Entity,
Expr *Init) {
return sema::checkExprLifetime(*this, Entity, Init);
return sema::checkInitLifetime(*this, Entity, Init);
}

static void DiagnoseNarrowingInInitList(Sema &S,
Expand Down
3 changes: 1 addition & 2 deletions clang/lib/Sema/SemaLambda.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1950,8 +1950,6 @@ ExprResult Sema::ActOnLambdaExpr(SourceLocation StartLoc, Stmt *Body) {
LambdaScopeInfo LSI = *cast<LambdaScopeInfo>(FunctionScopes.back());
ActOnFinishFunctionBody(LSI.CallOperator, Body);

maybeAddDeclWithEffects(LSI.CallOperator);

return BuildLambdaExpr(StartLoc, Body->getEndLoc(), &LSI);
}

Expand Down Expand Up @@ -2284,6 +2282,7 @@ ExprResult Sema::BuildLambdaExpr(SourceLocation StartLoc, SourceLocation EndLoc,
case ExpressionEvaluationContext::PotentiallyEvaluatedIfUsed:
break;
}
maybeAddDeclWithEffects(LSI->CallOperator);
}

return MaybeBindToTemporary(Lambda);
Expand Down
2 changes: 1 addition & 1 deletion clang/lib/Sema/SemaOverload.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -14809,7 +14809,7 @@ ExprResult Sema::CreateOverloadedBinOp(SourceLocation OpLoc,
// Check for a self move.
DiagnoseSelfMove(Args[0], Args[1], OpLoc);
// lifetime check.
checkExprLifetime(
checkAssignmentLifetime(
*this, AssignedEntity{Args[0], dyn_cast<CXXMethodDecl>(FnDecl)},
Args[1]);
}
Expand Down
47 changes: 30 additions & 17 deletions clang/lib/Sema/SemaStmt.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -200,23 +200,30 @@ static bool DiagnoseUnusedComparison(Sema &S, const Expr *E) {
return true;
}

static bool DiagnoseNoDiscard(Sema &S, const WarnUnusedResultAttr *A,
SourceLocation Loc, SourceRange R1,
SourceRange R2, bool IsCtor) {
static bool DiagnoseNoDiscard(Sema &S, const NamedDecl *OffendingDecl,
const WarnUnusedResultAttr *A, SourceLocation Loc,
SourceRange R1, SourceRange R2, bool IsCtor) {
if (!A)
return false;
StringRef Msg = A->getMessage();

if (Msg.empty()) {
if (OffendingDecl)
return S.Diag(Loc, diag::warn_unused_return_type)
<< IsCtor << A << OffendingDecl << false << R1 << R2;
if (IsCtor)
return S.Diag(Loc, diag::warn_unused_constructor) << A << R1 << R2;
return S.Diag(Loc, diag::warn_unused_result) << A << R1 << R2;
return S.Diag(Loc, diag::warn_unused_constructor)
<< A << false << R1 << R2;
return S.Diag(Loc, diag::warn_unused_result) << A << false << R1 << R2;
}

if (OffendingDecl)
return S.Diag(Loc, diag::warn_unused_return_type)
<< IsCtor << A << OffendingDecl << true << Msg << R1 << R2;
if (IsCtor)
return S.Diag(Loc, diag::warn_unused_constructor_msg) << A << Msg << R1
<< R2;
return S.Diag(Loc, diag::warn_unused_result_msg) << A << Msg << R1 << R2;
return S.Diag(Loc, diag::warn_unused_constructor)
<< A << true << Msg << R1 << R2;
return S.Diag(Loc, diag::warn_unused_result) << A << true << Msg << R1 << R2;
}

void Sema::DiagnoseUnusedExprResult(const Stmt *S, unsigned DiagID) {
Expand Down Expand Up @@ -286,9 +293,10 @@ void Sema::DiagnoseUnusedExprResult(const Stmt *S, unsigned DiagID) {
if (E->getType()->isVoidType())
return;

if (DiagnoseNoDiscard(*this, cast_or_null<WarnUnusedResultAttr>(
CE->getUnusedResultAttr(Context)),
Loc, R1, R2, /*isCtor=*/false))
auto [OffendingDecl, A] = CE->getUnusedResultAttr(Context);
if (DiagnoseNoDiscard(*this, OffendingDecl,
cast_or_null<WarnUnusedResultAttr>(A), Loc, R1, R2,
/*isCtor=*/false))
return;

// If the callee has attribute pure, const, or warn_unused_result, warn with
Expand All @@ -309,16 +317,21 @@ void Sema::DiagnoseUnusedExprResult(const Stmt *S, unsigned DiagID) {
}
} else if (const auto *CE = dyn_cast<CXXConstructExpr>(E)) {
if (const CXXConstructorDecl *Ctor = CE->getConstructor()) {
const NamedDecl *OffendingDecl = nullptr;
const auto *A = Ctor->getAttr<WarnUnusedResultAttr>();
A = A ? A : Ctor->getParent()->getAttr<WarnUnusedResultAttr>();
if (DiagnoseNoDiscard(*this, A, Loc, R1, R2, /*isCtor=*/true))
if (!A) {
OffendingDecl = Ctor->getParent();
A = OffendingDecl->getAttr<WarnUnusedResultAttr>();
}
if (DiagnoseNoDiscard(*this, OffendingDecl, A, Loc, R1, R2,
/*isCtor=*/true))
return;
}
} else if (const auto *ILE = dyn_cast<InitListExpr>(E)) {
if (const TagDecl *TD = ILE->getType()->getAsTagDecl()) {

if (DiagnoseNoDiscard(*this, TD->getAttr<WarnUnusedResultAttr>(), Loc, R1,
R2, /*isCtor=*/false))
if (DiagnoseNoDiscard(*this, TD, TD->getAttr<WarnUnusedResultAttr>(), Loc,
R1, R2, /*isCtor=*/false))
return;
}
} else if (ShouldSuppress)
Expand All @@ -332,8 +345,8 @@ void Sema::DiagnoseUnusedExprResult(const Stmt *S, unsigned DiagID) {
}
const ObjCMethodDecl *MD = ME->getMethodDecl();
if (MD) {
if (DiagnoseNoDiscard(*this, MD->getAttr<WarnUnusedResultAttr>(), Loc, R1,
R2, /*isCtor=*/false))
if (DiagnoseNoDiscard(*this, nullptr, MD->getAttr<WarnUnusedResultAttr>(),
Loc, R1, R2, /*isCtor=*/false))
return;
}
} else if (const PseudoObjectExpr *POE = dyn_cast<PseudoObjectExpr>(E)) {
Expand Down
14 changes: 11 additions & 3 deletions clang/lib/Sema/SemaType.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4882,9 +4882,17 @@ static TypeSourceInfo *GetFullTypeForDeclarator(TypeProcessingState &state,
cast<AutoType>(T)->getKeyword() !=
AutoTypeKeyword::Auto ||
cast<AutoType>(T)->isConstrained())) {
S.Diag(D.getDeclSpec().getTypeSpecTypeLoc(),
diag::err_trailing_return_without_auto)
<< T << D.getDeclSpec().getSourceRange();
// Attach a valid source location for diagnostics on functions with
// trailing return types missing 'auto'. Attempt to get the location
// from the declared type; if invalid, fall back to the trailing
// return type's location.
SourceLocation Loc = D.getDeclSpec().getTypeSpecTypeLoc();
SourceRange SR = D.getDeclSpec().getSourceRange();
if (Loc.isInvalid()) {
Loc = FTI.getTrailingReturnTypeLoc();
SR = D.getSourceRange();
}
S.Diag(Loc, diag::err_trailing_return_without_auto) << T << SR;
D.setInvalidType(true);
// FIXME: recover and fill decls in `TypeLoc`s.
AreDeclaratorChunksValid = false;
Expand Down
224 changes: 120 additions & 104 deletions clang/lib/Serialization/ASTReader.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3092,98 +3092,97 @@ ASTReader::ReadControlBlock(ModuleFile &F,
break;
}

case IMPORTS: {
case IMPORT: {
// Validate the AST before processing any imports (otherwise, untangling
// them can be error-prone and expensive). A module will have a name and
// will already have been validated, but this catches the PCH case.
if (ASTReadResult Result = readUnhashedControlBlockOnce())
return Result;

// Load each of the imported PCH files.
unsigned Idx = 0, N = Record.size();
while (Idx < N) {
// Read information about the AST file.
ModuleKind ImportedKind = (ModuleKind)Record[Idx++];
// Whether we're importing a standard c++ module.
bool IsImportingStdCXXModule = Record[Idx++];
// The import location will be the local one for now; we will adjust
// all import locations of module imports after the global source
// location info are setup, in ReadAST.
auto [ImportLoc, ImportModuleFileIndex] =
ReadUntranslatedSourceLocation(Record[Idx++]);
// The import location must belong to the current module file itself.
assert(ImportModuleFileIndex == 0);
off_t StoredSize = !IsImportingStdCXXModule ? (off_t)Record[Idx++] : 0;
time_t StoredModTime =
!IsImportingStdCXXModule ? (time_t)Record[Idx++] : 0;

ASTFileSignature StoredSignature;
if (!IsImportingStdCXXModule) {
auto FirstSignatureByte = Record.begin() + Idx;
StoredSignature = ASTFileSignature::create(
FirstSignatureByte, FirstSignatureByte + ASTFileSignature::size);
Idx += ASTFileSignature::size;
}
unsigned Idx = 0;
// Read information about the AST file.
ModuleKind ImportedKind = (ModuleKind)Record[Idx++];

// The import location will be the local one for now; we will adjust
// all import locations of module imports after the global source
// location info are setup, in ReadAST.
auto [ImportLoc, ImportModuleFileIndex] =
ReadUntranslatedSourceLocation(Record[Idx++]);
// The import location must belong to the current module file itself.
assert(ImportModuleFileIndex == 0);

StringRef ImportedName = ReadStringBlob(Record, Idx, Blob);

bool IsImportingStdCXXModule = Record[Idx++];

off_t StoredSize = 0;
time_t StoredModTime = 0;
ASTFileSignature StoredSignature;
std::string ImportedFile;

// For prebuilt and explicit modules first consult the file map for
// an override. Note that here we don't search prebuilt module
// directories if we're not importing standard c++ module, only the
// explicit name to file mappings. Also, we will still verify the
// size/signature making sure it is essentially the same file but
// perhaps in a different location.
if (ImportedKind == MK_PrebuiltModule || ImportedKind == MK_ExplicitModule)
ImportedFile = PP.getHeaderSearchInfo().getPrebuiltModuleFileName(
ImportedName, /*FileMapOnly*/ !IsImportingStdCXXModule);

if (IsImportingStdCXXModule && ImportedFile.empty()) {
Diag(diag::err_failed_to_find_module_file) << ImportedName;
return Missing;
}

std::string ImportedName = ReadString(Record, Idx);
std::string ImportedFile;

// For prebuilt and explicit modules first consult the file map for
// an override. Note that here we don't search prebuilt module
// directories if we're not importing standard c++ module, only the
// explicit name to file mappings. Also, we will still verify the
// size/signature making sure it is essentially the same file but
// perhaps in a different location.
if (ImportedKind == MK_PrebuiltModule || ImportedKind == MK_ExplicitModule)
ImportedFile = PP.getHeaderSearchInfo().getPrebuiltModuleFileName(
ImportedName, /*FileMapOnly*/ !IsImportingStdCXXModule);

// For C++20 Modules, we won't record the path to the imported modules
// in the BMI
if (!IsImportingStdCXXModule) {
if (ImportedFile.empty()) {
// Use BaseDirectoryAsWritten to ensure we use the same path in the
// ModuleCache as when writing.
ImportedFile = ReadPath(BaseDirectoryAsWritten, Record, Idx);
} else
SkipPath(Record, Idx);
} else if (ImportedFile.empty()) {
Diag(clang::diag::err_failed_to_find_module_file) << ImportedName;
return Missing;
}
if (!IsImportingStdCXXModule) {
StoredSize = (off_t)Record[Idx++];
StoredModTime = (time_t)Record[Idx++];

// If our client can't cope with us being out of date, we can't cope with
// our dependency being missing.
unsigned Capabilities = ClientLoadCapabilities;
if ((ClientLoadCapabilities & ARR_OutOfDate) == 0)
Capabilities &= ~ARR_Missing;

// Load the AST file.
auto Result = ReadASTCore(ImportedFile, ImportedKind, ImportLoc, &F,
Loaded, StoredSize, StoredModTime,
StoredSignature, Capabilities);

// If we diagnosed a problem, produce a backtrace.
bool recompilingFinalized =
Result == OutOfDate && (Capabilities & ARR_OutOfDate) &&
getModuleManager().getModuleCache().isPCMFinal(F.FileName);
if (isDiagnosedResult(Result, Capabilities) || recompilingFinalized)
Diag(diag::note_module_file_imported_by)
<< F.FileName << !F.ModuleName.empty() << F.ModuleName;
if (recompilingFinalized)
Diag(diag::note_module_file_conflict);

switch (Result) {
case Failure: return Failure;
// If we have to ignore the dependency, we'll have to ignore this too.
case Missing:
case OutOfDate: return OutOfDate;
case VersionMismatch: return VersionMismatch;
case ConfigurationMismatch: return ConfigurationMismatch;
case HadErrors: return HadErrors;
case Success: break;
StringRef SignatureBytes = Blob.substr(0, ASTFileSignature::size);
StoredSignature = ASTFileSignature::create(SignatureBytes.begin(),
SignatureBytes.end());
Blob = Blob.substr(ASTFileSignature::size);

if (ImportedFile.empty()) {
// Use BaseDirectoryAsWritten to ensure we use the same path in the
// ModuleCache as when writing.
ImportedFile =
ReadPathBlob(BaseDirectoryAsWritten, Record, Idx, Blob);
}
}

// If our client can't cope with us being out of date, we can't cope with
// our dependency being missing.
unsigned Capabilities = ClientLoadCapabilities;
if ((ClientLoadCapabilities & ARR_OutOfDate) == 0)
Capabilities &= ~ARR_Missing;

// Load the AST file.
auto Result = ReadASTCore(ImportedFile, ImportedKind, ImportLoc, &F,
Loaded, StoredSize, StoredModTime,
StoredSignature, Capabilities);

// If we diagnosed a problem, produce a backtrace.
bool recompilingFinalized =
Result == OutOfDate && (Capabilities & ARR_OutOfDate) &&
getModuleManager().getModuleCache().isPCMFinal(F.FileName);
if (isDiagnosedResult(Result, Capabilities) || recompilingFinalized)
Diag(diag::note_module_file_imported_by)
<< F.FileName << !F.ModuleName.empty() << F.ModuleName;
if (recompilingFinalized)
Diag(diag::note_module_file_conflict);

switch (Result) {
case Failure: return Failure;
// If we have to ignore the dependency, we'll have to ignore this too.
case Missing:
case OutOfDate: return OutOfDate;
case VersionMismatch: return VersionMismatch;
case ConfigurationMismatch: return ConfigurationMismatch;
case HadErrors: return HadErrors;
case Success: break;
}
break;
}

Expand Down Expand Up @@ -5624,36 +5623,38 @@ bool ASTReader::readASTFileControlBlock(
break;
}

case IMPORTS: {
case IMPORT: {
if (!NeedsImports)
break;

unsigned Idx = 0, N = Record.size();
while (Idx < N) {
// Read information about the AST file.
unsigned Idx = 0;
// Read information about the AST file.

// Skip Kind
Idx++;

// Skip Kind
Idx++;
bool IsStandardCXXModule = Record[Idx++];
// Skip ImportLoc
Idx++;

// Skip ImportLoc
Idx++;
StringRef ModuleName = ReadStringBlob(Record, Idx, Blob);

// In C++20 Modules, we don't record the path to imported
// modules in the BMI files.
if (IsStandardCXXModule) {
std::string ModuleName = ReadString(Record, Idx);
Listener.visitImport(ModuleName, /*Filename=*/"");
continue;
}
bool IsStandardCXXModule = Record[Idx++];

// Skip Size, ModTime and Signature
Idx += 1 + 1 + ASTFileSignature::size;
std::string ModuleName = ReadString(Record, Idx);
std::string FilenameStr = ReadString(Record, Idx);
auto Filename = ResolveImportedPath(PathBuf, FilenameStr, ModuleDir);
Listener.visitImport(ModuleName, *Filename);
// In C++20 Modules, we don't record the path to imported
// modules in the BMI files.
if (IsStandardCXXModule) {
Listener.visitImport(ModuleName, /*Filename=*/"");
continue;
}

// Skip Size and ModTime.
Idx += 1 + 1;
// Skip signature.
Blob = Blob.substr(ASTFileSignature::size);

StringRef FilenameStr = ReadStringBlob(Record, Idx, Blob);
auto Filename = ResolveImportedPath(PathBuf, FilenameStr, ModuleDir);
Listener.visitImport(ModuleName, *Filename);
break;
}

Expand Down Expand Up @@ -9602,6 +9603,14 @@ std::string ASTReader::ReadString(const RecordDataImpl &Record, unsigned &Idx) {
return Result;
}

StringRef ASTReader::ReadStringBlob(const RecordDataImpl &Record, unsigned &Idx,
StringRef &Blob) {
unsigned Len = Record[Idx++];
StringRef Result = Blob.substr(0, Len);
Blob = Blob.substr(Len);
return Result;
}

std::string ASTReader::ReadPath(ModuleFile &F, const RecordData &Record,
unsigned &Idx) {
return ReadPath(F.BaseDirectory, Record, Idx);
Expand All @@ -9613,6 +9622,13 @@ std::string ASTReader::ReadPath(StringRef BaseDirectory,
return ResolveImportedPathAndAllocate(PathBuf, Filename, BaseDirectory);
}

std::string ASTReader::ReadPathBlob(StringRef BaseDirectory,
const RecordData &Record, unsigned &Idx,
StringRef &Blob) {
StringRef Filename = ReadStringBlob(Record, Idx, Blob);
return ResolveImportedPathAndAllocate(PathBuf, Filename, BaseDirectory);
}

VersionTuple ASTReader::ReadVersionTuple(const RecordData &Record,
unsigned &Idx) {
unsigned Major = Record[Idx++];
Expand Down
56 changes: 44 additions & 12 deletions clang/lib/Serialization/ASTWriter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -878,7 +878,7 @@ void ASTWriter::WriteBlockInfoBlock() {
RECORD(MODULE_NAME);
RECORD(MODULE_DIRECTORY);
RECORD(MODULE_MAP_FILE);
RECORD(IMPORTS);
RECORD(IMPORT);
RECORD(ORIGINAL_FILE);
RECORD(ORIGINAL_FILE_ID);
RECORD(INPUT_FILE_OFFSETS);
Expand Down Expand Up @@ -1536,34 +1536,53 @@ void ASTWriter::WriteControlBlock(Preprocessor &PP, StringRef isysroot) {

// Imports
if (Chain) {
serialization::ModuleManager &Mgr = Chain->getModuleManager();
Record.clear();
auto Abbrev = std::make_shared<BitCodeAbbrev>();
Abbrev->Add(BitCodeAbbrevOp(IMPORT));
Abbrev->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 3)); // Kind
Abbrev->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // ImportLoc
Abbrev->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // Module name len
Abbrev->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 1)); // Standard C++ mod
Abbrev->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // File size
Abbrev->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // File timestamp
Abbrev->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // File name len
Abbrev->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Blob)); // Strings
unsigned AbbrevCode = Stream.EmitAbbrev(std::move(Abbrev));

for (ModuleFile &M : Mgr) {
SmallString<128> Blob;

for (ModuleFile &M : Chain->getModuleManager()) {
// Skip modules that weren't directly imported.
if (!M.isDirectlyImported())
continue;

Record.clear();
Blob.clear();

Record.push_back(IMPORT);
Record.push_back((unsigned)M.Kind); // FIXME: Stable encoding
Record.push_back(M.StandardCXXModule);
AddSourceLocation(M.ImportLoc, Record);
AddStringBlob(M.ModuleName, Record, Blob);
Record.push_back(M.StandardCXXModule);

// We don't want to hard code the information about imported modules
// in the C++20 named modules.
if (!M.StandardCXXModule) {
if (M.StandardCXXModule) {
Record.push_back(0);
Record.push_back(0);
Record.push_back(0);
} else {
// If we have calculated signature, there is no need to store
// the size or timestamp.
Record.push_back(M.Signature ? 0 : M.File.getSize());
Record.push_back(M.Signature ? 0 : getTimestampForOutput(M.File));
llvm::append_range(Record, M.Signature);
}

AddString(M.ModuleName, Record);
llvm::append_range(Blob, M.Signature);

if (!M.StandardCXXModule)
AddPath(M.FileName, Record);
AddPathBlob(M.FileName, Record, Blob);
}

Stream.EmitRecordWithBlob(AbbrevCode, Record, Blob);
}
Stream.EmitRecord(IMPORTS, Record);
}

// Write the options block.
Expand Down Expand Up @@ -4777,6 +4796,12 @@ void ASTWriter::AddString(StringRef Str, RecordDataImpl &Record) {
Record.insert(Record.end(), Str.begin(), Str.end());
}

void ASTWriter::AddStringBlob(StringRef Str, RecordDataImpl &Record,
SmallVectorImpl<char> &Blob) {
Record.push_back(Str.size());
Blob.insert(Blob.end(), Str.begin(), Str.end());
}

bool ASTWriter::PreparePathForOutput(SmallVectorImpl<char> &Path) {
assert(WritingAST && "can't prepare path for output when not writing AST");

Expand Down Expand Up @@ -4805,6 +4830,13 @@ void ASTWriter::AddPath(StringRef Path, RecordDataImpl &Record) {
AddString(FilePath, Record);
}

void ASTWriter::AddPathBlob(StringRef Path, RecordDataImpl &Record,
SmallVectorImpl<char> &Blob) {
SmallString<128> FilePath(Path);
PreparePathForOutput(FilePath);
AddStringBlob(FilePath, Record, Blob);
}

void ASTWriter::EmitRecordWithPath(unsigned Abbrev, RecordDataRef Record,
StringRef Path) {
SmallString<128> FilePath(Path);
Expand Down
108 changes: 52 additions & 56 deletions clang/lib/Serialization/GlobalModuleIndex.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -614,62 +614,58 @@ llvm::Error GlobalModuleIndexBuilder::loadModuleFile(FileEntryRef File) {
unsigned Code = MaybeCode.get();

// Handle module dependencies.
if (State == ControlBlock && Code == IMPORTS) {
// Load each of the imported PCH files.
unsigned Idx = 0, N = Record.size();
while (Idx < N) {
// Read information about the AST file.

// Skip the imported kind
++Idx;

// Skip if it is standard C++ module
++Idx;

// Skip the import location
++Idx;

// Load stored size/modification time.
off_t StoredSize = (off_t)Record[Idx++];
time_t StoredModTime = (time_t)Record[Idx++];

// Skip the stored signature.
// FIXME: we could read the signature out of the import and validate it.
auto FirstSignatureByte = Record.begin() + Idx;
ASTFileSignature StoredSignature = ASTFileSignature::create(
FirstSignatureByte, FirstSignatureByte + ASTFileSignature::size);
Idx += ASTFileSignature::size;

// Skip the module name (currently this is only used for prebuilt
// modules while here we are only dealing with cached).
Idx += Record[Idx] + 1;

// Retrieve the imported file name.
unsigned Length = Record[Idx++];
SmallString<128> ImportedFile(Record.begin() + Idx,
Record.begin() + Idx + Length);
Idx += Length;

// Find the imported module file.
auto DependsOnFile =
FileMgr.getOptionalFileRef(ImportedFile, /*OpenFile=*/false,
/*CacheFailure=*/false);

if (!DependsOnFile)
return llvm::createStringError(std::errc::bad_file_descriptor,
"imported file \"%s\" not found",
ImportedFile.c_str());

// Save the information in ImportedModuleFileInfo so we can verify after
// loading all pcms.
ImportedModuleFiles.insert(std::make_pair(
*DependsOnFile, ImportedModuleFileInfo(StoredSize, StoredModTime,
StoredSignature)));

// Record the dependency.
unsigned DependsOnID = getModuleFileInfo(*DependsOnFile).ID;
getModuleFileInfo(File).Dependencies.push_back(DependsOnID);
}
if (State == ControlBlock && Code == IMPORT) {
unsigned Idx = 0;
// Read information about the AST file.

// Skip the imported kind
++Idx;

// Skip the import location
++Idx;

// Skip the module name (currently this is only used for prebuilt
// modules while here we are only dealing with cached).
Blob = Blob.substr(Record[Idx++]);

// Skip if it is standard C++ module
++Idx;

// Load stored size/modification time.
off_t StoredSize = (off_t)Record[Idx++];
time_t StoredModTime = (time_t)Record[Idx++];

// Skip the stored signature.
// FIXME: we could read the signature out of the import and validate it.
StringRef SignatureBytes = Blob.substr(0, ASTFileSignature::size);
auto StoredSignature = ASTFileSignature::create(SignatureBytes.begin(),
SignatureBytes.end());
Blob = Blob.substr(ASTFileSignature::size);

// Retrieve the imported file name.
unsigned Length = Record[Idx++];
StringRef ImportedFile = Blob.substr(0, Length);
Blob = Blob.substr(Length);

// Find the imported module file.
auto DependsOnFile =
FileMgr.getOptionalFileRef(ImportedFile, /*OpenFile=*/false,
/*CacheFailure=*/false);

if (!DependsOnFile)
return llvm::createStringError(std::errc::bad_file_descriptor,
"imported file \"%s\" not found",
std::string(ImportedFile).c_str());

// Save the information in ImportedModuleFileInfo so we can verify after
// loading all pcms.
ImportedModuleFiles.insert(std::make_pair(
*DependsOnFile, ImportedModuleFileInfo(StoredSize, StoredModTime,
StoredSignature)));

// Record the dependency.
unsigned DependsOnID = getModuleFileInfo(*DependsOnFile).ID;
getModuleFileInfo(File).Dependencies.push_back(DependsOnID);

continue;
}
Expand Down
6 changes: 3 additions & 3 deletions clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
Original file line number Diff line number Diff line change
Expand Up @@ -30,20 +30,20 @@ AppendStructuredBuffer<int> Buffer;
// CHECK-NEXT: CXXRecordDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit class AppendStructuredBuffer definition

// CHECK: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit __handle '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
// CHECK-SAME{LITERAL}: [[hlsl::raw_buffer]]
// CHECK-SAME{LITERAL}: [[hlsl::contained_type(element_type)]]
// CHECK-NEXT: HLSLResourceAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit RawBuffer

// CHECK-NOT: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'element_type &const (unsigned int) const'
// CHECK-NOT: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'const element_type &(unsigned int) const'
// CHECK-NOT: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'element_type &(unsigned int)'

// CHECK: ClassTemplateSpecializationDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> class AppendStructuredBuffer definition
// CHECK: TemplateArgument type 'int'
// CHECK-NEXT: BuiltinType 0x{{[0-9A-Fa-f]+}} 'int'
// CHECK-NEXT: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit __handle '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
// CHECK-SAME{LITERAL}: [[hlsl::raw_buffer]]
// CHECK-SAME{LITERAL}: [[hlsl::contained_type(int)]]
Expand Down
6 changes: 3 additions & 3 deletions clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
Original file line number Diff line number Diff line change
Expand Up @@ -30,21 +30,21 @@ ConsumeStructuredBuffer<int> Buffer;
// CHECK-NEXT: CXXRecordDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit class ConsumeStructuredBuffer definition

// CHECK: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit __handle '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
// CHECK-SAME{LITERAL}: [[hlsl::raw_buffer]]
// CHECK-SAME{LITERAL}: [[hlsl::contained_type(element_type)]]
// CHECK-NEXT: HLSLResourceAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit RawBuffer

// CHECK-NOT: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'element_type &const (unsigned int) const'
// CHECK-NOT: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'const element_type &(unsigned int) const'
// CHECK-NOT: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'element_type &(unsigned int)'

// CHECK: ClassTemplateSpecializationDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> class ConsumeStructuredBuffer definition

// CHECK: TemplateArgument type 'int'
// CHECK-NEXT: BuiltinType 0x{{[0-9A-Fa-f]+}} 'int'
// CHECK-NEXT: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit __handle '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
// CHECK-SAME{LITERAL}: [[hlsl::raw_buffer]]
// CHECK-SAME{LITERAL}: [[hlsl::contained_type(int)]]
Expand Down
8 changes: 4 additions & 4 deletions clang/test/AST/HLSL/RWBuffer-AST.hlsl
Original file line number Diff line number Diff line change
Expand Up @@ -29,12 +29,12 @@ RWBuffer<float> Buffer;
// CHECK-NEXT: CXXRecordDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit class RWBuffer definition

// CHECK: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit __handle '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
// CHECK-SAME{LITERAL}: [[hlsl::contained_type(element_type)]]
// CHECK-NEXT: HLSLResourceAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit TypedBuffer

// CHECK: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'element_type &const (unsigned int) const'
// CHECK: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'const element_type &(unsigned int) const'
// CHECK-NEXT: ParmVarDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> Idx 'unsigned int'
// CHECK-NEXT: CompoundStmt 0x{{[0-9A-Fa-f]+}} <<invalid sloc>>
// CHECK-NEXT: ReturnStmt 0x{{[0-9A-Fa-f]+}} <<invalid sloc>>
Expand All @@ -55,7 +55,7 @@ RWBuffer<float> Buffer;
// CHECK: TemplateArgument type 'float'
// CHECK-NEXT: BuiltinType 0x{{[0-9A-Fa-f]+}} 'float'
// CHECK-NEXT: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit __handle '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
// CHECK-SAME{LITERAL}: [[hlsl::contained_type(float)]]
// CHECK-NEXT: HLSLResourceAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit TypedBuffer
6 changes: 3 additions & 3 deletions clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
Original file line number Diff line number Diff line change
Expand Up @@ -30,13 +30,13 @@ RWStructuredBuffer<int> Buffer;
// CHECK-NEXT: CXXRecordDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit class RWStructuredBuffer definition

// CHECK: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit __handle '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
// CHECK-SAME{LITERAL}: [[hlsl::raw_buffer]]
// CHECK-SAME{LITERAL}: [[hlsl::contained_type(element_type)]]
// CHECK-NEXT: HLSLResourceAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit RawBuffer

// CHECK: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'element_type &const (unsigned int) const'
// CHECK: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'const element_type &(unsigned int) const'
// CHECK-NEXT: ParmVarDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> Idx 'unsigned int'
// CHECK-NEXT: CompoundStmt 0x{{[0-9A-Fa-f]+}} <<invalid sloc>>
// CHECK-NEXT: ReturnStmt 0x{{[0-9A-Fa-f]+}} <<invalid sloc>>
Expand All @@ -57,7 +57,7 @@ RWStructuredBuffer<int> Buffer;
// CHECK: TemplateArgument type 'int'
// CHECK-NEXT: BuiltinType 0x{{[0-9A-Fa-f]+}} 'int'
// CHECK-NEXT: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit __handle '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
// CHECK-SAME{LITERAL}: [[hlsl::raw_buffer]]
// CHECK-SAME{LITERAL}: [[hlsl::contained_type(int)]]
Expand Down
10 changes: 5 additions & 5 deletions clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
Original file line number Diff line number Diff line change
Expand Up @@ -30,14 +30,14 @@ RasterizerOrderedStructuredBuffer<int> Buffer;
// CHECK-NEXT: CXXRecordDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit class RasterizerOrderedStructuredBuffer definition

// CHECK: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit __handle '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
// CHECK-SAME{LITERAL}: [[hlsl::is_rov]]
// CHECK-SAME{LITERAL}: [[hlsl::raw_buffer]]
// CHECK-SAME{LITERAL}: [[hlsl::contained_type(element_type)]]
// CHECK-NEXT: HLSLResourceAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit TypedBuffer
// CHECK-NEXT: HLSLResourceAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit RawBuffer

// CHECK: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'element_type &const (unsigned int) const'
// CHECK: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'const element_type &(unsigned int) const'
// CHECK-NEXT: ParmVarDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> Idx 'unsigned int'
// CHECK-NEXT: CompoundStmt 0x{{[0-9A-Fa-f]+}} <<invalid sloc>>
// CHECK-NEXT: ReturnStmt 0x{{[0-9A-Fa-f]+}} <<invalid sloc>>
Expand All @@ -58,9 +58,9 @@ RasterizerOrderedStructuredBuffer<int> Buffer;
// CHECK: TemplateArgument type 'int'
// CHECK-NEXT: BuiltinType 0x{{[0-9A-Fa-f]+}} 'int'
// CHECK-NEXT: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit __handle '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(UAV)]]
// CHECK-SAME{LITERAL}: [[hlsl::is_rov]]
// CHECK-SAME{LITERAL}: [[hlsl::raw_buffer]]
// CHECK-SAME{LITERAL}: [[hlsl::contained_type(int)]]
// CHECK-NEXT: HLSLResourceAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit TypedBuffer
// CHECK-NEXT: HLSLResourceAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit RawBuffer
6 changes: 3 additions & 3 deletions clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
Original file line number Diff line number Diff line change
Expand Up @@ -30,13 +30,13 @@ StructuredBuffer<float> Buffer;
// CHECK-NEXT: CXXRecordDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit class StructuredBuffer definition

// CHECK: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit __handle '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(SRV)]]
// CHECK-SAME{LITERAL}: [[hlsl::raw_buffer]]
// CHECK-SAME{LITERAL}: [[hlsl::contained_type(element_type)]]
// CHECK-NEXT: HLSLResourceAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit RawBuffer

// CHECK: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'element_type &const (unsigned int) const'
// CHECK: CXXMethodDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> operator[] 'const element_type &(unsigned int) const'
// CHECK-NEXT: ParmVarDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> Idx 'unsigned int'
// CHECK-NEXT: CompoundStmt 0x{{[0-9A-Fa-f]+}} <<invalid sloc>>
// CHECK-NEXT: ReturnStmt 0x{{[0-9A-Fa-f]+}} <<invalid sloc>>
Expand All @@ -57,7 +57,7 @@ StructuredBuffer<float> Buffer;
// CHECK: TemplateArgument type 'float'
// CHECK-NEXT: BuiltinType 0x{{[0-9A-Fa-f]+}} 'float'
// CHECK-NEXT: FinalAttr 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> Implicit final
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit h '__hlsl_resource_t
// CHECK-NEXT: FieldDecl 0x{{[0-9A-Fa-f]+}} <<invalid sloc>> <invalid sloc> implicit __handle '__hlsl_resource_t
// CHECK-SAME{LITERAL}: [[hlsl::resource_class(SRV)]]
// CHECK-SAME{LITERAL}: [[hlsl::raw_buffer]]
// CHECK-SAME{LITERAL}: [[hlsl::contained_type(float)]]
Expand Down
28 changes: 14 additions & 14 deletions clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -17,10 +17,10 @@ E get_e();
// cxx11-warning@-1 {{use of the 'nodiscard' attribute is a C++17 extension}}

void f() {
get_s(); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}}
get_s(); // expected-warning {{ignoring return value of type 'S' declared with 'nodiscard' attribute}}
get_i(); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}}
get_vi(); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}}
get_e(); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}}
get_e(); // expected-warning {{ignoring return value of type 'E' declared with 'nodiscard' attribute}}

// Okay, warnings are not encouraged
get_s_ref();
Expand Down Expand Up @@ -54,10 +54,10 @@ void f() {
fp3 three;
fp2_alias four;

one(); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}}
two(); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}}
three(); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}}
four(); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}}
one(); // expected-warning {{ignoring return value of type 'E' declared with 'nodiscard' attribute}}
two(); // expected-warning {{ignoring return value of type 'S' declared with 'nodiscard' attribute}}
three(); // expected-warning {{ignoring return value of type 'S' declared with 'nodiscard' attribute}}
four(); // expected-warning {{ignoring return value of type 'S' declared with 'nodiscard' attribute}}

// These are all okay because of the explicit cast to void.
(void)one();
Expand All @@ -84,8 +84,8 @@ LaterReason get_later_reason();
// cxx11-17-warning@-1 {{use of the 'nodiscard' attribute is a C++20 extension}}

void cxx20_use() {
get_reason(); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute: reason}}
get_later_reason(); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute: later reason}}
get_reason(); // expected-warning {{ignoring return value of type 'ReasonStruct' declared with 'nodiscard' attribute: reason}}
get_later_reason(); // expected-warning {{ignoring return value of type 'LaterReason' declared with 'nodiscard' attribute: later reason}}
another_reason(); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute: another reason}}
conflicting_reason(); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute: special reason}}
}
Expand Down Expand Up @@ -115,20 +115,20 @@ void usage() {
S('A'); // expected-warning {{ignoring temporary created by a constructor declared with 'nodiscard' attribute: Don't let that S-Char go!}}
S(1);
S(2.2);
Y(); // expected-warning {{ignoring temporary created by a constructor declared with 'nodiscard' attribute: Don't throw me away either!}}
Y(); // expected-warning {{ignoring temporary of type 'Y' declared with 'nodiscard' attribute: Don't throw me away either!}}
S s;
ConvertTo{}; // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute: Don't throw me away!}}
ConvertTo{}; // expected-warning {{ignoring return value of type 'ConvertTo' declared with 'nodiscard' attribute: Don't throw me away!}}

// AST is different in C++17 mode. Before, a move ctor for ConvertTo is there
// as well, hence the constructor warning.

// since-cxx17-warning@+2 {{ignoring return value of function declared with 'nodiscard' attribute: Don't throw me away!}}
// cxx11-warning@+1 {{ignoring temporary created by a constructor declared with 'nodiscard' attribute: Don't throw me away!}}
// since-cxx17-warning@+2 {{ignoring return value of type 'ConvertTo' declared with 'nodiscard' attribute: Don't throw me away!}}
// cxx11-warning@+1 {{ignoring temporary of type 'ConvertTo' declared with 'nodiscard' attribute: Don't throw me away!}}
(ConvertTo) s;
(int)s; // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}}
(S)'c'; // expected-warning {{ignoring temporary created by a constructor declared with 'nodiscard' attribute: Don't let that S-Char go!}}
// since-cxx17-warning@+2 {{ignoring return value of function declared with 'nodiscard' attribute: Don't throw me away!}}
// cxx11-warning@+1 {{ignoring temporary created by a constructor declared with 'nodiscard' attribute: Don't throw me away!}}
// since-cxx17-warning@+2 {{ignoring return value of type 'ConvertTo' declared with 'nodiscard' attribute: Don't throw me away!}}
// cxx11-warning@+1 {{ignoring temporary of type 'ConvertTo' declared with 'nodiscard' attribute: Don't throw me away!}}
static_cast<ConvertTo>(s);
static_cast<int>(s); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute}}
static_cast<double>(s); // expected-warning {{ignoring return value of function declared with 'nodiscard' attribute: Don't throw away as a double}}
Expand Down
2 changes: 1 addition & 1 deletion clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p3.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ namespace std_example {
error_info enable_missile_safety_mode();
void launch_missiles();
void test_missiles() {
enable_missile_safety_mode(); // expected-warning {{ignoring return value of function declared with 'nodiscard'}}
enable_missile_safety_mode(); // expected-warning {{ignoring return value of type 'error_info' declared with 'nodiscard'}}
launch_missiles();
}

Expand Down
13 changes: 12 additions & 1 deletion clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p2-cxx0x.cpp
Original file line number Diff line number Diff line change
@@ -1,7 +1,18 @@
// RUN: %clang_cc1 -fsyntax-only -verify -std=c++11 %s
// RUN: %clang_cc1 -fsyntax-only -std=c++11 -verify %s
// RUN: not %clang_cc1 -fsyntax-only -std=c++11 -fno-diagnostics-show-line-numbers -fcaret-diagnostics-max-lines=1 %s 2>&1 | FileCheck %s -strict-whitespace

auto a() -> int; // ok
const auto b() -> int; // expected-error {{function with trailing return type must specify return type 'auto', not 'const auto'}}
auto *c() -> int; // expected-error {{function with trailing return type must specify return type 'auto', not 'auto *'}}
auto (d() -> int); // expected-error {{trailing return type may not be nested within parentheses}}
auto e() -> auto (*)() -> auto (*)() -> void; // ok: same as void (*(*e())())();

namespace GH78694 {

template <typename T> struct B {
// CHECK: error: function with trailing return type must specify return type 'auto', not 'void'
// CHECK-NEXT: {{^}} template <class U> B(U) -> B<int>;
// CHECK-NEXT: {{^}} ~~~~~~~~^~~~~~{{$}}
template <class U> B(U) -> B<int>; // expected-error {{function with trailing return type must specify return type 'auto', not 'void'}}
};
}
11 changes: 8 additions & 3 deletions clang/test/CodeGen/AArch64/elf-pauthabi.c
Original file line number Diff line number Diff line change
@@ -1,5 +1,3 @@
//// TODO: also test with -fptrauth-elf-got when the driver flag is supported

// RUN: %clang_cc1 -triple aarch64-linux -emit-llvm -o - \
// RUN: -fptrauth-intrinsics \
// RUN: -fptrauth-calls \
Expand All @@ -9,6 +7,7 @@
// RUN: -fptrauth-vtable-pointer-type-discrimination \
// RUN: -fptrauth-init-fini \
// RUN: -fptrauth-init-fini-address-discrimination \
// RUN: -fptrauth-elf-got \
// RUN: -fptrauth-indirect-gotos \
// RUN: -fptrauth-type-info-vtable-pointer-discrimination \
// RUN: -fptrauth-function-pointer-type-discrimination %s | \
Expand Down Expand Up @@ -42,6 +41,9 @@
// RUN: -fptrauth-calls -fptrauth-init-fini -fptrauth-init-fini-address-discrimination %s | \
// RUN: FileCheck %s --check-prefix=INITFINIADDR

// RUN: %clang_cc1 -triple aarch64-linux -emit-llvm -o - \
// RUN: -fptrauth-elf-got %s | FileCheck %s --check-prefix=ELFGOT

// RUN: %clang_cc1 -triple aarch64-linux -emit-llvm -o - \
// RUN: -fptrauth-indirect-gotos %s | FileCheck %s --check-prefix=GOTOS

Expand All @@ -54,7 +56,7 @@
// RUN: FileCheck %s --check-prefix=FPTRTYPE

// ALL: !{i32 1, !"aarch64-elf-pauthabi-platform", i32 268435458}
// ALL: !{i32 1, !"aarch64-elf-pauthabi-version", i32 3839}
// ALL: !{i32 1, !"aarch64-elf-pauthabi-version", i32 4095}

// INTRIN: !{i32 1, !"aarch64-elf-pauthabi-platform", i32 268435458}
// INTRIN: !{i32 1, !"aarch64-elf-pauthabi-version", i32 1}
Expand All @@ -80,6 +82,9 @@
// INITFINIADDR: !{i32 1, !"aarch64-elf-pauthabi-platform", i32 268435458}
// INITFINIADDR: !{i32 1, !"aarch64-elf-pauthabi-version", i32 194}

// ELFGOT: !{i32 1, !"aarch64-elf-pauthabi-platform", i32 268435458}
// ELFGOT: !{i32 1, !"aarch64-elf-pauthabi-version", i32 256}

// GOTOS: !{i32 1, !"aarch64-elf-pauthabi-platform", i32 268435458}
// GOTOS: !{i32 1, !"aarch64-elf-pauthabi-version", i32 512}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@

inline int func2(int i);
int external_call2(int i) {
// expected-error@+1 {{'musttail' attribute for this call is impossible because external calls can not be tail called on PPC}}
// expected-error@+1 {{'musttail' attribute for this call is impossible because external calls cannot be tail called on PPC}}
[[clang::musttail]] return func2(i);
}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@

int func2(int i);
int external_call2(int i) {
// expected-error@+1 {{'musttail' attribute for this call is impossible because external calls can not be tail called on PPC}}
// expected-error@+1 {{'musttail' attribute for this call is impossible because external calls cannot be tail called on PPC}}
[[clang::musttail]] return func2(i);
}

Expand Down
2 changes: 1 addition & 1 deletion clang/test/CodeGen/PowerPC/musttail-indirect.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,6 @@

void name(int *params) {
auto fn = (void (*)(int *))1;
// expected-error@+1 {{'musttail' attribute for this call is impossible because indirect calls can not be tail called on PPC}}
// expected-error@+1 {{'musttail' attribute for this call is impossible because indirect calls cannot be tail called on PPC}}
[[clang::musttail]] return fn(params);
}
2 changes: 1 addition & 1 deletion clang/test/CodeGen/PowerPC/musttail-inline.c
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,6 @@ inline int foo(int x) {

int bar(int x)
{
// expected-error@+1 {{'musttail' attribute for this call is impossible because external calls can not be tail called on PPC}}
// expected-error@+1 {{'musttail' attribute for this call is impossible because external calls cannot be tail called on PPC}}
[[clang::musttail]] return foo(1);
}
2 changes: 1 addition & 1 deletion clang/test/CodeGen/PowerPC/musttail-undefined.c
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,6 @@ int foo(int x);

int bar(int x)
{
// expected-error@+1 {{'musttail' attribute for this call is impossible because external calls can not be tail called on PPC}}
// expected-error@+1 {{'musttail' attribute for this call is impossible because external calls cannot be tail called on PPC}}
[[clang::musttail]] return foo(x);
}
2 changes: 1 addition & 1 deletion clang/test/CodeGen/PowerPC/musttail-weak.c
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ __attribute__((weak)) int func2(int i) {
return 0;
}
int external_call2(int i) {
// linux-error@+2 {{'musttail' attribute for this call is impossible because external calls can not be tail called on PPC}}
// linux-error@+2 {{'musttail' attribute for this call is impossible because external calls cannot be tail called on PPC}}
// aix-error@+1 {{'musttail' attribute is not supported on AIX}}
[[clang::musttail]] return func2(i);
}
2 changes: 1 addition & 1 deletion clang/test/CodeGen/PowerPC/musttail.c
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ int foo(int x) {
int bar(int x)
{
// good-no-diagnostics
// longcall-error@+2 {{'musttail' attribute for this call is impossible because long calls can not be tail called on PPC}}
// longcall-error@+2 {{'musttail' attribute for this call is impossible because long calls cannot be tail called on PPC}}
// aix-error@+1 {{'musttail' attribute is not supported on AIX}}
[[clang::musttail]] return foo(1);
}
13 changes: 13 additions & 0 deletions clang/test/CodeGen/RISCV/riscv-inline-asm.c
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,19 @@ void test_cf(float f, double d) {
asm volatile("" : "=cf"(cd) : "cf"(d));
}

#if __riscv_xlen == 32
typedef long long double_xlen_t;
#elif __riscv_xlen == 64
typedef __int128_t double_xlen_t;
#endif
double_xlen_t test_R_wide_scalar(double_xlen_t p) {
// CHECK-LABEL: define{{.*}} {{i128|i64}} @test_R_wide_scalar(
// CHECK: call {{i128|i64}} asm sideeffect "", "=R,R"({{i128|i64}} %{{.*}})
double_xlen_t ret;
asm volatile("" : "=R"(ret) : "R"(p));
return ret;
}

void test_I(void) {
// CHECK-LABEL: define{{.*}} void @test_I()
// CHECK: call void asm sideeffect "", "I"(i32 2047)
Expand Down
10 changes: 5 additions & 5 deletions clang/test/CodeGen/X86/x86_64-PR42672.c
Original file line number Diff line number Diff line change
Expand Up @@ -58,7 +58,7 @@ void odd_struct(void) {
: "=r"(str));
#endif
}
// CHECK-IMPOSSIBLE_ODD: impossible constraint in asm: can't store value into a register
// CHECK-IMPOSSIBLE_ODD: impossible constraint in asm: cannot store value into a register

// Check Clang reports an error if attempting to return a big structure via a register.
void big_struct(void) {
Expand All @@ -70,7 +70,7 @@ void big_struct(void) {
: "=r"(str));
#endif
}
// CHECK-IMPOSSIBLE_BIG: impossible constraint in asm: can't store value into a register
// CHECK-IMPOSSIBLE_BIG: impossible constraint in asm: cannot store value into a register

// Clang is able to emit LLVM IR for an 16-byte structure.
void x_constraint_fit(void) {
Expand Down Expand Up @@ -103,7 +103,7 @@ void x_constraint_nofit(void) {

// http://crbug.com/999160
// Clang used to report the following message:
// "impossible constraint in asm: can't store struct into a register"
// "impossible constraint in asm: cannot store struct into a register"
// for the assembly directive below, although there's no struct.
void crbug_999160_regtest(void) {
#ifdef IMPOSSIBLE_9BYTES
Expand All @@ -113,12 +113,12 @@ void crbug_999160_regtest(void) {
#endif
}

// CHECK-IMPOSSIBLE_9BYTES: impossible constraint in asm: can't store value into a register
// CHECK-IMPOSSIBLE_9BYTES: impossible constraint in asm: cannot store value into a register

void crbug_999160_regtest_v2(void) {
#ifdef IMPOSSIBLE_9BYTES_V2
char buf[9];
asm("" : "=r"(buf) : "0"(buf));
#endif
}
// CHECK-IMPOSSIBLE_9BYTES_V2: impossible constraint in asm: can't store value into a register
// CHECK-IMPOSSIBLE_9BYTES_V2: impossible constraint in asm: cannot store value into a register
32 changes: 16 additions & 16 deletions clang/test/CodeGen/arm-mve-intrinsics/compare.c
Original file line number Diff line number Diff line change
Expand Up @@ -2376,7 +2376,7 @@ mve_pred16_t test_vcmphiq_m_n_u32(uint32x4_t a, uint32_t b, mve_pred16_t p)

// CHECK-LABEL: @test_vcmpleq_f16(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = fcmp ole <8 x half> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP0:%.*]] = fcmp ule <8 x half> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
// CHECK-NEXT: ret i16 [[TMP2]]
Expand All @@ -2392,7 +2392,7 @@ mve_pred16_t test_vcmpleq_f16(float16x8_t a, float16x8_t b)

// CHECK-LABEL: @test_vcmpleq_f32(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = fcmp ole <4 x float> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP0:%.*]] = fcmp ule <4 x float> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
// CHECK-NEXT: ret i16 [[TMP2]]
Expand Down Expand Up @@ -2458,7 +2458,7 @@ mve_pred16_t test_vcmpleq_s32(int32x4_t a, int32x4_t b)
// CHECK-NEXT: entry:
// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x half> poison, half [[B:%.*]], i64 0
// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x half> [[DOTSPLATINSERT]], <8 x half> poison, <8 x i32> zeroinitializer
// CHECK-NEXT: [[TMP0:%.*]] = fcmp ole <8 x half> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP0:%.*]] = fcmp ule <8 x half> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
// CHECK-NEXT: ret i16 [[TMP2]]
Expand All @@ -2476,7 +2476,7 @@ mve_pred16_t test_vcmpleq_n_f16(float16x8_t a, float16_t b)
// CHECK-NEXT: entry:
// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0
// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer
// CHECK-NEXT: [[TMP0:%.*]] = fcmp ole <4 x float> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP0:%.*]] = fcmp ule <4 x float> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
// CHECK-NEXT: ret i16 [[TMP2]]
Expand Down Expand Up @@ -2548,7 +2548,7 @@ mve_pred16_t test_vcmpleq_n_s32(int32x4_t a, int32_t b)
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = fcmp ole <8 x half> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP2:%.*]] = fcmp ule <8 x half> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP3:%.*]] = and <8 x i1> [[TMP1]], [[TMP2]]
// CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[TMP3]])
// CHECK-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
Expand All @@ -2567,7 +2567,7 @@ mve_pred16_t test_vcmpleq_m_f16(float16x8_t a, float16x8_t b, mve_pred16_t p)
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = fcmp ole <4 x float> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP2:%.*]] = fcmp ule <4 x float> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP3:%.*]] = and <4 x i1> [[TMP1]], [[TMP2]]
// CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[TMP3]])
// CHECK-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
Expand Down Expand Up @@ -2645,7 +2645,7 @@ mve_pred16_t test_vcmpleq_m_s32(int32x4_t a, int32x4_t b, mve_pred16_t p)
// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x half> poison, half [[B:%.*]], i64 0
// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x half> [[DOTSPLATINSERT]], <8 x half> poison, <8 x i32> zeroinitializer
// CHECK-NEXT: [[TMP2:%.*]] = fcmp ole <8 x half> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP2:%.*]] = fcmp ule <8 x half> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP3:%.*]] = and <8 x i1> [[TMP1]], [[TMP2]]
// CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[TMP3]])
// CHECK-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
Expand All @@ -2666,7 +2666,7 @@ mve_pred16_t test_vcmpleq_m_n_f16(float16x8_t a, float16_t b, mve_pred16_t p)
// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0
// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer
// CHECK-NEXT: [[TMP2:%.*]] = fcmp ole <4 x float> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP2:%.*]] = fcmp ule <4 x float> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP3:%.*]] = and <4 x i1> [[TMP1]], [[TMP2]]
// CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[TMP3]])
// CHECK-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
Expand Down Expand Up @@ -2746,7 +2746,7 @@ mve_pred16_t test_vcmpleq_m_n_s32(int32x4_t a, int32_t b, mve_pred16_t p)

// CHECK-LABEL: @test_vcmpltq_f16(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = fcmp olt <8 x half> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP0:%.*]] = fcmp ult <8 x half> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
// CHECK-NEXT: ret i16 [[TMP2]]
Expand All @@ -2762,7 +2762,7 @@ mve_pred16_t test_vcmpltq_f16(float16x8_t a, float16x8_t b)

// CHECK-LABEL: @test_vcmpltq_f32(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = fcmp olt <4 x float> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP0:%.*]] = fcmp ult <4 x float> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
// CHECK-NEXT: ret i16 [[TMP2]]
Expand Down Expand Up @@ -2828,7 +2828,7 @@ mve_pred16_t test_vcmpltq_s32(int32x4_t a, int32x4_t b)
// CHECK-NEXT: entry:
// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x half> poison, half [[B:%.*]], i64 0
// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x half> [[DOTSPLATINSERT]], <8 x half> poison, <8 x i32> zeroinitializer
// CHECK-NEXT: [[TMP0:%.*]] = fcmp olt <8 x half> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP0:%.*]] = fcmp ult <8 x half> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
// CHECK-NEXT: ret i16 [[TMP2]]
Expand All @@ -2846,7 +2846,7 @@ mve_pred16_t test_vcmpltq_n_f16(float16x8_t a, float16_t b)
// CHECK-NEXT: entry:
// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0
// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer
// CHECK-NEXT: [[TMP0:%.*]] = fcmp olt <4 x float> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP0:%.*]] = fcmp ult <4 x float> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
// CHECK-NEXT: ret i16 [[TMP2]]
Expand Down Expand Up @@ -2918,7 +2918,7 @@ mve_pred16_t test_vcmpltq_n_s32(int32x4_t a, int32_t b)
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = fcmp olt <8 x half> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP2:%.*]] = fcmp ult <8 x half> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP3:%.*]] = and <8 x i1> [[TMP1]], [[TMP2]]
// CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[TMP3]])
// CHECK-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
Expand All @@ -2937,7 +2937,7 @@ mve_pred16_t test_vcmpltq_m_f16(float16x8_t a, float16x8_t b, mve_pred16_t p)
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32
// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = fcmp olt <4 x float> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP2:%.*]] = fcmp ult <4 x float> [[A:%.*]], [[B:%.*]]
// CHECK-NEXT: [[TMP3:%.*]] = and <4 x i1> [[TMP1]], [[TMP2]]
// CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[TMP3]])
// CHECK-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
Expand Down Expand Up @@ -3015,7 +3015,7 @@ mve_pred16_t test_vcmpltq_m_s32(int32x4_t a, int32x4_t b, mve_pred16_t p)
// CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]])
// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <8 x half> poison, half [[B:%.*]], i64 0
// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <8 x half> [[DOTSPLATINSERT]], <8 x half> poison, <8 x i32> zeroinitializer
// CHECK-NEXT: [[TMP2:%.*]] = fcmp olt <8 x half> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP2:%.*]] = fcmp ult <8 x half> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP3:%.*]] = and <8 x i1> [[TMP1]], [[TMP2]]
// CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[TMP3]])
// CHECK-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
Expand All @@ -3036,7 +3036,7 @@ mve_pred16_t test_vcmpltq_m_n_f16(float16x8_t a, float16_t b, mve_pred16_t p)
// CHECK-NEXT: [[TMP1:%.*]] = call <4 x i1> @llvm.arm.mve.pred.i2v.v4i1(i32 [[TMP0]])
// CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[B:%.*]], i64 0
// CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <4 x float> [[DOTSPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer
// CHECK-NEXT: [[TMP2:%.*]] = fcmp olt <4 x float> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP2:%.*]] = fcmp ult <4 x float> [[A:%.*]], [[DOTSPLAT]]
// CHECK-NEXT: [[TMP3:%.*]] = and <4 x i1> [[TMP1]], [[TMP2]]
// CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v4i1(<4 x i1> [[TMP3]])
// CHECK-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i16
Expand Down
8 changes: 8 additions & 0 deletions clang/test/CodeGen/ptrauth-module-flags.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=OFF
// RUN: %clang_cc1 -triple aarch64-linux-gnu -fptrauth-elf-got -emit-llvm %s -o - | FileCheck %s --check-prefix=ELFGOT

// ELFGOT: !llvm.module.flags = !{
// ELFGOT-SAME: !1
// ELFGOT: !1 = !{i32 8, !"ptrauth-elf-got", i32 1}

// OFF-NOT: "ptrauth-
257 changes: 257 additions & 0 deletions clang/test/CodeGen/scoped-fence-ops.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,257 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
// RUN: %clang_cc1 %s -emit-llvm -o - -triple=amdgcn-amd-amdhsa -ffreestanding \
// RUN: -fvisibility=hidden | FileCheck --check-prefix=AMDGCN %s
// RUN: %clang_cc1 %s -emit-llvm -o - -triple=spirv64-unknown-unknown -ffreestanding \
// RUN: -fvisibility=hidden | FileCheck --check-prefix=SPIRV %s
// RUN: %clang_cc1 %s -emit-llvm -o - -triple=x86_64-unknown-linux-gnu -ffreestanding \
// RUN: -fvisibility=hidden | FileCheck --check-prefix=X86_64 %s

// AMDGCN-LABEL: define hidden void @fe1a(
// AMDGCN-SAME: ) #[[ATTR0:[0-9]+]] {
// AMDGCN-NEXT: [[ENTRY:.*:]]
// AMDGCN-NEXT: fence syncscope("workgroup-one-as") release
// AMDGCN-NEXT: ret void
//
// SPIRV-LABEL: define hidden spir_func void @fe1a(
// SPIRV-SAME: ) #[[ATTR0:[0-9]+]] {
// SPIRV-NEXT: [[ENTRY:.*:]]
// SPIRV-NEXT: fence syncscope("workgroup") release
// SPIRV-NEXT: ret void
//
// X86_64-LABEL: define hidden void @fe1a(
// X86_64-SAME: ) #[[ATTR0:[0-9]+]] {
// X86_64-NEXT: [[ENTRY:.*:]]
// X86_64-NEXT: fence release
// X86_64-NEXT: ret void
//
void fe1a() {
__scoped_atomic_thread_fence(__ATOMIC_RELEASE, __MEMORY_SCOPE_WRKGRP);
}

// AMDGCN-LABEL: define hidden void @fe1b(
// AMDGCN-SAME: i32 noundef [[ORD:%.*]]) #[[ATTR0]] {
// AMDGCN-NEXT: [[ENTRY:.*:]]
// AMDGCN-NEXT: [[ORD_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
// AMDGCN-NEXT: [[ORD_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[ORD_ADDR]] to ptr
// AMDGCN-NEXT: store i32 [[ORD]], ptr [[ORD_ADDR_ASCAST]], align 4
// AMDGCN-NEXT: [[TMP0:%.*]] = load i32, ptr [[ORD_ADDR_ASCAST]], align 4
// AMDGCN-NEXT: switch i32 [[TMP0]], label %[[ATOMIC_SCOPE_CONTINUE:.*]] [
// AMDGCN-NEXT: i32 1, label %[[ACQUIRE:.*]]
// AMDGCN-NEXT: i32 2, label %[[ACQUIRE]]
// AMDGCN-NEXT: i32 3, label %[[RELEASE:.*]]
// AMDGCN-NEXT: i32 4, label %[[ACQREL:.*]]
// AMDGCN-NEXT: i32 5, label %[[SEQCST:.*]]
// AMDGCN-NEXT: ]
// AMDGCN: [[ATOMIC_SCOPE_CONTINUE]]:
// AMDGCN-NEXT: ret void
// AMDGCN: [[ACQUIRE]]:
// AMDGCN-NEXT: fence syncscope("workgroup-one-as") acquire
// AMDGCN-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// AMDGCN: [[RELEASE]]:
// AMDGCN-NEXT: fence syncscope("workgroup-one-as") release
// AMDGCN-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// AMDGCN: [[ACQREL]]:
// AMDGCN-NEXT: fence syncscope("workgroup-one-as") acq_rel
// AMDGCN-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// AMDGCN: [[SEQCST]]:
// AMDGCN-NEXT: fence syncscope("workgroup") seq_cst
// AMDGCN-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
//
// SPIRV-LABEL: define hidden spir_func void @fe1b(
// SPIRV-SAME: i32 noundef [[ORD:%.*]]) #[[ATTR0]] {
// SPIRV-NEXT: [[ENTRY:.*:]]
// SPIRV-NEXT: [[ORD_ADDR:%.*]] = alloca i32, align 4
// SPIRV-NEXT: store i32 [[ORD]], ptr [[ORD_ADDR]], align 4
// SPIRV-NEXT: [[TMP0:%.*]] = load i32, ptr [[ORD_ADDR]], align 4
// SPIRV-NEXT: switch i32 [[TMP0]], label %[[ATOMIC_SCOPE_CONTINUE:.*]] [
// SPIRV-NEXT: i32 1, label %[[ACQUIRE:.*]]
// SPIRV-NEXT: i32 2, label %[[ACQUIRE]]
// SPIRV-NEXT: i32 3, label %[[RELEASE:.*]]
// SPIRV-NEXT: i32 4, label %[[ACQREL:.*]]
// SPIRV-NEXT: i32 5, label %[[SEQCST:.*]]
// SPIRV-NEXT: ]
// SPIRV: [[ATOMIC_SCOPE_CONTINUE]]:
// SPIRV-NEXT: ret void
// SPIRV: [[ACQUIRE]]:
// SPIRV-NEXT: fence syncscope("workgroup") acquire
// SPIRV-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// SPIRV: [[RELEASE]]:
// SPIRV-NEXT: fence syncscope("workgroup") release
// SPIRV-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// SPIRV: [[ACQREL]]:
// SPIRV-NEXT: fence syncscope("workgroup") acq_rel
// SPIRV-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// SPIRV: [[SEQCST]]:
// SPIRV-NEXT: fence syncscope("workgroup") seq_cst
// SPIRV-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
//
// X86_64-LABEL: define hidden void @fe1b(
// X86_64-SAME: i32 noundef [[ORD:%.*]]) #[[ATTR0]] {
// X86_64-NEXT: [[ENTRY:.*:]]
// X86_64-NEXT: [[ORD_ADDR:%.*]] = alloca i32, align 4
// X86_64-NEXT: store i32 [[ORD]], ptr [[ORD_ADDR]], align 4
// X86_64-NEXT: [[TMP0:%.*]] = load i32, ptr [[ORD_ADDR]], align 4
// X86_64-NEXT: switch i32 [[TMP0]], label %[[ATOMIC_SCOPE_CONTINUE:.*]] [
// X86_64-NEXT: i32 1, label %[[ACQUIRE:.*]]
// X86_64-NEXT: i32 2, label %[[ACQUIRE]]
// X86_64-NEXT: i32 3, label %[[RELEASE:.*]]
// X86_64-NEXT: i32 4, label %[[ACQREL:.*]]
// X86_64-NEXT: i32 5, label %[[SEQCST:.*]]
// X86_64-NEXT: ]
// X86_64: [[ATOMIC_SCOPE_CONTINUE]]:
// X86_64-NEXT: ret void
// X86_64: [[ACQUIRE]]:
// X86_64-NEXT: fence acquire
// X86_64-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// X86_64: [[RELEASE]]:
// X86_64-NEXT: fence release
// X86_64-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// X86_64: [[ACQREL]]:
// X86_64-NEXT: fence acq_rel
// X86_64-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// X86_64: [[SEQCST]]:
// X86_64-NEXT: fence seq_cst
// X86_64-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
//
void fe1b(int ord) {
__scoped_atomic_thread_fence(ord, __MEMORY_SCOPE_WRKGRP);
}

// AMDGCN-LABEL: define hidden void @fe1c(
// AMDGCN-SAME: i32 noundef [[SCOPE:%.*]]) #[[ATTR0]] {
// AMDGCN-NEXT: [[ENTRY:.*:]]
// AMDGCN-NEXT: [[SCOPE_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
// AMDGCN-NEXT: [[SCOPE_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[SCOPE_ADDR]] to ptr
// AMDGCN-NEXT: store i32 [[SCOPE]], ptr [[SCOPE_ADDR_ASCAST]], align 4
// AMDGCN-NEXT: [[TMP0:%.*]] = load i32, ptr [[SCOPE_ADDR_ASCAST]], align 4
// AMDGCN-NEXT: switch i32 [[TMP0]], label %[[ATOMIC_SCOPE_CONTINUE:.*]] [
// AMDGCN-NEXT: i32 1, label %[[DEVICE_SCOPE:.*]]
// AMDGCN-NEXT: i32 0, label %[[SYSTEM_SCOPE:.*]]
// AMDGCN-NEXT: i32 2, label %[[WORKGROUP_SCOPE:.*]]
// AMDGCN-NEXT: i32 3, label %[[WAVEFRONT_SCOPE:.*]]
// AMDGCN-NEXT: i32 4, label %[[SINGLE_SCOPE:.*]]
// AMDGCN-NEXT: ]
// AMDGCN: [[ATOMIC_SCOPE_CONTINUE]]:
// AMDGCN-NEXT: ret void
// AMDGCN: [[DEVICE_SCOPE]]:
// AMDGCN-NEXT: fence syncscope("agent-one-as") release
// AMDGCN-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// AMDGCN: [[SYSTEM_SCOPE]]:
// AMDGCN-NEXT: fence syncscope("one-as") release
// AMDGCN-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// AMDGCN: [[WORKGROUP_SCOPE]]:
// AMDGCN-NEXT: fence syncscope("workgroup-one-as") release
// AMDGCN-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// AMDGCN: [[WAVEFRONT_SCOPE]]:
// AMDGCN-NEXT: fence syncscope("wavefront-one-as") release
// AMDGCN-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// AMDGCN: [[SINGLE_SCOPE]]:
// AMDGCN-NEXT: fence syncscope("singlethread-one-as") release
// AMDGCN-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
//
// SPIRV-LABEL: define hidden spir_func void @fe1c(
// SPIRV-SAME: i32 noundef [[SCOPE:%.*]]) #[[ATTR0]] {
// SPIRV-NEXT: [[ENTRY:.*:]]
// SPIRV-NEXT: [[SCOPE_ADDR:%.*]] = alloca i32, align 4
// SPIRV-NEXT: store i32 [[SCOPE]], ptr [[SCOPE_ADDR]], align 4
// SPIRV-NEXT: [[TMP0:%.*]] = load i32, ptr [[SCOPE_ADDR]], align 4
// SPIRV-NEXT: switch i32 [[TMP0]], label %[[ATOMIC_SCOPE_CONTINUE:.*]] [
// SPIRV-NEXT: i32 1, label %[[DEVICE_SCOPE:.*]]
// SPIRV-NEXT: i32 0, label %[[SYSTEM_SCOPE:.*]]
// SPIRV-NEXT: i32 2, label %[[WORKGROUP_SCOPE:.*]]
// SPIRV-NEXT: i32 3, label %[[WAVEFRONT_SCOPE:.*]]
// SPIRV-NEXT: i32 4, label %[[SINGLE_SCOPE:.*]]
// SPIRV-NEXT: ]
// SPIRV: [[ATOMIC_SCOPE_CONTINUE]]:
// SPIRV-NEXT: ret void
// SPIRV: [[DEVICE_SCOPE]]:
// SPIRV-NEXT: fence syncscope("device") release
// SPIRV-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// SPIRV: [[SYSTEM_SCOPE]]:
// SPIRV-NEXT: fence release
// SPIRV-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// SPIRV: [[WORKGROUP_SCOPE]]:
// SPIRV-NEXT: fence syncscope("workgroup") release
// SPIRV-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// SPIRV: [[WAVEFRONT_SCOPE]]:
// SPIRV-NEXT: fence syncscope("subgroup") release
// SPIRV-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// SPIRV: [[SINGLE_SCOPE]]:
// SPIRV-NEXT: fence syncscope("singlethread") release
// SPIRV-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
//
// X86_64-LABEL: define hidden void @fe1c(
// X86_64-SAME: i32 noundef [[SCOPE:%.*]]) #[[ATTR0]] {
// X86_64-NEXT: [[ENTRY:.*:]]
// X86_64-NEXT: [[SCOPE_ADDR:%.*]] = alloca i32, align 4
// X86_64-NEXT: store i32 [[SCOPE]], ptr [[SCOPE_ADDR]], align 4
// X86_64-NEXT: [[TMP0:%.*]] = load i32, ptr [[SCOPE_ADDR]], align 4
// X86_64-NEXT: switch i32 [[TMP0]], label %[[ATOMIC_SCOPE_CONTINUE:.*]] [
// X86_64-NEXT: i32 1, label %[[DEVICE_SCOPE:.*]]
// X86_64-NEXT: i32 0, label %[[SYSTEM_SCOPE:.*]]
// X86_64-NEXT: i32 2, label %[[WORKGROUP_SCOPE:.*]]
// X86_64-NEXT: i32 3, label %[[WAVEFRONT_SCOPE:.*]]
// X86_64-NEXT: i32 4, label %[[SINGLE_SCOPE:.*]]
// X86_64-NEXT: ]
// X86_64: [[ATOMIC_SCOPE_CONTINUE]]:
// X86_64-NEXT: ret void
// X86_64: [[DEVICE_SCOPE]]:
// X86_64-NEXT: fence release
// X86_64-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// X86_64: [[SYSTEM_SCOPE]]:
// X86_64-NEXT: fence release
// X86_64-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// X86_64: [[WORKGROUP_SCOPE]]:
// X86_64-NEXT: fence release
// X86_64-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// X86_64: [[WAVEFRONT_SCOPE]]:
// X86_64-NEXT: fence release
// X86_64-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
// X86_64: [[SINGLE_SCOPE]]:
// X86_64-NEXT: fence release
// X86_64-NEXT: br label %[[ATOMIC_SCOPE_CONTINUE]]
//
void fe1c(int scope) {
__scoped_atomic_thread_fence(__ATOMIC_RELEASE, scope);
}

// AMDGCN-LABEL: define hidden void @fe2a(
// AMDGCN-SAME: ) #[[ATTR0]] {
// AMDGCN-NEXT: [[ENTRY:.*:]]
// AMDGCN-NEXT: ret void
//
// SPIRV-LABEL: define hidden spir_func void @fe2a(
// SPIRV-SAME: ) #[[ATTR0]] {
// SPIRV-NEXT: [[ENTRY:.*:]]
// SPIRV-NEXT: ret void
//
// X86_64-LABEL: define hidden void @fe2a(
// X86_64-SAME: ) #[[ATTR0]] {
// X86_64-NEXT: [[ENTRY:.*:]]
// X86_64-NEXT: ret void
//
void fe2a() {
__scoped_atomic_thread_fence(999, __MEMORY_SCOPE_SYSTEM);
}

// AMDGCN-LABEL: define hidden void @fe2b(
// AMDGCN-SAME: ) #[[ATTR0]] {
// AMDGCN-NEXT: [[ENTRY:.*:]]
// AMDGCN-NEXT: fence syncscope("one-as") release
// AMDGCN-NEXT: ret void
//
// SPIRV-LABEL: define hidden spir_func void @fe2b(
// SPIRV-SAME: ) #[[ATTR0]] {
// SPIRV-NEXT: [[ENTRY:.*:]]
// SPIRV-NEXT: fence release
// SPIRV-NEXT: ret void
//
// X86_64-LABEL: define hidden void @fe2b(
// X86_64-SAME: ) #[[ATTR0]] {
// X86_64-NEXT: [[ENTRY:.*:]]
// X86_64-NEXT: fence release
// X86_64-NEXT: ret void
//
void fe2b() {
__scoped_atomic_thread_fence(__ATOMIC_RELEASE, 999);
}
28 changes: 28 additions & 0 deletions clang/test/CodeGenCUDASPIRV/spirv-attrs.cu
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
// RUN: %clang_cc1 -fcuda-is-device -triple spirv64 -o - -emit-llvm -x cuda %s | FileCheck %s
// RUN: %clang_cc1 -fcuda-is-device -triple spirv32 -o - -emit-llvm -x cuda %s | FileCheck %s

#define __global__ __attribute__((global))

__attribute__((reqd_work_group_size(128, 1, 1)))
__global__ void reqd_work_group_size_128_1_1() {}

__attribute__((work_group_size_hint(2, 2, 2)))
__global__ void work_group_size_hint_2_2_2() {}

__attribute__((vec_type_hint(int)))
__global__ void vec_type_hint_int() {}

__attribute__((intel_reqd_sub_group_size(64)))
__global__ void intel_reqd_sub_group_size_64() {}

// CHECK: define spir_kernel void @_Z28reqd_work_group_size_128_1_1v() #[[ATTR:[0-9]+]] !reqd_work_group_size ![[WG_SIZE:[0-9]+]]
// CHECK: define spir_kernel void @_Z26work_group_size_hint_2_2_2v() #[[ATTR]] !work_group_size_hint ![[WG_HINT:[0-9]+]]
// CHECK: define spir_kernel void @_Z17vec_type_hint_intv() #[[ATTR]] !vec_type_hint ![[VEC_HINT:[0-9]+]]
// CHECK: define spir_kernel void @_Z28intel_reqd_sub_group_size_64v() #[[ATTR]] !intel_reqd_sub_group_size ![[SUB_GRP:[0-9]+]]

// CHECK: attributes #[[ATTR]] = { {{.*}} }

// CHECK: ![[WG_SIZE]] = !{i32 128, i32 1, i32 1}
// CHECK: ![[WG_HINT]] = !{i32 2, i32 2, i32 2}
// CHECK: ![[VEC_HINT]] = !{i32 undef, i32 1}
// CHECK: ![[SUB_GRP]] = !{i32 64}
2 changes: 2 additions & 0 deletions clang/test/CodeGenOpenCL/amdgpu-features.cl
Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,7 @@
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx940 -emit-llvm -o - %s | FileCheck --check-prefix=GFX940 %s
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx941 -emit-llvm -o - %s | FileCheck --check-prefix=GFX941 %s
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx942 -emit-llvm -o - %s | FileCheck --check-prefix=GFX942 %s
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx950 -emit-llvm -o - %s | FileCheck --check-prefix=GFX950 %s
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx1010 -emit-llvm -o - %s | FileCheck --check-prefix=GFX1010 %s
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx1011 -emit-llvm -o - %s | FileCheck --check-prefix=GFX1011 %s
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx1012 -emit-llvm -o - %s | FileCheck --check-prefix=GFX1012 %s
Expand Down Expand Up @@ -88,6 +89,7 @@
// GFX941: "target-features"="+16-bit-insts,+atomic-buffer-global-pk-add-f16-insts,+atomic-ds-pk-add-16-insts,+atomic-fadd-rtn-insts,+atomic-flat-pk-add-16-insts,+atomic-global-pk-add-bf16-inst,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot2-insts,+dot3-insts,+dot4-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dpp,+fp8-conversion-insts,+fp8-insts,+gfx8-insts,+gfx9-insts,+gfx90a-insts,+gfx940-insts,+mai-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize64,+xf32-insts"
// GFX942: "target-features"="+16-bit-insts,+atomic-buffer-global-pk-add-f16-insts,+atomic-ds-pk-add-16-insts,+atomic-fadd-rtn-insts,+atomic-flat-pk-add-16-insts,+atomic-global-pk-add-bf16-inst,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot2-insts,+dot3-insts,+dot4-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dpp,+fp8-conversion-insts,+fp8-insts,+gfx8-insts,+gfx9-insts,+gfx90a-insts,+gfx940-insts,+mai-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize64,+xf32-insts"
// GFX9_4_Generic: "target-features"="+16-bit-insts,+atomic-buffer-global-pk-add-f16-insts,+atomic-ds-pk-add-16-insts,+atomic-fadd-rtn-insts,+atomic-flat-pk-add-16-insts,+atomic-global-pk-add-bf16-inst,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot2-insts,+dot3-insts,+dot4-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dpp,+gfx8-insts,+gfx9-insts,+gfx90a-insts,+gfx940-insts,+mai-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize64"
// GFX950: "target-features"="+16-bit-insts,+atomic-buffer-global-pk-add-f16-insts,+atomic-ds-pk-add-16-insts,+atomic-fadd-rtn-insts,+atomic-flat-pk-add-16-insts,+atomic-global-pk-add-bf16-inst,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot2-insts,+dot3-insts,+dot4-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dpp,+fp8-conversion-insts,+fp8-insts,+gfx8-insts,+gfx9-insts,+gfx90a-insts,+gfx940-insts,+gfx950-insts,+mai-insts,+prng-inst,+s-memrealtime,+s-memtime-inst,+wavefrontsize64"
// GFX1010: "target-features"="+16-bit-insts,+ci-insts,+dl-insts,+dpp,+gfx10-insts,+gfx8-insts,+gfx9-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize32"
// GFX1011: "target-features"="+16-bit-insts,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot2-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dpp,+gfx10-insts,+gfx8-insts,+gfx9-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize32"
// GFX1012: "target-features"="+16-bit-insts,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot2-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dpp,+gfx10-insts,+gfx8-insts,+gfx9-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize32"
Expand Down
16 changes: 16 additions & 0 deletions clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
Original file line number Diff line number Diff line change
@@ -0,0 +1,16 @@
// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn-amd-amdhsa -target-cpu gfx906 -emit-llvm \
// RUN: -verify -o - %s
// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn-amd-amdhsa -target-cpu gfx90a -emit-llvm \
// RUN: -verify -o - %s
// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn-amd-amdhsa -target-cpu gfx940 -emit-llvm \
// RUN: -verify -o - %s
// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn-amd-amdhsa -target-cpu gfx1200 -emit-llvm \
// RUN: -verify -o - %s


// REQUIRES: amdgpu-registered-target

typedef unsigned int uint;
void test_prng_b32(global uint* out, uint a) {
*out = __builtin_amdgcn_prng_b32(a); // expected-error{{'__builtin_amdgcn_prng_b32' needs target feature prng-inst}}
}
21 changes: 21 additions & 0 deletions clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
Original file line number Diff line number Diff line change
@@ -0,0 +1,21 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -cl-std=CL1.2 -O0 -triple amdgcn-unknown-unknown -target-cpu gfx950 -emit-llvm -o - %s | FileCheck %s
// REQUIRES: amdgpu-registered-target

typedef unsigned int uint;

// CHECK-LABEL: @test_prng_b32(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[OUT_ADDR:%.*]] = alloca ptr addrspace(1), align 8, addrspace(5)
// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
// CHECK-NEXT: store ptr addrspace(1) [[OUT:%.*]], ptr addrspace(5) [[OUT_ADDR]], align 8
// CHECK-NEXT: store i32 [[A:%.*]], ptr addrspace(5) [[A_ADDR]], align 4
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(5) [[A_ADDR]], align 4
// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.prng.b32(i32 [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = load ptr addrspace(1), ptr addrspace(5) [[OUT_ADDR]], align 8
// CHECK-NEXT: store i32 [[TMP1]], ptr addrspace(1) [[TMP2]], align 4
// CHECK-NEXT: ret void
//
void test_prng_b32(global uint* out, uint a) {
*out = __builtin_amdgcn_prng_b32(a);
}
31 changes: 29 additions & 2 deletions clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@
// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx908 -DMFMA_GFX908_TESTS -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-GFX908
// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx90a -DMFMA_GFX90A_TESTS -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-GFX90A
// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx940 -DMFMA_GFX940_TESTS -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-GFX940
// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx950 -DMFMA_GFX950_TESTS -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-GFX950

#pragma OPENCL EXTENSION cl_khr_fp64:enable

Expand All @@ -23,6 +24,7 @@ typedef short v8s __attribute__((ext_vector_type(8)));
typedef short v16s __attribute__((ext_vector_type(16)));
typedef short v32s __attribute__((ext_vector_type(32)));
typedef double v4d __attribute__((ext_vector_type(4)));
typedef __bf16 v8bf16 __attribute__((ext_vector_type(8)));


#ifdef MFMA_GFX908_TESTS
Expand Down Expand Up @@ -222,7 +224,7 @@ void test_mfma_f64_4x4x4f64(global double* out, double a, double b, double c)

#endif // MFMA_GFX90A_TESTS

#ifdef MFMA_GFX940_TESTS
#if defined(MFMA_GFX940_TESTS) || defined(MFMA_GFX950_TESTS)
// CHECK-GFX940-LABEL: @test_mfma_i32_16x16x32_i8
// CHECK-GFX940: call <4 x i32> @llvm.amdgcn.mfma.i32.16x16x32.i8(i64 %a, i64 %b, <4 x i32> %c, i32 0, i32 0, i32 0)
void test_mfma_i32_16x16x32_i8(global v4i* out, long a, long b, v4i c)
Expand Down Expand Up @@ -404,4 +406,29 @@ void test_smfmac_f32_32x32x32_fp8_fp8(global v16f* out, v2i a, v4i b, v16f c, in
{
*out = __builtin_amdgcn_smfmac_f32_32x32x32_fp8_fp8(a, b, c, idx, 0, 0);
}
#endif // MFMA_GFX940_TESTS
#endif // defined(MFMA_GFX940_TESTS) || defined(MFMA_GFX950_TESTS)

#ifdef MFMA_GFX950_TESTS

// CHECK-GFX950-LABEL: @test_mfma_f32_16x16x32_f16(
// CHECK-GFX950: tail call <4 x float> @llvm.amdgcn.mfma.f32.16x16x32.f16(<8 x half> %a, <8 x half> %b, <4 x float> %c, i32 1, i32 2, i32 3)

v4f test_mfma_f32_16x16x32_f16(v8h a, v8h b, v4f c)
{
return __builtin_amdgcn_mfma_f32_16x16x32_f16(a, b, c, 1, 2, 3);
}

// CHECK-GFX950-LABEL: @test_mfma_f32_32x32x16_f16
// CHECK-GFX950: tail call <16 x float> @llvm.amdgcn.mfma.f32.32x32x16.f16(<8 x half> %a, <8 x half> %b, <16 x float> %c, i32 1, i32 2, i32 3)
v16f test_mfma_f32_32x32x16_f16(v8h a, v8h b, v16f c)
{
return __builtin_amdgcn_mfma_f32_32x32x16_f16(a, b, c, 1, 2, 3);
}

// CHECK-GFX950-LABEL: @test_mfma_f32_32x32x16_bf16(
// CHECK-GFX950: tail call <16 x float> @llvm.amdgcn.mfma.f32.32x32x16.bf16(<8 x bfloat> %a, <8 x bfloat> %b, <16 x float> %c, i32 1, i32 2, i32 3)
v16f test_mfma_f32_32x32x16_bf16(v8bf16 a, v8bf16 b, v16f c) {
return __builtin_amdgcn_mfma_f32_32x32x16_bf16(a, b, c, 1, 2, 3);
}

#endif
1 change: 1 addition & 0 deletions clang/test/Driver/amdgpu-macros.cl
Original file line number Diff line number Diff line change
Expand Up @@ -110,6 +110,7 @@
// RUN: %clang -E -dM -target amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=64 -DCPU=gfx940 -DFAMILY=GFX9
// RUN: %clang -E -dM -target amdgcn -mcpu=gfx941 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=64 -DCPU=gfx941 -DFAMILY=GFX9
// RUN: %clang -E -dM -target amdgcn -mcpu=gfx942 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=64 -DCPU=gfx942 -DFAMILY=GFX9
// RUN: %clang -E -dM -target amdgcn -mcpu=gfx950 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=64 -DCPU=gfx950 -DFAMILY=GFX9
// RUN: %clang -E -dM -target amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1010 -DFAMILY=GFX10
// RUN: %clang -E -dM -target amdgcn -mcpu=gfx1011 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1011 -DFAMILY=GFX10
// RUN: %clang -E -dM -target amdgcn -mcpu=gfx1012 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1012 -DFAMILY=GFX10
Expand Down
2 changes: 2 additions & 0 deletions clang/test/Driver/amdgpu-mcpu.cl
Original file line number Diff line number Diff line change
Expand Up @@ -95,6 +95,7 @@
// RUN: %clang -### -target amdgcn -mcpu=gfx940 %s 2>&1 | FileCheck --check-prefix=GFX940 %s
// RUN: %clang -### -target amdgcn -mcpu=gfx941 %s 2>&1 | FileCheck --check-prefix=GFX941 %s
// RUN: %clang -### -target amdgcn -mcpu=gfx942 %s 2>&1 | FileCheck --check-prefix=GFX942 %s
// RUN: %clang -### -target amdgcn -mcpu=gfx950 %s 2>&1 | FileCheck --check-prefix=GFX950 %s
// RUN: %clang -### -target amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=GFX1010 %s
// RUN: %clang -### -target amdgcn -mcpu=gfx1011 %s 2>&1 | FileCheck --check-prefix=GFX1011 %s
// RUN: %clang -### -target amdgcn -mcpu=gfx1012 %s 2>&1 | FileCheck --check-prefix=GFX1012 %s
Expand Down Expand Up @@ -150,6 +151,7 @@
// GFX940: "-target-cpu" "gfx940"
// GFX941: "-target-cpu" "gfx941"
// GFX942: "-target-cpu" "gfx942"
// GFX950: "-target-cpu" "gfx950"
// GFX1010: "-target-cpu" "gfx1010"
// GFX1011: "-target-cpu" "gfx1011"
// GFX1012: "-target-cpu" "gfx1012"
Expand Down
2 changes: 1 addition & 1 deletion clang/test/Driver/module-output.cppm
Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@ export module Hello;
// CHECK: "-emit-module-interface" {{.*}}"-main-file-name" "Hello.cppm" {{.*}}"-o" "{{.*}}/output/Hello.pcm" "-x" "c++" "{{.*}}/Hello.cppm"
// CHECK: "-emit-obj" {{.*}}"-main-file-name" "Hello.cppm" {{.*}}"-o" "{{.*}}/output/Hello.o" "-x" "pcm" "{{.*}}/output/Hello.pcm"

// MULTIPLE-ARCH: option '-fmodule-output' can't be used with multiple arch options
// MULTIPLE-ARCH: option '-fmodule-output' cannot be used with multiple arch options

// CHECK-SPECIFIED: "-emit-module-interface" {{.*}}"-main-file-name" "Hello.cppm" {{.*}}"-o" "{{.*}}/pcm/Hello.pcm" "-x" "c++" "{{.*}}/Hello.cppm"
// CHECK-SPECIFIED: "-emit-obj" {{.*}}"-main-file-name" "Hello.cppm" {{.*}}"-o" "{{.*}}/Hello.o" "-x" "pcm" "{{.*}}/pcm/Hello.pcm"
Expand Down
2 changes: 1 addition & 1 deletion clang/test/Driver/relax.s
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
// RUN: llvm-readobj -r %t | FileCheck --check-prefix=REL %s

// REL: R_X86_64_REX_GOTPCRELX foo
// REL: R_X86_64_REX2_GOTPCRELX foo
// REL: R_X86_64_CODE_4_GOTPCRELX foo

movq foo@GOTPCREL(%rip), %rax
movq foo@GOTPCREL(%rip), %r16
62 changes: 62 additions & 0 deletions clang/test/Driver/riscv-cpus.c
Original file line number Diff line number Diff line change
Expand Up @@ -104,6 +104,68 @@
// RUN: %clang --target=riscv32 -### -c %s 2>&1 -mtune=syntacore-scr1-max | FileCheck -check-prefix=MTUNE-SYNTACORE-SCR1-MAX %s
// MTUNE-SYNTACORE-SCR1-MAX: "-tune-cpu" "syntacore-scr1-max"

// RUN: %clang --target=riscv64 -### -c %s 2>&1 -mtune=tt-ascalon-d8 | FileCheck -check-prefix=MTUNE-TT-ASCALON-D8 %s
// MTUNE-TT-ASCALON-D8: "-tune-cpu" "tt-ascalon-d8"

// RUN: %clang --target=riscv64 -### -c %s 2>&1 -mcpu=tt-ascalon-d8 | FileCheck -check-prefix=MCPU-TT-ASCALON-D8 %s
// MCPU-TT-ASCALON-D8: "-target-cpu" "tt-ascalon-d8"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+m"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+a"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+f"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+d"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+c"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+v"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+h"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zicbom"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zicbop"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zicboz"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zicntr"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zicond"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zicsr"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zifencei"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zihintntl"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zihintpause"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zihpm"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zimop"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zmmul"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zawrs"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zfa"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zfbfmin"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zfh"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zfhmin"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zca"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zcb"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zba"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zbb"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zbs"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zkt"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvbb"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvbc"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zve32f"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zve32x"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zve64d"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zve64f"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zve64x"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvfbfmin"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvfbfwma"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvfh"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvfhmin"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvkb"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvkg"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvkn"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvknc"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvkned"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvkng"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvknhb"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvkt"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvl128b"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvl256b"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvl32b"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+zvl64b"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+svinval"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+svnapot"
// MCPU-TT-ASCALON-D8-SAME: "-target-feature" "+svpbmt"

// RUN: %clang --target=riscv64 -### -c %s 2>&1 -mcpu=veyron-v1 | FileCheck -check-prefix=MCPU-VEYRON-V1 %s
// MCPU-VEYRON-V1: "-target-cpu" "veyron-v1"
// MCPU-VEYRON-V1: "-target-feature" "+m"
Expand Down
6 changes: 3 additions & 3 deletions clang/test/Misc/pragma-attribute-strict-subjects.c
Original file line number Diff line number Diff line change
Expand Up @@ -51,7 +51,7 @@ struct testRecoverStrictnessStruct { };
#pragma clang attribute pop

#pragma clang attribute push (__attribute__((abi_tag("a"))), apply_to = any(function, record(unless(is_union)), variable, enum))
// expected-error@-1 {{attribute 'abi_tag' can't be applied to 'enum'}}
// expected-error@-1 {{attribute 'abi_tag' cannot be applied to 'enum'}}

int testRecoverExtraVar = 0;
// CHECK-LABEL: VarDecl{{.*}} testRecoverExtraVar
Expand Down Expand Up @@ -188,7 +188,7 @@ struct testSubset7Struct { };


#pragma clang attribute push (__attribute__((abi_tag("a"))), apply_to = any(record(unless(is_union)), function, variable, enum, enum_constant))
// expected-error@-1 {{attribute 'abi_tag' can't be applied to 'enum_constant', and 'enum'}}
// expected-error@-1 {{attribute 'abi_tag' cannot be applied to 'enum_constant', and 'enum'}}

int testSubsetRecoverVar;
// CHECK-LABEL: VarDecl{{.*}} testSubsetRecoverVar
Expand All @@ -205,7 +205,7 @@ struct testSubsetRecoverStruct { };
#pragma clang attribute pop

#pragma clang attribute push (__attribute__((abi_tag("a"))), apply_to = enum)
// expected-error@-1 {{attribute 'abi_tag' can't be applied to 'enum'}}
// expected-error@-1 {{attribute 'abi_tag' cannot be applied to 'enum'}}

int testSubsetNoVar;
// CHECK-LABEL: VarDecl{{.*}} testSubsetNoVar
Expand Down
1 change: 1 addition & 0 deletions clang/test/Misc/target-invalid-cpu-note/amdgcn.c
Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,7 @@
// CHECK-SAME: {{^}}, gfx940
// CHECK-SAME: {{^}}, gfx941
// CHECK-SAME: {{^}}, gfx942
// CHECK-SAME: {{^}}, gfx950
// CHECK-SAME: {{^}}, gfx1010
// CHECK-SAME: {{^}}, gfx1011
// CHECK-SAME: {{^}}, gfx1012
Expand Down
1 change: 1 addition & 0 deletions clang/test/Misc/target-invalid-cpu-note/nvptx.c
Original file line number Diff line number Diff line change
Expand Up @@ -54,6 +54,7 @@
// CHECK-SAME: {{^}}, gfx940
// CHECK-SAME: {{^}}, gfx941
// CHECK-SAME: {{^}}, gfx942
// CHECK-SAME: {{^}}, gfx950
// CHECK-SAME: {{^}}, gfx10-1-generic
// CHECK-SAME: {{^}}, gfx1010
// CHECK-SAME: {{^}}, gfx1011
Expand Down
2 changes: 2 additions & 0 deletions clang/test/Misc/target-invalid-cpu-note/riscv.c
Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,7 @@
// RISCV64-SAME: {{^}}, syntacore-scr4-rv64
// RISCV64-SAME: {{^}}, syntacore-scr5-rv64
// RISCV64-SAME: {{^}}, syntacore-scr7
// RISCV64-SAME: {{^}}, tt-ascalon-d8
// RISCV64-SAME: {{^}}, veyron-v1
// RISCV64-SAME: {{^}}, xiangshan-nanhu
// RISCV64-SAME: {{$}}
Expand Down Expand Up @@ -87,6 +88,7 @@
// TUNE-RISCV64-SAME: {{^}}, syntacore-scr4-rv64
// TUNE-RISCV64-SAME: {{^}}, syntacore-scr5-rv64
// TUNE-RISCV64-SAME: {{^}}, syntacore-scr7
// TUNE-RISCV64-SAME: {{^}}, tt-ascalon-d8
// TUNE-RISCV64-SAME: {{^}}, veyron-v1
// TUNE-RISCV64-SAME: {{^}}, xiangshan-nanhu
// TUNE-RISCV64-SAME: {{^}}, generic
Expand Down
4 changes: 2 additions & 2 deletions clang/test/Modules/no-eager-load.cppm
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@ void use() {
// expected-note@* {{but in 'a' found a different body}}
}

// expected-error@a.cppm:* {{declaration 'foo' attached to named module 'a' can't be attached to other modules}}
// expected-error@a.cppm:* {{declaration 'foo' attached to named module 'a' cannot be attached to other modules}}
// expected-note@b.cppm:* {{}}

//--- h.cppm
Expand All @@ -59,5 +59,5 @@ void use() {
// expected-note@* {{but in 'a' found a different body}}
}

// expected-error@a.cppm:* {{declaration 'foo' attached to named module 'a' can't be attached to other modules}}
// expected-error@a.cppm:* {{declaration 'foo' attached to named module 'a' cannot be attached to other modules}}
// expected-note@b.cppm:* {{}}
8 changes: 4 additions & 4 deletions clang/test/Modules/same-decl-in-different-modules.cppm
Original file line number Diff line number Diff line change
Expand Up @@ -32,11 +32,11 @@ void test() {
S<int> s;
}

// expected-error@mod1.cppm:* {{declaration 'v' attached to named module 'mod1' can't be attached to other modules}}
// expected-error@mod1.cppm:* {{declaration 'v' attached to named module 'mod1' cannot be attached to other modules}}
// expected-note@mod2.cppm:* {{}}
// expected-error@mod1.cppm:* {{declaration 'func' attached to named module 'mod1' can't be attached to other modules}}
// expected-error@mod1.cppm:* {{declaration 'func' attached to named module 'mod1' cannot be attached to other modules}}
// expected-note@mod2.cppm:* {{}}
// expected-error@mod1.cppm:* {{declaration 'A' attached to named module 'mod1' can't be attached to other modules}}
// expected-error@mod1.cppm:* {{declaration 'A' attached to named module 'mod1' cannot be attached to other modules}}
// expected-note@mod2.cppm:* {{}}
// expected-error@mod1.cppm:* 1+{{declaration 'S' attached to named module 'mod1' can't be attached to other modules}}
// expected-error@mod1.cppm:* 1+{{declaration 'S' attached to named module 'mod1' cannot be attached to other modules}}
// expected-note@mod2.cppm:* 1+{{}}
2 changes: 1 addition & 1 deletion clang/test/OpenMP/for_simd_loop_messages.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -731,7 +731,7 @@ void test_ordered() {
for (int i = 0; i < 16; ++i)
;
#pragma omp parallel
// expected-error@+1 {{'ordered' clause with a parameter can not be specified in '#pragma omp for simd' directive}}
// expected-error@+1 {{'ordered' clause with a parameter cannot be specified in '#pragma omp for simd' directive}}
#pragma omp for simd ordered(1)
for (int i = 0; i < 16; ++i)
;
Expand Down
2 changes: 1 addition & 1 deletion clang/test/OpenMP/masked_taskloop_simd_linear_messages.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -152,7 +152,7 @@ template<class I, class C> int foomain(I argc, C **argv) {
#pragma omp masked taskloop simd linear (S1) // expected-error {{'S1' does not refer to a value}}
for (int k = 0; k < argc; ++k) ++k;
#if defined(OMP52)
// omp52-error@+3{{step simple modifier is exclusive and can't be use with 'val', 'uval' or 'ref' modifier}}
// omp52-error@+3{{step simple modifier is exclusive and cannot be use with 'val', 'uval' or 'ref' modifier}}
// expected-error@+2 {{linear variable with incomplete type 'S1'}}
// expected-error@+1 {{argument of a linear clause should be of integral or pointer type, not 'S2'}}
#pragma omp masked taskloop simd linear (a, b: val, B::ib)
Expand Down
2 changes: 1 addition & 1 deletion clang/test/OpenMP/master_taskloop_simd_linear_messages.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -152,7 +152,7 @@ template<class I, class C> int foomain(I argc, C **argv) {
#pragma omp master taskloop simd linear (S1) // expected-error {{'S1' does not refer to a value}}
for (int k = 0; k < argc; ++k) ++k;
#if defined(OMP52)
// omp52-error@+3{{step simple modifier is exclusive and can't be use with 'val', 'uval' or 'ref' modifier}}
// omp52-error@+3{{step simple modifier is exclusive and cannot be use with 'val', 'uval' or 'ref' modifier}}
// expected-error@+2 {{linear variable with incomplete type 'S1'}}
// expected-error@+1 {{argument of a linear clause should be of integral or pointer type, not 'S2'}}
#pragma omp master taskloop simd linear (a, b: val, B::ib)
Expand Down
2 changes: 1 addition & 1 deletion clang/test/OpenMP/parallel_for_simd_loop_messages.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -638,7 +638,7 @@ void test_ordered() {
#pragma omp parallel for simd ordered
for (int i = 0; i < 16; ++i)
;
//expected-error@+1 {{'ordered' clause with a parameter can not be specified in '#pragma omp parallel for simd' directive}}
//expected-error@+1 {{'ordered' clause with a parameter cannot be specified in '#pragma omp parallel for simd' directive}}
#pragma omp parallel for simd ordered(1)
for (int i = 0; i < 16; ++i)
;
Expand Down
2 changes: 1 addition & 1 deletion clang/test/OpenMP/parallel_for_simd_messages.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -94,7 +94,7 @@ void test_ordered() {
#pragma omp parallel for simd ordered
for (int i = 0; i < 16; ++i)
;
// expected-error@+1 {{'ordered' clause with a parameter can not be specified in '#pragma omp parallel for simd' directive}}
// expected-error@+1 {{'ordered' clause with a parameter cannot be specified in '#pragma omp parallel for simd' directive}}
#pragma omp parallel for simd ordered(1)
for (int i = 0; i < 16; ++i)
;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -152,7 +152,7 @@ template<class I, class C> int foomain(I argc, C **argv) {
#pragma omp parallel masked taskloop simd linear (S1) // expected-error {{'S1' does not refer to a value}}
for (int k = 0; k < argc; ++k) ++k;
#if defined(OMP52)
// omp52-error@+3{{step simple modifier is exclusive and can't be use with 'val', 'uval' or 'ref' modifier}}
// omp52-error@+3{{step simple modifier is exclusive and cannot be use with 'val', 'uval' or 'ref' modifier}}
// expected-error@+2 {{linear variable with incomplete type 'S1'}}
// expected-error@+1 {{argument of a linear clause should be of integral or pointer type, not 'S2'}}
#pragma omp parallel masked taskloop simd linear (a, b: val, B::ib)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -152,7 +152,7 @@ template<class I, class C> int foomain(I argc, C **argv) {
#pragma omp parallel master taskloop simd linear (S1) // expected-error {{'S1' does not refer to a value}}
for (int k = 0; k < argc; ++k) ++k;
#if defined(OMP52)
// omp52-error@+3{{step simple modifier is exclusive and can't be use with 'val', 'uval' or 'ref' modifier}}
// omp52-error@+3{{step simple modifier is exclusive and cannot be use with 'val', 'uval' or 'ref' modifier}}
// expected-error@+2 {{linear variable with incomplete type 'S1'}}
// expected-error@+1 {{argument of a linear clause should be of integral or pointer type, not 'S2'}}
#pragma omp parallel master taskloop simd linear (a, b: val, B::ib)
Expand Down
2 changes: 1 addition & 1 deletion clang/test/OpenMP/simd_linear_messages.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -142,7 +142,7 @@ template<class I, class C> int foomain(I argc, C **argv) {
#pragma omp simd linear (S1) // expected-error {{'S1' does not refer to a value}}
for (int k = 0; k < argc; ++k) ++k;
#if defined(OMP52)
// omp52-error@+3{{step simple modifier is exclusive and can't be use with 'val', 'uval' or 'ref' modifier}}
// omp52-error@+3{{step simple modifier is exclusive and cannot be use with 'val', 'uval' or 'ref' modifier}}
// expected-error@+2 {{linear variable with incomplete type 'S1'}}
// expected-error@+1 {{argument of a linear clause should be of integral or pointer type, not 'S2'}}
#pragma omp simd linear (a, b: val, B::ib)
Expand Down
Loading