6 changes: 3 additions & 3 deletions llvm/test/Transforms/LoopStrengthReduce/ARM/complexity.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -54,7 +54,7 @@ for.body12.us.us: ; preds = %for.body12.us.us, %
%conv17.us.us = sext i16 %tmp10 to i32
%mul.us.us = mul nsw i32 %conv17.us.us, %conv.us.us
%add18.us.us = add nsw i32 %mul.us.us, %result_element.152.us.us
%inc.us.us = or i32 %filter_x.053.us.us, 1
%inc.us.us = or disjoint i32 %filter_x.053.us.us, 1
%add13.us.us.1 = add i32 %inc.us.us, %res_x.060.us
%arrayidx14.us.us.1 = getelementptr inbounds i16, ptr %tmp5, i32 %inc.us.us
%tmp11 = load i16, ptr %arrayidx14.us.us.1, align 2
Expand All @@ -64,7 +64,7 @@ for.body12.us.us: ; preds = %for.body12.us.us, %
%conv17.us.us.1 = sext i16 %tmp12 to i32
%mul.us.us.1 = mul nsw i32 %conv17.us.us.1, %conv.us.us.1
%add18.us.us.1 = add nsw i32 %mul.us.us.1, %add18.us.us
%inc.us.us.1 = or i32 %filter_x.053.us.us, 2
%inc.us.us.1 = or disjoint i32 %filter_x.053.us.us, 2
%add13.us.us.2 = add i32 %inc.us.us.1, %res_x.060.us
%arrayidx14.us.us.2 = getelementptr inbounds i16, ptr %tmp5, i32 %inc.us.us.1
%tmp13 = load i16, ptr %arrayidx14.us.us.2, align 2
Expand All @@ -74,7 +74,7 @@ for.body12.us.us: ; preds = %for.body12.us.us, %
%conv17.us.us.2 = sext i16 %tmp14 to i32
%mul.us.us.2 = mul nsw i32 %conv17.us.us.2, %conv.us.us.2
%add18.us.us.2 = add nsw i32 %mul.us.us.2, %add18.us.us.1
%inc.us.us.2 = or i32 %filter_x.053.us.us, 3
%inc.us.us.2 = or disjoint i32 %filter_x.053.us.us, 3
%add13.us.us.3 = add i32 %inc.us.us.2, %res_x.060.us
%arrayidx14.us.us.3 = getelementptr inbounds i16, ptr %tmp5, i32 %inc.us.us.2
%tmp15 = load i16, ptr %arrayidx14.us.us.3, align 2
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -245,7 +245,7 @@ for.body: ; preds = %for.body, %entry
%conv3 = trunc i32 %add to i8
%arrayidx4 = getelementptr inbounds i8, ptr %c, i32 %i.07
store i8 %conv3, ptr %arrayidx4, align 1
%inc1 = or i32 %i.07, 1
%inc1 = or disjoint i32 %i.07, 1
%arrayidx.1 = getelementptr inbounds i8, ptr %a, i32 %inc1
%2 = load i8, ptr %arrayidx.1, align 1
%conv5.1 = zext i8 %2 to i32
Expand All @@ -256,7 +256,7 @@ for.body: ; preds = %for.body, %entry
%conv3.1 = trunc i32 %add.1 to i8
%arrayidx4.1 = getelementptr inbounds i8, ptr %c, i32 %inc1
store i8 %conv3.1, ptr %arrayidx4.1, align 1
%inc.12 = or i32 %i.07, 2
%inc.12 = or disjoint i32 %i.07, 2
%arrayidx.2 = getelementptr inbounds i8, ptr %a, i32 %inc.12
%4 = load i8, ptr %arrayidx.2, align 1
%conv5.2 = zext i8 %4 to i32
Expand All @@ -267,7 +267,7 @@ for.body: ; preds = %for.body, %entry
%conv3.2 = trunc i32 %add.2 to i8
%arrayidx4.2 = getelementptr inbounds i8, ptr %c, i32 %inc.12
store i8 %conv3.2, ptr %arrayidx4.2, align 1
%inc.23 = or i32 %i.07, 3
%inc.23 = or disjoint i32 %i.07, 3
%arrayidx.3 = getelementptr inbounds i8, ptr %a, i32 %inc.23
%6 = load i8, ptr %arrayidx.3, align 1
%conv5.3 = zext i8 %6 to i32
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -385,7 +385,7 @@ for.body: ; preds = %for.body, %entry
%conv3 = trunc i32 %add to i8
%arrayidx4 = getelementptr inbounds i8, ptr %c, i32 %i.07
store i8 %conv3, ptr %arrayidx4, align 1
%inc1 = or i32 %i.07, 1
%inc1 = or disjoint i32 %i.07, 1
%arrayidx.1 = getelementptr inbounds i8, ptr %a, i32 %inc1
%2 = load i8, ptr %arrayidx.1, align 1
%conv5.1 = zext i8 %2 to i32
Expand All @@ -396,7 +396,7 @@ for.body: ; preds = %for.body, %entry
%conv3.1 = trunc i32 %add.1 to i8
%arrayidx4.1 = getelementptr inbounds i8, ptr %c, i32 %inc1
store i8 %conv3.1, ptr %arrayidx4.1, align 1
%inc.12 = or i32 %i.07, 2
%inc.12 = or disjoint i32 %i.07, 2
%arrayidx.2 = getelementptr inbounds i8, ptr %a, i32 %inc.12
%4 = load i8, ptr %arrayidx.2, align 1
%conv5.2 = zext i8 %4 to i32
Expand All @@ -407,7 +407,7 @@ for.body: ; preds = %for.body, %entry
%conv3.2 = trunc i32 %add.2 to i8
%arrayidx4.2 = getelementptr inbounds i8, ptr %c, i32 %inc.12
store i8 %conv3.2, ptr %arrayidx4.2, align 1
%inc.23 = or i32 %i.07, 3
%inc.23 = or disjoint i32 %i.07, 3
%arrayidx.3 = getelementptr inbounds i8, ptr %a, i32 %inc.23
%6 = load i8, ptr %arrayidx.3, align 1
%conv5.3 = zext i8 %6 to i32
Expand Down Expand Up @@ -478,7 +478,7 @@ for.body:
%p = phi ptr [ %p.next, %for.body ], [ %a, %entry ]
%i = phi i32 [ %inc4, %for.body ], [ 0, %entry ]
store i32 %i, ptr %p, align 4
%inc1 = or i32 %i, 1
%inc1 = or disjoint i32 %i, 1
%add.ptr.i1 = getelementptr inbounds i32, ptr %p, i32 1
store i32 %inc1, ptr %add.ptr.i1, align 4
%inc2 = add nsw i32 %i, 2
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/Transforms/LoopStrengthReduce/X86/missing-phi-operand-update.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,8 @@ target triple = "x86_64-unknown-linux-gnu"
; All the other PHI inputs besides %tmp1 go to a new phi node.
; This test checks that LSR is still able to rewrite %tmp2, %tmp3, %tmp4.
define i32 @foo(ptr %A, i32 %t) {
; CHECK-LABEL: define i32 @foo
; CHECK-SAME: (ptr [[A:%.*]], i32 [[T:%.*]]) {
; CHECK-LABEL: define i32 @foo(
; CHECK-SAME: ptr [[A:%.*]], i32 [[T:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_32:%.*]]
; CHECK: loop.exit.loopexitsplitsplitsplit:
Expand Down Expand Up @@ -131,7 +131,7 @@ for.end: ; preds = %then.8.1, %ifmerge.
loop.32: ; preds = %ifmerge.46, %entry
%i1.i64.0 = phi i64 [ 0, %entry ], [ %nextivloop.32, %ifmerge.46 ]
%tmp1 = shl i64 %i1.i64.0, 2
%tmp2 = or i64 %tmp1, 1
%tmp2 = or disjoint i64 %tmp1, 1
%arrayIdx = getelementptr inbounds i32, ptr %A, i64 %tmp2
%gepload = load i32, ptr %arrayIdx, align 4
%cmp.34 = icmp sgt i32 %gepload, %t
Expand All @@ -144,7 +144,7 @@ then.34: ; preds = %loop.32
br i1 %cmp.35, label %loop.exit, label %ifmerge.34

ifmerge.34: ; preds = %then.34, %loop.32
%tmp3 = or i64 %tmp1, 2
%tmp3 = or disjoint i64 %tmp1, 2
%arrayIdx19 = getelementptr inbounds i32, ptr %A, i64 %tmp3
%gepload20 = load i32, ptr %arrayIdx19, align 4
%cmp.38 = icmp sgt i32 %gepload20, %t
Expand All @@ -153,7 +153,7 @@ ifmerge.34: ; preds = %then.34, %loop.32
br i1 %or.cond, label %loop.exit, label %ifmerge.38

ifmerge.38: ; preds = %ifmerge.34
%tmp4 = or i64 %tmp1, 3
%tmp4 = or disjoint i64 %tmp1, 3
%arrayIdx23 = getelementptr inbounds i32, ptr %A, i64 %tmp4
%gepload24 = load i32, ptr %arrayIdx23, align 4
%cmp.42 = icmp sgt i32 %gepload24, %t
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/LoopUnroll/X86/high-cost-expansion.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ define void @mask-high(i64 %arg, ptr dereferenceable(4) %arg1) {
; CHECK-NEXT: [[I:%.*]] = load i32, ptr [[ARG1:%.*]], align 4
; CHECK-NEXT: [[I2:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[I3:%.*]] = and i64 [[ARG:%.*]], -16
; CHECK-NEXT: [[I4:%.*]] = or i64 1, [[I3]]
; CHECK-NEXT: [[I4:%.*]] = or disjoint i64 1, [[I3]]
; CHECK-NEXT: [[I5:%.*]] = icmp sgt i64 [[I4]], [[I2]]
; CHECK-NEXT: br i1 [[I5]], label [[BB10:%.*]], label [[BB6_PREHEADER:%.*]]
; CHECK: bb6.preheader:
Expand All @@ -26,7 +26,7 @@ bb:
%i = load i32, ptr %arg1, align 4
%i2 = sext i32 %i to i64
%i3 = and i64 %arg, -16
%i4 = or i64 1, %i3
%i4 = or disjoint i64 1, %i3
%i5 = icmp sgt i64 %i4, %i2
br i1 %i5, label %bb10, label %bb6

Expand Down
10 changes: 5 additions & 5 deletions llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -556,7 +556,7 @@ define void @fadd_strict_interleave(ptr noalias nocapture readonly %a, ptr noali
; CHECK-NOT-VECTORIZED-NEXT: [[ARRAYIDXB1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV]]
; CHECK-NOT-VECTORIZED-NEXT: [[TMP0:%.*]] = load float, ptr [[ARRAYIDXB1]], align 4
; CHECK-NOT-VECTORIZED-NEXT: [[ADD1]] = fadd float [[TMP0]], [[ADD_PHI2]]
; CHECK-NOT-VECTORIZED-NEXT: [[OR:%.*]] = or i64 [[IV]], 1
; CHECK-NOT-VECTORIZED-NEXT: [[OR:%.*]] = or disjoint i64 [[IV]], 1
; CHECK-NOT-VECTORIZED-NEXT: [[ARRAYIDXB2:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[OR]]
; CHECK-NOT-VECTORIZED-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDXB2]], align 4
; CHECK-NOT-VECTORIZED-NEXT: [[ADD2]] = fadd float [[TMP1]], [[ADD_PHI1]]
Expand Down Expand Up @@ -628,7 +628,7 @@ define void @fadd_strict_interleave(ptr noalias nocapture readonly %a, ptr noali
; CHECK-UNORDERED-NEXT: [[ARRAYIDXB1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV]]
; CHECK-UNORDERED-NEXT: [[TMP21:%.*]] = load float, ptr [[ARRAYIDXB1]], align 4
; CHECK-UNORDERED-NEXT: [[ADD1]] = fadd float [[TMP21]], [[ADD_PHI2]]
; CHECK-UNORDERED-NEXT: [[OR:%.*]] = or i64 [[IV]], 1
; CHECK-UNORDERED-NEXT: [[OR:%.*]] = or disjoint i64 [[IV]], 1
; CHECK-UNORDERED-NEXT: [[ARRAYIDXB2:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[OR]]
; CHECK-UNORDERED-NEXT: [[TMP22:%.*]] = load float, ptr [[ARRAYIDXB2]], align 4
; CHECK-UNORDERED-NEXT: [[ADD2]] = fadd float [[TMP22]], [[ADD_PHI1]]
Expand Down Expand Up @@ -696,7 +696,7 @@ define void @fadd_strict_interleave(ptr noalias nocapture readonly %a, ptr noali
; CHECK-ORDERED-NEXT: [[ARRAYIDXB1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV]]
; CHECK-ORDERED-NEXT: [[TMP17:%.*]] = load float, ptr [[ARRAYIDXB1]], align 4
; CHECK-ORDERED-NEXT: [[ADD1]] = fadd float [[TMP17]], [[ADD_PHI2]]
; CHECK-ORDERED-NEXT: [[OR:%.*]] = or i64 [[IV]], 1
; CHECK-ORDERED-NEXT: [[OR:%.*]] = or disjoint i64 [[IV]], 1
; CHECK-ORDERED-NEXT: [[ARRAYIDXB2:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[OR]]
; CHECK-ORDERED-NEXT: [[TMP18:%.*]] = load float, ptr [[ARRAYIDXB2]], align 4
; CHECK-ORDERED-NEXT: [[ADD2]] = fadd float [[TMP18]], [[ADD_PHI1]]
Expand Down Expand Up @@ -776,7 +776,7 @@ define void @fadd_strict_interleave(ptr noalias nocapture readonly %a, ptr noali
; CHECK-ORDERED-TF-NEXT: [[ARRAYIDXB1:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[IV]]
; CHECK-ORDERED-TF-NEXT: [[TMP26:%.*]] = load float, ptr [[ARRAYIDXB1]], align 4
; CHECK-ORDERED-TF-NEXT: [[ADD1]] = fadd float [[TMP26]], [[ADD_PHI2]]
; CHECK-ORDERED-TF-NEXT: [[OR:%.*]] = or i64 [[IV]], 1
; CHECK-ORDERED-TF-NEXT: [[OR:%.*]] = or disjoint i64 [[IV]], 1
; CHECK-ORDERED-TF-NEXT: [[ARRAYIDXB2:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[OR]]
; CHECK-ORDERED-TF-NEXT: [[TMP27:%.*]] = load float, ptr [[ARRAYIDXB2]], align 4
; CHECK-ORDERED-TF-NEXT: [[ADD2]] = fadd float [[TMP27]], [[ADD_PHI1]]
Expand Down Expand Up @@ -807,7 +807,7 @@ for.body:
%arrayidxb1 = getelementptr inbounds float, ptr %b, i64 %iv
%0 = load float, ptr %arrayidxb1, align 4
%add1 = fadd float %0, %add.phi2
%or = or i64 %iv, 1
%or = or disjoint i64 %iv, 1
%arrayidxb2 = getelementptr inbounds float, ptr %b, i64 %or
%1 = load float, ptr %arrayidxb2, align 4
%add2 = fadd float %1, %add.phi1
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -315,7 +315,7 @@ for.body:
%arrayidxb1 = getelementptr inbounds float, ptr %b, i64 %iv
%0 = load float, ptr %arrayidxb1, align 4
%add1 = fadd float %0, %add.phi2
%or = or i64 %iv, 1
%or = or disjoint i64 %iv, 1
%arrayidxb2 = getelementptr inbounds float, ptr %b, i64 %or
%1 = load float, ptr %arrayidxb2, align 4
%add2 = fadd float %1, %add.phi1
Expand Down
14 changes: 7 additions & 7 deletions llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,7 @@ for.body: ; preds = %for.body, %entry
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%arrayidx0 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %indvars.iv
%load1 = load i32, i32* %arrayidx0, align 4
%or = or i64 %indvars.iv, 1
%or = or disjoint i64 %indvars.iv, 1
%arrayidx1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %or
%load2 = load i32, i32* %arrayidx1, align 4
%add = add nsw i32 %load1, %C
Expand Down Expand Up @@ -156,7 +156,7 @@ for.body: ; preds = %entry, %for.body
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%arrayidx = getelementptr inbounds [1024 x i16], [1024 x i16]* @AB_i16, i64 0, i64 %indvars.iv
%0 = load i16, i16* %arrayidx, align 2
%1 = or i64 %indvars.iv, 1
%1 = or disjoint i64 %indvars.iv, 1
%arrayidx2 = getelementptr inbounds [1024 x i16], [1024 x i16]* @AB_i16, i64 0, i64 %1
%2 = load i16, i16* %arrayidx2, align 2
%conv = sext i16 %0 to i32
Expand Down Expand Up @@ -248,7 +248,7 @@ for.body: ; preds = %entry, %for.body
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%arrayidx = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %indvars.iv
%0 = load i32, i32* %arrayidx, align 4
%1 = or i64 %indvars.iv, 1
%1 = or disjoint i64 %indvars.iv, 1
%arrayidx2 = getelementptr inbounds [1024 x i32], [1024 x i32]* @AB, i64 0, i64 %1
%2 = load i32, i32* %arrayidx2, align 4
%add3 = add nsw i32 %0, %C
Expand Down Expand Up @@ -752,7 +752,7 @@ for.body: ; preds = %for.body, %entry
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
%load1 = load i32, i32* %arrayidx, align 4
%or = or i64 %indvars.iv, 1
%or = or disjoint i64 %indvars.iv, 1
%arrayidx2 = getelementptr inbounds i32, i32* %A, i64 %or
%load2 = load i32, i32* %arrayidx2, align 4
%mul = mul nsw i32 %load2, %load1
Expand Down Expand Up @@ -1491,17 +1491,17 @@ define void @PR34743(i16* %a, i32* %b, i64 %n) #1 {
; CHECK-NEXT: [[TMP16:%.*]] = add nuw nsw <vscale x 4 x i64> [[VEC_IND]], shufflevector (<vscale x 4 x i64> insertelement (<vscale x 4 x i64> poison, i64 1, i64 0), <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer)
; CHECK-NEXT: [[TMP17:%.*]] = add nuw nsw <vscale x 4 x i64> [[VEC_IND]], shufflevector (<vscale x 4 x i64> insertelement (<vscale x 4 x i64> poison, i64 2, i64 0), <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer)
; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i16, ptr [[A]], <vscale x 4 x i64> [[TMP16]]
; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0(<vscale x 4 x ptr> [[TMP18]], i32 4, <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i64 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i16> poison), !alias.scope !34
; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0(<vscale x 4 x ptr> [[TMP18]], i32 4, <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i64 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i16> poison), !alias.scope [[META34:![0-9]+]]
; CHECK-NEXT: [[TMP19:%.*]] = sext <vscale x 4 x i16> [[WIDE_MASKED_GATHER]] to <vscale x 4 x i32>
; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i16, ptr [[A]], <vscale x 4 x i64> [[TMP17]]
; CHECK-NEXT: [[WIDE_MASKED_GATHER4]] = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0(<vscale x 4 x ptr> [[TMP20]], i32 4, <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i64 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i16> poison), !alias.scope !34
; CHECK-NEXT: [[WIDE_MASKED_GATHER4]] = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0(<vscale x 4 x ptr> [[TMP20]], i32 4, <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i64 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i16> poison), !alias.scope [[META34]]
; CHECK-NEXT: [[TMP21:%.*]] = call <vscale x 4 x i16> @llvm.experimental.vector.splice.nxv4i16(<vscale x 4 x i16> [[VECTOR_RECUR]], <vscale x 4 x i16> [[WIDE_MASKED_GATHER4]], i32 -1)
; CHECK-NEXT: [[TMP22:%.*]] = sext <vscale x 4 x i16> [[TMP21]] to <vscale x 4 x i32>
; CHECK-NEXT: [[TMP23:%.*]] = sext <vscale x 4 x i16> [[WIDE_MASKED_GATHER4]] to <vscale x 4 x i32>
; CHECK-NEXT: [[TMP24:%.*]] = mul nsw <vscale x 4 x i32> [[TMP22]], [[TMP19]]
; CHECK-NEXT: [[TMP25:%.*]] = mul nsw <vscale x 4 x i32> [[TMP24]], [[TMP23]]
; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]]
; CHECK-NEXT: store <vscale x 4 x i32> [[TMP25]], ptr [[TMP26]], align 4, !alias.scope !37, !noalias !34
; CHECK-NEXT: store <vscale x 4 x i32> [[TMP25]], ptr [[TMP26]], align 4, !alias.scope [[META37:![0-9]+]], !noalias [[META34]]
; CHECK-NEXT: [[TMP27:%.*]] = call i64 @llvm.vscale.i64()
; CHECK-NEXT: [[TMP28:%.*]] = shl nuw nsw i64 [[TMP27]], 2
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP28]]
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -179,7 +179,7 @@ if.then:
%mul = shl nuw nsw i32 %ix.024, 1
%arrayidx = getelementptr inbounds i8, ptr %p, i32 %mul
%0 = load i8, ptr %arrayidx, align 1
%add = or i32 %mul, 1
%add = or disjoint i32 %mul, 1
%arrayidx4 = getelementptr inbounds i8, ptr %p, i32 %add
%1 = load i8, ptr %arrayidx4, align 1
%cmp.i = icmp slt i8 %0, %1
Expand Down Expand Up @@ -345,7 +345,7 @@ for.body:
br i1 %cmp1, label %if.then, label %for.inc

if.then:
%add = or i32 %mul, 1
%add = or disjoint i32 %mul, 1
%arrayidx3 = getelementptr inbounds i8, ptr %q, i32 %add
store i8 2, ptr %arrayidx3, align 1
br label %for.inc
Expand Down Expand Up @@ -532,7 +532,7 @@ if.end:
br i1 %cmp4, label %if.then6, label %for.inc

if.then6:
%add = or i32 %mul, 1
%add = or disjoint i32 %mul, 1
%arrayidx7 = getelementptr inbounds i8, ptr %q, i32 %add
store i8 2, ptr %arrayidx7, align 1
br label %for.inc
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -328,7 +328,7 @@ for.body: ; preds = %entry, %for.body
%mul1 = mul nuw nsw i64 %i.021, 3
%arrayidx2 = getelementptr inbounds float, ptr %dst, i64 %mul1
store float %0, ptr %arrayidx2, align 4
%add = or i64 %mul, 1
%add = or disjoint i64 %mul, 1
%arrayidx4 = getelementptr inbounds float, ptr %src, i64 %add
%1 = load float, ptr %arrayidx4, align 4
%add6 = add nuw nsw i64 %mul1, 1
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -1380,7 +1380,7 @@ entry:
for.body: ; preds = %for.body.preheader, %for.body
%iv = phi i32 [ %iv.next, %for.body ], [ 0, %entry ]
%red.phi = phi i32 [ %red.2, %for.body ], [ 0, %entry ]
%add = or i32 %iv, 1
%add = or disjoint i32 %iv, 1
%gep.0 = getelementptr inbounds i32, ptr %arr, i32 %add
%l.0 = load i32, ptr %gep.0, align 4
%gep.1 = getelementptr inbounds i32, ptr %arr, i32 %iv
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -181,7 +181,7 @@ for.body: ; preds = %for.body, %entry
%0 = shl nsw i64 %indvars.iv, 1
%arrayidx = getelementptr inbounds i32, ptr %b, i64 %0
%1 = load i32, ptr %arrayidx, align 4
%2 = or i64 %0, 1
%2 = or disjoint i64 %0, 1
%arrayidx3 = getelementptr inbounds i32, ptr %b, i64 %2
%3 = load i32, ptr %arrayidx3, align 4
%add4 = add nsw i32 %3, %1
Expand Down
18 changes: 9 additions & 9 deletions llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -61,7 +61,7 @@ define void @test_muladd(ptr noalias nocapture %d1, ptr noalias nocapture readon
; SSE2-NEXT: [[TMP18:%.*]] = load i16, ptr [[ARRAYIDX4]], align 2
; SSE2-NEXT: [[CONV5:%.*]] = sext i16 [[TMP18]] to i32
; SSE2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[CONV5]], [[CONV]]
; SSE2-NEXT: [[TMP19:%.*]] = or i64 [[TMP16]], 1
; SSE2-NEXT: [[TMP19:%.*]] = or disjoint i64 [[TMP16]], 1
; SSE2-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i16, ptr [[S1]], i64 [[TMP19]]
; SSE2-NEXT: [[TMP20:%.*]] = load i16, ptr [[ARRAYIDX10]], align 2
; SSE2-NEXT: [[CONV11:%.*]] = sext i16 [[TMP20]] to i32
Expand All @@ -74,7 +74,7 @@ define void @test_muladd(ptr noalias nocapture %d1, ptr noalias nocapture readon
; SSE2-NEXT: store i32 [[ADD18]], ptr [[ARRAYIDX20]], align 4
; SSE2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; SSE2-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
; SSE2-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
; SSE2-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
; SSE2: for.end.loopexit:
; SSE2-NEXT: br label [[FOR_END]]
; SSE2: for.end:
Expand Down Expand Up @@ -157,7 +157,7 @@ define void @test_muladd(ptr noalias nocapture %d1, ptr noalias nocapture readon
; SSE41-NEXT: [[TMP33:%.*]] = load i16, ptr [[ARRAYIDX4]], align 2
; SSE41-NEXT: [[CONV5:%.*]] = sext i16 [[TMP33]] to i32
; SSE41-NEXT: [[MUL6:%.*]] = mul nsw i32 [[CONV5]], [[CONV]]
; SSE41-NEXT: [[TMP34:%.*]] = or i64 [[TMP31]], 1
; SSE41-NEXT: [[TMP34:%.*]] = or disjoint i64 [[TMP31]], 1
; SSE41-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i16, ptr [[S1]], i64 [[TMP34]]
; SSE41-NEXT: [[TMP35:%.*]] = load i16, ptr [[ARRAYIDX10]], align 2
; SSE41-NEXT: [[CONV11:%.*]] = sext i16 [[TMP35]] to i32
Expand All @@ -170,7 +170,7 @@ define void @test_muladd(ptr noalias nocapture %d1, ptr noalias nocapture readon
; SSE41-NEXT: store i32 [[ADD18]], ptr [[ARRAYIDX20]], align 4
; SSE41-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; SSE41-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
; SSE41-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
; SSE41-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
; SSE41: for.end.loopexit:
; SSE41-NEXT: br label [[FOR_END]]
; SSE41: for.end:
Expand Down Expand Up @@ -297,7 +297,7 @@ define void @test_muladd(ptr noalias nocapture %d1, ptr noalias nocapture readon
; AVX1-NEXT: [[TMP63:%.*]] = load i16, ptr [[ARRAYIDX4]], align 2
; AVX1-NEXT: [[CONV5:%.*]] = sext i16 [[TMP63]] to i32
; AVX1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[CONV5]], [[CONV]]
; AVX1-NEXT: [[TMP64:%.*]] = or i64 [[TMP61]], 1
; AVX1-NEXT: [[TMP64:%.*]] = or disjoint i64 [[TMP61]], 1
; AVX1-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i16, ptr [[S1]], i64 [[TMP64]]
; AVX1-NEXT: [[TMP65:%.*]] = load i16, ptr [[ARRAYIDX10]], align 2
; AVX1-NEXT: [[CONV11:%.*]] = sext i16 [[TMP65]] to i32
Expand All @@ -310,7 +310,7 @@ define void @test_muladd(ptr noalias nocapture %d1, ptr noalias nocapture readon
; AVX1-NEXT: store i32 [[ADD18]], ptr [[ARRAYIDX20]], align 4
; AVX1-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; AVX1-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
; AVX1-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
; AVX1-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
; AVX1: for.end.loopexit:
; AVX1-NEXT: br label [[FOR_END]]
; AVX1: for.end:
Expand Down Expand Up @@ -371,7 +371,7 @@ define void @test_muladd(ptr noalias nocapture %d1, ptr noalias nocapture readon
; AVX2-NEXT: [[TMP18:%.*]] = load i16, ptr [[ARRAYIDX4]], align 2
; AVX2-NEXT: [[CONV5:%.*]] = sext i16 [[TMP18]] to i32
; AVX2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[CONV5]], [[CONV]]
; AVX2-NEXT: [[TMP19:%.*]] = or i64 [[TMP16]], 1
; AVX2-NEXT: [[TMP19:%.*]] = or disjoint i64 [[TMP16]], 1
; AVX2-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i16, ptr [[S1]], i64 [[TMP19]]
; AVX2-NEXT: [[TMP20:%.*]] = load i16, ptr [[ARRAYIDX10]], align 2
; AVX2-NEXT: [[CONV11:%.*]] = sext i16 [[TMP20]] to i32
Expand All @@ -384,7 +384,7 @@ define void @test_muladd(ptr noalias nocapture %d1, ptr noalias nocapture readon
; AVX2-NEXT: store i32 [[ADD18]], ptr [[ARRAYIDX20]], align 4
; AVX2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; AVX2-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
; AVX2-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
; AVX2-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
; AVX2: for.end.loopexit:
; AVX2-NEXT: br label [[FOR_END]]
; AVX2: for.end:
Expand All @@ -408,7 +408,7 @@ for.body:
%2 = load i16, ptr %arrayidx4, align 2
%conv5 = sext i16 %2 to i32
%mul6 = mul nsw i32 %conv5, %conv
%3 = or i64 %0, 1
%3 = or disjoint i64 %0, 1
%arrayidx10 = getelementptr inbounds i16, ptr %s1, i64 %3
%4 = load i16, ptr %arrayidx10, align 2
%conv11 = sext i16 %4 to i32
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -64,15 +64,15 @@ for.body.us: ; preds = %for.body.us.prehead

for.body5.us.us48.preheader: ; preds = %for.body.us
store i32 8, ptr %arraydecay.us.us.us, align 16
%indvars.iv.next66 = or i64 %indvars.iv70, 1
%indvars.iv.next66 = or disjoint i64 %indvars.iv70, 1
%6 = add nsw i64 %4, %indvars.iv.next66
%arraydecay.us.us55.1 = getelementptr inbounds [10 x i32], ptr %add.ptr.us, i64 %6, i64 0
store i32 8, ptr %arraydecay.us.us55.1, align 8
br label %for.cond.cleanup4.us-lcssa.us.us

for.body5.us.us.us.preheader: ; preds = %for.body.us
store i32 7, ptr %arraydecay.us.us.us, align 16
%indvars.iv.next73 = or i64 %indvars.iv70, 1
%indvars.iv.next73 = or disjoint i64 %indvars.iv70, 1
%7 = add nsw i64 %4, %indvars.iv.next73
%arraydecay.us.us.us.1 = getelementptr inbounds [10 x i32], ptr %add.ptr.us, i64 %7, i64 0
store i32 7, ptr %arraydecay.us.us.us.1, align 8
Expand Down Expand Up @@ -101,7 +101,7 @@ for.body: ; preds = %for.body.preheader,
%9 = add nsw i64 %8, %indvars.iv87
%arraydecay.us31 = getelementptr inbounds [10 x i32], ptr %add.ptr, i64 %9, i64 0
store i32 8, ptr %arraydecay.us31, align 16
%indvars.iv.next90 = or i64 %indvars.iv87, 1
%indvars.iv.next90 = or disjoint i64 %indvars.iv87, 1
%10 = add nsw i64 %8, %indvars.iv.next90
%arraydecay.us31.1 = getelementptr inbounds [10 x i32], ptr %add.ptr, i64 %10, i64 0
store i32 8, ptr %arraydecay.us31.1, align 8
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1446,7 +1446,7 @@ if.then:
%mul = shl nuw nsw i32 %ix.024, 1
%arrayidx = getelementptr inbounds i8, ptr %p, i32 %mul
%0 = load i8, ptr %arrayidx, align 1
%add = or i32 %mul, 1
%add = or disjoint i32 %mul, 1
%arrayidx4 = getelementptr inbounds i8, ptr %p, i32 %add
%1 = load i8, ptr %arrayidx4, align 1
%cmp.i = icmp slt i8 %0, %1
Expand Down Expand Up @@ -2148,7 +2148,7 @@ if.then:
%mul = shl nuw nsw i32 %ix.024, 1
%arrayidx = getelementptr inbounds i8, ptr %p, i32 %mul
%0 = load i8, ptr %arrayidx, align 1
%add = or i32 %mul, 1
%add = or disjoint i32 %mul, 1
%arrayidx4 = getelementptr inbounds i8, ptr %p, i32 %add
%1 = load i8, ptr %arrayidx4, align 1
%cmp.i = icmp slt i8 %0, %1
Expand Down Expand Up @@ -2585,7 +2585,7 @@ if.then:
%mul = shl nuw nsw i32 %ix.023, 1
%arrayidx = getelementptr inbounds i8, ptr %p, i32 %mul
%0 = load i8, ptr %arrayidx, align 1
%add = or i32 %mul, 1
%add = or disjoint i32 %mul, 1
%arrayidx3 = getelementptr inbounds i8, ptr %p, i32 %add
%1 = load i8, ptr %arrayidx3, align 1
%cmp.i = icmp slt i8 %0, %1
Expand Down Expand Up @@ -3014,7 +3014,7 @@ for.body:
%mul = shl nuw nsw i32 %ix.021, 1
%arrayidx = getelementptr inbounds i8, ptr %p, i32 %mul
%0 = load i8, ptr %arrayidx, align 1
%add = or i32 %mul, 1
%add = or disjoint i32 %mul, 1
%arrayidx2 = getelementptr inbounds i8, ptr %p, i32 %add
%1 = load i8, ptr %arrayidx2, align 1
%cmp.i = icmp slt i8 %0, %1
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -103,7 +103,7 @@ for.body:
store i16 %0, ptr %arrayidx2, align 2
%arrayidx4 = getelementptr inbounds i16, ptr %y, i64 %indvars.iv
%2 = load i16, ptr %arrayidx4, align 2
%3 = or i64 %1, 1
%3 = or disjoint i64 %1, 1
%arrayidx7 = getelementptr inbounds i16, ptr %points, i64 %3
store i16 %2, ptr %arrayidx7, align 2
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
Expand Down Expand Up @@ -283,7 +283,7 @@ for.body:
store i16 %0, ptr %arrayidx2, align 2
%arrayidx4 = getelementptr inbounds i16, ptr %y, i64 %indvars.iv
%2 = load i16, ptr %arrayidx4, align 2
%3 = or i64 %1, 1
%3 = or disjoint i64 %1, 1
%arrayidx7 = getelementptr inbounds i16, ptr %points, i64 %3
store i16 %2, ptr %arrayidx7, align 2
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/Transforms/LoopVectorize/interleaved-accesses-masked-group.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -127,7 +127,7 @@ if.then:
%mul = shl nuw nsw i32 %ix.024, 1
%arrayidx = getelementptr inbounds i8, ptr %p, i32 %mul
%0 = load i8, ptr %arrayidx, align 1
%add = or i32 %mul, 1
%add = or disjoint i32 %mul, 1
%arrayidx4 = getelementptr inbounds i8, ptr %p, i32 %add
%1 = load i8, ptr %arrayidx4, align 1
%cmp.i = icmp slt i8 %0, %1
Expand Down Expand Up @@ -163,7 +163,7 @@ for.body:
br i1 %cmp1, label %if.then, label %for.inc

if.then:
%add = or i32 %mul, 1
%add = or disjoint i32 %mul, 1
%arrayidx3 = getelementptr inbounds i8, ptr %q, i32 %add
store i8 2, ptr %arrayidx3, align 1
br label %for.inc
Expand Down Expand Up @@ -200,7 +200,7 @@ if.end:
br i1 %cmp4, label %if.then6, label %for.inc

if.then6:
%add = or i32 %mul, 1
%add = or disjoint i32 %mul, 1
%arrayidx7 = getelementptr inbounds i8, ptr %q, i32 %add
store i8 2, ptr %arrayidx7, align 1
br label %for.inc
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,7 @@ for.body: ; preds = %for.body, %entry
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%arrayidx0 = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 %indvars.iv
%tmp = load i32, ptr %arrayidx0, align 4
%tmp1 = or i64 %indvars.iv, 1
%tmp1 = or disjoint i64 %indvars.iv, 1
%arrayidx1 = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 %tmp1
%tmp2 = load i32, ptr %arrayidx1, align 4
%add = add nsw i32 %tmp, %C
Expand Down Expand Up @@ -700,7 +700,7 @@ for.body: ; preds = %for.body, %entry
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%arrayidx = getelementptr inbounds i32, ptr %A, i64 %indvars.iv
%tmp = load i32, ptr %arrayidx, align 4
%tmp1 = or i64 %indvars.iv, 1
%tmp1 = or disjoint i64 %indvars.iv, 1
%arrayidx2 = getelementptr inbounds i32, ptr %A, i64 %tmp1
%tmp2 = load i32, ptr %arrayidx2, align 4
%mul = mul nsw i32 %tmp2, %tmp
Expand Down Expand Up @@ -1510,7 +1510,7 @@ define void @PR34743(ptr %a, ptr %b, i64 %n) {
; CHECK-NEXT: [[TMP12:%.*]] = mul nsw <4 x i32> [[TMP9]], [[TMP10]]
; CHECK-NEXT: [[TMP13:%.*]] = mul nsw <4 x i32> [[TMP12]], [[TMP11]]
; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]]
; CHECK-NEXT: store <4 x i32> [[TMP13]], ptr [[TMP14]], align 4, !alias.scope !36, !noalias !39
; CHECK-NEXT: store <4 x i32> [[TMP13]], ptr [[TMP14]], align 4, !alias.scope [[META36:![0-9]+]], !noalias [[META39:![0-9]+]]
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
; CHECK-NEXT: br i1 [[TMP15]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP41:![0-9]+]]
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/LoopVectorize/pr39099.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ if.then:
%arrayidx4 = getelementptr inbounds i8, ptr %q, i32 %mul
store i8 %0, ptr %arrayidx4, align 1
%sub = sub i8 0, %0
%add = or i32 %mul, 1
%add = or disjoint i32 %mul, 1
%arrayidx8 = getelementptr inbounds i8, ptr %q, i32 %add
store i8 %sub, ptr %arrayidx8, align 1
br label %for.inc
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -233,7 +233,7 @@ for.body:
%0 = load i32, ptr %gep.src, align 4
%sum.1 = add nsw i32 %0, %sum
store i32 %sum.1, ptr %gep.dst, align 4
%1 = or i64 %iv, 1
%1 = or disjoint i64 %iv, 1
%gep.src.1 = getelementptr inbounds i32, ptr %src, i64 %1
%2 = load i32, ptr %gep.src.1, align 4
%sum.2 = add nsw i32 %2, %sum.1
Expand Down Expand Up @@ -302,7 +302,7 @@ for.body:
%0 = load i32, ptr %arrayidx, align 4
%sum.1 = add nsw i32 %0, %sum
store i32 %sum.1, ptr %gep.dst, align 4
%1 = or i64 %iv, 1
%1 = or disjoint i64 %iv, 1
%arrayidx4 = getelementptr inbounds i32, ptr %src, i64 %1
%2 = load i32, ptr %arrayidx4, align 4
%sum.2 = add nsw i32 %2, %sum.1
Expand Down Expand Up @@ -349,7 +349,7 @@ predicated: ; preds = %for.body
br label %latch

latch: ; preds = %predicated, %for.body
%1 = or i64 %iv, 1
%1 = or disjoint i64 %iv, 1
%gep.src.1 = getelementptr inbounds i32, ptr %src, i64 %1
%2 = load i32, ptr %gep.src.1, align 4
%sum.2 = add nsw i32 %2, %sum.1
Expand Down Expand Up @@ -384,7 +384,7 @@ for.body: ; preds = %latch, %entry
%0 = load i32, ptr %arrayidx, align 4
%sum.1 = add nsw i32 %0, %sum
store i32 %sum.1, ptr %gep.dst, align 4
%1 = or i64 %iv, 1
%1 = or disjoint i64 %iv, 1
%gep.src.1 = getelementptr inbounds i32, ptr %src, i64 %1
%2 = load i32, ptr %gep.src.1, align 4
%sum.2 = add nsw i32 %2, %sum.1
Expand Down
38 changes: 19 additions & 19 deletions llvm/test/Transforms/LoopVectorize/unroll_nonlatch.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -16,23 +16,23 @@ define void @test(ptr %data) {
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
; CHECK: vector.body:
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[INDUCTION:%.*]] = add i64 [[INDEX]], 0
; CHECK-NEXT: [[INDUCTION1:%.*]] = add i64 [[INDEX]], 1
; CHECK-NEXT: [[TMP0:%.*]] = shl nuw nsw i64 [[INDUCTION]], 1
; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[INDUCTION1]], 1
; CHECK-NEXT: [[TMP2:%.*]] = or i64 [[TMP0]], 1
; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP1]], 1
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds double, ptr [[DATA:%.*]], i64 [[TMP2]]
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds double, ptr [[DATA]], i64 [[TMP3]]
; CHECK-NEXT: [[TMP6:%.*]] = load double, ptr [[TMP4]], align 8
; CHECK-NEXT: [[TMP7:%.*]] = load double, ptr [[TMP5]], align 8
; CHECK-NEXT: [[TMP8:%.*]] = fneg double [[TMP6]]
; CHECK-NEXT: [[TMP9:%.*]] = fneg double [[TMP7]]
; CHECK-NEXT: store double [[TMP8]], ptr [[TMP4]], align 8
; CHECK-NEXT: store double [[TMP9]], ptr [[TMP5]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1
; CHECK-NEXT: [[TMP2:%.*]] = shl nuw nsw i64 [[TMP0]], 1
; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[TMP1]], 1
; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i64 [[TMP2]], 1
; CHECK-NEXT: [[TMP5:%.*]] = or disjoint i64 [[TMP3]], 1
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds double, ptr [[DATA:%.*]], i64 [[TMP4]]
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds double, ptr [[DATA]], i64 [[TMP5]]
; CHECK-NEXT: [[TMP8:%.*]] = load double, ptr [[TMP6]], align 8
; CHECK-NEXT: [[TMP9:%.*]] = load double, ptr [[TMP7]], align 8
; CHECK-NEXT: [[TMP10:%.*]] = fneg double [[TMP8]]
; CHECK-NEXT: [[TMP11:%.*]] = fneg double [[TMP9]]
; CHECK-NEXT: store double [[TMP10]], ptr [[TMP6]], align 8
; CHECK-NEXT: store double [[TMP11]], ptr [[TMP7]], align 8
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1022
; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1022
; CHECK-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK: middle.block:
; CHECK-NEXT: br label [[SCALAR_PH]]
; CHECK: scalar.ph:
Expand All @@ -45,12 +45,12 @@ define void @test(ptr %data) {
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END:%.*]], label [[FOR_LATCH]]
; CHECK: for.latch:
; CHECK-NEXT: [[T15:%.*]] = shl nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[T16:%.*]] = or i64 [[T15]], 1
; CHECK-NEXT: [[T16:%.*]] = or disjoint i64 [[T15]], 1
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[DATA]], i64 [[T16]]
; CHECK-NEXT: [[T17:%.*]] = load double, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[FNEG:%.*]] = fneg double [[T17]]
; CHECK-NEXT: store double [[FNEG]], ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: br label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
; CHECK-NEXT: br label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
; CHECK: for.end:
; CHECK-NEXT: ret void
;
Expand All @@ -65,7 +65,7 @@ for.body:

for.latch:
%t15 = shl nuw nsw i64 %indvars.iv, 1
%t16 = or i64 %t15, 1
%t16 = or disjoint i64 %t15, 1
%arrayidx = getelementptr inbounds double, ptr %data, i64 %t16
%t17 = load double, ptr %arrayidx, align 8
%fneg = fneg double %t17
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -205,7 +205,7 @@ entry:
%idxprom7 = sext i32 %mul to i64
%arrayidx8 = getelementptr inbounds i16, ptr %x, i64 %idxprom7
%4 = load i16, ptr %arrayidx8, align 2
%add10 = or i32 %mul, 1
%add10 = or disjoint i32 %mul, 1
%idxprom11 = sext i32 %add10 to i64
%arrayidx12 = getelementptr inbounds i16, ptr %x, i64 %idxprom11
%5 = load i16, ptr %arrayidx12, align 2
Expand Down Expand Up @@ -754,7 +754,7 @@ entry:
%idxprom11 = sext i32 %mul to i64
%arrayidx12 = getelementptr inbounds i32, ptr %x, i64 %idxprom11
%5 = load i32, ptr %arrayidx12, align 4
%add14 = or i32 %mul, 1
%add14 = or disjoint i32 %mul, 1
%idxprom15 = sext i32 %add14 to i64
%arrayidx16 = getelementptr inbounds i32, ptr %x, i64 %idxprom15
%6 = load i32, ptr %arrayidx16, align 4
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/Transforms/SLPVectorizer/NVPTX/v2f16.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,18 +10,18 @@ define void @fusion(ptr noalias nocapture align 256 dereferenceable(19267584) %a
; CHECK-NEXT: [[TMP6:%.*]] = zext i32 [[TMP5]] to i64
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds half, ptr [[ARG1:%.*]], i64 [[TMP6]]
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds half, ptr [[ARG:%.*]], i64 [[TMP6]]
; CHECK-NEXT: [[TMP2:%.*]] = load <2 x half>, ptr [[TMP11]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = fmul fast <2 x half> [[TMP2]], <half 0xH5380, half 0xH5380>
; CHECK-NEXT: [[TMP4:%.*]] = fadd fast <2 x half> [[TMP3]], <half 0xH57F0, half 0xH57F0>
; CHECK-NEXT: store <2 x half> [[TMP4]], ptr [[TMP16]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x half>, ptr [[TMP11]], align 8
; CHECK-NEXT: [[TMP2:%.*]] = fmul fast <2 x half> [[TMP1]], <half 0xH5380, half 0xH5380>
; CHECK-NEXT: [[TMP3:%.*]] = fadd fast <2 x half> [[TMP2]], <half 0xH57F0, half 0xH57F0>
; CHECK-NEXT: store <2 x half> [[TMP3]], ptr [[TMP16]], align 8
; CHECK-NEXT: ret void
;
; NOVECTOR-LABEL: @fusion(
; NOVECTOR-NEXT: [[TMP:%.*]] = shl nuw nsw i32 [[ARG2:%.*]], 6
; NOVECTOR-NEXT: [[TMP4:%.*]] = or i32 [[TMP]], [[ARG3:%.*]]
; NOVECTOR-NEXT: [[TMP5:%.*]] = shl nuw nsw i32 [[TMP4]], 2
; NOVECTOR-NEXT: [[TMP6:%.*]] = zext i32 [[TMP5]] to i64
; NOVECTOR-NEXT: [[TMP7:%.*]] = or i64 [[TMP6]], 1
; NOVECTOR-NEXT: [[TMP7:%.*]] = or disjoint i64 [[TMP6]], 1
; NOVECTOR-NEXT: [[TMP11:%.*]] = getelementptr inbounds half, ptr [[ARG1:%.*]], i64 [[TMP6]]
; NOVECTOR-NEXT: [[TMP12:%.*]] = load half, ptr [[TMP11]], align 8
; NOVECTOR-NEXT: [[TMP13:%.*]] = fmul fast half [[TMP12]], 0xH5380
Expand All @@ -40,7 +40,7 @@ define void @fusion(ptr noalias nocapture align 256 dereferenceable(19267584) %a
%tmp4 = or i32 %tmp, %arg3
%tmp5 = shl nuw nsw i32 %tmp4, 2
%tmp6 = zext i32 %tmp5 to i64
%tmp7 = or i64 %tmp6, 1
%tmp7 = or disjoint i64 %tmp6, 1
%tmp11 = getelementptr inbounds half, ptr %arg1, i64 %tmp6
%tmp12 = load half, ptr %tmp11, align 8
%tmp13 = fmul fast half %tmp12, 0xH5380
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -11,14 +11,14 @@ define void @reduce_compare(ptr nocapture %A, i32 %n) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[N:%.*]] to double
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[CONV]], i32 0
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ]
; CHECK-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[A:%.*]], i64 [[TMP1]]
; CHECK-NEXT: [[TMP2:%.*]] = shl nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[A:%.*]], i64 [[TMP2]]
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> [[SHUFFLE]], [[TMP3]]
; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> [[TMP1]], [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = fmul <2 x double> [[TMP4]], <double 7.000000e+00, double 4.000000e+00>
; CHECK-NEXT: [[TMP6:%.*]] = fadd <2 x double> [[TMP5]], <double 5.000000e+00, double 9.000000e+00>
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x double> [[TMP6]], i32 0
Expand Down Expand Up @@ -48,7 +48,7 @@ for.body: ; preds = %for.inc, %entry
%mul1 = fmul double %conv, %1
%mul2 = fmul double %mul1, 7.000000e+00
%add = fadd double %mul2, 5.000000e+00
%2 = or i64 %0, 1
%2 = or disjoint i64 %0, 1
%arrayidx6 = getelementptr inbounds double, ptr %A, i64 %2
%3 = load double, ptr %arrayidx6, align 8
%mul8 = fmul double %conv, %3
Expand Down
76 changes: 38 additions & 38 deletions llvm/test/Transforms/SLPVectorizer/X86/consecutive-access.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -18,17 +18,17 @@ define void @foo_3double(i32 %u) #0 {
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[MUL]] to i64
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2000 x double], ptr @A, i32 0, i64 [[IDXPROM]]
; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2000 x double], ptr @B, i32 0, i64 [[IDXPROM]]
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX4]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]]
; CHECK-NEXT: store <2 x double> [[TMP4]], ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[ARRAYIDX4]], align 8
; CHECK-NEXT: [[TMP2:%.*]] = fadd <2 x double> [[TMP0]], [[TMP1]]
; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[ADD24:%.*]] = add nsw i32 [[MUL]], 2
; CHECK-NEXT: [[IDXPROM25:%.*]] = sext i32 [[ADD24]] to i64
; CHECK-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [2000 x double], ptr @A, i32 0, i64 [[IDXPROM25]]
; CHECK-NEXT: [[TMP6:%.*]] = load double, ptr [[ARRAYIDX26]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = load double, ptr [[ARRAYIDX26]], align 8
; CHECK-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [2000 x double], ptr @B, i32 0, i64 [[IDXPROM25]]
; CHECK-NEXT: [[TMP7:%.*]] = load double, ptr [[ARRAYIDX30]], align 8
; CHECK-NEXT: [[ADD31:%.*]] = fadd double [[TMP6]], [[TMP7]]
; CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[ARRAYIDX30]], align 8
; CHECK-NEXT: [[ADD31:%.*]] = fadd double [[TMP3]], [[TMP4]]
; CHECK-NEXT: store double [[ADD31]], ptr [[ARRAYIDX26]], align 8
; CHECK-NEXT: ret void
;
Expand Down Expand Up @@ -75,10 +75,10 @@ define void @foo_2double(i32 %u) #0 {
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[MUL]] to i64
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2000 x double], ptr @A, i32 0, i64 [[IDXPROM]]
; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2000 x double], ptr @B, i32 0, i64 [[IDXPROM]]
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX4]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]]
; CHECK-NEXT: store <2 x double> [[TMP4]], ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[ARRAYIDX4]], align 8
; CHECK-NEXT: [[TMP2:%.*]] = fadd <2 x double> [[TMP0]], [[TMP1]]
; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: ret void
;
entry:
Expand Down Expand Up @@ -114,10 +114,10 @@ define void @foo_4float(i32 %u) #0 {
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[MUL]] to i64
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2000 x float], ptr @C, i32 0, i64 [[IDXPROM]]
; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2000 x float], ptr @D, i32 0, i64 [[IDXPROM]]
; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = load <4 x float>, ptr [[ARRAYIDX4]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = fadd <4 x float> [[TMP1]], [[TMP3]]
; CHECK-NEXT: store <4 x float> [[TMP4]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[ARRAYIDX4]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = fadd <4 x float> [[TMP0]], [[TMP1]]
; CHECK-NEXT: store <4 x float> [[TMP2]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: ret void
;
entry:
Expand Down Expand Up @@ -181,11 +181,11 @@ define i32 @foo_loop(ptr %A, i32 %n) #0 {
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP0]], 2
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[MUL]] to i64
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[A]], i64 [[IDXPROM]]
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> <double 7.000000e+00, double 7.000000e+00>, [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 0
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x double> [[TMP4]], i32 1
; CHECK-NEXT: [[ADD6:%.*]] = fadd double [[TMP5]], [[TMP6]]
; CHECK-NEXT: [[TMP2:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = fmul <2 x double> <double 7.000000e+00, double 7.000000e+00>, [[TMP2]]
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP3]], i32 1
; CHECK-NEXT: [[ADD6:%.*]] = fadd double [[TMP4]], [[TMP5]]
; CHECK-NEXT: [[ADD7]] = fadd double [[TMP1]], [[ADD6]]
; CHECK-NEXT: store double [[ADD7]], ptr [[SUM]], align 8
; CHECK-NEXT: [[INC]] = add nsw i32 [[TMP0]], 1
Expand Down Expand Up @@ -259,10 +259,10 @@ define void @foo_2double_non_power_of_2(i32 %u) #0 {
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[ADD6]] to i64
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2000 x double], ptr @A, i32 0, i64 [[IDXPROM]]
; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2000 x double], ptr @B, i32 0, i64 [[IDXPROM]]
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX4]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]]
; CHECK-NEXT: store <2 x double> [[TMP4]], ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[ARRAYIDX4]], align 8
; CHECK-NEXT: [[TMP2:%.*]] = fadd <2 x double> [[TMP0]], [[TMP1]]
; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: ret void
;
entry:
Expand Down Expand Up @@ -300,10 +300,10 @@ define void @foo_2double_non_power_of_2_zext(i32 %u) #0 {
; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[ADD6]] to i64
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2000 x double], ptr @A, i32 0, i64 [[IDXPROM]]
; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2000 x double], ptr @B, i32 0, i64 [[IDXPROM]]
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX4]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]]
; CHECK-NEXT: store <2 x double> [[TMP4]], ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[ARRAYIDX4]], align 8
; CHECK-NEXT: [[TMP2:%.*]] = fadd <2 x double> [[TMP0]], [[TMP1]]
; CHECK-NEXT: store <2 x double> [[TMP2]], ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: ret void
;
entry:
Expand Down Expand Up @@ -355,11 +355,11 @@ define i32 @foo_loop_non_power_of_2(ptr %A, i32 %n) #0 {
; CHECK-NEXT: [[ADD_5:%.*]] = add i32 [[MUL]], 5
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[ADD_5]] to i64
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[A]], i64 [[IDXPROM]]
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> <double 7.000000e+00, double 7.000000e+00>, [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 0
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x double> [[TMP4]], i32 1
; CHECK-NEXT: [[ADD6:%.*]] = fadd double [[TMP5]], [[TMP6]]
; CHECK-NEXT: [[TMP2:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = fmul <2 x double> <double 7.000000e+00, double 7.000000e+00>, [[TMP2]]
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP3]], i32 0
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP3]], i32 1
; CHECK-NEXT: [[ADD6:%.*]] = fadd double [[TMP4]], [[TMP5]]
; CHECK-NEXT: [[ADD7]] = fadd double [[TMP1]], [[ADD6]]
; CHECK-NEXT: store double [[ADD7]], ptr [[SUM]], align 8
; CHECK-NEXT: [[INC]] = add i32 [[TMP0]], 1
Expand Down Expand Up @@ -445,18 +445,18 @@ define double @bar(ptr nocapture readonly %a, i32 %n) local_unnamed_addr #0 {
; CHECK-NEXT: [[CMP15:%.*]] = icmp eq i32 [[N:%.*]], 0
; CHECK-NEXT: br i1 [[CMP15]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY:%.*]]
; CHECK: for.cond.cleanup:
; CHECK-NEXT: [[TMP0:%.*]] = phi <2 x double> [ zeroinitializer, [[ENTRY:%.*]] ], [ [[TMP6:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[TMP0:%.*]] = phi <2 x double> [ zeroinitializer, [[ENTRY:%.*]] ], [ [[TMP5:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x double> [[TMP0]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x double> [[TMP0]], i32 1
; CHECK-NEXT: [[MUL:%.*]] = fmul double [[TMP1]], [[TMP2]]
; CHECK-NEXT: ret double [[MUL]]
; CHECK: for.body:
; CHECK-NEXT: [[I_018:%.*]] = phi i32 [ [[ADD5:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY]] ]
; CHECK-NEXT: [[TMP3:%.*]] = phi <2 x double> [ [[TMP6]], [[FOR_BODY]] ], [ zeroinitializer, [[ENTRY]] ]
; CHECK-NEXT: [[TMP3:%.*]] = phi <2 x double> [ [[TMP5]], [[FOR_BODY]] ], [ zeroinitializer, [[ENTRY]] ]
; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[I_018]] to i64
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[A:%.*]], i64 [[IDXPROM]]
; CHECK-NEXT: [[TMP5:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP6]] = fadd <2 x double> [[TMP3]], [[TMP5]]
; CHECK-NEXT: [[TMP4:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP5]] = fadd <2 x double> [[TMP3]], [[TMP4]]
; CHECK-NEXT: [[ADD5]] = add i32 [[I_018]], 2
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD5]], [[N]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]]
Expand All @@ -479,7 +479,7 @@ for.body: ; preds = %entry, %for.body
%arrayidx = getelementptr inbounds double, ptr %a, i64 %idxprom
%0 = load double, ptr %arrayidx, align 8
%add = fadd double %x.016, %0
%add1 = or i32 %i.018, 1
%add1 = or disjoint i32 %i.018, 1
%idxprom2 = zext i32 %add1 to i64
%arrayidx3 = getelementptr inbounds double, ptr %a, i64 %idxprom2
%1 = load double, ptr %arrayidx3, align 8
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/Transforms/SLPVectorizer/X86/hoist.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -18,13 +18,13 @@ define i32 @foo(ptr nocapture %A, i32 %n, i32 %k) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[K:%.*]], i32 1
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[I_024:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD10:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[I_024]]
; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], [[SHUFFLE]]
; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], [[TMP2]]
; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[ADD10]] = add nsw i32 [[I_024]], 4
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[ADD10]], 10000
Expand All @@ -41,17 +41,17 @@ for.body: ; preds = %entry, %for.body
%0 = load i32, ptr %arrayidx, align 4
%add = add nsw i32 %0, %n
store i32 %add, ptr %arrayidx, align 4
%add121 = or i32 %i.024, 1
%add121 = or disjoint i32 %i.024, 1
%arrayidx2 = getelementptr inbounds i32, ptr %A, i32 %add121
%1 = load i32, ptr %arrayidx2, align 4
%add3 = add nsw i32 %1, %k
store i32 %add3, ptr %arrayidx2, align 4
%add422 = or i32 %i.024, 2
%add422 = or disjoint i32 %i.024, 2
%arrayidx5 = getelementptr inbounds i32, ptr %A, i32 %add422
%2 = load i32, ptr %arrayidx5, align 4
%add6 = add nsw i32 %2, %n
store i32 %add6, ptr %arrayidx5, align 4
%add723 = or i32 %i.024, 3
%add723 = or disjoint i32 %i.024, 3
%arrayidx8 = getelementptr inbounds i32, ptr %A, i32 %add723
%3 = load i32, ptr %arrayidx8, align 4
%add9 = add nsw i32 %3, %k
Expand Down
150 changes: 75 additions & 75 deletions llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
View file

Large diffs are not rendered by default.

10 changes: 5 additions & 5 deletions llvm/test/Transforms/SLPVectorizer/X86/in-tree-user.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,14 +12,14 @@ define void @in_tree_user(ptr nocapture %A, i32 %n) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[N:%.*]] to double
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[CONV]], i32 0
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> poison, <2 x i32> zeroinitializer
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ]
; CHECK-NEXT: [[TMP1:%.*]] = shl nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[A:%.*]], i64 [[TMP1]]
; CHECK-NEXT: [[TMP2:%.*]] = shl nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[A:%.*]], i64 [[TMP2]]
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> [[SHUFFLE]], [[TMP3]]
; CHECK-NEXT: [[TMP4:%.*]] = fmul <2 x double> [[TMP1]], [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = fmul <2 x double> [[TMP4]], <double 7.000000e+00, double 4.000000e+00>
; CHECK-NEXT: [[TMP6:%.*]] = fadd <2 x double> [[TMP5]], <double 5.000000e+00, double 9.000000e+00>
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <2 x double> [[TMP6]], i32 0
Expand Down Expand Up @@ -52,7 +52,7 @@ for.body: ; preds = %for.inc, %entry
%mul2 = fmul double %mul1, 7.000000e+00
%add = fadd double %mul2, 5.000000e+00
%InTreeUser = fadd double %add, %add ; <------------------ In tree user.
%2 = or i64 %0, 1
%2 = or disjoint i64 %0, 1
%arrayidx6 = getelementptr inbounds double, ptr %A, i64 %2
%3 = load double, ptr %arrayidx6, align 8
%mul8 = fmul double %conv, %3
Expand Down
26 changes: 13 additions & 13 deletions llvm/test/Transforms/SLPVectorizer/X86/loopinvariant.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,14 +12,14 @@ define i32 @foo(ptr nocapture %A, i32 %n) {
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i32> poison, i32 [[N]], i32 0
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x i32> [[TMP2]], <8 x i32> poison, <8 x i32> zeroinitializer
; CHECK-NEXT: [[TMP3:%.*]] = add nsw <8 x i32> [[TMP1]], [[SHUFFLE]]
; CHECK-NEXT: [[TMP0:%.*]] = load <8 x i32>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[N]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> poison, <8 x i32> zeroinitializer
; CHECK-NEXT: [[TMP3:%.*]] = add nsw <8 x i32> [[TMP0]], [[TMP2]]
; CHECK-NEXT: store <8 x i32> [[TMP3]], ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 8
; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP5]], [[N]]
; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], [[N]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
; CHECK: for.end:
; CHECK-NEXT: ret i32 undef
Expand All @@ -34,37 +34,37 @@ for.body:
%0 = load i32, ptr %arrayidx, align 4
%add1 = add nsw i32 %0, %n
store i32 %add1, ptr %arrayidx, align 4
%1 = or i64 %indvars.iv, 1
%1 = or disjoint i64 %indvars.iv, 1
%arrayidx4 = getelementptr inbounds i32, ptr %A, i64 %1
%2 = load i32, ptr %arrayidx4, align 4
%add5 = add nsw i32 %2, %n
store i32 %add5, ptr %arrayidx4, align 4
%3 = or i64 %indvars.iv, 2
%3 = or disjoint i64 %indvars.iv, 2
%arrayidx8 = getelementptr inbounds i32, ptr %A, i64 %3
%4 = load i32, ptr %arrayidx8, align 4
%add9 = add nsw i32 %4, %n
store i32 %add9, ptr %arrayidx8, align 4
%5 = or i64 %indvars.iv, 3
%5 = or disjoint i64 %indvars.iv, 3
%arrayidx12 = getelementptr inbounds i32, ptr %A, i64 %5
%6 = load i32, ptr %arrayidx12, align 4
%add13 = add nsw i32 %6, %n
store i32 %add13, ptr %arrayidx12, align 4
%7 = or i64 %indvars.iv, 4
%7 = or disjoint i64 %indvars.iv, 4
%arrayidx16 = getelementptr inbounds i32, ptr %A, i64 %7
%8 = load i32, ptr %arrayidx16, align 4
%add17 = add nsw i32 %8, %n
store i32 %add17, ptr %arrayidx16, align 4
%9 = or i64 %indvars.iv, 5
%9 = or disjoint i64 %indvars.iv, 5
%arrayidx20 = getelementptr inbounds i32, ptr %A, i64 %9
%10 = load i32, ptr %arrayidx20, align 4
%add21 = add nsw i32 %10, %n
store i32 %add21, ptr %arrayidx20, align 4
%11 = or i64 %indvars.iv, 6
%11 = or disjoint i64 %indvars.iv, 6
%arrayidx24 = getelementptr inbounds i32, ptr %A, i64 %11
%12 = load i32, ptr %arrayidx24, align 4
%add25 = add nsw i32 %12, %n
store i32 %add25, ptr %arrayidx24, align 4
%13 = or i64 %indvars.iv, 7
%13 = or disjoint i64 %indvars.iv, 7
%arrayidx28 = getelementptr inbounds i32, ptr %A, i64 %13
%14 = load i32, ptr %arrayidx28, align 4
%add29 = add nsw i32 %14, %n
Expand Down
20 changes: 10 additions & 10 deletions llvm/test/Transforms/SLPVectorizer/X86/reduction.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -21,11 +21,11 @@ define i32 @reduce(ptr nocapture %A, i32 %n, i32 %m) {
; CHECK-NEXT: [[SUM_014:%.*]] = phi double [ [[ADD6:%.*]], [[FOR_BODY]] ], [ 0.000000e+00, [[ENTRY]] ]
; CHECK-NEXT: [[MUL:%.*]] = shl nsw i32 [[I_015]], 1
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[A:%.*]], i32 [[MUL]]
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = fmul <2 x double> [[TMP1]], <double 7.000000e+00, double 7.000000e+00>
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 0
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x double> [[TMP2]], i32 1
; CHECK-NEXT: [[ADD5:%.*]] = fadd double [[TMP3]], [[TMP4]]
; CHECK-NEXT: [[TMP0:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = fmul <2 x double> [[TMP0]], <double 7.000000e+00, double 7.000000e+00>
; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x double> [[TMP1]], i32 0
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x double> [[TMP1]], i32 1
; CHECK-NEXT: [[ADD5:%.*]] = fadd double [[TMP2]], [[TMP3]]
; CHECK-NEXT: [[ADD6]] = fadd double [[SUM_014]], [[ADD5]]
; CHECK-NEXT: [[INC]] = add nsw i32 [[I_015]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[N]]
Expand All @@ -48,7 +48,7 @@ for.body: ; preds = %entry, %for.body
%arrayidx = getelementptr inbounds double, ptr %A, i32 %mul
%0 = load double, ptr %arrayidx, align 4
%mul1 = fmul double %0, 7.000000e+00
%add12 = or i32 %mul, 1
%add12 = or disjoint i32 %mul, 1
%arrayidx3 = getelementptr inbounds double, ptr %A, i32 %add12
%1 = load double, ptr %arrayidx3, align 4
%mul4 = fmul double %1, 7.000000e+00
Expand All @@ -74,12 +74,12 @@ define i32 @horiz_max_multiple_uses(ptr %x, ptr %p) {
; CHECK-LABEL: @horiz_max_multiple_uses(
; CHECK-NEXT: [[X4:%.*]] = getelementptr [32 x i32], ptr [[X:%.*]], i64 0, i64 4
; CHECK-NEXT: [[X5:%.*]] = getelementptr [32 x i32], ptr [[X]], i64 0, i64 5
; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr [[X]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[X]], align 4
; CHECK-NEXT: [[T4:%.*]] = load i32, ptr [[X4]], align 4
; CHECK-NEXT: [[T5:%.*]] = load i32, ptr [[X5]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vector.reduce.smax.v4i32(<4 x i32> [[TMP2]])
; CHECK-NEXT: [[MAX_ROOT_CMP:%.*]] = icmp sgt i32 [[TMP3]], [[T4]]
; CHECK-NEXT: [[MAX_ROOT_SEL:%.*]] = select i1 [[MAX_ROOT_CMP]], i32 [[TMP3]], i32 [[T4]]
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.smax.v4i32(<4 x i32> [[TMP1]])
; CHECK-NEXT: [[MAX_ROOT_CMP:%.*]] = icmp sgt i32 [[TMP2]], [[T4]]
; CHECK-NEXT: [[MAX_ROOT_SEL:%.*]] = select i1 [[MAX_ROOT_CMP]], i32 [[TMP2]], i32 [[T4]]
; CHECK-NEXT: [[C012345:%.*]] = icmp sgt i32 [[MAX_ROOT_SEL]], [[T5]]
; CHECK-NEXT: [[T17:%.*]] = select i1 [[C012345]], i32 [[MAX_ROOT_SEL]], i32 [[T5]]
; CHECK-NEXT: [[THREE_OR_FOUR:%.*]] = select i1 [[MAX_ROOT_CMP]], i32 3, i32 4
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ define double @foo(ptr nocapture %D) {
%4 = load double, ptr %3, align 4
%A4 = fmul double %4, %4
%A42 = fmul double %A4, %A4
%5 = or i32 %2, 1
%5 = or disjoint i32 %2, 1
%6 = getelementptr inbounds double, ptr %D, i32 %5
%7 = load double, ptr %6, align 4
%A7 = fmul double %7, %7
Expand Down
34 changes: 17 additions & 17 deletions llvm/test/Transforms/SLPVectorizer/X86/remark_horcost.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,17 +10,17 @@ define i32 @foo(ptr %diff) #0 {
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[A_088:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[OP_RDX:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDVARS_IV]], 3
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DIFF:%.*]], i64 [[TMP1]]
; CHECK-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[DIFF]], i64 [[TMP2]]
; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[INDVARS_IV]], 3
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DIFF:%.*]], i64 [[TMP0]]
; CHECK-NEXT: [[TMP1:%.*]] = or disjoint i64 [[TMP0]], 4
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[DIFF]], i64 [[TMP1]]
; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [8 x [8 x i32]], ptr [[M2]], i64 0, i64 [[INDVARS_IV]], i64 0
; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP6:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], [[TMP4]]
; CHECK-NEXT: store <4 x i32> [[TMP7]], ptr [[ARRAYIDX6]], align 16
; CHECK-NEXT: [[TMP9:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP7]])
; CHECK-NEXT: [[OP_RDX]] = add i32 [[TMP9]], [[A_088]]
; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], [[TMP2]]
; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[ARRAYIDX6]], align 16
; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP4]])
; CHECK-NEXT: [[OP_RDX]] = add i32 [[TMP5]], [[A_088]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 8
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
Expand All @@ -37,40 +37,40 @@ for.body: ; preds = %for.body, %entry
%0 = shl i64 %indvars.iv, 3
%arrayidx = getelementptr inbounds i32, ptr %diff, i64 %0
%1 = load i32, ptr %arrayidx, align 4
%2 = or i64 %0, 4
%2 = or disjoint i64 %0, 4
%arrayidx2 = getelementptr inbounds i32, ptr %diff, i64 %2
%3 = load i32, ptr %arrayidx2, align 4
%add3 = add nsw i32 %3, %1
%arrayidx6 = getelementptr inbounds [8 x [8 x i32]], ptr %m2, i64 0, i64 %indvars.iv, i64 0
store i32 %add3, ptr %arrayidx6, align 16

%add10 = add nsw i32 %add3, %a.088
%4 = or i64 %0, 1
%4 = or disjoint i64 %0, 1
%arrayidx13 = getelementptr inbounds i32, ptr %diff, i64 %4
%5 = load i32, ptr %arrayidx13, align 4
%6 = or i64 %0, 5
%6 = or disjoint i64 %0, 5
%arrayidx16 = getelementptr inbounds i32, ptr %diff, i64 %6
%7 = load i32, ptr %arrayidx16, align 4
%add17 = add nsw i32 %7, %5
%arrayidx20 = getelementptr inbounds [8 x [8 x i32]], ptr %m2, i64 0, i64 %indvars.iv, i64 1
store i32 %add17, ptr %arrayidx20, align 4

%add24 = add nsw i32 %add10, %add17
%8 = or i64 %0, 2
%8 = or disjoint i64 %0, 2
%arrayidx27 = getelementptr inbounds i32, ptr %diff, i64 %8
%9 = load i32, ptr %arrayidx27, align 4
%10 = or i64 %0, 6
%10 = or disjoint i64 %0, 6
%arrayidx30 = getelementptr inbounds i32, ptr %diff, i64 %10
%11 = load i32, ptr %arrayidx30, align 4
%add31 = add nsw i32 %11, %9
%arrayidx34 = getelementptr inbounds [8 x [8 x i32]], ptr %m2, i64 0, i64 %indvars.iv, i64 2
store i32 %add31, ptr %arrayidx34, align 8

%add38 = add nsw i32 %add24, %add31
%12 = or i64 %0, 3
%12 = or disjoint i64 %0, 3
%arrayidx41 = getelementptr inbounds i32, ptr %diff, i64 %12
%13 = load i32, ptr %arrayidx41, align 4
%14 = or i64 %0, 7
%14 = or disjoint i64 %0, 7
%arrayidx44 = getelementptr inbounds i32, ptr %diff, i64 %14
%15 = load i32, ptr %arrayidx44, align 4

Expand Down
30 changes: 15 additions & 15 deletions llvm/test/Transforms/SLPVectorizer/X86/remark_not_all_parts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,19 +10,19 @@ define i32 @foo(ptr nocapture readonly %diff) #0 {
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[A_088:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD24:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDVARS_IV]], 3
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DIFF:%.*]], i64 [[TMP1]]
; CHECK-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[DIFF]], i64 [[TMP2]]
; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[INDVARS_IV]], 3
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DIFF:%.*]], i64 [[TMP0]]
; CHECK-NEXT: [[TMP1:%.*]] = or disjoint i64 [[TMP0]], 4
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[DIFF]], i64 [[TMP1]]
; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [8 x [8 x i32]], ptr [[M2]], i64 0, i64 [[INDVARS_IV]], i64 0
; CHECK-NEXT: [[TMP4:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP6:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[TMP7:%.*]] = add nsw <2 x i32> [[TMP6]], [[TMP4]]
; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i32> [[TMP7]], i32 0
; CHECK-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP8]], [[A_088]]
; CHECK-NEXT: store <2 x i32> [[TMP7]], ptr [[ARRAYIDX6]], align 16
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x i32> [[TMP7]], i32 1
; CHECK-NEXT: [[ADD24]] = add nsw i32 [[ADD10]], [[TMP10]]
; CHECK-NEXT: [[TMP2:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = add nsw <2 x i32> [[TMP3]], [[TMP2]]
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i32> [[TMP4]], i32 0
; CHECK-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP5]], [[A_088]]
; CHECK-NEXT: store <2 x i32> [[TMP4]], ptr [[ARRAYIDX6]], align 16
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i32> [[TMP4]], i32 1
; CHECK-NEXT: [[ADD24]] = add nsw i32 [[ADD10]], [[TMP6]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 8
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
Expand All @@ -39,17 +39,17 @@ for.body: ; preds = %for.body, %entry
%0 = shl i64 %indvars.iv, 3
%arrayidx = getelementptr inbounds i32, ptr %diff, i64 %0
%1 = load i32, ptr %arrayidx, align 4
%2 = or i64 %0, 4
%2 = or disjoint i64 %0, 4
%arrayidx2 = getelementptr inbounds i32, ptr %diff, i64 %2
%3 = load i32, ptr %arrayidx2, align 4
%add3 = add nsw i32 %3, %1
%arrayidx6 = getelementptr inbounds [8 x [8 x i32]], ptr %m2, i64 0, i64 %indvars.iv, i64 0
store i32 %add3, ptr %arrayidx6, align 16
%add10 = add nsw i32 %add3, %a.088
%4 = or i64 %0, 1
%4 = or disjoint i64 %0, 1
%arrayidx13 = getelementptr inbounds i32, ptr %diff, i64 %4
%5 = load i32, ptr %arrayidx13, align 4
%6 = or i64 %0, 5
%6 = or disjoint i64 %0, 5
%arrayidx16 = getelementptr inbounds i32, ptr %diff, i64 %6
%7 = load i32, ptr %arrayidx16, align 4
%add17 = add nsw i32 %7, %5
Expand Down
34 changes: 17 additions & 17 deletions llvm/test/Transforms/SLPVectorizer/X86/scheduling.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,17 +9,17 @@ define i32 @foo(ptr nocapture readonly %diff) #0 {
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[A_088:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[OP_RDX:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDVARS_IV]], 3
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DIFF:%.*]], i64 [[TMP1]]
; CHECK-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[DIFF]], i64 [[TMP2]]
; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[INDVARS_IV]], 3
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DIFF:%.*]], i64 [[TMP0]]
; CHECK-NEXT: [[TMP1:%.*]] = or disjoint i64 [[TMP0]], 4
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[DIFF]], i64 [[TMP1]]
; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [8 x [8 x i32]], ptr [[M2]], i64 0, i64 [[INDVARS_IV]], i64 0
; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP6:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], [[TMP4]]
; CHECK-NEXT: store <4 x i32> [[TMP7]], ptr [[ARRAYIDX6]], align 16
; CHECK-NEXT: [[TMP9:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP7]])
; CHECK-NEXT: [[OP_RDX]] = add i32 [[TMP9]], [[A_088]]
; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], [[TMP2]]
; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[ARRAYIDX6]], align 16
; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP4]])
; CHECK-NEXT: [[OP_RDX]] = add i32 [[TMP5]], [[A_088]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 8
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
Expand All @@ -37,37 +37,37 @@ for.body: ; preds = %for.body, %entry
%0 = shl i64 %indvars.iv, 3
%arrayidx = getelementptr inbounds i32, ptr %diff, i64 %0
%1 = load i32, ptr %arrayidx, align 4
%2 = or i64 %0, 4
%2 = or disjoint i64 %0, 4
%arrayidx2 = getelementptr inbounds i32, ptr %diff, i64 %2
%3 = load i32, ptr %arrayidx2, align 4
%add3 = add nsw i32 %3, %1
%arrayidx6 = getelementptr inbounds [8 x [8 x i32]], ptr %m2, i64 0, i64 %indvars.iv, i64 0
store i32 %add3, ptr %arrayidx6, align 16
%add10 = add nsw i32 %add3, %a.088
%4 = or i64 %0, 1
%4 = or disjoint i64 %0, 1
%arrayidx13 = getelementptr inbounds i32, ptr %diff, i64 %4
%5 = load i32, ptr %arrayidx13, align 4
%6 = or i64 %0, 5
%6 = or disjoint i64 %0, 5
%arrayidx16 = getelementptr inbounds i32, ptr %diff, i64 %6
%7 = load i32, ptr %arrayidx16, align 4
%add17 = add nsw i32 %7, %5
%arrayidx20 = getelementptr inbounds [8 x [8 x i32]], ptr %m2, i64 0, i64 %indvars.iv, i64 1
store i32 %add17, ptr %arrayidx20, align 4
%add24 = add nsw i32 %add10, %add17
%8 = or i64 %0, 2
%8 = or disjoint i64 %0, 2
%arrayidx27 = getelementptr inbounds i32, ptr %diff, i64 %8
%9 = load i32, ptr %arrayidx27, align 4
%10 = or i64 %0, 6
%10 = or disjoint i64 %0, 6
%arrayidx30 = getelementptr inbounds i32, ptr %diff, i64 %10
%11 = load i32, ptr %arrayidx30, align 4
%add31 = add nsw i32 %11, %9
%arrayidx34 = getelementptr inbounds [8 x [8 x i32]], ptr %m2, i64 0, i64 %indvars.iv, i64 2
store i32 %add31, ptr %arrayidx34, align 8
%add38 = add nsw i32 %add24, %add31
%12 = or i64 %0, 3
%12 = or disjoint i64 %0, 3
%arrayidx41 = getelementptr inbounds i32, ptr %diff, i64 %12
%13 = load i32, ptr %arrayidx41, align 4
%14 = or i64 %0, 7
%14 = or disjoint i64 %0, 7
%arrayidx44 = getelementptr inbounds i32, ptr %diff, i64 %14
%15 = load i32, ptr %arrayidx44, align 4
%add45 = add nsw i32 %15, %13
Expand Down
52 changes: 26 additions & 26 deletions llvm/test/Transforms/SLPVectorizer/X86/simple-loop.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,16 +9,16 @@ define i32 @rollable(ptr noalias nocapture %in, ptr noalias nocapture %out, i64
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[N:%.*]], 0
; CHECK-NEXT: br i1 [[TMP1]], label [[DOT_CRIT_EDGE:%.*]], label [[DOTLR_PH:%.*]]
; CHECK: .lr.ph:
; CHECK-NEXT: [[I_019:%.*]] = phi i64 [ [[TMP10:%.*]], [[DOTLR_PH]] ], [ 0, [[TMP0:%.*]] ]
; CHECK-NEXT: [[I_019:%.*]] = phi i64 [ [[TMP8:%.*]], [[DOTLR_PH]] ], [ 0, [[TMP0:%.*]] ]
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[I_019]], 2
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[IN:%.*]], i64 [[TMP2]]
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[OUT:%.*]], i64 [[TMP2]]
; CHECK-NEXT: [[TMP6:%.*]] = load <4 x i32>, ptr [[TMP3]], align 4
; CHECK-NEXT: [[TMP7:%.*]] = mul <4 x i32> [[TMP6]], <i32 7, i32 7, i32 7, i32 7>
; CHECK-NEXT: [[TMP8:%.*]] = add <4 x i32> [[TMP7]], <i32 7, i32 14, i32 21, i32 28>
; CHECK-NEXT: store <4 x i32> [[TMP8]], ptr [[TMP4]], align 4
; CHECK-NEXT: [[TMP10]] = add i64 [[I_019]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP10]], [[N]]
; CHECK-NEXT: [[TMP5:%.*]] = load <4 x i32>, ptr [[TMP3]], align 4
; CHECK-NEXT: [[TMP6:%.*]] = mul <4 x i32> [[TMP5]], <i32 7, i32 7, i32 7, i32 7>
; CHECK-NEXT: [[TMP7:%.*]] = add <4 x i32> [[TMP6]], <i32 7, i32 14, i32 21, i32 28>
; CHECK-NEXT: store <4 x i32> [[TMP7]], ptr [[TMP4]], align 4
; CHECK-NEXT: [[TMP8]] = add i64 [[I_019]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP8]], [[N]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]]
; CHECK: ._crit_edge:
; CHECK-NEXT: ret i32 undef
Expand All @@ -31,13 +31,13 @@ define i32 @rollable(ptr noalias nocapture %in, ptr noalias nocapture %out, i64
%2 = shl i64 %i.019, 2
%3 = getelementptr inbounds i32, ptr %in, i64 %2
%4 = load i32, ptr %3, align 4
%5 = or i64 %2, 1
%5 = or disjoint i64 %2, 1
%6 = getelementptr inbounds i32, ptr %in, i64 %5
%7 = load i32, ptr %6, align 4
%8 = or i64 %2, 2
%8 = or disjoint i64 %2, 2
%9 = getelementptr inbounds i32, ptr %in, i64 %8
%10 = load i32, ptr %9, align 4
%11 = or i64 %2, 3
%11 = or disjoint i64 %2, 3
%12 = getelementptr inbounds i32, ptr %in, i64 %11
%13 = load i32, ptr %12, align 4
%14 = mul i32 %4, 7
Expand Down Expand Up @@ -69,24 +69,24 @@ define i32 @unrollable(ptr %in, ptr %out, i64 %n) nounwind ssp uwtable {
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[N:%.*]], 0
; CHECK-NEXT: br i1 [[TMP1]], label [[DOT_CRIT_EDGE:%.*]], label [[DOTLR_PH:%.*]]
; CHECK: .lr.ph:
; CHECK-NEXT: [[I_019:%.*]] = phi i64 [ [[TMP18:%.*]], [[DOTLR_PH]] ], [ 0, [[TMP0:%.*]] ]
; CHECK-NEXT: [[I_019:%.*]] = phi i64 [ [[TMP14:%.*]], [[DOTLR_PH]] ], [ 0, [[TMP0:%.*]] ]
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[I_019]], 2
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[IN:%.*]], i64 [[TMP2]]
; CHECK-NEXT: [[TMP4:%.*]] = or i64 [[TMP2]], 2
; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i64 [[TMP2]], 2
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[IN]], i64 [[TMP4]]
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[OUT:%.*]], i64 [[TMP2]]
; CHECK-NEXT: [[TMP8:%.*]] = load <2 x i32>, ptr [[TMP3]], align 4
; CHECK-NEXT: [[TMP9:%.*]] = mul <2 x i32> [[TMP8]], <i32 7, i32 7>
; CHECK-NEXT: [[TMP10:%.*]] = add <2 x i32> [[TMP9]], <i32 7, i32 14>
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[TMP4]]
; CHECK-NEXT: [[TMP14:%.*]] = load <2 x i32>, ptr [[TMP5]], align 4
; CHECK-NEXT: [[TMP15:%.*]] = mul <2 x i32> [[TMP14]], <i32 7, i32 7>
; CHECK-NEXT: [[TMP16:%.*]] = add <2 x i32> [[TMP15]], <i32 21, i32 28>
; CHECK-NEXT: store <2 x i32> [[TMP10]], ptr [[TMP6]], align 4
; CHECK-NEXT: [[TMP7:%.*]] = load <2 x i32>, ptr [[TMP3]], align 4
; CHECK-NEXT: [[TMP8:%.*]] = mul <2 x i32> [[TMP7]], <i32 7, i32 7>
; CHECK-NEXT: [[TMP9:%.*]] = add <2 x i32> [[TMP8]], <i32 7, i32 14>
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[TMP4]]
; CHECK-NEXT: [[TMP11:%.*]] = load <2 x i32>, ptr [[TMP5]], align 4
; CHECK-NEXT: [[TMP12:%.*]] = mul <2 x i32> [[TMP11]], <i32 7, i32 7>
; CHECK-NEXT: [[TMP13:%.*]] = add <2 x i32> [[TMP12]], <i32 21, i32 28>
; CHECK-NEXT: store <2 x i32> [[TMP9]], ptr [[TMP6]], align 4
; CHECK-NEXT: [[BARRIER:%.*]] = call i32 @goo(i32 0)
; CHECK-NEXT: store <2 x i32> [[TMP16]], ptr [[TMP12]], align 4
; CHECK-NEXT: [[TMP18]] = add i64 [[I_019]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP18]], [[N]]
; CHECK-NEXT: store <2 x i32> [[TMP13]], ptr [[TMP10]], align 4
; CHECK-NEXT: [[TMP14]] = add i64 [[I_019]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP14]], [[N]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[DOT_CRIT_EDGE]], label [[DOTLR_PH]]
; CHECK: ._crit_edge:
; CHECK-NEXT: ret i32 undef
Expand All @@ -99,13 +99,13 @@ define i32 @unrollable(ptr %in, ptr %out, i64 %n) nounwind ssp uwtable {
%2 = shl i64 %i.019, 2
%3 = getelementptr inbounds i32, ptr %in, i64 %2
%4 = load i32, ptr %3, align 4
%5 = or i64 %2, 1
%5 = or disjoint i64 %2, 1
%6 = getelementptr inbounds i32, ptr %in, i64 %5
%7 = load i32, ptr %6, align 4
%8 = or i64 %2, 2
%8 = or disjoint i64 %2, 2
%9 = getelementptr inbounds i32, ptr %in, i64 %8
%10 = load i32, ptr %9, align 4
%11 = or i64 %2, 3
%11 = or disjoint i64 %2, 3
%12 = getelementptr inbounds i32, ptr %in, i64 %11
%13 = load i32, ptr %12, align 4
%14 = mul i32 %4, 7
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/SLPVectorizer/X86/slp-throttle.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ define dso_local void @rftbsub(ptr %a) local_unnamed_addr #0 {
entry:
%arrayidx6 = getelementptr inbounds double, ptr %a, i64 2
%0 = load double, ptr %arrayidx6, align 8
%1 = or i64 2, 1
%1 = or disjoint i64 2, 1
%arrayidx12 = getelementptr inbounds double, ptr %a, i64 %1
%2 = load double, ptr %arrayidx12, align 8
%add16 = fadd double %2, undef
Expand Down