60 changes: 30 additions & 30 deletions llvm/test/CodeGen/RISCV/sext-zext-trunc.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV64I

define i8 @sext_i1_to_i8(i1 %a) {
define i8 @sext_i1_to_i8(i1 %a) nounwind {
; RV32I-LABEL: sext_i1_to_i8:
; RV32I: # %bb.0:
; RV32I-NEXT: andi a0, a0, 1
Expand All @@ -20,7 +20,7 @@ define i8 @sext_i1_to_i8(i1 %a) {
ret i8 %1
}

define i16 @sext_i1_to_i16(i1 %a) {
define i16 @sext_i1_to_i16(i1 %a) nounwind {
; RV32I-LABEL: sext_i1_to_i16:
; RV32I: # %bb.0:
; RV32I-NEXT: andi a0, a0, 1
Expand All @@ -36,7 +36,7 @@ define i16 @sext_i1_to_i16(i1 %a) {
ret i16 %1
}

define i32 @sext_i1_to_i32(i1 %a) {
define i32 @sext_i1_to_i32(i1 %a) nounwind {
; RV32I-LABEL: sext_i1_to_i32:
; RV32I: # %bb.0:
; RV32I-NEXT: andi a0, a0, 1
Expand All @@ -52,7 +52,7 @@ define i32 @sext_i1_to_i32(i1 %a) {
ret i32 %1
}

define i64 @sext_i1_to_i64(i1 %a) {
define i64 @sext_i1_to_i64(i1 %a) nounwind {
; RV32I-LABEL: sext_i1_to_i64:
; RV32I: # %bb.0:
; RV32I-NEXT: andi a0, a0, 1
Expand All @@ -69,7 +69,7 @@ define i64 @sext_i1_to_i64(i1 %a) {
ret i64 %1
}

define i16 @sext_i8_to_i16(i8 %a) {
define i16 @sext_i8_to_i16(i8 %a) nounwind {
; RV32I-LABEL: sext_i8_to_i16:
; RV32I: # %bb.0:
; RV32I-NEXT: slli a0, a0, 24
Expand All @@ -85,7 +85,7 @@ define i16 @sext_i8_to_i16(i8 %a) {
ret i16 %1
}

define i32 @sext_i8_to_i32(i8 %a) {
define i32 @sext_i8_to_i32(i8 %a) nounwind {
; RV32I-LABEL: sext_i8_to_i32:
; RV32I: # %bb.0:
; RV32I-NEXT: slli a0, a0, 24
Expand All @@ -101,7 +101,7 @@ define i32 @sext_i8_to_i32(i8 %a) {
ret i32 %1
}

define i64 @sext_i8_to_i64(i8 %a) {
define i64 @sext_i8_to_i64(i8 %a) nounwind {
; RV32I-LABEL: sext_i8_to_i64:
; RV32I: # %bb.0:
; RV32I-NEXT: slli a1, a0, 24
Expand All @@ -118,7 +118,7 @@ define i64 @sext_i8_to_i64(i8 %a) {
ret i64 %1
}

define i32 @sext_i16_to_i32(i16 %a) {
define i32 @sext_i16_to_i32(i16 %a) nounwind {
; RV32I-LABEL: sext_i16_to_i32:
; RV32I: # %bb.0:
; RV32I-NEXT: slli a0, a0, 16
Expand All @@ -134,7 +134,7 @@ define i32 @sext_i16_to_i32(i16 %a) {
ret i32 %1
}

define i64 @sext_i16_to_i64(i16 %a) {
define i64 @sext_i16_to_i64(i16 %a) nounwind {
; RV32I-LABEL: sext_i16_to_i64:
; RV32I: # %bb.0:
; RV32I-NEXT: slli a1, a0, 16
Expand All @@ -151,7 +151,7 @@ define i64 @sext_i16_to_i64(i16 %a) {
ret i64 %1
}

define i64 @sext_i32_to_i64(i32 %a) {
define i64 @sext_i32_to_i64(i32 %a) nounwind {
; RV32I-LABEL: sext_i32_to_i64:
; RV32I: # %bb.0:
; RV32I-NEXT: srai a1, a0, 31
Expand All @@ -165,7 +165,7 @@ define i64 @sext_i32_to_i64(i32 %a) {
ret i64 %1
}

define i8 @zext_i1_to_i8(i1 %a) {
define i8 @zext_i1_to_i8(i1 %a) nounwind {
; RV32I-LABEL: zext_i1_to_i8:
; RV32I: # %bb.0:
; RV32I-NEXT: andi a0, a0, 1
Expand All @@ -179,7 +179,7 @@ define i8 @zext_i1_to_i8(i1 %a) {
ret i8 %1
}

define i16 @zext_i1_to_i16(i1 %a) {
define i16 @zext_i1_to_i16(i1 %a) nounwind {
; RV32I-LABEL: zext_i1_to_i16:
; RV32I: # %bb.0:
; RV32I-NEXT: andi a0, a0, 1
Expand All @@ -193,7 +193,7 @@ define i16 @zext_i1_to_i16(i1 %a) {
ret i16 %1
}

define i32 @zext_i1_to_i32(i1 %a) {
define i32 @zext_i1_to_i32(i1 %a) nounwind {
; RV32I-LABEL: zext_i1_to_i32:
; RV32I: # %bb.0:
; RV32I-NEXT: andi a0, a0, 1
Expand All @@ -207,7 +207,7 @@ define i32 @zext_i1_to_i32(i1 %a) {
ret i32 %1
}

define i64 @zext_i1_to_i64(i1 %a) {
define i64 @zext_i1_to_i64(i1 %a) nounwind {
; RV32I-LABEL: zext_i1_to_i64:
; RV32I: # %bb.0:
; RV32I-NEXT: andi a0, a0, 1
Expand All @@ -222,7 +222,7 @@ define i64 @zext_i1_to_i64(i1 %a) {
ret i64 %1
}

define i16 @zext_i8_to_i16(i8 %a) {
define i16 @zext_i8_to_i16(i8 %a) nounwind {
; RV32I-LABEL: zext_i8_to_i16:
; RV32I: # %bb.0:
; RV32I-NEXT: andi a0, a0, 255
Expand All @@ -236,7 +236,7 @@ define i16 @zext_i8_to_i16(i8 %a) {
ret i16 %1
}

define i32 @zext_i8_to_i32(i8 %a) {
define i32 @zext_i8_to_i32(i8 %a) nounwind {
; RV32I-LABEL: zext_i8_to_i32:
; RV32I: # %bb.0:
; RV32I-NEXT: andi a0, a0, 255
Expand All @@ -250,7 +250,7 @@ define i32 @zext_i8_to_i32(i8 %a) {
ret i32 %1
}

define i64 @zext_i8_to_i64(i8 %a) {
define i64 @zext_i8_to_i64(i8 %a) nounwind {
; RV32I-LABEL: zext_i8_to_i64:
; RV32I: # %bb.0:
; RV32I-NEXT: andi a0, a0, 255
Expand All @@ -265,7 +265,7 @@ define i64 @zext_i8_to_i64(i8 %a) {
ret i64 %1
}

define i32 @zext_i16_to_i32(i16 %a) {
define i32 @zext_i16_to_i32(i16 %a) nounwind {
; RV32I-LABEL: zext_i16_to_i32:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a1, 16
Expand All @@ -283,7 +283,7 @@ define i32 @zext_i16_to_i32(i16 %a) {
ret i32 %1
}

define i64 @zext_i16_to_i64(i16 %a) {
define i64 @zext_i16_to_i64(i16 %a) nounwind {
; RV32I-LABEL: zext_i16_to_i64:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a1, 16
Expand All @@ -302,7 +302,7 @@ define i64 @zext_i16_to_i64(i16 %a) {
ret i64 %1
}

define i64 @zext_i32_to_i64(i32 %a) {
define i64 @zext_i32_to_i64(i32 %a) nounwind {
; RV32I-LABEL: zext_i32_to_i64:
; RV32I: # %bb.0:
; RV32I-NEXT: mv a1, zero
Expand All @@ -317,7 +317,7 @@ define i64 @zext_i32_to_i64(i32 %a) {
ret i64 %1
}

define i1 @trunc_i8_to_i1(i8 %a) {
define i1 @trunc_i8_to_i1(i8 %a) nounwind {
; RV32I-LABEL: trunc_i8_to_i1:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
Expand All @@ -329,7 +329,7 @@ define i1 @trunc_i8_to_i1(i8 %a) {
ret i1 %1
}

define i1 @trunc_i16_to_i1(i16 %a) {
define i1 @trunc_i16_to_i1(i16 %a) nounwind {
; RV32I-LABEL: trunc_i16_to_i1:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
Expand All @@ -341,7 +341,7 @@ define i1 @trunc_i16_to_i1(i16 %a) {
ret i1 %1
}

define i1 @trunc_i32_to_i1(i32 %a) {
define i1 @trunc_i32_to_i1(i32 %a) nounwind {
; RV32I-LABEL: trunc_i32_to_i1:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
Expand All @@ -353,7 +353,7 @@ define i1 @trunc_i32_to_i1(i32 %a) {
ret i1 %1
}

define i1 @trunc_i64_to_i1(i64 %a) {
define i1 @trunc_i64_to_i1(i64 %a) nounwind {
; RV32I-LABEL: trunc_i64_to_i1:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
Expand All @@ -365,7 +365,7 @@ define i1 @trunc_i64_to_i1(i64 %a) {
ret i1 %1
}

define i8 @trunc_i16_to_i8(i16 %a) {
define i8 @trunc_i16_to_i8(i16 %a) nounwind {
; RV32I-LABEL: trunc_i16_to_i8:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
Expand All @@ -377,7 +377,7 @@ define i8 @trunc_i16_to_i8(i16 %a) {
ret i8 %1
}

define i8 @trunc_i32_to_i8(i32 %a) {
define i8 @trunc_i32_to_i8(i32 %a) nounwind {
; RV32I-LABEL: trunc_i32_to_i8:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
Expand All @@ -389,7 +389,7 @@ define i8 @trunc_i32_to_i8(i32 %a) {
ret i8 %1
}

define i8 @trunc_i64_to_i8(i64 %a) {
define i8 @trunc_i64_to_i8(i64 %a) nounwind {
; RV32I-LABEL: trunc_i64_to_i8:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
Expand All @@ -401,7 +401,7 @@ define i8 @trunc_i64_to_i8(i64 %a) {
ret i8 %1
}

define i16 @trunc_i32_to_i16(i32 %a) {
define i16 @trunc_i32_to_i16(i32 %a) nounwind {
; RV32I-LABEL: trunc_i32_to_i16:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
Expand All @@ -413,7 +413,7 @@ define i16 @trunc_i32_to_i16(i32 %a) {
ret i16 %1
}

define i16 @trunc_i64_to_i16(i64 %a) {
define i16 @trunc_i64_to_i16(i64 %a) nounwind {
; RV32I-LABEL: trunc_i64_to_i16:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
Expand All @@ -425,7 +425,7 @@ define i16 @trunc_i64_to_i16(i64 %a) {
ret i16 %1
}

define i32 @trunc_i64_to_i32(i64 %a) {
define i32 @trunc_i64_to_i32(i64 %a) nounwind {
; RV32I-LABEL: trunc_i64_to_i32:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
Expand Down
18 changes: 9 additions & 9 deletions llvm/test/CodeGen/RISCV/tail-calls.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@

; Perform tail call optimization for global address.
declare i32 @callee_tail(i32 %i)
define i32 @caller_tail(i32 %i) {
define i32 @caller_tail(i32 %i) nounwind {
; CHECK-LABEL: caller_tail
; CHECK: tail callee_tail
entry:
Expand All @@ -26,7 +26,7 @@ entry:
; Perform indirect tail call optimization (for function pointer call).
declare void @callee_indirect1()
declare void @callee_indirect2()
define void @caller_indirect_tail(i32 %a) {
define void @caller_indirect_tail(i32 %a) nounwind {
; CHECK-LABEL: caller_indirect_tail
; CHECK-NOT: call callee_indirect1
; CHECK-NOT: call callee_indirect2
Expand All @@ -49,7 +49,7 @@ entry:

; Do not tail call optimize functions with varargs.
declare i32 @callee_varargs(i32, ...)
define void @caller_varargs(i32 %a, i32 %b) {
define void @caller_varargs(i32 %a, i32 %b) nounwind {
; CHECK-LABEL: caller_varargs
; CHECK-NOT: tail callee_varargs
; CHECK: call callee_varargs
Expand All @@ -60,7 +60,7 @@ entry:

; Do not tail call optimize if stack is used to pass parameters.
declare i32 @callee_args(i32 %a, i32 %b, i32 %c, i32 %dd, i32 %e, i32 %ff, i32 %g, i32 %h, i32 %i, i32 %j, i32 %k, i32 %l, i32 %m, i32 %n)
define i32 @caller_args(i32 %a, i32 %b, i32 %c, i32 %dd, i32 %e, i32 %ff, i32 %g, i32 %h, i32 %i, i32 %j, i32 %k, i32 %l, i32 %m, i32 %n) {
define i32 @caller_args(i32 %a, i32 %b, i32 %c, i32 %dd, i32 %e, i32 %ff, i32 %g, i32 %h, i32 %i, i32 %j, i32 %k, i32 %l, i32 %m, i32 %n) nounwind {
; CHECK-LABEL: caller_args
; CHECK-NOT: tail callee_args
; CHECK: call callee_args
Expand All @@ -71,7 +71,7 @@ entry:

; Do not tail call optimize if parameters need to be passed indirectly.
declare i32 @callee_indirect_args(fp128 %a)
define void @caller_indirect_args() {
define void @caller_indirect_args() nounwind {
; CHECK-LABEL: caller_indirect_args
; CHECK-NOT: tail callee_indirect_args
; CHECK: call callee_indirect_args
Expand All @@ -85,7 +85,7 @@ entry:
; calls) is implementation-defined, so we cannot rely on the linker replacing
; the tail call with a return.
declare extern_weak void @callee_weak()
define void @caller_weak() {
define void @caller_weak() nounwind {
; CHECK-LABEL: caller_weak
; CHECK-NOT: tail callee_weak
; CHECK: call callee_weak
Expand All @@ -112,7 +112,7 @@ attributes #0 = { "interrupt"="machine" }
; we want to reuse during a tail call. Do not tail call optimize functions with
; byval parameters.
declare i32 @callee_byval(i32** byval %a)
define i32 @caller_byval() {
define i32 @caller_byval() nounwind {
; CHECK-LABEL: caller_byval
; CHECK-NOT: tail callee_byval
; CHECK: call callee_byval
Expand All @@ -127,7 +127,7 @@ entry:
@a = global %struct.A zeroinitializer

declare void @callee_struct(%struct.A* sret %a)
define void @caller_nostruct() {
define void @caller_nostruct() nounwind {
; CHECK-LABEL: caller_nostruct
; CHECK-NOT: tail callee_struct
; CHECK: call callee_struct
Expand All @@ -138,7 +138,7 @@ entry:

; Do not tail call optimize if caller uses structret semantics.
declare void @callee_nostruct()
define void @caller_struct(%struct.A* sret %a) {
define void @caller_struct(%struct.A* sret %a) nounwind {
; CHECK-LABEL: caller_struct
; CHECK-NOT: tail callee_nostruct
; CHECK: call callee_nostruct
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@

@bytes = global [5 x i8] zeroinitializer, align 1

define i32 @test_zext_i8() {
define i32 @test_zext_i8() nounwind {
; RV32I-LABEL: test_zext_i8:
; RV32I: # %bb.0: # %entry
; RV32I-NEXT: lui a0, %hi(bytes)
Expand Down Expand Up @@ -41,7 +41,7 @@ if.end:

@shorts = global [5 x i16] zeroinitializer, align 2

define i32 @test_zext_i16() {
define i32 @test_zext_i16() nounwind {
; RV32I-LABEL: test_zext_i16:
; RV32I: # %bb.0: # %entry
; RV32I-NEXT: lui a0, %hi(shorts)
Expand Down