454 changes: 454 additions & 0 deletions llvm/test/CodeGen/AMDGPU/early-if-convert.ll
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1 change: 1 addition & 0 deletions llvm/test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll
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Expand Up @@ -14,6 +14,7 @@ main_body:

if:
%u = fadd float %v, %v
call void asm sideeffect "", ""() #0 ; Prevent ifconversion
br label %else

else:
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
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@@ -1,5 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=verde -machine-sink-split-probability-threshold=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -machine-sink-split-probability-threshold=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
; RUN: llc -march=amdgcn -mcpu=verde -amdgpu-early-ifcvt=0 -machine-sink-split-probability-threshold=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -amdgpu-early-ifcvt=0 -machine-sink-split-probability-threshold=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s

; GCN-LABEL: {{^}}uniform_if_scc:
; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 0
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