32 changes: 13 additions & 19 deletions llvm/test/CodeGen/AArch64/fneg.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -162,27 +162,21 @@ define <7 x half> @fabs_v7f16(<7 x half> %a) {
; CHECK-GI-NOFP16-LABEL: fabs_v7f16:
; CHECK-GI-NOFP16: // %bb.0: // %entry
; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[4]
; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[5]
; CHECK-GI-NOFP16-NEXT: mov h4, v0.h[6]
; CHECK-GI-NOFP16-NEXT: mov v2.h[0], v0.h[4]
; CHECK-GI-NOFP16-NEXT: fneg v1.4s, v1.4s
; CHECK-GI-NOFP16-NEXT: mov v2.h[1], v3.h[0]
; CHECK-GI-NOFP16-NEXT: fcvtn v0.4h, v1.4s
; CHECK-GI-NOFP16-NEXT: mov v2.h[2], v4.h[0]
; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[1]
; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v2.4h
; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[2]
; CHECK-GI-NOFP16-NEXT: mov h4, v0.h[3]
; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NOFP16-NEXT: fneg v1.4s, v2.4s
; CHECK-GI-NOFP16-NEXT: mov v0.h[2], v3.h[0]
; CHECK-GI-NOFP16-NEXT: mov v2.h[1], v0.h[5]
; CHECK-GI-NOFP16-NEXT: fcvtn v1.4h, v1.4s
; CHECK-GI-NOFP16-NEXT: mov v0.h[3], v4.h[0]
; CHECK-GI-NOFP16-NEXT: mov h2, v1.h[1]
; CHECK-GI-NOFP16-NEXT: mov v0.h[4], v1.h[0]
; CHECK-GI-NOFP16-NEXT: mov h1, v1.h[2]
; CHECK-GI-NOFP16-NEXT: mov v0.h[5], v2.h[0]
; CHECK-GI-NOFP16-NEXT: mov v0.h[6], v1.h[0]
; CHECK-GI-NOFP16-NEXT: mov v2.h[2], v0.h[6]
; CHECK-GI-NOFP16-NEXT: mov v0.h[0], v1.h[0]
; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v2.4h
; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[1]
; CHECK-GI-NOFP16-NEXT: fneg v2.4s, v2.4s
; CHECK-GI-NOFP16-NEXT: mov v0.h[2], v1.h[2]
; CHECK-GI-NOFP16-NEXT: fcvtn v2.4h, v2.4s
; CHECK-GI-NOFP16-NEXT: mov v0.h[3], v1.h[3]
; CHECK-GI-NOFP16-NEXT: mov v0.h[4], v2.h[0]
; CHECK-GI-NOFP16-NEXT: mov v0.h[5], v2.h[1]
; CHECK-GI-NOFP16-NEXT: mov v0.h[6], v2.h[2]
; CHECK-GI-NOFP16-NEXT: ret
;
; CHECK-GI-FP16-LABEL: fabs_v7f16:
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AArch64/fpow.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -965,22 +965,22 @@ define <4 x half> @pow_v4f16(<4 x half> %a, <4 x half> %b) {
; CHECK-GI-NEXT: fcvt s2, h9
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: fcvt s1, h12
; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s2
; CHECK-GI-NEXT: bl powf
; CHECK-GI-NEXT: fcvt s2, h10
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: fcvt s1, h13
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s2
; CHECK-GI-NEXT: bl powf
; CHECK-GI-NEXT: ldp q2, q1, [sp, #16] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldp q3, q2, [sp] // 32-byte Folded Reload
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldp d9, d8, [sp, #80] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload
; CHECK-GI-NEXT: ldp d11, d10, [sp, #64] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: ldr q2, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v3.h[0]
; CHECK-GI-NEXT: ldp d13, d12, [sp, #48] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[2], v2.h[0]
; CHECK-GI-NEXT: mov v1.h[3], v0.h[0]
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AArch64/fpowi.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -869,22 +869,22 @@ define <4 x half> @powi_v4f16(<4 x half> %a, i32 %b) {
; CHECK-GI-NEXT: fcvt s1, h9
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: mov w0, w19
; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl __powisf2
; CHECK-GI-NEXT: fcvt s1, h10
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: mov w0, w19
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl __powisf2
; CHECK-GI-NEXT: ldp q2, q1, [sp, #16] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldp q3, q2, [sp] // 32-byte Folded Reload
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldp x30, x19, [sp, #80] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr d10, [sp, #48] // 8-byte Folded Reload
; CHECK-GI-NEXT: ldp d9, d8, [sp, #64] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: ldr q2, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr d10, [sp, #48] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[2], v2.h[0]
; CHECK-GI-NEXT: mov v1.h[3], v0.h[0]
; CHECK-GI-NEXT: mov v0.16b, v1.16b
Expand Down
70 changes: 32 additions & 38 deletions llvm/test/CodeGen/AArch64/fptoi.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -2585,7 +2585,7 @@ define <3 x i64> @fptos_v3f32_v3i64(<3 x float> %a) {
;
; CHECK-GI-LABEL: fptos_v3f32_v3i64:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: mov s1, v0.s[2]
; CHECK-GI-NEXT: mov v1.s[0], v0.s[2]
; CHECK-GI-NEXT: fcvtl v0.2d, v0.2s
; CHECK-GI-NEXT: fcvtl v1.2d, v1.2s
; CHECK-GI-NEXT: fcvtzs v0.2d, v0.2d
Expand Down Expand Up @@ -2614,7 +2614,7 @@ define <3 x i64> @fptou_v3f32_v3i64(<3 x float> %a) {
;
; CHECK-GI-LABEL: fptou_v3f32_v3i64:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: mov s1, v0.s[2]
; CHECK-GI-NEXT: mov v1.s[0], v0.s[2]
; CHECK-GI-NEXT: fcvtl v0.2d, v0.2s
; CHECK-GI-NEXT: fcvtl v1.2d, v1.2s
; CHECK-GI-NEXT: fcvtzu v0.2d, v0.2d
Expand Down Expand Up @@ -3181,10 +3181,10 @@ define <3 x i16> @fptos_v3f32_v3i16(<3 x float> %a) {
; CHECK-GI-LABEL: fptos_v3f32_v3i16:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: fcvtzs v0.4s, v0.4s
; CHECK-GI-NEXT: mov s1, v0.s[1]
; CHECK-GI-NEXT: mov s2, v0.s[2]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: mov v0.h[2], v2.h[0]
; CHECK-GI-NEXT: mov w8, v0.s[1]
; CHECK-GI-NEXT: mov w9, v0.s[2]
; CHECK-GI-NEXT: mov v0.h[1], w8
; CHECK-GI-NEXT: mov v0.h[2], w9
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
entry:
Expand All @@ -3202,10 +3202,10 @@ define <3 x i16> @fptou_v3f32_v3i16(<3 x float> %a) {
; CHECK-GI-LABEL: fptou_v3f32_v3i16:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: fcvtzu v0.4s, v0.4s
; CHECK-GI-NEXT: mov s1, v0.s[1]
; CHECK-GI-NEXT: mov s2, v0.s[2]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: mov v0.h[2], v2.h[0]
; CHECK-GI-NEXT: mov w8, v0.s[1]
; CHECK-GI-NEXT: mov w9, v0.s[2]
; CHECK-GI-NEXT: mov v0.h[1], w8
; CHECK-GI-NEXT: mov v0.h[2], w9
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
entry:
Expand Down Expand Up @@ -6077,10 +6077,10 @@ define <3 x i16> @fptos_v3f16_v3i16(<3 x half> %a) {
; CHECK-GI-NOFP16: // %bb.0: // %entry
; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
; CHECK-GI-NOFP16-NEXT: fcvtzs v0.4s, v0.4s
; CHECK-GI-NOFP16-NEXT: mov s1, v0.s[1]
; CHECK-GI-NOFP16-NEXT: mov s2, v0.s[2]
; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NOFP16-NEXT: mov v0.h[2], v2.h[0]
; CHECK-GI-NOFP16-NEXT: mov w8, v0.s[1]
; CHECK-GI-NOFP16-NEXT: mov w9, v0.s[2]
; CHECK-GI-NOFP16-NEXT: mov v0.h[1], w8
; CHECK-GI-NOFP16-NEXT: mov v0.h[2], w9
; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NOFP16-NEXT: ret
;
Expand Down Expand Up @@ -6110,10 +6110,10 @@ define <3 x i16> @fptou_v3f16_v3i16(<3 x half> %a) {
; CHECK-GI-NOFP16: // %bb.0: // %entry
; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
; CHECK-GI-NOFP16-NEXT: fcvtzu v0.4s, v0.4s
; CHECK-GI-NOFP16-NEXT: mov s1, v0.s[1]
; CHECK-GI-NOFP16-NEXT: mov s2, v0.s[2]
; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NOFP16-NEXT: mov v0.h[2], v2.h[0]
; CHECK-GI-NOFP16-NEXT: mov w8, v0.s[1]
; CHECK-GI-NOFP16-NEXT: mov w9, v0.s[2]
; CHECK-GI-NOFP16-NEXT: mov v0.h[1], w8
; CHECK-GI-NOFP16-NEXT: mov v0.h[2], w9
; CHECK-GI-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NOFP16-NEXT: ret
;
Expand Down Expand Up @@ -7297,7 +7297,7 @@ define <2 x i64> @fptos_v2f128_v2i64(<2 x fp128> %a) {
; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov x19, x0
; CHECK-GI-NEXT: bl __fixtfdi
; CHECK-GI-NEXT: fmov d0, x19
; CHECK-GI-NEXT: mov v0.d[0], x19
; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.d[1], x0
; CHECK-GI-NEXT: add sp, sp, #32
Expand Down Expand Up @@ -7340,7 +7340,7 @@ define <2 x i64> @fptou_v2f128_v2i64(<2 x fp128> %a) {
; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov x19, x0
; CHECK-GI-NEXT: bl __fixunstfdi
; CHECK-GI-NEXT: fmov d0, x19
; CHECK-GI-NEXT: mov v0.d[0], x19
; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.d[1], x0
; CHECK-GI-NEXT: add sp, sp, #32
Expand Down Expand Up @@ -7496,7 +7496,7 @@ define <2 x i32> @fptos_v2f128_v2i32(<2 x fp128> %a) {
; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov w19, w0
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: fmov s0, w19
; CHECK-GI-NEXT: mov v0.s[0], w19
; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[1], w0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
Expand Down Expand Up @@ -7539,7 +7539,7 @@ define <2 x i32> @fptou_v2f128_v2i32(<2 x fp128> %a) {
; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov w19, w0
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: fmov s0, w19
; CHECK-GI-NEXT: mov v0.s[0], w19
; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[1], w0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
Expand Down Expand Up @@ -7591,7 +7591,7 @@ define <3 x i32> @fptos_v3f128_v3i32(<3 x fp128> %a) {
; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov w20, w0
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: fmov s0, w19
; CHECK-GI-NEXT: mov v0.s[0], w19
; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[1], w20
; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
Expand Down Expand Up @@ -7644,7 +7644,7 @@ define <3 x i32> @fptou_v3f128_v3i32(<3 x fp128> %a) {
; CHECK-GI-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov w20, w0
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: fmov s0, w19
; CHECK-GI-NEXT: mov v0.s[0], w19
; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[1], w20
; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
Expand Down Expand Up @@ -7689,9 +7689,8 @@ define <2 x i16> @fptos_v2f128_v2i16(<2 x fp128> %a) {
; CHECK-GI-NEXT: mov w19, w0
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: fmov s0, w19
; CHECK-GI-NEXT: fmov s1, w0
; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: mov v0.h[1], w0
; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: add sp, sp, #32
Expand Down Expand Up @@ -7734,9 +7733,8 @@ define <2 x i16> @fptou_v2f128_v2i16(<2 x fp128> %a) {
; CHECK-GI-NEXT: mov w19, w0
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: fmov s0, w19
; CHECK-GI-NEXT: fmov s1, w0
; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: mov v0.h[1], w0
; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: add sp, sp, #32
Expand Down Expand Up @@ -7791,12 +7789,10 @@ define <3 x i16> @fptos_v3f128_v3i16(<3 x fp128> %a) {
; CHECK-GI-NEXT: mov w20, w0
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: fmov s0, w19
; CHECK-GI-NEXT: fmov s1, w20
; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v0.h[1], w20
; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: fmov s1, w0
; CHECK-GI-NEXT: mov v0.h[2], v1.h[0]
; CHECK-GI-NEXT: mov v0.h[2], w0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: add sp, sp, #64
; CHECK-GI-NEXT: ret
Expand Down Expand Up @@ -7850,12 +7846,10 @@ define <3 x i16> @fptou_v3f128_v3i16(<3 x fp128> %a) {
; CHECK-GI-NEXT: mov w20, w0
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: fmov s0, w19
; CHECK-GI-NEXT: fmov s1, w20
; CHECK-GI-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v0.h[1], w20
; CHECK-GI-NEXT: ldp x20, x19, [sp, #48] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: fmov s1, w0
; CHECK-GI-NEXT: mov v0.h[2], v1.h[0]
; CHECK-GI-NEXT: mov v0.h[2], w0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: add sp, sp, #64
; CHECK-GI-NEXT: ret
Expand Down Expand Up @@ -7896,7 +7890,7 @@ define <2 x i8> @fptos_v2f128_v2i8(<2 x fp128> %a) {
; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov w19, w0
; CHECK-GI-NEXT: bl __fixtfsi
; CHECK-GI-NEXT: fmov s0, w19
; CHECK-GI-NEXT: mov v0.s[0], w19
; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[1], w0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
Expand Down Expand Up @@ -7939,7 +7933,7 @@ define <2 x i8> @fptou_v2f128_v2i8(<2 x fp128> %a) {
; CHECK-GI-NEXT: ldr q0, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov w19, w0
; CHECK-GI-NEXT: bl __fixunstfsi
; CHECK-GI-NEXT: fmov s0, w19
; CHECK-GI-NEXT: mov v0.s[0], w19
; CHECK-GI-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v0.s[1], w0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AArch64/fptrunc.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -261,9 +261,9 @@ define <3 x float> @fptrunc_v3f64_v3f32(<3 x double> %a) {
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
; CHECK-GI-NEXT: fcvt s2, d2
; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
; CHECK-GI-NEXT: fcvtn v0.2s, v0.2d
; CHECK-GI-NEXT: mov s1, v0.s[1]
; CHECK-GI-NEXT: mov v0.s[1], v1.s[0]
; CHECK-GI-NEXT: fcvtn v1.2s, v0.2d
; CHECK-GI-NEXT: mov v0.s[0], v1.s[0]
; CHECK-GI-NEXT: mov v0.s[1], v1.s[1]
; CHECK-GI-NEXT: mov v0.s[2], v2.s[0]
; CHECK-GI-NEXT: ret
entry:
Expand Down Expand Up @@ -363,9 +363,9 @@ define <2 x half> @fptrunc_v2f32_v2f16(<2 x float> %a) {
; CHECK-GI-LABEL: fptrunc_v2f32_v2f16:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
; CHECK-GI-NEXT: mov s1, v0.s[1]
; CHECK-GI-NEXT: mov v0.s[1], v1.s[0]
; CHECK-GI-NEXT: fcvtn v0.4h, v0.4s
; CHECK-GI-NEXT: mov v1.s[0], v0.s[0]
; CHECK-GI-NEXT: mov v1.s[1], v0.s[1]
; CHECK-GI-NEXT: fcvtn v0.4h, v1.4s
; CHECK-GI-NEXT: mov h1, v0.h[1]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AArch64/frem.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -952,22 +952,22 @@ define <4 x half> @frem_v4f16(<4 x half> %a, <4 x half> %b) {
; CHECK-GI-NEXT: fcvt s2, h9
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: fcvt s1, h12
; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s2
; CHECK-GI-NEXT: bl fmodf
; CHECK-GI-NEXT: fcvt s2, h10
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: fcvt s1, h13
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s2
; CHECK-GI-NEXT: bl fmodf
; CHECK-GI-NEXT: ldp q2, q1, [sp, #16] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldp q3, q2, [sp] // 32-byte Folded Reload
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldp d9, d8, [sp, #80] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload
; CHECK-GI-NEXT: ldp d11, d10, [sp, #64] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: ldr q2, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v3.h[0]
; CHECK-GI-NEXT: ldp d13, d12, [sp, #48] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[2], v2.h[0]
; CHECK-GI-NEXT: mov v1.h[3], v0.h[0]
Expand Down
126 changes: 64 additions & 62 deletions llvm/test/CodeGen/AArch64/fsincos.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -678,12 +678,12 @@ define <7 x half> @sin_v7f16(<7 x half> %a) {
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: fcvt s1, h9
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #64] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #48] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: fcvt s1, h10
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #48] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #64] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: fcvt s1, h11
Expand All @@ -701,18 +701,19 @@ define <7 x half> @sin_v7f16(<7 x half> %a) {
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: ldp q2, q1, [sp, #64] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldp q3, q2, [sp, #48] // 32-byte Folded Reload
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: ldr q1, [sp, #80] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldp d9, d8, [sp, #128] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #144] // 8-byte Folded Reload
; CHECK-GI-NEXT: ldp d11, d10, [sp, #112] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp, #32] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #144] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v3.h[0]
; CHECK-GI-NEXT: ldp d13, d12, [sp, #96] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[2], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[3], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp] // 32-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[4], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[2], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp, #16] // 32-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[3], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[4], v2.h[0]
; CHECK-GI-NEXT: ldr q2, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[5], v2.h[0]
; CHECK-GI-NEXT: mov v1.h[6], v0.h[0]
; CHECK-GI-NEXT: mov v0.16b, v1.16b
Expand Down Expand Up @@ -789,21 +790,21 @@ define <4 x half> @sin_v4f16(<4 x half> %a) {
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: fcvt s1, h9
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: fcvt s1, h10
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: ldp q2, q1, [sp, #16] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldp q3, q2, [sp] // 32-byte Folded Reload
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldp d9, d8, [sp, #56] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #72] // 8-byte Folded Reload
; CHECK-GI-NEXT: ldr d10, [sp, #48] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: ldr q2, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[2], v2.h[0]
; CHECK-GI-NEXT: mov v1.h[3], v0.h[0]
; CHECK-GI-NEXT: mov v0.16b, v1.16b
Expand Down Expand Up @@ -919,12 +920,12 @@ define <8 x half> @sin_v8f16(<8 x half> %a) {
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: fcvt s1, h9
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #80] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #64] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: fcvt s1, h10
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #64] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #80] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: fcvt s1, h11
Expand All @@ -947,21 +948,21 @@ define <8 x half> @sin_v8f16(<8 x half> %a) {
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: ldp q2, q1, [sp, #80] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldp q3, q2, [sp, #64] // 32-byte Folded Reload
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: ldr q1, [sp, #96] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldp d9, d8, [sp, #152] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #168] // 8-byte Folded Reload
; CHECK-GI-NEXT: ldp d11, d10, [sp, #136] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #168] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v3.h[0]
; CHECK-GI-NEXT: ldr d14, [sp, #112] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp, #48] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldp d13, d12, [sp, #120] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[2], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[3], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp, #16] // 32-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[4], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[5], v2.h[0]
; CHECK-GI-NEXT: ldr q2, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[2], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp, #32] // 32-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[3], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[4], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp] // 32-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[5], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[6], v2.h[0]
; CHECK-GI-NEXT: mov v1.h[7], v0.h[0]
; CHECK-GI-NEXT: mov v0.16b, v1.16b
Expand Down Expand Up @@ -1155,7 +1156,7 @@ define <16 x half> @sin_v16f16(<16 x half> %a) {
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: fcvt s1, h8
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #128] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #112] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: fcvt s1, h9
Expand All @@ -1180,7 +1181,7 @@ define <16 x half> @sin_v16f16(<16 x half> %a) {
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: fcvt s1, h13
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #112] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #128] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: ldr q1, [sp, #80] // 16-byte Folded Reload
Expand Down Expand Up @@ -1231,7 +1232,7 @@ define <16 x half> @sin_v16f16(<16 x half> %a) {
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl sinf
; CHECK-GI-NEXT: ldr q3, [sp, #192] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr q2, [sp, #128] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr q2, [sp, #112] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldp x29, x30, [sp, #304] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v3.h[1], v2.h[0]
; CHECK-GI-NEXT: ldp q1, q2, [sp] // 32-byte Folded Reload
Expand All @@ -1257,7 +1258,7 @@ define <16 x half> @sin_v16f16(<16 x half> %a) {
; CHECK-GI-NEXT: ldr q2, [sp, #96] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[5], v2.h[0]
; CHECK-GI-NEXT: fcvt h2, s0
; CHECK-GI-NEXT: ldr q0, [sp, #112] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr q0, [sp, #128] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v3.h[6], v0.h[0]
; CHECK-GI-NEXT: ldr q0, [sp, #160] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[6], v0.h[0]
Expand Down Expand Up @@ -1948,12 +1949,12 @@ define <7 x half> @cos_v7f16(<7 x half> %a) {
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: fcvt s1, h9
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #64] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #48] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: fcvt s1, h10
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #48] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #64] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: fcvt s1, h11
Expand All @@ -1971,18 +1972,19 @@ define <7 x half> @cos_v7f16(<7 x half> %a) {
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: ldp q2, q1, [sp, #64] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldp q3, q2, [sp, #48] // 32-byte Folded Reload
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: ldr q1, [sp, #80] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldp d9, d8, [sp, #128] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #144] // 8-byte Folded Reload
; CHECK-GI-NEXT: ldp d11, d10, [sp, #112] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp, #32] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #144] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v3.h[0]
; CHECK-GI-NEXT: ldp d13, d12, [sp, #96] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[2], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[3], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp] // 32-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[4], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[2], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp, #16] // 32-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[3], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[4], v2.h[0]
; CHECK-GI-NEXT: ldr q2, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[5], v2.h[0]
; CHECK-GI-NEXT: mov v1.h[6], v0.h[0]
; CHECK-GI-NEXT: mov v0.16b, v1.16b
Expand Down Expand Up @@ -2059,21 +2061,21 @@ define <4 x half> @cos_v4f16(<4 x half> %a) {
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: fcvt s1, h9
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: fcvt s1, h10
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: ldp q2, q1, [sp, #16] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldp q3, q2, [sp] // 32-byte Folded Reload
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: ldr q1, [sp, #32] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldp d9, d8, [sp, #56] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #72] // 8-byte Folded Reload
; CHECK-GI-NEXT: ldr d10, [sp, #48] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: ldr q2, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[2], v2.h[0]
; CHECK-GI-NEXT: mov v1.h[3], v0.h[0]
; CHECK-GI-NEXT: mov v0.16b, v1.16b
Expand Down Expand Up @@ -2189,12 +2191,12 @@ define <8 x half> @cos_v8f16(<8 x half> %a) {
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: fcvt s1, h9
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #80] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #64] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: fcvt s1, h10
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #64] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #80] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: fcvt s1, h11
Expand All @@ -2217,21 +2219,21 @@ define <8 x half> @cos_v8f16(<8 x half> %a) {
; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: ldp q2, q1, [sp, #80] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldp q3, q2, [sp, #64] // 32-byte Folded Reload
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: ldr q1, [sp, #96] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldp d9, d8, [sp, #152] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #168] // 8-byte Folded Reload
; CHECK-GI-NEXT: ldp d11, d10, [sp, #136] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr x30, [sp, #168] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v3.h[0]
; CHECK-GI-NEXT: ldr d14, [sp, #112] // 8-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp, #48] // 32-byte Folded Reload
; CHECK-GI-NEXT: ldp d13, d12, [sp, #120] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[2], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[3], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp, #16] // 32-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[4], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[5], v2.h[0]
; CHECK-GI-NEXT: ldr q2, [sp] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[2], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp, #32] // 32-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[3], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[4], v2.h[0]
; CHECK-GI-NEXT: ldp q2, q3, [sp] // 32-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[5], v3.h[0]
; CHECK-GI-NEXT: mov v1.h[6], v2.h[0]
; CHECK-GI-NEXT: mov v1.h[7], v0.h[0]
; CHECK-GI-NEXT: mov v0.16b, v1.16b
Expand Down Expand Up @@ -2425,7 +2427,7 @@ define <16 x half> @cos_v16f16(<16 x half> %a) {
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: fcvt s1, h8
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #128] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #112] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: fcvt s1, h9
Expand All @@ -2450,7 +2452,7 @@ define <16 x half> @cos_v16f16(<16 x half> %a) {
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: fcvt s1, h13
; CHECK-GI-NEXT: fcvt h0, s0
; CHECK-GI-NEXT: str q0, [sp, #112] // 16-byte Folded Spill
; CHECK-GI-NEXT: str q0, [sp, #128] // 16-byte Folded Spill
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: ldr q1, [sp, #80] // 16-byte Folded Reload
Expand Down Expand Up @@ -2501,7 +2503,7 @@ define <16 x half> @cos_v16f16(<16 x half> %a) {
; CHECK-GI-NEXT: fmov s0, s1
; CHECK-GI-NEXT: bl cosf
; CHECK-GI-NEXT: ldr q3, [sp, #192] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr q2, [sp, #128] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr q2, [sp, #112] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldp x29, x30, [sp, #304] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v3.h[1], v2.h[0]
; CHECK-GI-NEXT: ldp q1, q2, [sp] // 32-byte Folded Reload
Expand All @@ -2527,7 +2529,7 @@ define <16 x half> @cos_v16f16(<16 x half> %a) {
; CHECK-GI-NEXT: ldr q2, [sp, #96] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[5], v2.h[0]
; CHECK-GI-NEXT: fcvt h2, s0
; CHECK-GI-NEXT: ldr q0, [sp, #112] // 16-byte Folded Reload
; CHECK-GI-NEXT: ldr q0, [sp, #128] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v3.h[6], v0.h[0]
; CHECK-GI-NEXT: ldr q0, [sp, #160] // 16-byte Folded Reload
; CHECK-GI-NEXT: mov v1.h[6], v0.h[0]
Expand Down
32 changes: 13 additions & 19 deletions llvm/test/CodeGen/AArch64/fsqrt.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -196,27 +196,21 @@ define <7 x half> @sqrt_v7f16(<7 x half> %a) {
; CHECK-GI-NOFP16-LABEL: sqrt_v7f16:
; CHECK-GI-NOFP16: // %bb.0: // %entry
; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[4]
; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[5]
; CHECK-GI-NOFP16-NEXT: mov h0, v0.h[6]
; CHECK-GI-NOFP16-NEXT: mov v2.h[0], v0.h[4]
; CHECK-GI-NOFP16-NEXT: fsqrt v1.4s, v1.4s
; CHECK-GI-NOFP16-NEXT: mov v2.h[1], v3.h[0]
; CHECK-GI-NOFP16-NEXT: mov v2.h[2], v0.h[0]
; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v2.4h
; CHECK-GI-NOFP16-NEXT: fcvtn v0.4h, v1.4s
; CHECK-GI-NOFP16-NEXT: fsqrt v1.4s, v2.4s
; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[1]
; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[2]
; CHECK-GI-NOFP16-NEXT: mov h4, v0.h[3]
; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v2.h[0]
; CHECK-GI-NOFP16-NEXT: mov v0.h[2], v3.h[0]
; CHECK-GI-NOFP16-NEXT: mov v2.h[1], v0.h[5]
; CHECK-GI-NOFP16-NEXT: mov v2.h[2], v0.h[6]
; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v2.4h
; CHECK-GI-NOFP16-NEXT: fcvtn v1.4h, v1.4s
; CHECK-GI-NOFP16-NEXT: mov v0.h[3], v4.h[0]
; CHECK-GI-NOFP16-NEXT: mov h2, v1.h[1]
; CHECK-GI-NOFP16-NEXT: mov v0.h[4], v1.h[0]
; CHECK-GI-NOFP16-NEXT: mov h1, v1.h[2]
; CHECK-GI-NOFP16-NEXT: mov v0.h[5], v2.h[0]
; CHECK-GI-NOFP16-NEXT: mov v0.h[6], v1.h[0]
; CHECK-GI-NOFP16-NEXT: fsqrt v2.4s, v0.4s
; CHECK-GI-NOFP16-NEXT: mov v0.h[0], v1.h[0]
; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v1.h[1]
; CHECK-GI-NOFP16-NEXT: mov v0.h[2], v1.h[2]
; CHECK-GI-NOFP16-NEXT: fcvtn v2.4h, v2.4s
; CHECK-GI-NOFP16-NEXT: mov v0.h[3], v1.h[3]
; CHECK-GI-NOFP16-NEXT: mov v0.h[4], v2.h[0]
; CHECK-GI-NOFP16-NEXT: mov v0.h[5], v2.h[1]
; CHECK-GI-NOFP16-NEXT: mov v0.h[6], v2.h[2]
; CHECK-GI-NOFP16-NEXT: ret
;
; CHECK-GI-FP16-LABEL: sqrt_v7f16:
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/AArch64/icmp.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1228,18 +1228,18 @@ define <3 x i32> @v3i32_i32(<3 x i32> %a, <3 x i32> %b, <3 x i32> %d, <3 x i32>
; CHECK-GI-LABEL: v3i32_i32:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: mov w8, #31 // =0x1f
; CHECK-GI-NEXT: mov w9, #-1 // =0xffffffff
; CHECK-GI-NEXT: cmgt v0.4s, v1.4s, v0.4s
; CHECK-GI-NEXT: fmov s4, w8
; CHECK-GI-NEXT: mov v4.s[0], w8
; CHECK-GI-NEXT: mov v5.s[0], w9
; CHECK-GI-NEXT: mov v4.s[1], w8
; CHECK-GI-NEXT: mov v5.s[1], w9
; CHECK-GI-NEXT: mov v4.s[2], w8
; CHECK-GI-NEXT: mov w8, #-1 // =0xffffffff
; CHECK-GI-NEXT: fmov s1, w8
; CHECK-GI-NEXT: mov v1.s[1], w8
; CHECK-GI-NEXT: mov v5.s[2], w9
; CHECK-GI-NEXT: ushl v0.4s, v0.4s, v4.4s
; CHECK-GI-NEXT: neg v4.4s, v4.4s
; CHECK-GI-NEXT: sshl v0.4s, v0.4s, v4.4s
; CHECK-GI-NEXT: mov v1.s[2], w8
; CHECK-GI-NEXT: eor v1.16b, v0.16b, v1.16b
; CHECK-GI-NEXT: neg v1.4s, v4.4s
; CHECK-GI-NEXT: sshl v0.4s, v0.4s, v1.4s
; CHECK-GI-NEXT: eor v1.16b, v0.16b, v5.16b
; CHECK-GI-NEXT: and v0.16b, v2.16b, v0.16b
; CHECK-GI-NEXT: and v1.16b, v3.16b, v1.16b
; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
Expand Down
47 changes: 18 additions & 29 deletions llvm/test/CodeGen/AArch64/insertextract.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -250,23 +250,13 @@ entry:
}

define <3 x float> @insert_v3f32_0(<3 x float> %a, float %b, i32 %c) {
; CHECK-SD-LABEL: insert_v3f32_0:
; CHECK-SD: // %bb.0: // %entry
; CHECK-SD-NEXT: // kill: def $s1 killed $s1 def $q1
; CHECK-SD-NEXT: mov v1.s[1], v0.s[1]
; CHECK-SD-NEXT: mov v1.s[2], v0.s[2]
; CHECK-SD-NEXT: mov v0.16b, v1.16b
; CHECK-SD-NEXT: ret
;
; CHECK-GI-LABEL: insert_v3f32_0:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: mov s2, v0.s[1]
; CHECK-GI-NEXT: // kill: def $s1 killed $s1 def $q1
; CHECK-GI-NEXT: mov s0, v0.s[2]
; CHECK-GI-NEXT: mov v1.s[1], v2.s[0]
; CHECK-GI-NEXT: mov v1.s[2], v0.s[0]
; CHECK-GI-NEXT: mov v0.16b, v1.16b
; CHECK-GI-NEXT: ret
; CHECK-LABEL: insert_v3f32_0:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: // kill: def $s1 killed $s1 def $q1
; CHECK-NEXT: mov v1.s[1], v0.s[1]
; CHECK-NEXT: mov v1.s[2], v0.s[2]
; CHECK-NEXT: mov v0.16b, v1.16b
; CHECK-NEXT: ret
entry:
%d = insertelement <3 x float> %a, float %b, i32 0
ret <3 x float> %d
Expand All @@ -281,10 +271,11 @@ define <3 x float> @insert_v3f32_2(<3 x float> %a, float %b, i32 %c) {
;
; CHECK-GI-LABEL: insert_v3f32_2:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: mov s2, v0.s[1]
; CHECK-GI-NEXT: mov v2.s[0], v0.s[0]
; CHECK-GI-NEXT: // kill: def $s1 killed $s1 def $q1
; CHECK-GI-NEXT: mov v0.s[1], v2.s[0]
; CHECK-GI-NEXT: mov v0.s[2], v1.s[0]
; CHECK-GI-NEXT: mov v2.s[1], v0.s[1]
; CHECK-GI-NEXT: mov v2.s[2], v1.s[0]
; CHECK-GI-NEXT: mov v0.16b, v2.16b
; CHECK-GI-NEXT: ret
entry:
%d = insertelement <3 x float> %a, float %b, i32 2
Expand Down Expand Up @@ -983,11 +974,9 @@ define <3 x i32> @insert_v3i32_0(<3 x i32> %a, i32 %b, i32 %c) {
;
; CHECK-GI-LABEL: insert_v3i32_0:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: mov w8, v0.s[1]
; CHECK-GI-NEXT: fmov s1, w0
; CHECK-GI-NEXT: mov w9, v0.s[2]
; CHECK-GI-NEXT: mov v1.s[1], w8
; CHECK-GI-NEXT: mov v1.s[2], w9
; CHECK-GI-NEXT: mov v1.s[0], w0
; CHECK-GI-NEXT: mov v1.s[1], v0.s[1]
; CHECK-GI-NEXT: mov v1.s[2], v0.s[2]
; CHECK-GI-NEXT: mov v0.16b, v1.16b
; CHECK-GI-NEXT: ret
entry:
Expand All @@ -1003,10 +992,10 @@ define <3 x i32> @insert_v3i32_2(<3 x i32> %a, i32 %b, i32 %c) {
;
; CHECK-GI-LABEL: insert_v3i32_2:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: mov s1, v0.s[1]
; CHECK-GI-NEXT: mov v0.s[1], v1.s[0]
; CHECK-GI-NEXT: fmov s1, w0
; CHECK-GI-NEXT: mov v0.s[2], v1.s[0]
; CHECK-GI-NEXT: mov v1.s[0], v0.s[0]
; CHECK-GI-NEXT: mov v1.s[1], v0.s[1]
; CHECK-GI-NEXT: mov v1.s[2], w0
; CHECK-GI-NEXT: mov v0.16b, v1.16b
; CHECK-GI-NEXT: ret
entry:
%d = insertelement <3 x i32> %a, i32 %b, i32 2
Expand Down
180 changes: 82 additions & 98 deletions llvm/test/CodeGen/AArch64/itofp.ll
View file

Large diffs are not rendered by default.

10 changes: 5 additions & 5 deletions llvm/test/CodeGen/AArch64/llvm.exp10.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -267,21 +267,21 @@ define <4 x half> @exp10_v4f16(<4 x half> %x) {
; GISEL-NEXT: bl exp10f
; GISEL-NEXT: fcvt s1, h9
; GISEL-NEXT: fcvt h0, s0
; GISEL-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; GISEL-NEXT: str q0, [sp] // 16-byte Folded Spill
; GISEL-NEXT: fmov s0, s1
; GISEL-NEXT: bl exp10f
; GISEL-NEXT: fcvt s1, h10
; GISEL-NEXT: fcvt h0, s0
; GISEL-NEXT: str q0, [sp] // 16-byte Folded Spill
; GISEL-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; GISEL-NEXT: fmov s0, s1
; GISEL-NEXT: bl exp10f
; GISEL-NEXT: ldp q2, q1, [sp, #16] // 32-byte Folded Reload
; GISEL-NEXT: ldp q3, q2, [sp] // 32-byte Folded Reload
; GISEL-NEXT: fcvt h0, s0
; GISEL-NEXT: ldr q1, [sp, #32] // 16-byte Folded Reload
; GISEL-NEXT: ldp d9, d8, [sp, #56] // 16-byte Folded Reload
; GISEL-NEXT: ldr x30, [sp, #72] // 8-byte Folded Reload
; GISEL-NEXT: ldr d10, [sp, #48] // 8-byte Folded Reload
; GISEL-NEXT: mov v1.h[1], v2.h[0]
; GISEL-NEXT: ldr q2, [sp] // 16-byte Folded Reload
; GISEL-NEXT: mov v1.h[1], v3.h[0]
; GISEL-NEXT: mov v1.h[2], v2.h[0]
; GISEL-NEXT: mov v1.h[3], v0.h[0]
; GISEL-NEXT: mov v0.16b, v1.16b
Expand Down
48 changes: 25 additions & 23 deletions llvm/test/CodeGen/AArch64/load.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -118,7 +118,7 @@ define <2 x i8> @load_v2i8(ptr %ptr, <2 x i8> %b){
;
; CHECK-GI-LABEL: load_v2i8:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: ldr b0, [x0]
; CHECK-GI-NEXT: ld1 { v0.b }[0], [x0]
; CHECK-GI-NEXT: ldr b1, [x0, #1]
; CHECK-GI-NEXT: mov v0.s[1], v1.s[0]
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
Expand Down Expand Up @@ -158,8 +158,8 @@ define <2 x i16> @load_v2i16(ptr %ptr){
; CHECK-GI-LABEL: load_v2i16:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: ldr h0, [x0]
; CHECK-GI-NEXT: ldr h1, [x0, #2]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: add x8, x0, #2
; CHECK-GI-NEXT: ld1 { v0.h }[1], [x8]
; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
Expand Down Expand Up @@ -235,6 +235,7 @@ define <7 x i8> @load_v7i8(ptr %ptr){
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: ldr b0, [x0]
; CHECK-GI-NEXT: ldr b1, [x0, #1]
; CHECK-GI-NEXT: mov v0.b[0], v0.b[0]
; CHECK-GI-NEXT: mov v0.b[1], v1.b[0]
; CHECK-GI-NEXT: ldr b1, [x0, #2]
; CHECK-GI-NEXT: mov v0.b[2], v1.b[0]
Expand All @@ -261,10 +262,10 @@ define <3 x i16> @load_v3i16(ptr %ptr){
; CHECK-GI-LABEL: load_v3i16:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: ldr h0, [x0]
; CHECK-GI-NEXT: ldr h1, [x0, #2]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: ldr h1, [x0, #4]
; CHECK-GI-NEXT: mov v0.h[2], v1.h[0]
; CHECK-GI-NEXT: add x8, x0, #2
; CHECK-GI-NEXT: ld1 { v0.h }[1], [x8]
; CHECK-GI-NEXT: add x8, x0, #4
; CHECK-GI-NEXT: ld1 { v0.h }[2], [x8]
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
%a = load <3 x i16>, ptr %ptr
Expand All @@ -280,18 +281,18 @@ define <7 x i16> @load_v7i16(ptr %ptr){
; CHECK-GI-LABEL: load_v7i16:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: ldr h0, [x0]
; CHECK-GI-NEXT: ldr h1, [x0, #2]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: ldr h1, [x0, #4]
; CHECK-GI-NEXT: mov v0.h[2], v1.h[0]
; CHECK-GI-NEXT: ldr h1, [x0, #6]
; CHECK-GI-NEXT: mov v0.h[3], v1.h[0]
; CHECK-GI-NEXT: ldr h1, [x0, #8]
; CHECK-GI-NEXT: mov v0.h[4], v1.h[0]
; CHECK-GI-NEXT: ldr h1, [x0, #10]
; CHECK-GI-NEXT: mov v0.h[5], v1.h[0]
; CHECK-GI-NEXT: ldr h1, [x0, #12]
; CHECK-GI-NEXT: mov v0.h[6], v1.h[0]
; CHECK-GI-NEXT: add x8, x0, #2
; CHECK-GI-NEXT: ld1 { v0.h }[1], [x8]
; CHECK-GI-NEXT: add x8, x0, #4
; CHECK-GI-NEXT: ld1 { v0.h }[2], [x8]
; CHECK-GI-NEXT: add x8, x0, #6
; CHECK-GI-NEXT: ld1 { v0.h }[3], [x8]
; CHECK-GI-NEXT: add x8, x0, #8
; CHECK-GI-NEXT: ld1 { v0.h }[4], [x8]
; CHECK-GI-NEXT: add x8, x0, #10
; CHECK-GI-NEXT: ld1 { v0.h }[5], [x8]
; CHECK-GI-NEXT: add x8, x0, #12
; CHECK-GI-NEXT: ld1 { v0.h }[6], [x8]
; CHECK-GI-NEXT: ret
%a = load <7 x i16>, ptr %ptr
ret <7 x i16> %a
Expand All @@ -305,10 +306,11 @@ define <3 x i32> @load_v3i32(ptr %ptr){
;
; CHECK-GI-LABEL: load_v3i32:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: ldp s0, s1, [x0]
; CHECK-GI-NEXT: mov v0.s[1], v1.s[0]
; CHECK-GI-NEXT: ldr s1, [x0, #8]
; CHECK-GI-NEXT: mov v0.s[2], v1.s[0]
; CHECK-GI-NEXT: ldr s0, [x0]
; CHECK-GI-NEXT: add x8, x0, #4
; CHECK-GI-NEXT: ld1 { v0.s }[1], [x8]
; CHECK-GI-NEXT: add x8, x0, #8
; CHECK-GI-NEXT: ld1 { v0.s }[2], [x8]
; CHECK-GI-NEXT: ret
%a = load <3 x i32>, ptr %ptr
ret <3 x i32> %a
Expand Down
134 changes: 64 additions & 70 deletions llvm/test/CodeGen/AArch64/mul.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -83,13 +83,13 @@ define void @v2i8(ptr %p1, ptr %p2) {
;
; CHECK-GI-LABEL: v2i8:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: ldr b0, [x0]
; CHECK-GI-NEXT: ldr b1, [x0, #1]
; CHECK-GI-NEXT: ldr b2, [x1]
; CHECK-GI-NEXT: ld1 { v0.b }[0], [x0]
; CHECK-GI-NEXT: ld1 { v1.b }[0], [x1]
; CHECK-GI-NEXT: ldr b2, [x0, #1]
; CHECK-GI-NEXT: ldr b3, [x1, #1]
; CHECK-GI-NEXT: mov v0.s[1], v1.s[0]
; CHECK-GI-NEXT: mov v2.s[1], v3.s[0]
; CHECK-GI-NEXT: mul v0.2s, v0.2s, v2.2s
; CHECK-GI-NEXT: mov v0.s[1], v2.s[0]
; CHECK-GI-NEXT: mov v1.s[1], v3.s[0]
; CHECK-GI-NEXT: mul v0.2s, v0.2s, v1.2s
; CHECK-GI-NEXT: mov s1, v0.s[1]
; CHECK-GI-NEXT: str b0, [x0]
; CHECK-GI-NEXT: str b1, [x0, #1]
Expand Down Expand Up @@ -124,22 +124,18 @@ define void @v3i8(ptr %p1, ptr %p2) {
; CHECK-GI-LABEL: v3i8:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: ldrb w8, [x0]
; CHECK-GI-NEXT: ldrb w9, [x0, #1]
; CHECK-GI-NEXT: ldrb w10, [x1]
; CHECK-GI-NEXT: ldrb w9, [x1]
; CHECK-GI-NEXT: ldrb w10, [x0, #1]
; CHECK-GI-NEXT: ldrb w11, [x1, #1]
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: fmov s1, w9
; CHECK-GI-NEXT: fmov s2, w10
; CHECK-GI-NEXT: fmov s3, w11
; CHECK-GI-NEXT: ldrb w8, [x0, #2]
; CHECK-GI-NEXT: ldrb w9, [x1, #2]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: fmov s1, w8
; CHECK-GI-NEXT: mov v2.h[1], v3.h[0]
; CHECK-GI-NEXT: fmov s3, w9
; CHECK-GI-NEXT: mov v0.h[2], v1.h[0]
; CHECK-GI-NEXT: mov v2.h[2], v3.h[0]
; CHECK-GI-NEXT: mul v0.4h, v0.4h, v2.4h
; CHECK-GI-NEXT: mov v0.h[1], w10
; CHECK-GI-NEXT: mov v1.h[1], w11
; CHECK-GI-NEXT: mov v0.h[2], w8
; CHECK-GI-NEXT: mov v1.h[2], w9
; CHECK-GI-NEXT: mul v0.4h, v0.4h, v1.4h
; CHECK-GI-NEXT: mov h1, v0.h[1]
; CHECK-GI-NEXT: mov h2, v0.h[2]
; CHECK-GI-NEXT: str b0, [x0]
Expand Down Expand Up @@ -171,27 +167,27 @@ define void @v4i8(ptr %p1, ptr %p2) {
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: fmov s1, w9
; CHECK-GI-NEXT: mov b2, v0.b[1]
; CHECK-GI-NEXT: mov b3, v1.b[1]
; CHECK-GI-NEXT: mov b4, v0.b[2]
; CHECK-GI-NEXT: mov b5, v0.b[3]
; CHECK-GI-NEXT: mov b6, v1.b[3]
; CHECK-GI-NEXT: mov v0.b[1], v2.b[0]
; CHECK-GI-NEXT: mov b2, v1.b[2]
; CHECK-GI-NEXT: mov v1.b[1], v3.b[0]
; CHECK-GI-NEXT: mov v0.b[2], v4.b[0]
; CHECK-GI-NEXT: mov v1.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v0.b[3], v5.b[0]
; CHECK-GI-NEXT: mov v1.b[3], v6.b[0]
; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0
; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #0
; CHECK-GI-NEXT: mov v3.b[0], v0.b[0]
; CHECK-GI-NEXT: mov b4, v1.b[1]
; CHECK-GI-NEXT: mov v5.b[0], v1.b[0]
; CHECK-GI-NEXT: mov v3.b[1], v2.b[0]
; CHECK-GI-NEXT: mov b2, v0.b[2]
; CHECK-GI-NEXT: mov b0, v0.b[3]
; CHECK-GI-NEXT: mov v5.b[1], v4.b[0]
; CHECK-GI-NEXT: mov b4, v1.b[2]
; CHECK-GI-NEXT: mov b1, v1.b[3]
; CHECK-GI-NEXT: mov v3.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v5.b[2], v4.b[0]
; CHECK-GI-NEXT: mov v3.b[3], v0.b[0]
; CHECK-GI-NEXT: mov v5.b[3], v1.b[0]
; CHECK-GI-NEXT: ushll v0.8h, v3.8b, #0
; CHECK-GI-NEXT: ushll v1.8h, v5.8b, #0
; CHECK-GI-NEXT: mul v0.4h, v0.4h, v1.4h
; CHECK-GI-NEXT: mov h1, v0.h[1]
; CHECK-GI-NEXT: mov h2, v0.h[2]
; CHECK-GI-NEXT: mov h3, v0.h[3]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: mov v0.h[2], v2.h[0]
; CHECK-GI-NEXT: mov v0.h[3], v3.h[0]
; CHECK-GI-NEXT: xtn v0.8b, v0.8h
; CHECK-GI-NEXT: mov v1.h[0], v0.h[0]
; CHECK-GI-NEXT: mov v1.h[1], v0.h[1]
; CHECK-GI-NEXT: mov v1.h[2], v0.h[2]
; CHECK-GI-NEXT: mov v1.h[3], v0.h[3]
; CHECK-GI-NEXT: xtn v0.8b, v1.8h
; CHECK-GI-NEXT: fmov w8, s0
; CHECK-GI-NEXT: str w8, [x0]
; CHECK-GI-NEXT: ret
Expand Down Expand Up @@ -259,13 +255,13 @@ define void @v2i16(ptr %p1, ptr %p2) {
; CHECK-GI-LABEL: v2i16:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: ldr h0, [x0]
; CHECK-GI-NEXT: ldr h1, [x0, #2]
; CHECK-GI-NEXT: ldr h2, [x1]
; CHECK-GI-NEXT: ldr h3, [x1, #2]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: mov v2.h[1], v3.h[0]
; CHECK-GI-NEXT: ldr h1, [x1]
; CHECK-GI-NEXT: add x8, x0, #2
; CHECK-GI-NEXT: add x9, x1, #2
; CHECK-GI-NEXT: ld1 { v0.h }[1], [x8]
; CHECK-GI-NEXT: ld1 { v1.h }[1], [x9]
; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0
; CHECK-GI-NEXT: ushll v1.4s, v2.4h, #0
; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0
; CHECK-GI-NEXT: mul v0.2s, v0.2s, v1.2s
; CHECK-GI-NEXT: mov s1, v0.s[1]
; CHECK-GI-NEXT: str h0, [x0]
Expand Down Expand Up @@ -293,18 +289,16 @@ define void @v3i16(ptr %p1, ptr %p2) {
; CHECK-GI-LABEL: v3i16:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: ldr h0, [x0]
; CHECK-GI-NEXT: ldr h1, [x0, #2]
; CHECK-GI-NEXT: ldr h1, [x1]
; CHECK-GI-NEXT: add x8, x0, #2
; CHECK-GI-NEXT: ldr h2, [x1]
; CHECK-GI-NEXT: ldr h3, [x1, #2]
; CHECK-GI-NEXT: add x9, x1, #2
; CHECK-GI-NEXT: add x10, x1, #4
; CHECK-GI-NEXT: ld1 { v0.h }[1], [x8]
; CHECK-GI-NEXT: ld1 { v1.h }[1], [x9]
; CHECK-GI-NEXT: add x9, x0, #4
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: ldr h1, [x0, #4]
; CHECK-GI-NEXT: mov v2.h[1], v3.h[0]
; CHECK-GI-NEXT: ldr h3, [x1, #4]
; CHECK-GI-NEXT: mov v0.h[2], v1.h[0]
; CHECK-GI-NEXT: mov v2.h[2], v3.h[0]
; CHECK-GI-NEXT: mul v0.4h, v0.4h, v2.4h
; CHECK-GI-NEXT: ld1 { v0.h }[2], [x9]
; CHECK-GI-NEXT: ld1 { v1.h }[2], [x10]
; CHECK-GI-NEXT: mul v0.4h, v0.4h, v1.4h
; CHECK-GI-NEXT: str h0, [x0]
; CHECK-GI-NEXT: st1 { v0.h }[1], [x8]
; CHECK-GI-NEXT: st1 { v0.h }[2], [x9]
Expand Down Expand Up @@ -416,14 +410,14 @@ define <2 x i64> @v2i64(<2 x i64> %d, <2 x i64> %e) {
;
; CHECK-GI-LABEL: v2i64:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: fmov x10, d0
; CHECK-GI-NEXT: fmov x11, d1
; CHECK-GI-NEXT: mov x8, v0.d[1]
; CHECK-GI-NEXT: mov x9, v1.d[1]
; CHECK-GI-NEXT: mul x10, x10, x11
; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: fmov x9, d1
; CHECK-GI-NEXT: mov x10, v0.d[1]
; CHECK-GI-NEXT: mov x11, v1.d[1]
; CHECK-GI-NEXT: mul x8, x8, x9
; CHECK-GI-NEXT: fmov d0, x10
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: mul x9, x10, x11
; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: mov v0.d[1], x9
; CHECK-GI-NEXT: ret
entry:
%s = mul <2 x i64> %d, %e
Expand Down Expand Up @@ -461,16 +455,16 @@ define <3 x i64> @v3i64(<3 x i64> %d, <3 x i64> %e) {
; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4
; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
; CHECK-GI-NEXT: mov v3.d[1], v4.d[0]
; CHECK-GI-NEXT: fmov x10, d0
; CHECK-GI-NEXT: fmov x11, d3
; CHECK-GI-NEXT: mov x8, v0.d[1]
; CHECK-GI-NEXT: mov x9, v3.d[1]
; CHECK-GI-NEXT: mul x10, x10, x11
; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: fmov x9, d3
; CHECK-GI-NEXT: mov x10, v0.d[1]
; CHECK-GI-NEXT: mov x11, v3.d[1]
; CHECK-GI-NEXT: mul x8, x8, x9
; CHECK-GI-NEXT: fmov x9, d5
; CHECK-GI-NEXT: fmov d0, x10
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: mul x9, x10, x11
; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: fmov x8, d2
; CHECK-GI-NEXT: mov v0.d[1], x9
; CHECK-GI-NEXT: fmov x9, d5
; CHECK-GI-NEXT: mul x8, x8, x9
; CHECK-GI-NEXT: mov d1, v0.d[1]
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
Expand Down Expand Up @@ -515,10 +509,10 @@ define <4 x i64> @v4i64(<4 x i64> %d, <4 x i64> %e) {
; CHECK-GI-NEXT: fmov x9, d1
; CHECK-GI-NEXT: mul x10, x10, x11
; CHECK-GI-NEXT: mul x9, x9, x12
; CHECK-GI-NEXT: fmov d0, x8
; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: mul x11, x13, x14
; CHECK-GI-NEXT: mov v1.d[0], x9
; CHECK-GI-NEXT: mov v0.d[1], x10
; CHECK-GI-NEXT: fmov d1, x9
; CHECK-GI-NEXT: mov v1.d[1], x11
; CHECK-GI-NEXT: ret
entry:
Expand Down
34 changes: 14 additions & 20 deletions llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1120,12 +1120,10 @@ define <4 x i16> @vselect_constant_cond_zero_v4i16(<4 x i16> %a) {
; CHECK-GI-NEXT: mov w8, #1 // =0x1
; CHECK-GI-NEXT: mov w9, #0 // =0x0
; CHECK-GI-NEXT: fmov s1, w8
; CHECK-GI-NEXT: fmov s2, w9
; CHECK-GI-NEXT: mov v3.16b, v1.16b
; CHECK-GI-NEXT: mov v3.b[1], v2.b[0]
; CHECK-GI-NEXT: mov v3.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v3.b[3], v1.b[0]
; CHECK-GI-NEXT: ushll v1.8h, v3.8b, #0
; CHECK-GI-NEXT: mov v1.b[1], w9
; CHECK-GI-NEXT: mov v1.b[2], w9
; CHECK-GI-NEXT: mov v1.b[3], w8
; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #0
; CHECK-GI-NEXT: shl v1.4h, v1.4h, #15
; CHECK-GI-NEXT: sshr v1.4h, v1.4h, #15
; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b
Expand All @@ -1148,10 +1146,9 @@ define <4 x i32> @vselect_constant_cond_zero_v4i32(<4 x i32> %a) {
; CHECK-GI-NEXT: mov w9, #0 // =0x0
; CHECK-GI-NEXT: fmov s1, w8
; CHECK-GI-NEXT: fmov s2, w9
; CHECK-GI-NEXT: mov v3.16b, v1.16b
; CHECK-GI-NEXT: mov v3.h[1], v2.h[0]
; CHECK-GI-NEXT: mov v2.h[1], v1.h[0]
; CHECK-GI-NEXT: ushll v1.4s, v3.4h, #0
; CHECK-GI-NEXT: mov v2.h[1], w8
; CHECK-GI-NEXT: mov v1.h[1], w9
; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0
; CHECK-GI-NEXT: ushll v2.4s, v2.4h, #0
; CHECK-GI-NEXT: mov v1.d[1], v2.d[0]
; CHECK-GI-NEXT: shl v1.4s, v1.4s, #31
Expand Down Expand Up @@ -1199,12 +1196,10 @@ define <4 x i16> @vselect_constant_cond_v4i16(<4 x i16> %a, <4 x i16> %b) {
; CHECK-GI-NEXT: mov w8, #1 // =0x1
; CHECK-GI-NEXT: mov w9, #0 // =0x0
; CHECK-GI-NEXT: fmov s2, w8
; CHECK-GI-NEXT: fmov s3, w9
; CHECK-GI-NEXT: mov v4.16b, v2.16b
; CHECK-GI-NEXT: mov v4.b[1], v3.b[0]
; CHECK-GI-NEXT: mov v4.b[2], v3.b[0]
; CHECK-GI-NEXT: mov v4.b[3], v2.b[0]
; CHECK-GI-NEXT: ushll v2.8h, v4.8b, #0
; CHECK-GI-NEXT: mov v2.b[1], w9
; CHECK-GI-NEXT: mov v2.b[2], w9
; CHECK-GI-NEXT: mov v2.b[3], w8
; CHECK-GI-NEXT: ushll v2.8h, v2.8b, #0
; CHECK-GI-NEXT: shl v2.4h, v2.4h, #15
; CHECK-GI-NEXT: sshr v2.4h, v2.4h, #15
; CHECK-GI-NEXT: bif v0.8b, v1.8b, v2.8b
Expand All @@ -1227,10 +1222,9 @@ define <4 x i32> @vselect_constant_cond_v4i32(<4 x i32> %a, <4 x i32> %b) {
; CHECK-GI-NEXT: mov w9, #0 // =0x0
; CHECK-GI-NEXT: fmov s2, w8
; CHECK-GI-NEXT: fmov s3, w9
; CHECK-GI-NEXT: mov v4.16b, v2.16b
; CHECK-GI-NEXT: mov v4.h[1], v3.h[0]
; CHECK-GI-NEXT: mov v3.h[1], v2.h[0]
; CHECK-GI-NEXT: ushll v2.4s, v4.4h, #0
; CHECK-GI-NEXT: mov v3.h[1], w8
; CHECK-GI-NEXT: mov v2.h[1], w9
; CHECK-GI-NEXT: ushll v2.4s, v2.4h, #0
; CHECK-GI-NEXT: ushll v3.4s, v3.4h, #0
; CHECK-GI-NEXT: mov v2.d[1], v3.d[0]
; CHECK-GI-NEXT: shl v2.4s, v2.4s, #31
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2674,10 +2674,10 @@ define <4 x i32> @fcmal4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK-GI-NEXT: mov w8, #1 // =0x1
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: mov v1.16b, v0.16b
; CHECK-GI-NEXT: mov v1.h[1], v0.h[0]
; CHECK-GI-NEXT: mov v0.h[1], v0.h[0]
; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0
; CHECK-GI-NEXT: mov v0.h[1], w8
; CHECK-GI-NEXT: mov v1.h[1], w8
; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0
; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0
; CHECK-GI-NEXT: mov v1.d[1], v0.d[0]
; CHECK-GI-NEXT: shl v0.4s, v1.4s, #31
; CHECK-GI-NEXT: sshr v0.4s, v0.4s, #31
Expand Down Expand Up @@ -2725,10 +2725,10 @@ define <4 x i32> @fcmnv4xfloat(<4 x float> %A, <4 x float> %B) {
; CHECK-GI-NEXT: mov w8, #0 // =0x0
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: mov v1.16b, v0.16b
; CHECK-GI-NEXT: mov v1.h[1], v0.h[0]
; CHECK-GI-NEXT: mov v0.h[1], v0.h[0]
; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0
; CHECK-GI-NEXT: mov v0.h[1], w8
; CHECK-GI-NEXT: mov v1.h[1], w8
; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0
; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0
; CHECK-GI-NEXT: mov v1.d[1], v0.d[0]
; CHECK-GI-NEXT: shl v0.4s, v1.4s, #31
; CHECK-GI-NEXT: sshr v0.4s, v0.4s, #31
Expand Down
358 changes: 150 additions & 208 deletions llvm/test/CodeGen/AArch64/neon-extadd.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1266,133 +1266,99 @@ define <20 x i32> @v20(<20 x i8> %s0, <20 x i8> %s1) {
;
; CHECK-GI-LABEL: v20:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: ldr w9, [sp, #64]
; CHECK-GI-NEXT: ldr w10, [sp, #72]
; CHECK-GI-NEXT: and w13, w2, #0xff
; CHECK-GI-NEXT: ldr w11, [sp, #80]
; CHECK-GI-NEXT: ldr w12, [sp, #88]
; CHECK-GI-NEXT: fmov s19, w13
; CHECK-GI-NEXT: fmov s0, w9
; CHECK-GI-NEXT: ldr w9, [sp, #224]
; CHECK-GI-NEXT: fmov s16, w10
; CHECK-GI-NEXT: ldr w10, [sp, #232]
; CHECK-GI-NEXT: fmov s3, w11
; CHECK-GI-NEXT: ldr w11, [sp, #240]
; CHECK-GI-NEXT: fmov s2, w9
; CHECK-GI-NEXT: ldr w9, [sp, #248]
; CHECK-GI-NEXT: fmov s1, w12
; CHECK-GI-NEXT: fmov s7, w10
; CHECK-GI-NEXT: and w10, w1, #0xff
; CHECK-GI-NEXT: fmov s5, w11
; CHECK-GI-NEXT: fmov s4, w9
; CHECK-GI-NEXT: and w9, w0, #0xff
; CHECK-GI-NEXT: ldrb w11, [sp]
; CHECK-GI-NEXT: ldrb w12, [sp, #8]
; CHECK-GI-NEXT: fmov s6, w9
; CHECK-GI-NEXT: fmov s20, w10
; CHECK-GI-NEXT: ldrb w9, [sp, #96]
; CHECK-GI-NEXT: ldrb w10, [sp, #104]
; CHECK-GI-NEXT: fmov s17, w11
; CHECK-GI-NEXT: fmov s21, w12
; CHECK-GI-NEXT: ldrb w11, [sp, #160]
; CHECK-GI-NEXT: mov v0.b[1], v16.b[0]
; CHECK-GI-NEXT: fmov s18, w9
; CHECK-GI-NEXT: fmov s22, w10
; CHECK-GI-NEXT: ldrb w10, [sp, #96]
; CHECK-GI-NEXT: and w11, w1, #0xff
; CHECK-GI-NEXT: fmov s0, w9
; CHECK-GI-NEXT: ldrb w9, [sp]
; CHECK-GI-NEXT: ldrb w12, [sp, #104]
; CHECK-GI-NEXT: fmov s2, w10
; CHECK-GI-NEXT: ldrb w10, [sp, #160]
; CHECK-GI-NEXT: fmov s1, w9
; CHECK-GI-NEXT: ldrb w9, [sp, #168]
; CHECK-GI-NEXT: mov v6.h[1], v20.h[0]
; CHECK-GI-NEXT: fmov s20, w11
; CHECK-GI-NEXT: ldrb w10, [sp, #16]
; CHECK-GI-NEXT: mov v17.h[1], v21.h[0]
; CHECK-GI-NEXT: fmov s21, w9
; CHECK-GI-NEXT: ldrb w9, [sp, #112]
; CHECK-GI-NEXT: mov v18.h[1], v22.h[0]
; CHECK-GI-NEXT: fmov s23, w10
; CHECK-GI-NEXT: ldrb w10, [sp, #176]
; CHECK-GI-NEXT: and w11, w3, #0xff
; CHECK-GI-NEXT: mov v2.b[1], v7.b[0]
; CHECK-GI-NEXT: mov v0.b[2], v3.b[0]
; CHECK-GI-NEXT: mov v6.h[2], v19.h[0]
; CHECK-GI-NEXT: fmov s19, w9
; CHECK-GI-NEXT: mov v20.h[1], v21.h[0]
; CHECK-GI-NEXT: ldrb w9, [sp, #24]
; CHECK-GI-NEXT: fmov s22, w11
; CHECK-GI-NEXT: mov v17.h[2], v23.h[0]
; CHECK-GI-NEXT: mov v0.h[1], w11
; CHECK-GI-NEXT: ldrb w11, [sp, #8]
; CHECK-GI-NEXT: fmov s3, w10
; CHECK-GI-NEXT: mov v2.h[1], w12
; CHECK-GI-NEXT: and w10, w2, #0xff
; CHECK-GI-NEXT: and w12, w5, #0xff
; CHECK-GI-NEXT: mov v1.h[1], w11
; CHECK-GI-NEXT: and w11, w4, #0xff
; CHECK-GI-NEXT: mov v18.h[2], v19.h[0]
; CHECK-GI-NEXT: fmov s19, w10
; CHECK-GI-NEXT: ldrb w10, [sp, #120]
; CHECK-GI-NEXT: fmov s23, w9
; CHECK-GI-NEXT: mov v3.h[1], w9
; CHECK-GI-NEXT: ldrb w9, [sp, #112]
; CHECK-GI-NEXT: mov v0.h[2], w10
; CHECK-GI-NEXT: ldrb w10, [sp, #16]
; CHECK-GI-NEXT: mov v2.h[2], w9
; CHECK-GI-NEXT: ldrb w9, [sp, #176]
; CHECK-GI-NEXT: mov v1.h[2], w10
; CHECK-GI-NEXT: and w10, w3, #0xff
; CHECK-GI-NEXT: mov v3.h[2], w9
; CHECK-GI-NEXT: ldrb w9, [sp, #120]
; CHECK-GI-NEXT: mov v0.h[3], w10
; CHECK-GI-NEXT: ldrb w10, [sp, #24]
; CHECK-GI-NEXT: mov v2.h[3], w9
; CHECK-GI-NEXT: ldrb w9, [sp, #184]
; CHECK-GI-NEXT: mov v6.h[3], v22.h[0]
; CHECK-GI-NEXT: fmov s21, w11
; CHECK-GI-NEXT: and w11, w6, #0xff
; CHECK-GI-NEXT: mov v2.b[2], v5.b[0]
; CHECK-GI-NEXT: mov v20.h[2], v19.h[0]
; CHECK-GI-NEXT: fmov s19, w10
; CHECK-GI-NEXT: fmov s16, w9
; CHECK-GI-NEXT: mov v1.h[3], w10
; CHECK-GI-NEXT: ldr w10, [sp, #64]
; CHECK-GI-NEXT: mov v3.h[3], w9
; CHECK-GI-NEXT: ldrb w9, [sp, #128]
; CHECK-GI-NEXT: and w10, w5, #0xff
; CHECK-GI-NEXT: mov v17.h[3], v23.h[0]
; CHECK-GI-NEXT: mov v6.h[4], v21.h[0]
; CHECK-GI-NEXT: mov v0.b[3], v1.b[0]
; CHECK-GI-NEXT: mov v18.h[3], v19.h[0]
; CHECK-GI-NEXT: fmov s19, w9
; CHECK-GI-NEXT: ldrb w9, [sp, #192]
; CHECK-GI-NEXT: mov v20.h[3], v16.h[0]
; CHECK-GI-NEXT: fmov s16, w10
; CHECK-GI-NEXT: ldrb w10, [sp, #32]
; CHECK-GI-NEXT: mov v2.b[3], v4.b[0]
; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0
; CHECK-GI-NEXT: mov v18.h[4], v19.h[0]
; CHECK-GI-NEXT: fmov s19, w10
; CHECK-GI-NEXT: mov v0.h[4], w11
; CHECK-GI-NEXT: ldrb w11, [sp, #32]
; CHECK-GI-NEXT: fmov s4, w10
; CHECK-GI-NEXT: ldrb w10, [sp, #192]
; CHECK-GI-NEXT: mov v2.h[4], w9
; CHECK-GI-NEXT: ldr w9, [sp, #72]
; CHECK-GI-NEXT: mov v1.h[4], w11
; CHECK-GI-NEXT: ldr w11, [sp, #224]
; CHECK-GI-NEXT: mov v3.h[4], w10
; CHECK-GI-NEXT: ldrb w10, [sp, #136]
; CHECK-GI-NEXT: mov v6.h[5], v16.h[0]
; CHECK-GI-NEXT: fmov s16, w10
; CHECK-GI-NEXT: ldrb w10, [sp, #48]
; CHECK-GI-NEXT: ushll v2.8h, v2.8b, #0
; CHECK-GI-NEXT: mov v17.h[4], v19.h[0]
; CHECK-GI-NEXT: fmov s19, w9
; CHECK-GI-NEXT: ldrb w9, [sp, #40]
; CHECK-GI-NEXT: mov v18.h[5], v16.h[0]
; CHECK-GI-NEXT: fmov s16, w9
; CHECK-GI-NEXT: mov v4.b[1], w9
; CHECK-GI-NEXT: fmov s5, w11
; CHECK-GI-NEXT: ldr w11, [sp, #232]
; CHECK-GI-NEXT: mov v0.h[5], w12
; CHECK-GI-NEXT: ldrb w12, [sp, #40]
; CHECK-GI-NEXT: mov v2.h[5], w10
; CHECK-GI-NEXT: ldrb w10, [sp, #200]
; CHECK-GI-NEXT: ldrb w9, [sp, #144]
; CHECK-GI-NEXT: mov v20.h[4], v19.h[0]
; CHECK-GI-NEXT: fmov s19, w11
; CHECK-GI-NEXT: ldrb w11, [sp, #200]
; CHECK-GI-NEXT: add v0.4h, v0.4h, v2.4h
; CHECK-GI-NEXT: fmov s7, w11
; CHECK-GI-NEXT: mov v17.h[5], v16.h[0]
; CHECK-GI-NEXT: fmov s16, w9
; CHECK-GI-NEXT: ldrb w11, [sp, #208]
; CHECK-GI-NEXT: mov v6.h[6], v19.h[0]
; CHECK-GI-NEXT: ldrb w9, [sp, #56]
; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0
; CHECK-GI-NEXT: mov v20.h[5], v7.h[0]
; CHECK-GI-NEXT: fmov s7, w10
; CHECK-GI-NEXT: mov v18.h[6], v16.h[0]
; CHECK-GI-NEXT: fmov s16, w11
; CHECK-GI-NEXT: mov v5.b[1], w11
; CHECK-GI-NEXT: mov v1.h[5], w12
; CHECK-GI-NEXT: mov v3.h[5], w10
; CHECK-GI-NEXT: ldr w10, [sp, #80]
; CHECK-GI-NEXT: ldr w12, [sp, #240]
; CHECK-GI-NEXT: and w11, w6, #0xff
; CHECK-GI-NEXT: mov v0.h[6], w11
; CHECK-GI-NEXT: ldrb w11, [sp, #48]
; CHECK-GI-NEXT: mov v2.h[6], w9
; CHECK-GI-NEXT: ldrb w9, [sp, #208]
; CHECK-GI-NEXT: mov v4.b[2], w10
; CHECK-GI-NEXT: ldrb w10, [sp, #152]
; CHECK-GI-NEXT: and w11, w7, #0xff
; CHECK-GI-NEXT: fmov s3, w11
; CHECK-GI-NEXT: str q0, [x8, #64]
; CHECK-GI-NEXT: fmov s5, w10
; CHECK-GI-NEXT: mov v5.b[2], w12
; CHECK-GI-NEXT: mov v1.h[6], w11
; CHECK-GI-NEXT: ldr w11, [sp, #248]
; CHECK-GI-NEXT: mov v3.h[6], w9
; CHECK-GI-NEXT: ldr w9, [sp, #88]
; CHECK-GI-NEXT: and w12, w7, #0xff
; CHECK-GI-NEXT: mov v0.h[7], w12
; CHECK-GI-NEXT: mov v2.h[7], w10
; CHECK-GI-NEXT: ldrb w12, [sp, #56]
; CHECK-GI-NEXT: mov v4.b[3], w9
; CHECK-GI-NEXT: ldrb w10, [sp, #216]
; CHECK-GI-NEXT: mov v17.h[6], v7.h[0]
; CHECK-GI-NEXT: mov v20.h[6], v16.h[0]
; CHECK-GI-NEXT: fmov s7, w9
; CHECK-GI-NEXT: mov v6.h[7], v3.h[0]
; CHECK-GI-NEXT: fmov s3, w10
; CHECK-GI-NEXT: mov v18.h[7], v5.h[0]
; CHECK-GI-NEXT: mov v17.h[7], v7.h[0]
; CHECK-GI-NEXT: mov v20.h[7], v3.h[0]
; CHECK-GI-NEXT: add v1.8h, v6.8h, v18.8h
; CHECK-GI-NEXT: add v3.8h, v17.8h, v20.8h
; CHECK-GI-NEXT: mov v5.b[3], w11
; CHECK-GI-NEXT: mov v1.h[7], w12
; CHECK-GI-NEXT: mov v3.h[7], w10
; CHECK-GI-NEXT: add v0.8h, v0.8h, v2.8h
; CHECK-GI-NEXT: ushll v2.8h, v4.8b, #0
; CHECK-GI-NEXT: ushll v4.8h, v5.8b, #0
; CHECK-GI-NEXT: add v1.8h, v1.8h, v3.8h
; CHECK-GI-NEXT: ushll v3.4s, v0.4h, #0
; CHECK-GI-NEXT: ushll2 v0.4s, v0.8h, #0
; CHECK-GI-NEXT: add v2.4h, v2.4h, v4.4h
; CHECK-GI-NEXT: ushll v4.4s, v1.4h, #0
; CHECK-GI-NEXT: ushll2 v1.4s, v1.8h, #0
; CHECK-GI-NEXT: ushll v2.4s, v3.4h, #0
; CHECK-GI-NEXT: ushll2 v3.4s, v3.8h, #0
; CHECK-GI-NEXT: stp q4, q1, [x8]
; CHECK-GI-NEXT: stp q2, q3, [x8, #32]
; CHECK-GI-NEXT: stp q3, q0, [x8]
; CHECK-GI-NEXT: ushll v2.4s, v2.4h, #0
; CHECK-GI-NEXT: stp q4, q1, [x8, #32]
; CHECK-GI-NEXT: str q2, [x8, #64]
; CHECK-GI-NEXT: ret
entry:
%s0s = zext <20 x i8> %s0 to <20 x i32>
Expand Down Expand Up @@ -1497,107 +1463,83 @@ define <16 x i32> @i12(<16 x i12> %s0, <16 x i12> %s1) {
;
; CHECK-GI-LABEL: i12:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: ldr w12, [sp]
; CHECK-GI-NEXT: ldr w14, [sp, #32]
; CHECK-GI-NEXT: fmov s0, w0
; CHECK-GI-NEXT: fmov s1, w1
; CHECK-GI-NEXT: ldr w8, [sp]
; CHECK-GI-NEXT: fmov s2, w5
; CHECK-GI-NEXT: ldr w9, [sp, #8]
; CHECK-GI-NEXT: ldr w11, [sp, #32]
; CHECK-GI-NEXT: ldr w12, [sp, #40]
; CHECK-GI-NEXT: fmov s5, w7
; CHECK-GI-NEXT: ldr w10, [sp, #16]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: ldr w16, [sp, #128]
; CHECK-GI-NEXT: ldr w17, [sp, #160]
; CHECK-GI-NEXT: fmov s1, w4
; CHECK-GI-NEXT: fmov s3, w9
; CHECK-GI-NEXT: fmov s2, w12
; CHECK-GI-NEXT: fmov s3, w14
; CHECK-GI-NEXT: ldr w12, [sp, #64]
; CHECK-GI-NEXT: ldr w14, [sp, #96]
; CHECK-GI-NEXT: ldr w13, [sp, #8]
; CHECK-GI-NEXT: ldr w15, [sp, #40]
; CHECK-GI-NEXT: fmov s4, w12
; CHECK-GI-NEXT: ldr w12, [sp, #96]
; CHECK-GI-NEXT: ldr w13, [sp, #104]
; CHECK-GI-NEXT: ldr w14, [sp, #128]
; CHECK-GI-NEXT: ldr w15, [sp, #136]
; CHECK-GI-NEXT: ldr w16, [sp, #160]
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w2
; CHECK-GI-NEXT: fmov s7, w13
; CHECK-GI-NEXT: fmov s16, w15
; CHECK-GI-NEXT: ldr w17, [sp, #168]
; CHECK-GI-NEXT: ldr w9, [sp, #24]
; CHECK-GI-NEXT: ldr w13, [sp, #176]
; CHECK-GI-NEXT: mov v0.h[2], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w6
; CHECK-GI-NEXT: fmov s17, w17
; CHECK-GI-NEXT: mov v1.h[2], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w8
; CHECK-GI-NEXT: ldr w8, [sp, #56]
; CHECK-GI-NEXT: mov v2.h[1], v3.h[0]
; CHECK-GI-NEXT: fmov s3, w11
; CHECK-GI-NEXT: fmov s6, w16
; CHECK-GI-NEXT: fmov s7, w17
; CHECK-GI-NEXT: fmov s5, w14
; CHECK-GI-NEXT: mov v2.h[1], w13
; CHECK-GI-NEXT: mov v3.h[1], w15
; CHECK-GI-NEXT: ldr w13, [sp, #72]
; CHECK-GI-NEXT: ldr w15, [sp, #104]
; CHECK-GI-NEXT: ldr w12, [sp, #136]
; CHECK-GI-NEXT: ldr w18, [sp, #168]
; CHECK-GI-NEXT: mov v0.h[1], w1
; CHECK-GI-NEXT: mov v1.h[1], w5
; CHECK-GI-NEXT: mov v4.h[1], w13
; CHECK-GI-NEXT: mov v5.h[1], w15
; CHECK-GI-NEXT: mov v6.h[1], w12
; CHECK-GI-NEXT: mov v7.h[1], w18
; CHECK-GI-NEXT: ldr w10, [sp, #16]
; CHECK-GI-NEXT: ldr w11, [sp, #48]
; CHECK-GI-NEXT: mov v1.h[3], v5.h[0]
; CHECK-GI-NEXT: fmov s5, w10
; CHECK-GI-NEXT: ldr w10, [sp, #64]
; CHECK-GI-NEXT: mov v3.h[1], v4.h[0]
; CHECK-GI-NEXT: fmov s4, w3
; CHECK-GI-NEXT: mov v2.h[2], v5.h[0]
; CHECK-GI-NEXT: fmov s5, w11
; CHECK-GI-NEXT: ldr w11, [sp, #72]
; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0
; CHECK-GI-NEXT: fmov s6, w11
; CHECK-GI-NEXT: mov v0.h[3], v4.h[0]
; CHECK-GI-NEXT: fmov s4, w9
; CHECK-GI-NEXT: mov v3.h[2], v5.h[0]
; CHECK-GI-NEXT: fmov s5, w10
; CHECK-GI-NEXT: ldr w9, [sp, #80]
; CHECK-GI-NEXT: ldr w10, [sp, #112]
; CHECK-GI-NEXT: ldr w11, [sp, #144]
; CHECK-GI-NEXT: mov v2.h[3], v4.h[0]
; CHECK-GI-NEXT: mov v5.h[1], v6.h[0]
; CHECK-GI-NEXT: fmov s6, w12
; CHECK-GI-NEXT: fmov s18, w11
; CHECK-GI-NEXT: ldr w12, [sp, #88]
; CHECK-GI-NEXT: ldr w12, [sp, #80]
; CHECK-GI-NEXT: ldr w13, [sp, #112]
; CHECK-GI-NEXT: ldr w14, [sp, #144]
; CHECK-GI-NEXT: ldr w15, [sp, #176]
; CHECK-GI-NEXT: mov v0.h[2], w2
; CHECK-GI-NEXT: mov v1.h[2], w6
; CHECK-GI-NEXT: mov v2.h[2], w10
; CHECK-GI-NEXT: mov v3.h[2], w11
; CHECK-GI-NEXT: mov v4.h[2], w12
; CHECK-GI-NEXT: mov v5.h[2], w13
; CHECK-GI-NEXT: mov v6.h[2], w14
; CHECK-GI-NEXT: mov v7.h[2], w15
; CHECK-GI-NEXT: ldr w8, [sp, #24]
; CHECK-GI-NEXT: ldr w9, [sp, #56]
; CHECK-GI-NEXT: ldr w10, [sp, #88]
; CHECK-GI-NEXT: ldr w11, [sp, #120]
; CHECK-GI-NEXT: ldr w12, [sp, #152]
; CHECK-GI-NEXT: ldr w13, [sp, #184]
; CHECK-GI-NEXT: mov v0.h[3], w3
; CHECK-GI-NEXT: mov v1.h[3], w7
; CHECK-GI-NEXT: mov v2.h[3], w8
; CHECK-GI-NEXT: mov v3.h[3], w9
; CHECK-GI-NEXT: mov v4.h[3], w10
; CHECK-GI-NEXT: mov v5.h[3], w11
; CHECK-GI-NEXT: mov v6.h[3], w12
; CHECK-GI-NEXT: mov v7.h[3], w13
; CHECK-GI-NEXT: movi v16.4s, #15, msl #8
; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0
; CHECK-GI-NEXT: mov v6.h[1], v7.h[0]
; CHECK-GI-NEXT: fmov s7, w14
; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0
; CHECK-GI-NEXT: ushll v2.4s, v2.4h, #0
; CHECK-GI-NEXT: mov v7.h[1], v16.h[0]
; CHECK-GI-NEXT: fmov s16, w16
; CHECK-GI-NEXT: mov v16.h[1], v17.h[0]
; CHECK-GI-NEXT: fmov s17, w9
; CHECK-GI-NEXT: ldr w9, [sp, #152]
; CHECK-GI-NEXT: mov v7.h[2], v18.h[0]
; CHECK-GI-NEXT: fmov s18, w8
; CHECK-GI-NEXT: ldr w8, [sp, #120]
; CHECK-GI-NEXT: mov v5.h[2], v17.h[0]
; CHECK-GI-NEXT: fmov s17, w10
; CHECK-GI-NEXT: ldr w10, [sp, #184]
; CHECK-GI-NEXT: mov v3.h[3], v18.h[0]
; CHECK-GI-NEXT: fmov s4, w8
; CHECK-GI-NEXT: fmov s18, w10
; CHECK-GI-NEXT: mov v6.h[2], v17.h[0]
; CHECK-GI-NEXT: fmov s17, w13
; CHECK-GI-NEXT: ushll v3.4s, v3.4h, #0
; CHECK-GI-NEXT: mov v16.h[2], v17.h[0]
; CHECK-GI-NEXT: fmov s17, w12
; CHECK-GI-NEXT: mov v6.h[3], v4.h[0]
; CHECK-GI-NEXT: movi v4.4s, #15, msl #8
; CHECK-GI-NEXT: mov v5.h[3], v17.h[0]
; CHECK-GI-NEXT: fmov s17, w9
; CHECK-GI-NEXT: mov v16.h[3], v18.h[0]
; CHECK-GI-NEXT: ushll v6.4s, v6.4h, #0
; CHECK-GI-NEXT: and v0.16b, v0.16b, v4.16b
; CHECK-GI-NEXT: and v1.16b, v1.16b, v4.16b
; CHECK-GI-NEXT: mov v7.h[3], v17.h[0]
; CHECK-GI-NEXT: and v2.16b, v2.16b, v4.16b
; CHECK-GI-NEXT: and v3.16b, v3.16b, v4.16b
; CHECK-GI-NEXT: ushll v4.4s, v4.4h, #0
; CHECK-GI-NEXT: ushll v5.4s, v5.4h, #0
; CHECK-GI-NEXT: ushll v16.4s, v16.4h, #0
; CHECK-GI-NEXT: and v6.16b, v6.16b, v4.16b
; CHECK-GI-NEXT: ushll v6.4s, v6.4h, #0
; CHECK-GI-NEXT: ushll v7.4s, v7.4h, #0
; CHECK-GI-NEXT: and v5.16b, v5.16b, v4.16b
; CHECK-GI-NEXT: add v1.4s, v1.4s, v6.4s
; CHECK-GI-NEXT: and v7.16b, v7.16b, v4.16b
; CHECK-GI-NEXT: and v4.16b, v16.16b, v4.16b
; CHECK-GI-NEXT: add v0.4s, v0.4s, v5.4s
; CHECK-GI-NEXT: add v2.4s, v2.4s, v7.4s
; CHECK-GI-NEXT: add v3.4s, v3.4s, v4.4s
; CHECK-GI-NEXT: and v0.16b, v0.16b, v16.16b
; CHECK-GI-NEXT: and v1.16b, v1.16b, v16.16b
; CHECK-GI-NEXT: and v2.16b, v2.16b, v16.16b
; CHECK-GI-NEXT: and v3.16b, v3.16b, v16.16b
; CHECK-GI-NEXT: and v4.16b, v4.16b, v16.16b
; CHECK-GI-NEXT: and v5.16b, v5.16b, v16.16b
; CHECK-GI-NEXT: and v6.16b, v6.16b, v16.16b
; CHECK-GI-NEXT: and v7.16b, v7.16b, v16.16b
; CHECK-GI-NEXT: add v0.4s, v0.4s, v4.4s
; CHECK-GI-NEXT: add v1.4s, v1.4s, v5.4s
; CHECK-GI-NEXT: add v2.4s, v2.4s, v6.4s
; CHECK-GI-NEXT: add v3.4s, v3.4s, v7.4s
; CHECK-GI-NEXT: ret
entry:
%s0s = zext <16 x i12> %s0 to <16 x i32>
Expand Down
28 changes: 14 additions & 14 deletions llvm/test/CodeGen/AArch64/neon-extmul.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -272,18 +272,18 @@ define <8 x i64> @extaddsu_v8i8_i64(<8 x i8> %s0, <8 x i8> %s1) {
; CHECK-GI-NEXT: mul x15, x15, x16
; CHECK-GI-NEXT: mul x10, x10, x11
; CHECK-GI-NEXT: fmov x11, d0
; CHECK-GI-NEXT: fmov d0, x8
; CHECK-GI-NEXT: fmov d1, x9
; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: mov v1.d[0], x9
; CHECK-GI-NEXT: mul x13, x13, x18
; CHECK-GI-NEXT: mov v0.d[1], x12
; CHECK-GI-NEXT: mul x11, x11, x14
; CHECK-GI-NEXT: mov x14, v6.d[1]
; CHECK-GI-NEXT: mov v0.d[1], x12
; CHECK-GI-NEXT: mov v2.d[0], x10
; CHECK-GI-NEXT: mov v1.d[1], x15
; CHECK-GI-NEXT: fmov d2, x10
; CHECK-GI-NEXT: mul x14, x14, x17
; CHECK-GI-NEXT: fmov d3, x11
; CHECK-GI-NEXT: mov v3.d[1], x13
; CHECK-GI-NEXT: mov v3.d[0], x11
; CHECK-GI-NEXT: mov v2.d[1], x14
; CHECK-GI-NEXT: mov v3.d[1], x13
; CHECK-GI-NEXT: ret
entry:
%s0s = sext <8 x i8> %s0 to <8 x i64>
Expand Down Expand Up @@ -423,22 +423,22 @@ define <8 x i64> @extmuladdsu_v8i8_i64(<8 x i8> %s0, <8 x i8> %s1, <8 x i64> %b)
; CHECK-GI-NEXT: mul x15, x15, x16
; CHECK-GI-NEXT: mul x10, x10, x11
; CHECK-GI-NEXT: fmov x11, d0
; CHECK-GI-NEXT: fmov d0, x8
; CHECK-GI-NEXT: fmov d1, x9
; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: mov v1.d[0], x9
; CHECK-GI-NEXT: mul x13, x13, x18
; CHECK-GI-NEXT: mov v0.d[1], x12
; CHECK-GI-NEXT: mul x11, x11, x14
; CHECK-GI-NEXT: mov x14, v18.d[1]
; CHECK-GI-NEXT: mov v0.d[1], x12
; CHECK-GI-NEXT: mov v6.d[0], x10
; CHECK-GI-NEXT: mov v1.d[1], x15
; CHECK-GI-NEXT: fmov d6, x10
; CHECK-GI-NEXT: add v0.2d, v0.2d, v2.2d
; CHECK-GI-NEXT: mul x14, x14, x17
; CHECK-GI-NEXT: add v0.2d, v0.2d, v2.2d
; CHECK-GI-NEXT: mov v7.d[0], x11
; CHECK-GI-NEXT: add v1.2d, v1.2d, v3.2d
; CHECK-GI-NEXT: fmov d7, x11
; CHECK-GI-NEXT: mov v7.d[1], x13
; CHECK-GI-NEXT: mov v6.d[1], x14
; CHECK-GI-NEXT: add v3.2d, v7.2d, v5.2d
; CHECK-GI-NEXT: mov v7.d[1], x13
; CHECK-GI-NEXT: add v2.2d, v6.2d, v4.2d
; CHECK-GI-NEXT: add v3.2d, v7.2d, v5.2d
; CHECK-GI-NEXT: ret
entry:
%s0s = sext <8 x i8> %s0 to <8 x i64>
Expand Down
13 changes: 7 additions & 6 deletions llvm/test/CodeGen/AArch64/neon-perm.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1741,12 +1741,13 @@ define <4 x i8> @test_vzip1_v4i8(<8 x i8> %p) {
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
; CHECK-GI-NEXT: mov b1, v0.b[1]
; CHECK-GI-NEXT: mov b2, v0.b[2]
; CHECK-GI-NEXT: mov b3, v0.b[3]
; CHECK-GI-NEXT: mov v0.b[1], v1.b[0]
; CHECK-GI-NEXT: mov v0.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v0.b[3], v3.b[0]
; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0
; CHECK-GI-NEXT: mov v2.b[0], v0.b[0]
; CHECK-GI-NEXT: mov b3, v0.b[2]
; CHECK-GI-NEXT: mov b0, v0.b[3]
; CHECK-GI-NEXT: mov v2.b[1], v1.b[0]
; CHECK-GI-NEXT: mov v2.b[2], v3.b[0]
; CHECK-GI-NEXT: mov v2.b[3], v0.b[0]
; CHECK-GI-NEXT: ushll v0.8h, v2.8b, #0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
%lo = shufflevector <8 x i8> %p, <8 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
Expand Down
52 changes: 31 additions & 21 deletions llvm/test/CodeGen/AArch64/ptradd.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -77,17 +77,18 @@ define void @vector_gep_v3i32(<3 x ptr> %b, <3 x i32> %off, ptr %p) {
;
; CHECK-GI-LABEL: vector_gep_v3i32:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: smov x8, v3.s[0]
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
; CHECK-GI-NEXT: smov x9, v3.s[1]
; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
; CHECK-GI-NEXT: fmov d1, x8
; CHECK-GI-NEXT: mov w8, v3.s[2]
; CHECK-GI-NEXT: mov v1.d[1], x9
; CHECK-GI-NEXT: smov x9, v3.s[0]
; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: smov x10, v3.s[1]
; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: fmov x8, d1
; CHECK-GI-NEXT: mov v4.d[0], x9
; CHECK-GI-NEXT: fmov x9, d2
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: mov w8, v3.s[2]
; CHECK-GI-NEXT: mov v4.d[1], x10
; CHECK-GI-NEXT: add x8, x9, w8, sxtw
; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d
; CHECK-GI-NEXT: add v0.2d, v0.2d, v4.2d
; CHECK-GI-NEXT: str x8, [x0, #16]
; CHECK-GI-NEXT: str q0, [x0]
; CHECK-GI-NEXT: ret
Expand Down Expand Up @@ -166,17 +167,18 @@ define void @vector_gep_v3i64(<3 x ptr> %b, <3 x i64> %off, ptr %p) {
;
; CHECK-GI-LABEL: vector_gep_v3i64:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q3
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4
; CHECK-GI-NEXT: fmov x8, d2
; CHECK-GI-NEXT: fmov x9, d5
; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
; CHECK-GI-NEXT: mov v3.d[1], v4.d[0]
; CHECK-GI-NEXT: mov v0.d[0], x8
; CHECK-GI-NEXT: fmov x8, d1
; CHECK-GI-NEXT: mov v0.d[1], x8
; CHECK-GI-NEXT: fmov x8, d2
; CHECK-GI-NEXT: add x8, x8, x9
; CHECK-GI-NEXT: str x8, [x0, #16]
; CHECK-GI-NEXT: add v0.2d, v0.2d, v3.2d
; CHECK-GI-NEXT: str x8, [x0, #16]
; CHECK-GI-NEXT: str q0, [x0]
; CHECK-GI-NEXT: ret
entry:
Expand Down Expand Up @@ -206,13 +208,21 @@ entry:
}

define void @vector_gep_v4i128(<2 x ptr> %b, <2 x i128> %off, ptr %p) {
; CHECK-LABEL: vector_gep_v4i128:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fmov d1, x0
; CHECK-NEXT: mov v1.d[1], x2
; CHECK-NEXT: add v0.2d, v0.2d, v1.2d
; CHECK-NEXT: str q0, [x4]
; CHECK-NEXT: ret
; CHECK-SD-LABEL: vector_gep_v4i128:
; CHECK-SD: // %bb.0: // %entry
; CHECK-SD-NEXT: fmov d1, x0
; CHECK-SD-NEXT: mov v1.d[1], x2
; CHECK-SD-NEXT: add v0.2d, v0.2d, v1.2d
; CHECK-SD-NEXT: str q0, [x4]
; CHECK-SD-NEXT: ret
;
; CHECK-GI-LABEL: vector_gep_v4i128:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: mov v1.d[0], x0
; CHECK-GI-NEXT: mov v1.d[1], x2
; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d
; CHECK-GI-NEXT: str q0, [x4]
; CHECK-GI-NEXT: ret
entry:
%g = getelementptr i8, <2 x ptr> %b, <2 x i128> %off
store <2 x ptr> %g, ptr %p
Expand Down
632 changes: 310 additions & 322 deletions llvm/test/CodeGen/AArch64/rem.ll
View file

Large diffs are not rendered by default.

38 changes: 20 additions & 18 deletions llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -165,18 +165,20 @@ define void @v4i8(ptr %px, ptr %py, ptr %pz) nounwind {
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: fmov s1, w9
; CHECK-GI-NEXT: mov b2, v0.b[1]
; CHECK-GI-NEXT: mov b3, v1.b[1]
; CHECK-GI-NEXT: mov b4, v0.b[2]
; CHECK-GI-NEXT: mov b5, v0.b[3]
; CHECK-GI-NEXT: mov b6, v1.b[3]
; CHECK-GI-NEXT: mov v0.b[1], v2.b[0]
; CHECK-GI-NEXT: mov b2, v1.b[2]
; CHECK-GI-NEXT: mov v1.b[1], v3.b[0]
; CHECK-GI-NEXT: mov v0.b[2], v4.b[0]
; CHECK-GI-NEXT: mov v1.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v0.b[3], v5.b[0]
; CHECK-GI-NEXT: mov v1.b[3], v6.b[0]
; CHECK-GI-NEXT: sqadd v0.8b, v0.8b, v1.8b
; CHECK-GI-NEXT: mov v3.b[0], v0.b[0]
; CHECK-GI-NEXT: mov b4, v1.b[1]
; CHECK-GI-NEXT: mov v5.b[0], v1.b[0]
; CHECK-GI-NEXT: mov v3.b[1], v2.b[0]
; CHECK-GI-NEXT: mov b2, v0.b[2]
; CHECK-GI-NEXT: mov b0, v0.b[3]
; CHECK-GI-NEXT: mov v5.b[1], v4.b[0]
; CHECK-GI-NEXT: mov b4, v1.b[2]
; CHECK-GI-NEXT: mov b1, v1.b[3]
; CHECK-GI-NEXT: mov v3.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v5.b[2], v4.b[0]
; CHECK-GI-NEXT: mov v3.b[3], v0.b[0]
; CHECK-GI-NEXT: mov v5.b[3], v1.b[0]
; CHECK-GI-NEXT: sqadd v0.8b, v3.8b, v5.8b
; CHECK-GI-NEXT: fmov w8, s0
; CHECK-GI-NEXT: str w8, [x2]
; CHECK-GI-NEXT: ret
Expand Down Expand Up @@ -249,12 +251,12 @@ define void @v2i16(ptr %px, ptr %py, ptr %pz) nounwind {
; CHECK-GI-LABEL: v2i16:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: ldr h0, [x0]
; CHECK-GI-NEXT: ldr h1, [x0, #2]
; CHECK-GI-NEXT: ldr h2, [x1]
; CHECK-GI-NEXT: ldr h3, [x1, #2]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: mov v2.h[1], v3.h[0]
; CHECK-GI-NEXT: sqadd v0.4h, v0.4h, v2.4h
; CHECK-GI-NEXT: ldr h1, [x1]
; CHECK-GI-NEXT: add x8, x0, #2
; CHECK-GI-NEXT: add x9, x1, #2
; CHECK-GI-NEXT: ld1 { v0.h }[1], [x8]
; CHECK-GI-NEXT: ld1 { v1.h }[1], [x9]
; CHECK-GI-NEXT: sqadd v0.4h, v0.4h, v1.4h
; CHECK-GI-NEXT: mov h1, v0.h[1]
; CHECK-GI-NEXT: str h0, [x2]
; CHECK-GI-NEXT: str h1, [x2, #2]
Expand Down
206 changes: 82 additions & 124 deletions llvm/test/CodeGen/AArch64/sext.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -224,15 +224,13 @@ define <3 x i16> @sext_v3i8_v3i16(<3 x i8> %a) {
; CHECK-GI-NEXT: lsl w10, w2, #8
; CHECK-GI-NEXT: sxth w8, w8
; CHECK-GI-NEXT: sxth w9, w9
; CHECK-GI-NEXT: sxth w10, w10
; CHECK-GI-NEXT: asr w8, w8, #8
; CHECK-GI-NEXT: asr w9, w9, #8
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: fmov s1, w9
; CHECK-GI-NEXT: asr w8, w10, #8
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: fmov s1, w8
; CHECK-GI-NEXT: mov v0.h[2], v1.h[0]
; CHECK-GI-NEXT: sxth w8, w10
; CHECK-GI-NEXT: asr w8, w8, #8
; CHECK-GI-NEXT: mov v0.h[1], w9
; CHECK-GI-NEXT: mov v0.h[2], w8
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
entry:
Expand All @@ -254,10 +252,10 @@ define <3 x i32> @sext_v3i8_v3i32(<3 x i8> %a) {
; CHECK-GI-LABEL: sext_v3i8_v3i32:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: sxtb w8, w0
; CHECK-GI-NEXT: sxtb w9, w1
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: mov v0.s[0], w8
; CHECK-GI-NEXT: sxtb w8, w1
; CHECK-GI-NEXT: mov v0.s[1], w8
; CHECK-GI-NEXT: sxtb w8, w2
; CHECK-GI-NEXT: mov v0.s[1], w9
; CHECK-GI-NEXT: mov v0.s[2], w8
; CHECK-GI-NEXT: ret
entry:
Expand Down Expand Up @@ -311,7 +309,7 @@ define <3 x i32> @sext_v3i16_v3i32(<3 x i16> %a) {
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
; CHECK-GI-NEXT: smov w8, v0.h[0]
; CHECK-GI-NEXT: smov w9, v0.h[1]
; CHECK-GI-NEXT: fmov s1, w8
; CHECK-GI-NEXT: mov v1.s[0], w8
; CHECK-GI-NEXT: smov w8, v0.h[2]
; CHECK-GI-NEXT: mov v1.s[1], w9
; CHECK-GI-NEXT: mov v1.s[2], w8
Expand Down Expand Up @@ -391,15 +389,13 @@ define <3 x i16> @sext_v3i10_v3i16(<3 x i10> %a) {
; CHECK-GI-NEXT: lsl w10, w2, #6
; CHECK-GI-NEXT: sxth w8, w8
; CHECK-GI-NEXT: sxth w9, w9
; CHECK-GI-NEXT: sxth w10, w10
; CHECK-GI-NEXT: asr w8, w8, #6
; CHECK-GI-NEXT: asr w9, w9, #6
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: fmov s1, w9
; CHECK-GI-NEXT: asr w8, w10, #6
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: fmov s1, w8
; CHECK-GI-NEXT: mov v0.h[2], v1.h[0]
; CHECK-GI-NEXT: sxth w8, w10
; CHECK-GI-NEXT: asr w8, w8, #6
; CHECK-GI-NEXT: mov v0.h[1], w9
; CHECK-GI-NEXT: mov v0.h[2], w8
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
entry:
Expand All @@ -421,10 +417,10 @@ define <3 x i32> @sext_v3i10_v3i32(<3 x i10> %a) {
; CHECK-GI-LABEL: sext_v3i10_v3i32:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: sbfx w8, w0, #0, #10
; CHECK-GI-NEXT: sbfx w9, w1, #0, #10
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: mov v0.s[0], w8
; CHECK-GI-NEXT: sbfx w8, w1, #0, #10
; CHECK-GI-NEXT: mov v0.s[1], w8
; CHECK-GI-NEXT: sbfx w8, w2, #0, #10
; CHECK-GI-NEXT: mov v0.s[1], w9
; CHECK-GI-NEXT: mov v0.s[2], w8
; CHECK-GI-NEXT: ret
entry:
Expand Down Expand Up @@ -1033,43 +1029,29 @@ define <16 x i16> @sext_v16i10_v16i16(<16 x i10> %a) {
; CHECK-GI-LABEL: sext_v16i10_v16i16:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: ldr w8, [sp]
; CHECK-GI-NEXT: ldr w9, [sp, #8]
; CHECK-GI-NEXT: fmov s0, w0
; CHECK-GI-NEXT: fmov s2, w1
; CHECK-GI-NEXT: ldr w9, [sp, #8]
; CHECK-GI-NEXT: fmov s1, w8
; CHECK-GI-NEXT: fmov s3, w9
; CHECK-GI-NEXT: ldr w8, [sp, #16]
; CHECK-GI-NEXT: mov v0.h[1], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w2
; CHECK-GI-NEXT: mov v1.h[1], v3.h[0]
; CHECK-GI-NEXT: fmov s3, w8
; CHECK-GI-NEXT: mov v0.h[1], w1
; CHECK-GI-NEXT: mov v1.h[1], w9
; CHECK-GI-NEXT: mov v0.h[2], w2
; CHECK-GI-NEXT: mov v1.h[2], w8
; CHECK-GI-NEXT: ldr w8, [sp, #24]
; CHECK-GI-NEXT: mov v0.h[2], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w3
; CHECK-GI-NEXT: mov v1.h[2], v3.h[0]
; CHECK-GI-NEXT: fmov s3, w8
; CHECK-GI-NEXT: mov v0.h[3], w3
; CHECK-GI-NEXT: mov v1.h[3], w8
; CHECK-GI-NEXT: ldr w8, [sp, #32]
; CHECK-GI-NEXT: mov v0.h[3], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w4
; CHECK-GI-NEXT: mov v1.h[3], v3.h[0]
; CHECK-GI-NEXT: fmov s3, w8
; CHECK-GI-NEXT: mov v0.h[4], w4
; CHECK-GI-NEXT: mov v1.h[4], w8
; CHECK-GI-NEXT: ldr w8, [sp, #40]
; CHECK-GI-NEXT: mov v0.h[4], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w5
; CHECK-GI-NEXT: mov v1.h[4], v3.h[0]
; CHECK-GI-NEXT: fmov s3, w8
; CHECK-GI-NEXT: mov v0.h[5], w5
; CHECK-GI-NEXT: mov v1.h[5], w8
; CHECK-GI-NEXT: ldr w8, [sp, #48]
; CHECK-GI-NEXT: mov v0.h[5], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w6
; CHECK-GI-NEXT: mov v1.h[5], v3.h[0]
; CHECK-GI-NEXT: fmov s3, w8
; CHECK-GI-NEXT: mov v0.h[6], w6
; CHECK-GI-NEXT: mov v1.h[6], w8
; CHECK-GI-NEXT: ldr w8, [sp, #56]
; CHECK-GI-NEXT: mov v0.h[6], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w7
; CHECK-GI-NEXT: mov v1.h[6], v3.h[0]
; CHECK-GI-NEXT: fmov s3, w8
; CHECK-GI-NEXT: mov v0.h[7], v2.h[0]
; CHECK-GI-NEXT: mov v1.h[7], v3.h[0]
; CHECK-GI-NEXT: mov v0.h[7], w7
; CHECK-GI-NEXT: mov v1.h[7], w8
; CHECK-GI-NEXT: shl v0.8h, v0.8h, #6
; CHECK-GI-NEXT: shl v1.8h, v1.8h, #6
; CHECK-GI-NEXT: sshr v0.8h, v0.8h, #6
Expand Down Expand Up @@ -1123,54 +1105,42 @@ define <16 x i32> @sext_v16i10_v16i32(<16 x i10> %a) {
;
; CHECK-GI-LABEL: sext_v16i10_v16i32:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: fmov s0, w0
; CHECK-GI-NEXT: fmov s1, w1
; CHECK-GI-NEXT: ldr w8, [sp]
; CHECK-GI-NEXT: fmov s2, w5
; CHECK-GI-NEXT: ldr w9, [sp, #8]
; CHECK-GI-NEXT: ldr w10, [sp, #32]
; CHECK-GI-NEXT: ldr w9, [sp, #32]
; CHECK-GI-NEXT: fmov s0, w0
; CHECK-GI-NEXT: fmov s1, w4
; CHECK-GI-NEXT: ldr w10, [sp, #8]
; CHECK-GI-NEXT: ldr w11, [sp, #40]
; CHECK-GI-NEXT: fmov s3, w8
; CHECK-GI-NEXT: fmov s2, w8
; CHECK-GI-NEXT: fmov s3, w9
; CHECK-GI-NEXT: ldr w8, [sp, #16]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: fmov s1, w4
; CHECK-GI-NEXT: fmov s4, w9
; CHECK-GI-NEXT: fmov s5, w10
; CHECK-GI-NEXT: fmov s6, w11
; CHECK-GI-NEXT: mov v0.h[1], w1
; CHECK-GI-NEXT: ldr w9, [sp, #48]
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w2
; CHECK-GI-NEXT: mov v3.h[1], v4.h[0]
; CHECK-GI-NEXT: mov v5.h[1], v6.h[0]
; CHECK-GI-NEXT: fmov s4, w8
; CHECK-GI-NEXT: fmov s6, w9
; CHECK-GI-NEXT: mov v1.h[1], w5
; CHECK-GI-NEXT: mov v2.h[1], w10
; CHECK-GI-NEXT: mov v3.h[1], w11
; CHECK-GI-NEXT: mov v0.h[2], w2
; CHECK-GI-NEXT: mov v1.h[2], w6
; CHECK-GI-NEXT: mov v2.h[2], w8
; CHECK-GI-NEXT: mov v3.h[2], w9
; CHECK-GI-NEXT: ldr w8, [sp, #24]
; CHECK-GI-NEXT: ldr w9, [sp, #56]
; CHECK-GI-NEXT: mov v0.h[2], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w6
; CHECK-GI-NEXT: mov v3.h[2], v4.h[0]
; CHECK-GI-NEXT: fmov s4, w8
; CHECK-GI-NEXT: mov v5.h[2], v6.h[0]
; CHECK-GI-NEXT: fmov s6, w9
; CHECK-GI-NEXT: mov v1.h[2], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w3
; CHECK-GI-NEXT: mov v3.h[3], v4.h[0]
; CHECK-GI-NEXT: mov v0.h[3], v2.h[0]
; CHECK-GI-NEXT: fmov s2, w7
; CHECK-GI-NEXT: mov v5.h[3], v6.h[0]
; CHECK-GI-NEXT: mov v1.h[3], v2.h[0]
; CHECK-GI-NEXT: ushll v2.4s, v3.4h, #0
; CHECK-GI-NEXT: mov v0.h[3], w3
; CHECK-GI-NEXT: mov v1.h[3], w7
; CHECK-GI-NEXT: mov v2.h[3], w8
; CHECK-GI-NEXT: mov v3.h[3], w9
; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0
; CHECK-GI-NEXT: ushll v3.4s, v5.4h, #0
; CHECK-GI-NEXT: shl v2.4s, v2.4s, #22
; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0
; CHECK-GI-NEXT: ushll v2.4s, v2.4h, #0
; CHECK-GI-NEXT: ushll v3.4s, v3.4h, #0
; CHECK-GI-NEXT: shl v0.4s, v0.4s, #22
; CHECK-GI-NEXT: shl v3.4s, v3.4s, #22
; CHECK-GI-NEXT: sshr v2.4s, v2.4s, #22
; CHECK-GI-NEXT: shl v1.4s, v1.4s, #22
; CHECK-GI-NEXT: shl v2.4s, v2.4s, #22
; CHECK-GI-NEXT: shl v3.4s, v3.4s, #22
; CHECK-GI-NEXT: sshr v0.4s, v0.4s, #22
; CHECK-GI-NEXT: sshr v3.4s, v3.4s, #22
; CHECK-GI-NEXT: sshr v1.4s, v1.4s, #22
; CHECK-GI-NEXT: sshr v2.4s, v2.4s, #22
; CHECK-GI-NEXT: sshr v3.4s, v3.4s, #22
; CHECK-GI-NEXT: ret
entry:
%c = sext <16 x i10> %a to <16 x i32>
Expand Down Expand Up @@ -1228,67 +1198,55 @@ define <16 x i64> @sext_v16i10_v16i64(<16 x i10> %a) {
;
; CHECK-GI-LABEL: sext_v16i10_v16i64:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: fmov s0, w0
; CHECK-GI-NEXT: fmov s1, w1
; CHECK-GI-NEXT: ldr w8, [sp]
; CHECK-GI-NEXT: fmov s2, w5
; CHECK-GI-NEXT: ldr w9, [sp, #8]
; CHECK-GI-NEXT: ldr w10, [sp, #32]
; CHECK-GI-NEXT: ldr w11, [sp, #40]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
; CHECK-GI-NEXT: fmov s0, w0
; CHECK-GI-NEXT: fmov s1, w4
; CHECK-GI-NEXT: fmov s3, w9
; CHECK-GI-NEXT: fmov s4, w11
; CHECK-GI-NEXT: ldr w9, [sp, #48]
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: ldr w9, [sp, #8]
; CHECK-GI-NEXT: ldr w11, [sp, #40]
; CHECK-GI-NEXT: fmov s2, w8
; CHECK-GI-NEXT: fmov s3, w10
; CHECK-GI-NEXT: ldr w8, [sp, #16]
; CHECK-GI-NEXT: fmov s5, w8
; CHECK-GI-NEXT: mov v0.h[1], w1
; CHECK-GI-NEXT: mov v1.h[1], w5
; CHECK-GI-NEXT: mov v2.h[1], w9
; CHECK-GI-NEXT: mov v3.h[1], w11
; CHECK-GI-NEXT: ldr w9, [sp, #48]
; CHECK-GI-NEXT: mov v0.h[2], w2
; CHECK-GI-NEXT: mov v1.h[2], w6
; CHECK-GI-NEXT: mov v2.h[2], w8
; CHECK-GI-NEXT: mov v3.h[2], w9
; CHECK-GI-NEXT: ldr w8, [sp, #24]
; CHECK-GI-NEXT: mov v2.h[1], v3.h[0]
; CHECK-GI-NEXT: fmov s3, w10
; CHECK-GI-NEXT: mov v3.h[1], v4.h[0]
; CHECK-GI-NEXT: fmov s4, w2
; CHECK-GI-NEXT: mov v2.h[2], v5.h[0]
; CHECK-GI-NEXT: fmov s5, w8
; CHECK-GI-NEXT: mov v0.h[2], v4.h[0]
; CHECK-GI-NEXT: fmov s4, w6
; CHECK-GI-NEXT: mov v2.h[3], v5.h[0]
; CHECK-GI-NEXT: mov v1.h[2], v4.h[0]
; CHECK-GI-NEXT: fmov s4, w9
; CHECK-GI-NEXT: ldr w9, [sp, #56]
; CHECK-GI-NEXT: mov v3.h[2], v4.h[0]
; CHECK-GI-NEXT: fmov s4, w3
; CHECK-GI-NEXT: ushll v2.4s, v2.4h, #0
; CHECK-GI-NEXT: mov v0.h[3], v4.h[0]
; CHECK-GI-NEXT: fmov s4, w7
; CHECK-GI-NEXT: ushll v6.2d, v2.2s, #0
; CHECK-GI-NEXT: ushll2 v2.2d, v2.4s, #0
; CHECK-GI-NEXT: mov v1.h[3], v4.h[0]
; CHECK-GI-NEXT: fmov s4, w9
; CHECK-GI-NEXT: shl v6.2d, v6.2d, #54
; CHECK-GI-NEXT: mov v0.h[3], w3
; CHECK-GI-NEXT: mov v1.h[3], w7
; CHECK-GI-NEXT: mov v2.h[3], w8
; CHECK-GI-NEXT: mov v3.h[3], w9
; CHECK-GI-NEXT: ushll v0.4s, v0.4h, #0
; CHECK-GI-NEXT: shl v18.2d, v2.2d, #54
; CHECK-GI-NEXT: mov v3.h[3], v4.h[0]
; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0
; CHECK-GI-NEXT: ushll v2.4s, v2.4h, #0
; CHECK-GI-NEXT: ushll v3.4s, v3.4h, #0
; CHECK-GI-NEXT: ushll v4.2d, v0.2s, #0
; CHECK-GI-NEXT: ushll2 v0.2d, v0.4s, #0
; CHECK-GI-NEXT: ushll v3.4s, v3.4h, #0
; CHECK-GI-NEXT: ushll v5.2d, v1.2s, #0
; CHECK-GI-NEXT: ushll2 v1.2d, v1.4s, #0
; CHECK-GI-NEXT: shl v4.2d, v4.2d, #54
; CHECK-GI-NEXT: shl v16.2d, v0.2d, #54
; CHECK-GI-NEXT: ushll v6.2d, v2.2s, #0
; CHECK-GI-NEXT: ushll2 v2.2d, v2.4s, #0
; CHECK-GI-NEXT: ushll v7.2d, v3.2s, #0
; CHECK-GI-NEXT: ushll2 v3.2d, v3.4s, #0
; CHECK-GI-NEXT: shl v4.2d, v4.2d, #54
; CHECK-GI-NEXT: shl v16.2d, v0.2d, #54
; CHECK-GI-NEXT: shl v5.2d, v5.2d, #54
; CHECK-GI-NEXT: shl v17.2d, v1.2d, #54
; CHECK-GI-NEXT: sshr v0.2d, v4.2d, #54
; CHECK-GI-NEXT: sshr v1.2d, v16.2d, #54
; CHECK-GI-NEXT: sshr v4.2d, v6.2d, #54
; CHECK-GI-NEXT: shl v6.2d, v6.2d, #54
; CHECK-GI-NEXT: shl v18.2d, v2.2d, #54
; CHECK-GI-NEXT: shl v7.2d, v7.2d, #54
; CHECK-GI-NEXT: shl v19.2d, v3.2d, #54
; CHECK-GI-NEXT: sshr v0.2d, v4.2d, #54
; CHECK-GI-NEXT: sshr v1.2d, v16.2d, #54
; CHECK-GI-NEXT: sshr v2.2d, v5.2d, #54
; CHECK-GI-NEXT: sshr v3.2d, v17.2d, #54
; CHECK-GI-NEXT: sshr v4.2d, v6.2d, #54
; CHECK-GI-NEXT: sshr v5.2d, v18.2d, #54
; CHECK-GI-NEXT: sshr v6.2d, v7.2d, #54
; CHECK-GI-NEXT: sshr v7.2d, v19.2d, #54
Expand Down
177 changes: 93 additions & 84 deletions llvm/test/CodeGen/AArch64/shift.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -537,22 +537,29 @@ define <4 x i8> @shl_v4i8(<4 x i8> %0, <4 x i8> %1){
; CHECK-GI-NEXT: mov h3, v1.h[1]
; CHECK-GI-NEXT: mov h4, v0.h[2]
; CHECK-GI-NEXT: mov h5, v0.h[3]
; CHECK-GI-NEXT: mov h6, v1.h[3]
; CHECK-GI-NEXT: mov v0.b[1], v2.b[0]
; CHECK-GI-NEXT: fmov w8, s2
; CHECK-GI-NEXT: mov h2, v1.h[2]
; CHECK-GI-NEXT: mov v1.b[1], v3.b[0]
; CHECK-GI-NEXT: mov v0.b[2], v4.b[0]
; CHECK-GI-NEXT: mov v1.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v0.b[3], v5.b[0]
; CHECK-GI-NEXT: mov v1.b[3], v6.b[0]
; CHECK-GI-NEXT: fmov w9, s3
; CHECK-GI-NEXT: mov h3, v1.h[3]
; CHECK-GI-NEXT: mov v0.b[1], w8
; CHECK-GI-NEXT: mov v1.b[1], w9
; CHECK-GI-NEXT: fmov w8, s4
; CHECK-GI-NEXT: fmov w9, s2
; CHECK-GI-NEXT: mov v0.b[2], w8
; CHECK-GI-NEXT: mov v1.b[2], w9
; CHECK-GI-NEXT: fmov w8, s5
; CHECK-GI-NEXT: fmov w9, s3
; CHECK-GI-NEXT: mov v0.b[3], w8
; CHECK-GI-NEXT: mov v1.b[3], w9
; CHECK-GI-NEXT: ushl v0.8b, v0.8b, v1.8b
; CHECK-GI-NEXT: mov b1, v0.b[1]
; CHECK-GI-NEXT: mov b2, v0.b[2]
; CHECK-GI-NEXT: mov b3, v0.b[3]
; CHECK-GI-NEXT: mov v0.b[1], v1.b[0]
; CHECK-GI-NEXT: mov v0.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v0.b[3], v3.b[0]
; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0
; CHECK-GI-NEXT: mov v2.b[0], v0.b[0]
; CHECK-GI-NEXT: mov b3, v0.b[2]
; CHECK-GI-NEXT: mov b0, v0.b[3]
; CHECK-GI-NEXT: mov v2.b[1], v1.b[0]
; CHECK-GI-NEXT: mov v2.b[2], v3.b[0]
; CHECK-GI-NEXT: mov v2.b[3], v0.b[0]
; CHECK-GI-NEXT: ushll v0.8h, v2.8b, #0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
%3 = shl <4 x i8> %0, %1
Expand Down Expand Up @@ -587,10 +594,10 @@ define <2 x i16> @shl_v2i16(<2 x i16> %0, <2 x i16> %1){
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
; CHECK-GI-NEXT: mov s2, v0.s[1]
; CHECK-GI-NEXT: mov s3, v1.s[1]
; CHECK-GI-NEXT: mov v0.h[1], v2.h[0]
; CHECK-GI-NEXT: mov v1.h[1], v3.h[0]
; CHECK-GI-NEXT: mov w8, v0.s[1]
; CHECK-GI-NEXT: mov w9, v1.s[1]
; CHECK-GI-NEXT: mov v0.h[1], w8
; CHECK-GI-NEXT: mov v1.h[1], w9
; CHECK-GI-NEXT: ushl v0.4h, v0.4h, v1.4h
; CHECK-GI-NEXT: mov h1, v0.h[1]
; CHECK-GI-NEXT: mov v0.h[1], v1.h[0]
Expand Down Expand Up @@ -628,7 +635,7 @@ define <1 x i32> @shl_v1i32(<1 x i32> %0, <1 x i32> %1){
; CHECK-GI-NEXT: fmov w8, s0
; CHECK-GI-NEXT: fmov w9, s1
; CHECK-GI-NEXT: lsl w8, w8, w9
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: mov v0.s[0], w8
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
%3 = shl <1 x i32> %0, %1
Expand Down Expand Up @@ -684,24 +691,31 @@ define <4 x i8> @ashr_v4i8(<4 x i8> %0, <4 x i8> %1){
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
; CHECK-GI-NEXT: mov h3, v0.h[1]
; CHECK-GI-NEXT: mov h4, v1.h[2]
; CHECK-GI-NEXT: mov h5, v1.h[3]
; CHECK-GI-NEXT: mov h6, v0.h[3]
; CHECK-GI-NEXT: mov v1.b[1], v2.b[0]
; CHECK-GI-NEXT: mov h2, v0.h[2]
; CHECK-GI-NEXT: mov v0.b[1], v3.b[0]
; CHECK-GI-NEXT: mov v1.b[2], v4.b[0]
; CHECK-GI-NEXT: mov v0.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v1.b[3], v5.b[0]
; CHECK-GI-NEXT: mov v0.b[3], v6.b[0]
; CHECK-GI-NEXT: fmov w8, s2
; CHECK-GI-NEXT: mov h2, v1.h[3]
; CHECK-GI-NEXT: fmov w9, s4
; CHECK-GI-NEXT: mov h4, v0.h[3]
; CHECK-GI-NEXT: mov v1.b[1], w8
; CHECK-GI-NEXT: fmov w8, s3
; CHECK-GI-NEXT: mov h3, v0.h[2]
; CHECK-GI-NEXT: mov v0.b[1], w8
; CHECK-GI-NEXT: fmov w8, s3
; CHECK-GI-NEXT: mov v1.b[2], w9
; CHECK-GI-NEXT: mov v0.b[2], w8
; CHECK-GI-NEXT: fmov w8, s2
; CHECK-GI-NEXT: mov v1.b[3], w8
; CHECK-GI-NEXT: fmov w8, s4
; CHECK-GI-NEXT: mov v0.b[3], w8
; CHECK-GI-NEXT: neg v1.8b, v1.8b
; CHECK-GI-NEXT: sshl v0.8b, v0.8b, v1.8b
; CHECK-GI-NEXT: mov b1, v0.b[1]
; CHECK-GI-NEXT: mov b2, v0.b[2]
; CHECK-GI-NEXT: mov b3, v0.b[3]
; CHECK-GI-NEXT: mov v0.b[1], v1.b[0]
; CHECK-GI-NEXT: mov v0.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v0.b[3], v3.b[0]
; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0
; CHECK-GI-NEXT: mov v2.b[0], v0.b[0]
; CHECK-GI-NEXT: mov b3, v0.b[2]
; CHECK-GI-NEXT: mov b0, v0.b[3]
; CHECK-GI-NEXT: mov v2.b[1], v1.b[0]
; CHECK-GI-NEXT: mov v2.b[2], v3.b[0]
; CHECK-GI-NEXT: mov v2.b[3], v0.b[0]
; CHECK-GI-NEXT: ushll v0.8h, v2.8b, #0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
%3 = ashr <4 x i8> %0, %1
Expand Down Expand Up @@ -734,11 +748,11 @@ define <2 x i16> @ashr_v2i16(<2 x i16> %0, <2 x i16> %1){
; CHECK-GI-LABEL: ashr_v2i16:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
; CHECK-GI-NEXT: mov s2, v1.s[1]
; CHECK-GI-NEXT: mov w8, v1.s[1]
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
; CHECK-GI-NEXT: mov s3, v0.s[1]
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: mov v0.h[1], v3.h[0]
; CHECK-GI-NEXT: mov w9, v0.s[1]
; CHECK-GI-NEXT: mov v1.h[1], w8
; CHECK-GI-NEXT: mov v0.h[1], w9
; CHECK-GI-NEXT: neg v1.4h, v1.4h
; CHECK-GI-NEXT: sshl v0.4h, v0.4h, v1.4h
; CHECK-GI-NEXT: mov h1, v0.h[1]
Expand Down Expand Up @@ -774,7 +788,7 @@ define <1 x i32> @ashr_v1i32(<1 x i32> %0, <1 x i32> %1){
; CHECK-GI-NEXT: fmov w8, s0
; CHECK-GI-NEXT: fmov w9, s1
; CHECK-GI-NEXT: asr w8, w8, w9
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: mov v0.s[0], w8
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
%3 = ashr <1 x i32> %0, %1
Expand Down Expand Up @@ -821,24 +835,31 @@ define <4 x i8> @lshr_v4i8(<4 x i8> %0, <4 x i8> %1){
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
; CHECK-GI-NEXT: mov h3, v0.h[1]
; CHECK-GI-NEXT: mov h4, v1.h[2]
; CHECK-GI-NEXT: mov h5, v1.h[3]
; CHECK-GI-NEXT: mov h6, v0.h[3]
; CHECK-GI-NEXT: mov v1.b[1], v2.b[0]
; CHECK-GI-NEXT: mov h2, v0.h[2]
; CHECK-GI-NEXT: mov v0.b[1], v3.b[0]
; CHECK-GI-NEXT: mov v1.b[2], v4.b[0]
; CHECK-GI-NEXT: mov v0.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v1.b[3], v5.b[0]
; CHECK-GI-NEXT: mov v0.b[3], v6.b[0]
; CHECK-GI-NEXT: fmov w8, s2
; CHECK-GI-NEXT: mov h2, v1.h[3]
; CHECK-GI-NEXT: fmov w9, s4
; CHECK-GI-NEXT: mov h4, v0.h[3]
; CHECK-GI-NEXT: mov v1.b[1], w8
; CHECK-GI-NEXT: fmov w8, s3
; CHECK-GI-NEXT: mov h3, v0.h[2]
; CHECK-GI-NEXT: mov v0.b[1], w8
; CHECK-GI-NEXT: fmov w8, s3
; CHECK-GI-NEXT: mov v1.b[2], w9
; CHECK-GI-NEXT: mov v0.b[2], w8
; CHECK-GI-NEXT: fmov w8, s2
; CHECK-GI-NEXT: mov v1.b[3], w8
; CHECK-GI-NEXT: fmov w8, s4
; CHECK-GI-NEXT: mov v0.b[3], w8
; CHECK-GI-NEXT: neg v1.8b, v1.8b
; CHECK-GI-NEXT: ushl v0.8b, v0.8b, v1.8b
; CHECK-GI-NEXT: mov b1, v0.b[1]
; CHECK-GI-NEXT: mov b2, v0.b[2]
; CHECK-GI-NEXT: mov b3, v0.b[3]
; CHECK-GI-NEXT: mov v0.b[1], v1.b[0]
; CHECK-GI-NEXT: mov v0.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v0.b[3], v3.b[0]
; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0
; CHECK-GI-NEXT: mov v2.b[0], v0.b[0]
; CHECK-GI-NEXT: mov b3, v0.b[2]
; CHECK-GI-NEXT: mov b0, v0.b[3]
; CHECK-GI-NEXT: mov v2.b[1], v1.b[0]
; CHECK-GI-NEXT: mov v2.b[2], v3.b[0]
; CHECK-GI-NEXT: mov v2.b[3], v0.b[0]
; CHECK-GI-NEXT: ushll v0.8h, v2.8b, #0
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
%3 = lshr <4 x i8> %0, %1
Expand Down Expand Up @@ -870,11 +891,11 @@ define <2 x i16> @lshr_v2i16(<2 x i16> %0, <2 x i16> %1){
; CHECK-GI-LABEL: lshr_v2i16:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
; CHECK-GI-NEXT: mov s2, v1.s[1]
; CHECK-GI-NEXT: mov w8, v1.s[1]
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
; CHECK-GI-NEXT: mov s3, v0.s[1]
; CHECK-GI-NEXT: mov v1.h[1], v2.h[0]
; CHECK-GI-NEXT: mov v0.h[1], v3.h[0]
; CHECK-GI-NEXT: mov w9, v0.s[1]
; CHECK-GI-NEXT: mov v1.h[1], w8
; CHECK-GI-NEXT: mov v0.h[1], w9
; CHECK-GI-NEXT: neg v1.4h, v1.4h
; CHECK-GI-NEXT: ushl v0.4h, v0.4h, v1.4h
; CHECK-GI-NEXT: mov h1, v0.h[1]
Expand Down Expand Up @@ -910,7 +931,7 @@ define <1 x i32> @lshr_v1i32(<1 x i32> %0, <1 x i32> %1){
; CHECK-GI-NEXT: fmov w8, s0
; CHECK-GI-NEXT: fmov w9, s1
; CHECK-GI-NEXT: lsr w8, w8, w9
; CHECK-GI-NEXT: fmov s0, w8
; CHECK-GI-NEXT: mov v0.s[0], w8
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
; CHECK-GI-NEXT: ret
%3 = lshr <1 x i32> %0, %1
Expand Down Expand Up @@ -962,16 +983,12 @@ define <3 x i8> @shl_v3i8(<3 x i8> %0, <3 x i8> %1){
; CHECK-GI-LABEL: shl_v3i8:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: fmov s0, w0
; CHECK-GI-NEXT: fmov s1, w1
; CHECK-GI-NEXT: fmov s2, w3
; CHECK-GI-NEXT: fmov s3, w4
; CHECK-GI-NEXT: mov v0.b[1], v1.b[0]
; CHECK-GI-NEXT: fmov s1, w2
; CHECK-GI-NEXT: mov v2.b[1], v3.b[0]
; CHECK-GI-NEXT: fmov s3, w5
; CHECK-GI-NEXT: mov v0.b[2], v1.b[0]
; CHECK-GI-NEXT: mov v2.b[2], v3.b[0]
; CHECK-GI-NEXT: ushl v0.8b, v0.8b, v2.8b
; CHECK-GI-NEXT: fmov s1, w3
; CHECK-GI-NEXT: mov v0.b[1], w1
; CHECK-GI-NEXT: mov v1.b[1], w4
; CHECK-GI-NEXT: mov v0.b[2], w2
; CHECK-GI-NEXT: mov v1.b[2], w5
; CHECK-GI-NEXT: ushl v0.8b, v0.8b, v1.8b
; CHECK-GI-NEXT: umov w0, v0.b[0]
; CHECK-GI-NEXT: umov w1, v0.b[1]
; CHECK-GI-NEXT: umov w2, v0.b[2]
Expand Down Expand Up @@ -1038,15 +1055,11 @@ define <3 x i8> @ashr_v3i8(<3 x i8> %0, <3 x i8> %1){
; CHECK-GI-LABEL: ashr_v3i8:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: fmov s0, w3
; CHECK-GI-NEXT: fmov s1, w4
; CHECK-GI-NEXT: fmov s2, w1
; CHECK-GI-NEXT: mov v0.b[1], v1.b[0]
; CHECK-GI-NEXT: fmov s1, w0
; CHECK-GI-NEXT: mov v1.b[1], v2.b[0]
; CHECK-GI-NEXT: fmov s2, w5
; CHECK-GI-NEXT: mov v0.b[2], v2.b[0]
; CHECK-GI-NEXT: fmov s2, w2
; CHECK-GI-NEXT: mov v1.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v0.b[1], w4
; CHECK-GI-NEXT: mov v1.b[1], w1
; CHECK-GI-NEXT: mov v0.b[2], w5
; CHECK-GI-NEXT: mov v1.b[2], w2
; CHECK-GI-NEXT: neg v0.8b, v0.8b
; CHECK-GI-NEXT: sshl v0.8b, v1.8b, v0.8b
; CHECK-GI-NEXT: umov w0, v0.b[0]
Expand Down Expand Up @@ -1118,15 +1131,11 @@ define <3 x i8> @lshr_v3i8(<3 x i8> %0, <3 x i8> %1){
; CHECK-GI-LABEL: lshr_v3i8:
; CHECK-GI: // %bb.0:
; CHECK-GI-NEXT: fmov s0, w3
; CHECK-GI-NEXT: fmov s1, w4
; CHECK-GI-NEXT: fmov s2, w1
; CHECK-GI-NEXT: mov v0.b[1], v1.b[0]
; CHECK-GI-NEXT: fmov s1, w0
; CHECK-GI-NEXT: mov v1.b[1], v2.b[0]
; CHECK-GI-NEXT: fmov s2, w5
; CHECK-GI-NEXT: mov v0.b[2], v2.b[0]
; CHECK-GI-NEXT: fmov s2, w2
; CHECK-GI-NEXT: mov v1.b[2], v2.b[0]
; CHECK-GI-NEXT: mov v0.b[1], w4
; CHECK-GI-NEXT: mov v1.b[1], w1
; CHECK-GI-NEXT: mov v0.b[2], w5
; CHECK-GI-NEXT: mov v1.b[2], w2
; CHECK-GI-NEXT: neg v0.8b, v0.8b
; CHECK-GI-NEXT: ushl v0.8b, v1.8b, v0.8b
; CHECK-GI-NEXT: umov w0, v0.b[0]
Expand Down
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