diff --git a/llvm/include/llvm/CodeGen/ValueTypes.td b/llvm/include/llvm/CodeGen/ValueTypes.td
diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
@@ -182,13 +182,99 @@ def ArgKind {
   int MatchType  = 7;
 }
 
+//===----------------------------------------------------------------------===//
+// IIT_Info
+//===----------------------------------------------------------------------===//
+
+class IIT_Base<int num> {
+  int Number = num;
+  list<ValueType> VTs = ?;
+}
+
+class IIT_VT<ValueType vt, int num> : IIT_Base<num> {
+  let VTs = [vt];
+}
+
+class IIT_Int<int size, int num> : IIT_Base<num> {
+  let VTs = !filter(vti, ValueTypes,
+    !and(vti.isInteger, !eq(vti.Size, size)));
+}
+
+class IIT_Vec<int nelem, int num> : IIT_Base<num> {
+  let VTs = !filter(vti, ValueTypes,
+    !and(vti.isVector, !eq(vti.nElem, nelem)));
+}
+
+defset list<IIT_Base> IIT_all = {
+def IIT_Done : IIT_Base<    0>;
+def IIT_I1   : IIT_Int<1,   1>;
+def IIT_I8   : IIT_Int<8,   2>;
+def IIT_I16  : IIT_Int<16,  3>;
+def IIT_I32  : IIT_Int<32,  4>;
+def IIT_I64  : IIT_Int<64,  5>;
+def IIT_F16  : IIT_VT<f16,  6>;
+def IIT_F32  : IIT_VT<f32,  7>;
+def IIT_F64  : IIT_VT<f64,  8>;
+def IIT_V2   : IIT_Vec<2,   9>;
+def IIT_V4   : IIT_Vec<4,  10>;
+def IIT_V8   : IIT_Vec<8,  11>;
+def IIT_V16  : IIT_Vec<16, 12>;
+def IIT_V32  : IIT_Vec<32, 13>;
+def IIT_PTR  : IIT_Base<   14>;
+def IIT_ARG  : IIT_Base<   15>;
+
+def IIT_V64 : IIT_Vec<64, 16>;
+def IIT_MMX : IIT_VT<x86mmx, 17>;
+def IIT_TOKEN : IIT_VT<token, 18>;
+def IIT_METADATA : IIT_VT<MetadataVT, 19>;
+def IIT_EMPTYSTRUCT : IIT_VT<OtherVT, 20>;
+def IIT_STRUCT2 : IIT_Base<21>;
+def IIT_STRUCT3 : IIT_Base<22>;
+def IIT_STRUCT4 : IIT_Base<23>;
+def IIT_STRUCT5 : IIT_Base<24>;
+def IIT_EXTEND_ARG : IIT_Base<25>;
+def IIT_TRUNC_ARG : IIT_Base<26>;
+def IIT_ANYPTR : IIT_Base<27>;
+def IIT_V1 : IIT_Vec<1, 28>;
+def IIT_VARARG : IIT_VT<isVoid, 29>;
+def IIT_HALF_VEC_ARG : IIT_Base<30>;
+def IIT_SAME_VEC_WIDTH_ARG : IIT_Base<31>;
+def IIT_PTR_TO_ARG : IIT_Base<32>;
+def IIT_PTR_TO_ELT : IIT_Base<33>;
+def IIT_VEC_OF_ANYPTRS_TO_ELT : IIT_Base<34>;
+def IIT_I128 : IIT_Int<128, 35>;
+def IIT_V512 : IIT_Vec<512, 36>;
+def IIT_V1024 : IIT_Vec<1024, 37>;
+def IIT_STRUCT6 : IIT_Base<38>;
+def IIT_STRUCT7 : IIT_Base<39>;
+def IIT_STRUCT8 : IIT_Base<40>;
+def IIT_F128 : IIT_VT<f128, 41>;
+def IIT_VEC_ELEMENT : IIT_Base<42>;
+def IIT_SCALABLE_VEC : IIT_Base<43>;
+def IIT_SUBDIVIDE2_ARG : IIT_Base<44>;
+def IIT_SUBDIVIDE4_ARG : IIT_Base<45>;
+def IIT_VEC_OF_BITCASTS_TO_INT : IIT_Base<46>;
+def IIT_V128 : IIT_Vec<128, 47>;
+def IIT_BF16 : IIT_VT<bf16, 48>;
+def IIT_STRUCT9 : IIT_Base<49>;
+def IIT_V256 : IIT_Vec<256, 50>;
+def IIT_AMX : IIT_VT<x86amx, 51>;
+def IIT_PPCF128 : IIT_VT<ppcf128, 52>;
+def IIT_V3 : IIT_Vec<3, 53>;
+def IIT_EXTERNREF : IIT_VT<externref, 54>;
+def IIT_FUNCREF : IIT_VT<funcref, 55>;
+def IIT_ANYPTR_TO_ELT : IIT_Base<56>;
+def IIT_I2 : IIT_Int<2, 57>;
+def IIT_I4 : IIT_Int<4, 58>;
+}
+
 //===----------------------------------------------------------------------===//
 // Types used by intrinsics.
 //===----------------------------------------------------------------------===//
 
 class LLVMType<ValueType vt> {
   ValueType VT = vt;
-  int isAny = false;
+  int isAny = vt.isOverloaded;
 }
 
 class LLVMQualPointerType<LLVMType elty, int addrspace>
@@ -204,7 +290,7 @@ class LLVMAnyPointerType<LLVMType elty>
   : LLVMType<iPTRAny>{
   LLVMType ElTy = elty;
 
-  let isAny = true;
+  assert isAny, "iPTRAny should have isOverloaded";
 }
 
 // Match the type of another intrinsic parameter.  Number is an index into the
@@ -254,12 +340,12 @@ class LLVMSubdivide4VectorType<int num> : LLVMMatchType<num>;
 class LLVMVectorOfBitcastsToInt<int num> : LLVMMatchType<num>;
 
 def llvm_void_ty       : LLVMType<isVoid>;
-let isAny = true in {
-  def llvm_any_ty        : LLVMType<Any>;
-  def llvm_anyint_ty     : LLVMType<iAny>;
-  def llvm_anyfloat_ty   : LLVMType<fAny>;
-  def llvm_anyvector_ty  : LLVMType<vAny>;
-}
+
+def llvm_any_ty        : LLVMType<Any>;
+def llvm_anyint_ty     : LLVMType<iAny>;
+def llvm_anyfloat_ty   : LLVMType<fAny>;
+def llvm_anyvector_ty  : LLVMType<vAny>;
+
 def llvm_i1_ty         : LLVMType<i1>;
 def llvm_i8_ty         : LLVMType<i8>;
 def llvm_i16_ty        : LLVMType<i16>;

diff --git a/llvm/lib/CodeGen/CMakeLists.txt b/llvm/lib/CodeGen/CMakeLists.txt
@@ -99,7 +99,7 @@ add_llvm_component_library(LLVMCodeGen
   LLVMTargetMachine.cpp
   LocalStackSlotAllocation.cpp
   LoopTraversal.cpp
-  LowLevelType.cpp
+  LowLevelTypeUtils.cpp
   LowerEmuTLS.cpp
   MachineBasicBlock.cpp
   MachineBlockFrequencyInfo.cpp

diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -16,7 +16,7 @@
 #include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
 #include "llvm/CodeGen/GlobalISel/Utils.h"
-#include "llvm/CodeGen/LowLevelType.h"
+#include "llvm/CodeGen/LowLevelTypeUtils.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineInstr.h"

diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -28,7 +28,7 @@
 #include "llvm/CodeGen/GlobalISel/GISelChangeObserver.h"
 #include "llvm/CodeGen/GlobalISel/InlineAsmLowering.h"
 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
-#include "llvm/CodeGen/LowLevelType.h"
+#include "llvm/CodeGen/LowLevelTypeUtils.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"

diff --git a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
@@ -20,7 +20,7 @@
 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
 #include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
 #include "llvm/CodeGen/GlobalISel/Utils.h"
-#include "llvm/CodeGen/LowLevelType.h"
+#include "llvm/CodeGen/LowLevelTypeUtils.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"

diff --git a/llvm/lib/CodeGen/LowLevelType.cpp → llvm/lib/CodeGen/LowLevelTypeUtils.cpp b/llvm/lib/CodeGen/LowLevelType.cpp → llvm/lib/CodeGen/LowLevelTypeUtils.cpp
@@ -1,4 +1,4 @@
-//===-- llvm/CodeGen/LowLevelType.cpp -------------------------------------===//
+//===-- llvm/CodeGen/LowLevelTypeUtils.cpp --------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
@@ -11,7 +11,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/CodeGen/LowLevelType.h"
+#include "llvm/CodeGen/LowLevelTypeUtils.h"
 #include "llvm/ADT/APFloat.h"
 #include "llvm/IR/DataLayout.h"
 #include "llvm/IR/DerivedTypes.h"

diff --git a/llvm/lib/IR/Function.cpp b/llvm/lib/IR/Function.cpp
@@ -1023,70 +1023,11 @@ std::string Intrinsic::getNameNoUnnamedTypes(ID Id, ArrayRef<Type *> Tys) {
 /// IIT_Info - These are enumerators that describe the entries returned by the
 /// getIntrinsicInfoTableEntries function.
 ///
-/// NOTE: This must be kept in synch with the copy in TblGen/IntrinsicEmitter!
+/// Defined in Intrinsics.td.
 enum IIT_Info {
-  // Common values should be encoded with 0-15.
-  IIT_Done = 0,
-  IIT_I1 = 1,
-  IIT_I8 = 2,
-  IIT_I16 = 3,
-  IIT_I32 = 4,
-  IIT_I64 = 5,
-  IIT_F16 = 6,
-  IIT_F32 = 7,
-  IIT_F64 = 8,
-  IIT_V2 = 9,
-  IIT_V4 = 10,
-  IIT_V8 = 11,
-  IIT_V16 = 12,
-  IIT_V32 = 13,
-  IIT_PTR = 14,
-  IIT_ARG = 15,
-
-  // Values from 16+ are only encodable with the inefficient encoding.
-  IIT_V64 = 16,
-  IIT_MMX = 17,
-  IIT_TOKEN = 18,
-  IIT_METADATA = 19,
-  IIT_EMPTYSTRUCT = 20,
-  IIT_STRUCT2 = 21,
-  IIT_STRUCT3 = 22,
-  IIT_STRUCT4 = 23,
-  IIT_STRUCT5 = 24,
-  IIT_EXTEND_ARG = 25,
-  IIT_TRUNC_ARG = 26,
-  IIT_ANYPTR = 27,
-  IIT_V1 = 28,
-  IIT_VARARG = 29,
-  IIT_HALF_VEC_ARG = 30,
-  IIT_SAME_VEC_WIDTH_ARG = 31,
-  IIT_PTR_TO_ARG = 32,
-  IIT_PTR_TO_ELT = 33,
-  IIT_VEC_OF_ANYPTRS_TO_ELT = 34,
-  IIT_I128 = 35,
-  IIT_V512 = 36,
-  IIT_V1024 = 37,
-  IIT_STRUCT6 = 38,
-  IIT_STRUCT7 = 39,
-  IIT_STRUCT8 = 40,
-  IIT_F128 = 41,
-  IIT_VEC_ELEMENT = 42,
-  IIT_SCALABLE_VEC = 43,
-  IIT_SUBDIVIDE2_ARG = 44,
-  IIT_SUBDIVIDE4_ARG = 45,
-  IIT_VEC_OF_BITCASTS_TO_INT = 46,
-  IIT_V128 = 47,
-  IIT_BF16 = 48,
-  IIT_STRUCT9 = 49,
-  IIT_V256 = 50,
-  IIT_AMX = 51,
-  IIT_PPCF128 = 52,
-  IIT_V3 = 53,
-  IIT_EXTERNREF = 54,
-  IIT_FUNCREF = 55,
-  IIT_ANYPTR_TO_ELT = 56,
-  IIT_I2 = 57,
-  IIT_I4 = 58,
+#define GET_INTRINSIC_IITINFO
+#include "llvm/IR/IntrinsicImpl.inc"
+#undef GET_INTRINSIC_IITINFO
 };
 
 static void DecodeIITType(unsigned &NextElt, ArrayRef<unsigned char> Infos,

diff --git a/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
@@ -25,7 +25,7 @@
 #include "llvm/CodeGen/FunctionLoweringInfo.h"
 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
 #include "llvm/CodeGen/GlobalISel/Utils.h"
-#include "llvm/CodeGen/LowLevelType.h"
+#include "llvm/CodeGen/LowLevelTypeUtils.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"

diff --git a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
@@ -18,7 +18,7 @@
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
 #include "llvm/CodeGen/GlobalISel/Utils.h"
-#include "llvm/CodeGen/LowLevelType.h"
+#include "llvm/CodeGen/LowLevelTypeUtils.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineOperand.h"

diff --git a/llvm/lib/Target/ARM/ARMCallLowering.cpp b/llvm/lib/Target/ARM/ARMCallLowering.cpp
@@ -22,7 +22,7 @@
 #include "llvm/CodeGen/CallingConvLower.h"
 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
 #include "llvm/CodeGen/GlobalISel/Utils.h"
-#include "llvm/CodeGen/LowLevelType.h"
+#include "llvm/CodeGen/LowLevelTypeUtils.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"

diff --git a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
@@ -15,7 +15,7 @@
 #include "ARMSubtarget.h"
 #include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
-#include "llvm/CodeGen/LowLevelType.h"
+#include "llvm/CodeGen/LowLevelTypeUtils.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/TargetOpcodes.h"
 #include "llvm/CodeGen/ValueTypes.h"

diff --git a/llvm/lib/Target/X86/X86CallLowering.cpp b/llvm/lib/Target/X86/X86CallLowering.cpp
@@ -25,7 +25,7 @@
 #include "llvm/CodeGen/FunctionLoweringInfo.h"
 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
 #include "llvm/CodeGen/GlobalISel/Utils.h"
-#include "llvm/CodeGen/LowLevelType.h"
+#include "llvm/CodeGen/LowLevelTypeUtils.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"

diff --git a/llvm/unittests/CodeGen/LowLevelTypeTest.cpp b/llvm/unittests/CodeGen/LowLevelTypeTest.cpp
@@ -6,7 +6,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/CodeGen/LowLevelType.h"
+#include "llvm/CodeGen/LowLevelTypeUtils.h"
 #include "llvm/IR/DataLayout.h"
 #include "llvm/IR/DerivedTypes.h"
 #include "llvm/IR/LLVMContext.h"

diff --git a/llvm/unittests/Support/MachineValueType.h b/llvm/unittests/Support/MachineValueType.h
diff --git a/llvm/utils/TableGen/IntrinsicEmitter.cpp b/llvm/utils/TableGen/IntrinsicEmitter.cpp
@@ -28,6 +28,7 @@
 #include "llvm/TableGen/StringToOffsetTable.h"
 #include "llvm/TableGen/TableGenBackend.h"
 #include <algorithm>
+#include <array>
 #include <cassert>
 #include <map>
 #include <optional>
@@ -54,6 +55,7 @@ class IntrinsicEmitter {
 
   void EmitEnumInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
   void EmitArgKind(raw_ostream &OS);
+  void EmitIITInfo(raw_ostream &OS);
   void EmitTargetInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
   void EmitIntrinsicToNameTable(const CodeGenIntrinsicTable &Ints,
                                 raw_ostream &OS);
@@ -82,6 +84,9 @@ void IntrinsicEmitter::run(raw_ostream &OS, bool Enums) {
     // Emit ArgKind for Intrinsics.h.
     EmitArgKind(OS);
   } else {
+    // Emit IIT_Info constants.
+    EmitIITInfo(OS);
+
     // Emit the target metadata.
     EmitTargetInfo(Ints, OS);
 
@@ -180,6 +185,27 @@ void IntrinsicEmitter::EmitArgKind(raw_ostream &OS) {
   OS << "#endif\n\n";
 }
 
+void IntrinsicEmitter::EmitIITInfo(raw_ostream &OS) {
+  OS << "#ifdef GET_INTRINSIC_IITINFO\n";
+  std::array<StringRef, 256> RecsByNumber;
+  auto IIT_Base = Records.getAllDerivedDefinitionsIfDefined("IIT_Base");
+  for (auto Rec : IIT_Base) {
+    auto Number = Rec->getValueAsInt("Number");
+    assert(0 <= Number && Number < (int)RecsByNumber.size() &&
+           "IIT_Info.Number should be uint8_t");
+    assert(RecsByNumber[Number].empty() && "Duplicate IIT_Info.Number");
+    RecsByNumber[Number] = Rec->getName();
+  }
+  if (IIT_Base.size() > 0) {
+    for (unsigned I = 0, E = RecsByNumber.size(); I < E; ++I)
+      if (!RecsByNumber[I].empty())
+        OS << "  " << RecsByNumber[I] << " = " << I << ",\n";
+  } else {
+    OS << "#error \"class IIT_Base is not defined\"\n";
+  }
+  OS << "#endif\n\n";
+}
+
 void IntrinsicEmitter::EmitTargetInfo(const CodeGenIntrinsicTable &Ints,
                                     raw_ostream &OS) {
   OS << "// Target mapping\n";

diff --git a/llvm/utils/TableGen/VTEmitter.cpp b/llvm/utils/TableGen/VTEmitter.cpp
@@ -7,7 +7,6 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/ADT/StringRef.h"
-#include "llvm/ADT/StringSwitch.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/TableGen/Record.h"
 #include "llvm/TableGen/TableGenBackend.h"
@@ -63,26 +62,41 @@ void VTEmitter::run(raw_ostream &OS) {
     }
   };
 
-  OS << "#ifdef GET_VT_ATTR // (Ty, n, sz)\n";
+  OS << "#ifdef GET_VT_ATTR // (Ty, n, sz, Any, Int, FP, Vec, Sc)\n";
   for (const auto *VT : VTsByNumber) {
     if (!VT)
       continue;
-    auto Name = VT->getName();
-    Name = StringSwitch<StringRef>(Name)
-               .Case("OtherVT", "Other")
-               .Case("FlagVT", "Glue")
-               .Case("untyped", "Untyped")
-               .Case("MetadataVT", "Metadata")
-               .Default(Name);
+    auto Name = VT->getValueAsString("LLVMName");
     auto Value = VT->getValueAsInt("Value");
-
+    bool IsInteger = VT->getValueAsInt("isInteger");
+    bool IsFP = VT->getValueAsInt("isFP");
+    bool IsVector = VT->getValueAsInt("isVector");
+    bool IsScalable = VT->getValueAsInt("isScalable");
+
+    UpdateVTRange("INTEGER_FIXEDLEN_VECTOR_VALUETYPE", Name,
+                  IsInteger && IsVector && !IsScalable);
+    UpdateVTRange("INTEGER_SCALABLE_VECTOR_VALUETYPE", Name,
+                  IsInteger && IsScalable);
+    UpdateVTRange("FP_FIXEDLEN_VECTOR_VALUETYPE", Name,
+                  IsFP && IsVector && !IsScalable);
+    UpdateVTRange("FP_SCALABLE_VECTOR_VALUETYPE", Name, IsFP && IsScalable);
+    UpdateVTRange("FIXEDLEN_VECTOR_VALUETYPE", Name, IsVector && !IsScalable);
+    UpdateVTRange("SCALABLE_VECTOR_VALUETYPE", Name, IsScalable);
+    UpdateVTRange("VECTOR_VALUETYPE", Name, IsVector);
+    UpdateVTRange("INTEGER_VALUETYPE", Name, IsInteger && !IsVector);
+    UpdateVTRange("FP_VALUETYPE", Name, IsFP && !IsVector);
     UpdateVTRange("VALUETYPE", Name, Value < 224);
 
     // clang-format off
     OS << "  GET_VT_ATTR("
        << Name << ", "
        << Value << ", "
-       << VT->getValueAsInt("Size") << ")\n";
+       << VT->getValueAsInt("Size") << ", "
+       << VT->getValueAsInt("isOverloaded") << ", "
+       << (IsInteger ? Name[0] == 'i' ? 3 : 1 : 0) << ", "
+       << (IsFP ? Name[0] == 'f' ? 3 : 1 : 0) << ", "
+       << IsVector << ", "
+       << IsScalable << ")\n";
     // clang-format on
   }
   OS << "#endif\n\n";
@@ -94,6 +108,23 @@ void VTEmitter::run(raw_ostream &OS) {
        << "  LAST_" << KV.first << " = " << KV.second.Last << ",\n";
   }
   OS << "#endif\n\n";
+
+  OS << "#ifdef GET_VT_VECATTR // (Ty, Sc, nElem, ElTy, ElSz)\n";
+  for (const auto *VT : VTsByNumber) {
+    if (!VT || !VT->getValueAsInt("isVector"))
+      continue;
+    const auto *ElTy = VT->getValueAsDef("ElementType");
+    assert(ElTy);
+    // clang-format off
+    OS << "  GET_VT_VECATTR("
+       << VT->getValueAsString("LLVMName") << ", "
+       << VT->getValueAsInt("isScalable") << ", "
+       << VT->getValueAsInt("nElem") << ", "
+       << ElTy->getName() << ", "
+       << ElTy->getValueAsInt("Size") << ")\n";
+    // clang-format on
+  }
+  OS << "#endif\n\n";
 }
 
 static TableGen::Emitter::OptClass<VTEmitter> X("gen-vt", "Generate ValueType");