127 changes: 100 additions & 27 deletions llvm/lib/Transforms/Vectorize/VPlan.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -573,16 +573,6 @@ class VPBlockBase {
/// Delete all blocks reachable from a given VPBlockBase, inclusive.
static void deleteCFG(VPBlockBase *Entry);

void printAsOperand(raw_ostream &OS, bool PrintType) const {
OS << getName();
}

void print(raw_ostream &OS) const {
// TODO: Only printing VPBB name for now since we only have dot printing
// support for VPInstructions/Recipes.
printAsOperand(OS, false);
}

/// Return true if it is legal to hoist instructions into this block.
bool isLegalToHoistInto() {
// There are currently no constraints that prevent an instruction to be
Expand All @@ -593,6 +583,30 @@ class VPBlockBase {
/// Replace all operands of VPUsers in the block with \p NewValue and also
/// replaces all uses of VPValues defined in the block with NewValue.
virtual void dropAllReferences(VPValue *NewValue) = 0;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void printAsOperand(raw_ostream &OS, bool PrintType) const {
OS << getName();
}

/// Print plain-text dump of this VPBlockBase to \p O, prefixing all lines
/// with \p Indent. \p SlotTracker is used to print unnamed VPValue's using
/// consequtive numbers.
///
/// Note that the numbering is applied to the whole VPlan, so printing
/// individual blocks is consistent with the whole VPlan printing.
virtual void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const = 0;

/// Print plain-text dump of this VPlan to \p O.
void print(raw_ostream &O) const {
VPSlotTracker SlotTracker(getPlan());
print(O, "", SlotTracker);
}

/// Dump this VPBlockBase to dbgs().
LLVM_DUMP_METHOD void dump() const { print(dbgs()); }
#endif
};

/// VPRecipeBase is a base class modeling a sequence of one or more output IR
Expand Down Expand Up @@ -748,12 +762,14 @@ class VPInstruction : public VPRecipeBase, public VPValue {
/// provided.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the VPInstruction to \p O.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;

/// Print the VPInstruction to dbgs() (for debugging).
void dump() const;
LLVM_DUMP_METHOD void dump() const;
#endif

/// Return true if this instruction may modify memory.
bool mayWriteToMemory() const {
Expand Down Expand Up @@ -807,9 +823,11 @@ class VPWidenRecipe : public VPRecipeBase, public VPValue {
/// Produce widened copies of all Ingredients.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif
};

/// A recipe for widening Call instructions.
Expand All @@ -831,9 +849,11 @@ class VPWidenCallRecipe : public VPRecipeBase, public VPValue {
/// Produce a widened version of the call instruction.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif
};

/// A recipe for widening select instructions.
Expand All @@ -860,9 +880,11 @@ class VPWidenSelectRecipe : public VPRecipeBase, public VPValue {
/// Produce a widened version of the select instruction.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif
};

/// A recipe for handling GEP instructions.
Expand Down Expand Up @@ -898,9 +920,11 @@ class VPWidenGEPRecipe : public VPRecipeBase, public VPValue {
/// Generate the gep nodes.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif
};

/// A recipe for handling phi nodes of integer and floating-point inductions,
Expand Down Expand Up @@ -931,9 +955,11 @@ class VPWidenIntOrFpInductionRecipe : public VPRecipeBase {
/// needed by their users.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif

/// Returns the start value of the induction.
VPValue *getStartValue() { return getOperand(0); }
Expand Down Expand Up @@ -993,9 +1019,11 @@ class VPWidenPHIRecipe : public VPRecipeBase, public VPValue {
/// Generate the phi/select nodes.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif

/// Returns the start value of the phi, if it is a reduction.
VPValue *getStartValue() {
Expand Down Expand Up @@ -1051,9 +1079,11 @@ class VPBlendRecipe : public VPRecipeBase, public VPValue {
/// Generate the phi/select nodes.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif
};

/// VPInterleaveRecipe is a recipe for transforming an interleave group of load
Expand Down Expand Up @@ -1114,9 +1144,11 @@ class VPInterleaveRecipe : public VPRecipeBase {
/// Generate the wide load or store, and shuffles.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif

const InterleaveGroup<Instruction> *getInterleaveGroup() { return IG; }
};
Expand Down Expand Up @@ -1154,9 +1186,11 @@ class VPReductionRecipe : public VPRecipeBase, public VPValue {
/// Generate the reduction in the loop
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif

/// The VPValue of the scalar Chain being accumulated.
VPValue *getChainOp() const { return getOperand(0); }
Expand Down Expand Up @@ -1214,9 +1248,11 @@ class VPReplicateRecipe : public VPRecipeBase, public VPValue {

void setAlsoPack(bool Pack) { AlsoPack = Pack; }

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif

bool isUniform() const { return IsUniform; }

Expand All @@ -1243,16 +1279,17 @@ class VPBranchOnMaskRecipe : public VPRecipeBase {
/// conditional branch.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override {
O << " +\n" << Indent << "\"BRANCH-ON-MASK ";
O << Indent << "BRANCH-ON-MASK ";
if (VPValue *Mask = getMask())
Mask->printAsOperand(O, SlotTracker);
else
O << " All-One";
O << "\\l\"";
}
#endif

/// Return the mask used by this recipe. Note that a full mask is represented
/// by a nullptr.
Expand Down Expand Up @@ -1285,9 +1322,11 @@ class VPPredInstPHIRecipe : public VPRecipeBase, public VPValue {
/// Generates phi nodes for live-outs as needed to retain SSA form.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif
};

/// A Recipe for widening load/store operations.
Expand Down Expand Up @@ -1352,9 +1391,11 @@ class VPWidenMemoryInstructionRecipe : public VPRecipeBase {
/// Generate the wide load/store.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif
};

/// A Recipe for widening the canonical induction variable of the vector loop.
Expand All @@ -1376,9 +1417,11 @@ class VPWidenCanonicalIVRecipe : public VPRecipeBase {
/// step = <VF*UF, VF*UF, ..., VF*UF>.
void execute(VPTransformState &State) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the recipe.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
#endif
};

/// VPBasicBlock serves as the leaf of the Hierarchical Control-Flow Graph. It
Expand Down Expand Up @@ -1463,6 +1506,17 @@ class VPBasicBlock : public VPBlockBase {

void dropAllReferences(VPValue *NewValue) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print this VPBsicBlock to \p O, prefixing all lines with \p Indent. \p
/// SlotTracker is used to print unnamed VPValue's using consequtive numbers.
///
/// Note that the numbering is applied to the whole VPlan, so printing
/// individual blocks is consistent with the whole VPlan printing.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
using VPBlockBase::print; // Get the print(raw_stream &O) version.
#endif

private:
/// Create an IR BasicBlock to hold the output instructions generated by this
/// VPBasicBlock, and return it. Update the CFGState accordingly.
Expand Down Expand Up @@ -1554,6 +1608,18 @@ class VPRegionBlock : public VPBlockBase {
void execute(struct VPTransformState *State) override;

void dropAllReferences(VPValue *NewValue) override;

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print this VPRegionBlock to \p O (recursively), prefixing all lines with
/// \p Indent. \p SlotTracker is used to print unnamed VPValue's using
/// consequtive numbers.
///
/// Note that the numbering is applied to the whole VPlan, so printing
/// individual regions is consistent with the whole VPlan printing.
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override;
using VPBlockBase::print; // Get the print(raw_stream &O) version.
#endif
};

//===----------------------------------------------------------------------===//
Expand Down Expand Up @@ -1806,8 +1872,16 @@ class VPlan {
VPLoopInfo &getVPLoopInfo() { return VPLInfo; }
const VPLoopInfo &getVPLoopInfo() const { return VPLInfo; }

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print this VPlan to \p O.
void print(raw_ostream &O) const;

/// Print this VPlan in DOT format to \p O.
void printDOT(raw_ostream &O) const;

/// Dump the plan to stderr (for debugging).
void dump() const;
LLVM_DUMP_METHOD void dump() const;
#endif

/// Returns a range mapping the values the range \p Operands to their
/// corresponding VPValues.
Expand All @@ -1827,14 +1901,10 @@ class VPlan {
BasicBlock *LoopExitBB);
};

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// VPlanPrinter prints a given VPlan to a given output stream. The printing is
/// indented and follows the dot format.
class VPlanPrinter {
friend inline raw_ostream &operator<<(raw_ostream &OS, const VPlan &Plan);
friend inline raw_ostream &operator<<(raw_ostream &OS,
const struct VPlanIngredient &I);

private:
raw_ostream &OS;
const VPlan &Plan;
unsigned Depth = 0;
Expand All @@ -1845,9 +1915,6 @@ class VPlanPrinter {

VPSlotTracker SlotTracker;

VPlanPrinter(raw_ostream &O, const VPlan &P)
: OS(O), Plan(P), SlotTracker(&P) {}

/// Handle indentation.
void bumpIndent(int b) { Indent = std::string((Depth += b) * TabWidth, ' '); }

Expand Down Expand Up @@ -1877,27 +1944,31 @@ class VPlanPrinter {
void drawEdge(const VPBlockBase *From, const VPBlockBase *To, bool Hidden,
const Twine &Label);

void dump();
public:
VPlanPrinter(raw_ostream &O, const VPlan &P)
: OS(O), Plan(P), SlotTracker(&P) {}

static void printAsIngredient(raw_ostream &O, const Value *V);
LLVM_DUMP_METHOD void dump();
};

struct VPlanIngredient {
const Value *V;

VPlanIngredient(const Value *V) : V(V) {}

void print(raw_ostream &O) const;
};

inline raw_ostream &operator<<(raw_ostream &OS, const VPlanIngredient &I) {
VPlanPrinter::printAsIngredient(OS, I.V);
I.print(OS);
return OS;
}

inline raw_ostream &operator<<(raw_ostream &OS, const VPlan &Plan) {
VPlanPrinter Printer(OS, Plan);
Printer.dump();
Plan.print(OS);
return OS;
}
#endif

//===----------------------------------------------------------------------===//
// VPlan Utilities
Expand Down Expand Up @@ -2113,8 +2184,10 @@ class VPlanSlp {
SmallPtrSetImpl<VPValue *> &Candidates,
VPInterleavedAccessInfo &IAI);

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print bundle \p Values to dbgs().
void dumpBundle(ArrayRef<VPValue *> Values);
#endif

public:
VPlanSlp(VPInterleavedAccessInfo &IAI, VPBasicBlock &BB) : IAI(IAI), BB(BB) {}
Expand Down
2 changes: 2 additions & 0 deletions llvm/lib/Transforms/Vectorize/VPlanSLP.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -349,6 +349,7 @@ SmallVector<VPlanSlp::MultiNodeOpTy, 4> VPlanSlp::reorderMultiNodeOps() {
return FinalOrder;
}

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void VPlanSlp::dumpBundle(ArrayRef<VPValue *> Values) {
dbgs() << " Ops: ";
for (auto Op : Values) {
Expand All @@ -361,6 +362,7 @@ void VPlanSlp::dumpBundle(ArrayRef<VPValue *> Values) {
}
dbgs() << "\n";
}
#endif

VPInstruction *VPlanSlp::buildGraph(ArrayRef<VPValue *> Values) {
assert(!Values.empty() && "Need some operands!");
Expand Down
6 changes: 6 additions & 0 deletions llvm/lib/Transforms/Vectorize/VPlanValue.h
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Original file line number Diff line number Diff line change
Expand Up @@ -116,11 +116,13 @@ class VPValue {
/// for any other purpose, as the values may change as LLVM evolves.
unsigned getVPValueID() const { return SubclassID; }

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void printAsOperand(raw_ostream &OS, VPSlotTracker &Tracker) const;
void print(raw_ostream &OS, VPSlotTracker &Tracker) const;

/// Dump the value to stderr (for debugging).
void dump() const;
#endif

unsigned getNumUsers() const { return Users.size(); }
void addUser(VPUser &User) { Users.push_back(&User); }
Expand Down Expand Up @@ -192,8 +194,10 @@ class VPUser {
SmallVector<VPValue *, 2> Operands;

protected:
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the operands to \p O.
void printOperands(raw_ostream &O, VPSlotTracker &SlotTracker) const;
#endif

public:
VPUser() {}
Expand Down Expand Up @@ -347,12 +351,14 @@ class VPDef {
/// for any other purpose, as the values may change as LLVM evolves.
unsigned getVPDefID() const { return SubclassID; }

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Dump the VPDef to stderr (for debugging).
void dump() const;

/// Each concrete VPDef prints itself.
virtual void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const = 0;
#endif
};

class VPlan;
Expand Down
13 changes: 7 additions & 6 deletions llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -36,12 +36,13 @@ for.end:
}

; Check for crash exposed by D76992.
; CHECK: N0 [label =
; CHECK-NEXT: "loop:\n" +
; CHECK-NEXT: "WIDEN-INDUCTION %iv = phi 0, %iv.next\l" +
; CHECK-NEXT: "WIDEN ir<%cond0> = icmp ir<%iv>, ir<13>\l" +
; CHECK-NEXT: "WIDEN-SELECT ir<%s> = select ir<%cond0>, ir<10>, ir<20>\l"
; CHECK-NEXT: ]
; CHECK: VPlan {
; CHECK-NEXT: loop:
; CHECK-NEXT: WIDEN-INDUCTION %iv = phi 0, %iv.next
; CHECK-NEXT: WIDEN ir<%cond0> = icmp ir<%iv>, ir<13>
; CHECK-NEXT: WIDEN-SELECT ir<%s> = select ir<%cond0>, ir<10>, ir<20>
; CHECK-NEXT: No successor
; CHECK-NEXT: }
define void @test() {
entry:
br label %loop
Expand Down
40 changes: 40 additions & 0 deletions llvm/test/Transforms/LoopVectorize/vplan-dot-printing.ll
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Original file line number Diff line number Diff line change
@@ -0,0 +1,40 @@
; REQUIRES: asserts

; RUN: opt -loop-vectorize -debug-only=loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -vplan-print-in-dot-format -disable-output %s 2>&1 | FileCheck %s

target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"

; Verify that -vplan-print-in-dot-format option works.

define void @print_call_and_memory(i64 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
; CHECK: N0 [label =
; CHECK-NEXT: "for.body:\l" +
; CHECK-NEXT: " WIDEN-INDUCTION %iv = phi %iv.next, 0\l" +
; CHECK-NEXT: " CLONE ir\<%arrayidx\> = getelementptr ir\<%y\>, ir\<%iv\>\l" +
; CHECK-NEXT: " WIDEN ir\<%lv\> = load ir\<%arrayidx\>\l" +
; CHECK-NEXT: " WIDEN-CALL ir\<%call\> = call @llvm.sqrt.f32(ir\<%lv\>)\l" +
; CHECK-NEXT: " CLONE ir\<%arrayidx2\> = getelementptr ir\<%x\>, ir\<%iv\>\l" +
; CHECK-NEXT: " WIDEN store ir\<%arrayidx2\>, ir\<%call\>\l" +
; CHECK-NEXT: "No successors\l"
; CHECK-NEXT: ]
;
entry:
%cmp6 = icmp sgt i64 %n, 0
br i1 %cmp6, label %for.body, label %for.end

for.body: ; preds = %entry, %for.body
%iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ]
%arrayidx = getelementptr inbounds float, float* %y, i64 %iv
%lv = load float, float* %arrayidx, align 4
%call = tail call float @llvm.sqrt.f32(float %lv) nounwind readnone
%arrayidx2 = getelementptr inbounds float, float* %x, i64 %iv
store float %call, float* %arrayidx2, align 4
%iv.next = add i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, %n
br i1 %exitcond, label %for.end, label %for.body

for.end: ; preds = %for.body, %entry
ret void
}

declare float @llvm.sqrt.f32(float) nounwind readnone
129 changes: 68 additions & 61 deletions llvm/test/Transforms/LoopVectorize/vplan-printing.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -7,16 +7,17 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; Tests for printing VPlans.

define void @print_call_and_memory(i64 %n, float* noalias %y, float* noalias %x) nounwind uwtable {
; CHECK: N0 [label =
; CHECK-NEXT: "for.body:\n" +
; CHECK-NEXT: "WIDEN-INDUCTION %iv = phi %iv.next, 0\l" +
; CHECK-NEXT: "CLONE ir<%arrayidx> = getelementptr ir<%y>, ir<%iv>\l" +
; CHECK-NEXT: "WIDEN ir<%lv> = load ir<%arrayidx>\l" +
; CHECK-NEXT: "WIDEN-CALL ir<%call> = call @llvm.sqrt.f32(ir<%lv>)\l" +
; CHECK-NEXT: "CLONE ir<%arrayidx2> = getelementptr ir<%x>, ir<%iv>\l" +
; CHECK-NEXT: "WIDEN store ir<%arrayidx2>, ir<%call>\l"
; CHECK-NEXT: ]

; CHECK: VPlan {
; CHECK-NEXT: for.body:
; CHECK-NEXT: WIDEN-INDUCTION %iv = phi %iv.next, 0
; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, ir<%iv>
; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx>
; CHECK-NEXT: WIDEN-CALL ir<%call> = call @llvm.sqrt.f32(ir<%lv>)
; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%x>, ir<%iv>
; CHECK-NEXT: WIDEN store ir<%arrayidx2>, ir<%call>
; CHECK-NEXT: No successors
; CHECK-NEXT: }
;
entry:
%cmp6 = icmp sgt i64 %n, 0
br i1 %cmp6, label %for.body, label %for.end
Expand All @@ -37,18 +38,19 @@ for.end: ; preds = %for.body, %entry
}

define void @print_widen_gep_and_select(i64 %n, float* noalias %y, float* noalias %x, float* %z) nounwind uwtable {
; CHECK: N0 [label =
; CHECK-NEXT: "for.body:\n" +
; CHECK-NEXT: "WIDEN-INDUCTION %iv = phi %iv.next, 0\l" +
; CHECK-NEXT: "WIDEN-GEP Inv[Var] ir<%arrayidx> = getelementptr ir<%y>, ir<%iv>\l" +
; CHECK-NEXT: "WIDEN ir<%lv> = load ir<%arrayidx>\l" +
; CHECK-NEXT: "WIDEN ir<%cmp> = icmp ir<%arrayidx>, ir<%z>\l" +
; CHECK-NEXT: "WIDEN-SELECT ir<%sel> = select ir<%cmp>, ir<1.000000e+01>, ir<2.000000e+01>\l" +
; CHECK-NEXT: "WIDEN ir<%add> = fadd ir<%lv>, ir<%sel>\l" +
; CHECK-NEXT: "CLONE ir<%arrayidx2> = getelementptr ir<%x>, ir<%iv>\l" +
; CHECK-NEXT: "WIDEN store ir<%arrayidx2>, ir<%add>\l"
; CHECK-NEXT: ]

; CHECK: VPlan {
; CHECK-NEXT: for.body:
; CHECK-NEXT: WIDEN-INDUCTION %iv = phi %iv.next, 0
; CHECK-NEXT: WIDEN-GEP Inv[Var] ir<%arrayidx> = getelementptr ir<%y>, ir<%iv>
; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx>
; CHECK-NEXT: WIDEN ir<%cmp> = icmp ir<%arrayidx>, ir<%z>
; CHECK-NEXT: WIDEN-SELECT ir<%sel> = select ir<%cmp>, ir<1.000000e+01>, ir<2.000000e+01>
; CHECK-NEXT: WIDEN ir<%add> = fadd ir<%lv>, ir<%sel>
; CHECK-NEXT: CLONE ir<%arrayidx2> = getelementptr ir<%x>, ir<%iv>
; CHECK-NEXT: WIDEN store ir<%arrayidx2>, ir<%add>
; CHECK-NEXT: No successors
; CHECK-NEXT: }
;
entry:
%cmp6 = icmp sgt i64 %n, 0
br i1 %cmp6, label %for.body, label %for.end
Expand All @@ -71,15 +73,16 @@ for.end: ; preds = %for.body, %entry
}

define float @print_reduction(i64 %n, float* noalias %y) {
; CHECK: N0 [label =
; CHECK-NEXT: "for.body:\n" +
; CHECK-NEXT: "WIDEN-INDUCTION %iv = phi %iv.next, 0\l" +
; CHECK-NEXT: "WIDEN-PHI %red = phi %red.next, 0.000000e+00\l" +
; CHECK-NEXT: "CLONE ir<%arrayidx> = getelementptr ir<%y>, ir<%iv>\l" +
; CHECK-NEXT: "WIDEN ir<%lv> = load ir<%arrayidx>\l" +
; CHECK-NEXT: "REDUCE ir<%red.next> = ir<%red> + reduce.fadd (ir<%lv>)\l"
; CHECK-NEXT: ]

; CHECK: VPlan {
; CHECK-NEXT: for.body:
; CHECK-NEXT: WIDEN-INDUCTION %iv = phi %iv.next, 0
; CHECK-NEXT: WIDEN-PHI %red = phi %red.next, 0.000000e+00
; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%y>, ir<%iv>
; CHECK-NEXT: WIDEN ir<%lv> = load ir<%arrayidx>
; CHECK-NEXT: REDUCE ir<%red.next> = ir<%red> + reduce.fadd (ir<%lv>)
; CHECK-NEXT: No successors
; CHECK-NEXT: }
;
entry:
br label %for.body

Expand All @@ -98,36 +101,40 @@ for.end: ; preds = %for.body, %entry
}

define void @print_replicate_predicated_phi(i64 %n, i64* %x) {
; CHECK: N0 [label =
; CHECK-NEXT: "for.body:\n" +
; CHECK-NEXT: "WIDEN-INDUCTION %i = phi 0, %i.next\l" +
; CHECK-NEXT: "WIDEN ir<%cmp> = icmp ir<%i>, ir<5>\l"
; CHECK-NEXT: ]
;
; CHECK: N2 [label =
; CHECK-NEXT: "pred.udiv.entry:\n" +
; CHECK-NEXT: +
; CHECK-NEXT: "BRANCH-ON-MASK ir<%cmp>\l"\l
; CHECK-NEXT: "CondBit: ir<%cmp>"
; CHECK-NEXT: ]
;
; CHECK: N4 [label =
; CHECK-NEXT: "pred.udiv.if:\n" +
; CHECK-NEXT: "REPLICATE ir<%tmp4> = udiv ir<%n>, ir<%i> (S->V)\l"
; CHECK-NEXT: ]
;
; CHECK: N5 [label =
; CHECK-NEXT: "pred.udiv.continue:\n" +
; CHECK-NEXT: "PHI-PREDICATED-INSTRUCTION vp<%3> = ir<%tmp4>\l"
; CHECK-NEXT: ]
;
; CHECK: N7 [label =
; CHECK-NEXT: "for.inc:\n" +
; CHECK-NEXT: "EMIT vp<%4> = not ir<%cmp>\l" +
; CHECK-NEXT: "BLEND %d = ir<0>/vp<%4> vp<%3>/ir<%cmp>\l" +
; CHECK-NEXT: "CLONE ir<%idx> = getelementptr ir<%x>, ir<%i>\l" +
; CHECK-NEXT: "WIDEN store ir<%idx>, ir<%d>\l"
; CHECK-NEXT: ]
; CHECK: VPlan {
; CHECK-NEXT: for.body:
; CHECK-NEXT: WIDEN-INDUCTION %i = phi 0, %i.next
; CHECK-NEXT: WIDEN ir<%cmp> = icmp ir<%i>, ir<5>
; CHECK-NEXT: Successor(s): if.then
; CHECK-EMPTY:
; CHECK-NEXT: if.then:
; CHECK-NEXT: Successor(s): pred.udiv
; CHECK-EMPTY:
; CHECK-NEXT: <xVFxUF> pred.udiv: {
; CHECK-NEXT: pred.udiv.entry:
; CHECK-NEXT: BRANCH-ON-MASK ir<%cmp>
; CHECK-NEXT: Successor(s): pred.udiv.if, pred.udiv.continue
; CHECK-NEXT: CondBit: ir<%cmp>
; CHECK-EMPTY:
; CHECK-NEXT: pred.udiv.if:
; CHECK-NEXT: REPLICATE ir<%tmp4> = udiv ir<%n>, ir<%i> (S->V)
; CHECK-NEXT: Successor(s): pred.udiv.continue
; CHECK-EMPTY:
; CHECK-NEXT: pred.udiv.continue:
; CHECK-NEXT: PHI-PREDICATED-INSTRUCTION vp<%3> = ir<%tmp4>
; CHECK-NEXT: No successors
; CHECK-NEXT: }
; CHECK-EMPTY:
; CHECK-NEXT: if.then.0:
; CHECK-NEXT: Successor(s): for.inc
; CHECK-EMPTY:
; CHECK-NEXT: for.inc:
; CHECK-NEXT: EMIT vp<%4> = not ir<%cmp>
; CHECK-NEXT: BLEND %d = ir<0>/vp<%4> vp<%3>/ir<%cmp>
; CHECK-NEXT: CLONE ir<%idx> = getelementptr ir<%x>, ir<%i>
; CHECK-NEXT: WIDEN store ir<%idx>, ir<%d>
; CHECK-NEXT: No successors
; CHECK-NEXT: }
;
entry:
br label %for.body
Expand Down
32 changes: 19 additions & 13 deletions llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -89,11 +89,13 @@ TEST_F(VPlanHCFGTest, testBuildHCFGInnerLoop) {
EXPECT_EQ(IndvarAdd, ICmp->getOperand(0));
EXPECT_EQ(VecBB->getCondBit(), ICmp);

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
// Add an external value to check we do not print the list of external values,
// as this is not required with the new printing.
Plan->addVPValue(&*F->arg_begin());
std::string FullDump;
raw_string_ostream(FullDump) << *Plan;
raw_string_ostream OS(FullDump);
Plan->printDOT(OS);
const char *ExpectedStr = R"(digraph VPlan {
graph [labelloc=t, fontsize=30; label="Vectorization Plan"]
node [shape=rect, fontname=Courier, fontsize=30]
Expand All @@ -103,30 +105,34 @@ compound=true
fontname=Courier
label="\<x1\> TopRegion"
N1 [label =
"entry:\n"
"entry:\l" +
"Successor(s): for.body\l"
]
N1 -> N2 [ label=""]
N2 [label =
"for.body:\n" +
"WIDEN-PHI %indvars.iv = phi 0, %indvars.iv.next\l" +
"EMIT ir<%arr.idx> = getelementptr ir<%A> ir<%indvars.iv>\l" +
"EMIT ir<%l1> = load ir<%arr.idx>\l" +
"EMIT ir<%res> = add ir<%l1> ir<10>\l" +
"EMIT store ir<%res> ir<%arr.idx>\l" +
"EMIT ir<%indvars.iv.next> = add ir<%indvars.iv> ir<1>\l" +
"EMIT ir<%exitcond> = icmp ir<%indvars.iv.next> ir<%N>\l" +
"CondBit: ir<%exitcond> (for.body)\l"
"for.body:\l" +
" WIDEN-PHI %indvars.iv = phi 0, %indvars.iv.next\l" +
" EMIT ir\<%arr.idx\> = getelementptr ir\<%A\> ir\<%indvars.iv\>\l" +
" EMIT ir\<%l1\> = load ir\<%arr.idx\>\l" +
" EMIT ir\<%res\> = add ir\<%l1\> ir\<10\>\l" +
" EMIT store ir\<%res\> ir\<%arr.idx\>\l" +
" EMIT ir\<%indvars.iv.next\> = add ir\<%indvars.iv\> ir\<1\>\l" +
" EMIT ir\<%exitcond\> = icmp ir\<%indvars.iv.next\> ir\<%N\>\l" +
"Successor(s): for.body, for.end\l" +
"CondBit: ir\<%exitcond\> (for.body)\l"
]
N2 -> N2 [ label="T"]
N2 -> N3 [ label="F"]
N3 [label =
"for.end:\n" +
"EMIT ret\l"
"for.end:\l" +
" EMIT ret\l" +
"No successors\l"
]
}
}
)";
EXPECT_EQ(ExpectedStr, FullDump);
#endif

LoopVectorizationLegality::InductionList Inductions;
SmallPtrSet<Instruction *, 1> DeadInstructions;
Expand Down
49 changes: 41 additions & 8 deletions llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -324,6 +324,7 @@ TEST(VPBasicBlockTest, getPlan) {
}
}

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
TEST(VPBasicBlockTest, print) {
VPInstruction *I1 = new VPInstruction(Instruction::Add, {});
VPInstruction *I2 = new VPInstruction(Instruction::Sub, {I1});
Expand All @@ -333,12 +334,14 @@ TEST(VPBasicBlockTest, print) {
VPBB1->appendRecipe(I1);
VPBB1->appendRecipe(I2);
VPBB1->appendRecipe(I3);
VPBB1->setName("bb1");

VPInstruction *I4 = new VPInstruction(Instruction::Mul, {I2, I1});
VPInstruction *I5 = new VPInstruction(Instruction::Ret, {I4});
VPBasicBlock *VPBB2 = new VPBasicBlock();
VPBB2->appendRecipe(I4);
VPBB2->appendRecipe(I5);
VPBB2->setName("bb2");

VPBlockUtils::connectBlocks(VPBB1, VPBB2);

Expand All @@ -355,29 +358,54 @@ TEST(VPBasicBlockTest, print) {
VPlan Plan;
Plan.setEntry(VPBB1);
std::string FullDump;
raw_string_ostream(FullDump) << Plan;
raw_string_ostream OS(FullDump);
Plan.printDOT(OS);

const char *ExpectedStr = R"(digraph VPlan {
graph [labelloc=t, fontsize=30; label="Vectorization Plan"]
node [shape=rect, fontname=Courier, fontsize=30]
edge [fontname=Courier, fontsize=30]
compound=true
N0 [label =
":\n" +
"EMIT vp<%0> = add\l" +
"EMIT vp<%1> = sub vp<%0>\l" +
"EMIT br vp<%0> vp<%1>\l"
"bb1:\l" +
" EMIT vp\<%0\> = add\l" +
" EMIT vp\<%1\> = sub vp\<%0\>\l" +
" EMIT br vp\<%0\> vp\<%1\>\l" +
"Successor(s): bb2\l"
]
N0 -> N1 [ label=""]
N1 [label =
":\n" +
"EMIT vp<%3> = mul vp<%1> vp<%0>\l" +
"EMIT ret vp<%3>\l"
"bb2:\l" +
" EMIT vp\<%3\> = mul vp\<%1\> vp\<%0\>\l" +
" EMIT ret vp\<%3\>\l" +
"No successors\l"
]
}
)";
EXPECT_EQ(ExpectedStr, FullDump);

const char *ExpectedBlock1Str = R"(bb1:
EMIT vp<%0> = add
EMIT vp<%1> = sub vp<%0>
EMIT br vp<%0> vp<%1>
Successor(s): bb2
)";
std::string Block1Dump;
raw_string_ostream OS1(Block1Dump);
VPBB1->print(OS1);
EXPECT_EQ(ExpectedBlock1Str, Block1Dump);

// Ensure that numbering is good when dumping the second block in isolation.
const char *ExpectedBlock2Str = R"(bb2:
EMIT vp<%3> = mul vp<%1> vp<%0>
EMIT ret vp<%3>
No successors
)";
std::string Block2Dump;
raw_string_ostream OS2(Block2Dump);
VPBB2->print(OS2);
EXPECT_EQ(ExpectedBlock2Str, Block2Dump);

{
std::string I3Dump;
raw_string_ostream OS(I3Dump);
Expand All @@ -395,6 +423,7 @@ compound=true
EXPECT_EQ("EMIT vp<%3> = mul vp<%1> vp<%0>", I4Dump);
}
}
#endif

TEST(VPRecipeTest, CastVPInstructionToVPUser) {
VPValue Op1;
Expand Down Expand Up @@ -581,6 +610,7 @@ TEST(VPRecipeTest, CastVPWidenMemoryInstructionRecipeToVPUserAndVPDef) {
delete Load;
}

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
TEST(VPRecipeTest, dump) {
VPlan Plan;
VPBasicBlock *VPBB1 = new VPBasicBlock();
Expand Down Expand Up @@ -636,6 +666,7 @@ TEST(VPRecipeTest, dump) {

delete AI;
}
#endif

TEST(VPRecipeTest, CastVPReductionRecipeToVPUser) {
LLVMContext C;
Expand All @@ -657,8 +688,10 @@ struct VPDoubleValueDef : public VPRecipeBase {
}

void execute(struct VPTransformState &State) override{};
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void print(raw_ostream &O, const Twine &Indent,
VPSlotTracker &SlotTracker) const override {}
#endif
};

TEST(VPDoubleValueDefTest, traverseUseLists) {
Expand Down