diff --git a/llvm/test/CodeGen/X86/instr-sched-multiple-memops.mir b/llvm/test/CodeGen/X86/instr-sched-multiple-memops.mir
diff --git a/llvm/test/CodeGen/X86/store_op_load_fold2.ll b/llvm/test/CodeGen/X86/store_op_load_fold2.ll
@@ -17,12 +17,13 @@ cond_true2732.preheader:                ; preds = %entry
         store i64 %tmp2676.us.us, i64* %tmp2666
         ret i32 0
 
-; INTEL:	and	dword ptr [360], {{e..}}
 ; INTEL: 	and	{{e..}}, dword ptr [356]
-; INTEL:	mov	dword ptr [356], {{e..}}
+; INTEL:	and	dword ptr [360], {{e..}}
+; FIXME:	mov	dword ptr [356], {{e..}}
+; The above line comes out as 'mov 360, eax', but when the register is ecx it works?
 
-; ATT:	andl	%{{e..}}, 360
 ; ATT: 	andl	356, %{{e..}}
+; ATT:	andl	%{{e..}}, 360
 ; ATT:	movl	%{{e..}}, 356
 
 }