diff --git a/llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll b/llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll
@@ -4,24 +4,21 @@
 define { i128, i8 } @muloti_test(i128 %l, i128 %r) unnamed_addr #0 {
 ; AARCH-LABEL: muloti_test:
 ; AARCH:       // %bb.0: // %start
-; AARCH-NEXT:    umulh x8, x1, x2
-; AARCH-NEXT:    mul x9, x3, x0
-; AARCH-NEXT:    cmp xzr, x8
-; AARCH-NEXT:    umulh x10, x3, x0
-; AARCH-NEXT:    cset w8, ne
+; AARCH-NEXT:    mul x8, x3, x0
+; AARCH-NEXT:    umulh x9, x0, x2
+; AARCH-NEXT:    madd x8, x1, x2, x8
+; AARCH-NEXT:    umulh x10, x1, x2
+; AARCH-NEXT:    adds x8, x9, x8
+; AARCH-NEXT:    cset w9, hs
 ; AARCH-NEXT:    cmp x1, #0
 ; AARCH-NEXT:    ccmp x3, #0, #4, ne
-; AARCH-NEXT:    madd x9, x1, x2, x9
-; AARCH-NEXT:    cset w11, ne
-; AARCH-NEXT:    cmp xzr, x10
-; AARCH-NEXT:    umulh x10, x0, x2
-; AARCH-NEXT:    orr w8, w11, w8
-; AARCH-NEXT:    cset w11, ne
+; AARCH-NEXT:    mov x1, x8
+; AARCH-NEXT:    ccmp xzr, x10, #0, eq
+; AARCH-NEXT:    umulh x10, x3, x0
 ; AARCH-NEXT:    mul x0, x0, x2
-; AARCH-NEXT:    adds x1, x10, x9
-; AARCH-NEXT:    orr w8, w8, w11
-; AARCH-NEXT:    cset w9, hs
-; AARCH-NEXT:    orr w2, w8, w9
+; AARCH-NEXT:    ccmp xzr, x10, #0, eq
+; AARCH-NEXT:    cset w10, ne
+; AARCH-NEXT:    orr w2, w10, w9
 ; AARCH-NEXT:    ret
 start:
   %0 = tail call { i128, i1 } @llvm.umul.with.overflow.i128(i128 %l, i128 %r) #2

diff --git a/llvm/test/CodeGen/AArch64/vec_umulo.ll b/llvm/test/CodeGen/AArch64/vec_umulo.ll
@@ -322,48 +322,40 @@ define <4 x i32> @umulo_v4i1(<4 x i1> %a0, <4 x i1> %a1, <4 x i1>* %p2) nounwind
 define <2 x i32> @umulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, <2 x i128>* %p2) nounwind {
 ; CHECK-LABEL: umulo_v2i128:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    umulh x8, x3, x6
-; CHECK-NEXT:    mul x10, x7, x2
-; CHECK-NEXT:    cmp xzr, x8
-; CHECK-NEXT:    umulh x8, x7, x2
-; CHECK-NEXT:    cset w9, ne
+; CHECK-NEXT:    mul x8, x7, x2
+; CHECK-NEXT:    umulh x9, x2, x6
+; CHECK-NEXT:    madd x8, x3, x6, x8
+; CHECK-NEXT:    umulh x10, x3, x6
+; CHECK-NEXT:    adds x8, x9, x8
+; CHECK-NEXT:    umulh x11, x7, x2
+; CHECK-NEXT:    cset w9, hs
 ; CHECK-NEXT:    cmp x3, #0
 ; CHECK-NEXT:    ccmp x7, #0, #4, ne
-; CHECK-NEXT:    umulh x11, x2, x6
-; CHECK-NEXT:    madd x10, x3, x6, x10
-; CHECK-NEXT:    umulh x12, x1, x4
-; CHECK-NEXT:    cset w13, ne
-; CHECK-NEXT:    cmp xzr, x8
-; CHECK-NEXT:    cset w8, ne
+; CHECK-NEXT:    umulh x13, x1, x4
+; CHECK-NEXT:    ccmp xzr, x10, #0, eq
+; CHECK-NEXT:    mul x10, x5, x0
+; CHECK-NEXT:    madd x10, x1, x4, x10
+; CHECK-NEXT:    ccmp xzr, x11, #0, eq
+; CHECK-NEXT:    umulh x11, x0, x4
+; CHECK-NEXT:    cset w12, ne
 ; CHECK-NEXT:    adds x10, x11, x10
 ; CHECK-NEXT:    cset w11, hs
-; CHECK-NEXT:    cmp xzr, x12
-; CHECK-NEXT:    cset w12, ne
 ; CHECK-NEXT:    cmp x1, #0
 ; CHECK-NEXT:    ccmp x5, #0, #4, ne
-; CHECK-NEXT:    mul x15, x5, x0
-; CHECK-NEXT:    umulh x14, x5, x0
-; CHECK-NEXT:    orr w9, w13, w9
-; CHECK-NEXT:    umulh x16, x0, x4
-; CHECK-NEXT:    orr w8, w9, w8
-; CHECK-NEXT:    madd x15, x1, x4, x15
-; CHECK-NEXT:    cset w17, ne
-; CHECK-NEXT:    cmp xzr, x14
-; CHECK-NEXT:    orr w12, w17, w12
-; CHECK-NEXT:    cset w14, ne
-; CHECK-NEXT:    adds x15, x16, x15
-; CHECK-NEXT:    orr w12, w12, w14
-; CHECK-NEXT:    cset w14, hs
-; CHECK-NEXT:    orr w12, w12, w14
-; CHECK-NEXT:    orr w8, w8, w11
-; CHECK-NEXT:    mul x11, x0, x4
-; CHECK-NEXT:    ldr x9, [sp]
-; CHECK-NEXT:    fmov s0, w12
-; CHECK-NEXT:    stp x11, x15, [x9]
-; CHECK-NEXT:    mov v0.s[1], w8
-; CHECK-NEXT:    mul x8, x2, x6
+; CHECK-NEXT:    orr w9, w12, w9
+; CHECK-NEXT:    mul x12, x0, x4
+; CHECK-NEXT:    ccmp xzr, x13, #0, eq
+; CHECK-NEXT:    umulh x13, x5, x0
+; CHECK-NEXT:    ccmp xzr, x13, #0, eq
+; CHECK-NEXT:    cset w13, ne
+; CHECK-NEXT:    orr w11, w13, w11
+; CHECK-NEXT:    fmov s0, w11
+; CHECK-NEXT:    ldr x11, [sp]
+; CHECK-NEXT:    mov v0.s[1], w9
+; CHECK-NEXT:    mul x9, x2, x6
+; CHECK-NEXT:    stp x12, x10, [x11]
 ; CHECK-NEXT:    shl v0.2s, v0.2s, #31
-; CHECK-NEXT:    stp x8, x10, [x9, #16]
+; CHECK-NEXT:    stp x9, x8, [x11, #16]
 ; CHECK-NEXT:    cmlt v0.2s, v0.2s, #0
 ; CHECK-NEXT:    ret
   %t = call {<2 x i128>, <2 x i1>} @llvm.umul.with.overflow.v2i128(<2 x i128> %a0, <2 x i128> %a1)