141 changes: 141 additions & 0 deletions clang/test/CodeGen/aapcs-align.cc
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// REQUIRES: arm-registered-target
// RUN: %clang_cc1 -triple arm-none-none-eabi \
// RUN: -O2 \
// RUN: -target-cpu cortex-a8 \
// RUN: -emit-llvm -o - %s | FileCheck %s

extern "C" {

// Base case, nothing interesting.
struct S {
int x, y;
};

void f0(int, S);
void f0m(int, int, int, int, int, S);
void g0() {
S s = {6, 7};
f0(1, s);
f0m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g0
// CHECK: call void @f0(i32 1, [2 x i32] [i32 6, i32 7]
// CHECK: call void @f0m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i32] [i32 6, i32 7]
// CHECK: declare void @f0(i32, [2 x i32])
// CHECK: declare void @f0m(i32, i32, i32, i32, i32, [2 x i32])

// Aligned struct, passed according to its natural alignment.
struct __attribute__((aligned(8))) S8 {
int x, y;
} s8;

void f1(int, S8);
void f1m(int, int, int, int, int, S8);
void g1() {
S8 s = {6, 7};
f1(1, s);
f1m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g1
// CHECK: call void @f1(i32 1, [2 x i32] [i32 6, i32 7]
// CHECK: call void @f1m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i32] [i32 6, i32 7]
// CHECK: declare void @f1(i32, [2 x i32])
// CHECK: declare void @f1m(i32, i32, i32, i32, i32, [2 x i32])

// Aligned struct, passed according to its natural alignment.
struct alignas(16) S16 {
int x, y;
};

extern "C" void f2(int, S16);
extern "C" void f2m(int, int, int, int, int, S16);

void g2() {
S16 s = {6, 7};
f2(1, s);
f2m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g2
// CHECK: call void @f2(i32 1, [4 x i32] [i32 6, i32 7
// CHECK: call void @f2m(i32 1, i32 2, i32 3, i32 4, i32 5, [4 x i32] [i32 6, i32 7
// CHECK: declare void @f2(i32, [4 x i32])
// CHECK: declare void @f2m(i32, i32, i32, i32, i32, [4 x i32])

// Increased natural alignment.
struct SF8 {
int x __attribute__((aligned(8)));
int y;
};

void f3(int, SF8);
void f3m(int, int, int, int, int, SF8);
void g3() {
SF8 s = {6, 7};
f3(1, s);
f3m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g3
// CHECK: call void @f3(i32 1, [1 x i64] [i64 30064771078]
// CHECK: call void @f3m(i32 1, i32 2, i32 3, i32 4, i32 5, [1 x i64] [i64 30064771078]
// CHECK: declare void @f3(i32, [1 x i64])
// CHECK: declare void @f3m(i32, i32, i32, i32, i32, [1 x i64])

// Increased natural alignment, capped to 8 though.
struct SF16 {
int x;
int y alignas(16);
int z, a, b, c, d, e, f, g, h, i, j, k;
};

void f4(int, SF16);
void f4m(int, int, int, int, int, SF16);
void g4() {
SF16 s = {6, 7};
f4(1, s);
f4m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g4
// CHECK: call void @f4(i32 1, %struct.SF16* byval nonnull align 8
// CHECK: call void @f4m(i32 1, i32 2, i32 3, i32 4, i32 5, %struct.SF16* byval nonnull align 8
// CHECK: declare void @f4(i32, %struct.SF16* byval align 8)
// CHECK: declare void @f4m(i32, i32, i32, i32, i32, %struct.SF16* byval align 8)

// Packed structure.
struct __attribute__((packed)) P {
int x;
long long u;
};

void f5(int, P);
void f5m(int, int, int, int, int, P);
void g5() {
P s = {6, 7};
f5(1, s);
f5m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g5
// CHECK: call void @f5(i32 1, [3 x i32] [i32 6, i32 7, i32 0])
// CHECK: call void @f5m(i32 1, i32 2, i32 3, i32 4, i32 5, [3 x i32] [i32 6, i32 7, i32 0])
// CHECK: declare void @f5(i32, [3 x i32])
// CHECK: declare void @f5m(i32, i32, i32, i32, i32, [3 x i32])


// Packed and aligned, alignement causes padding at the end.
struct __attribute__((packed, aligned(8))) P8 {
int x;
long long u;
};

void f6(int, P8);
void f6m(int, int, int, int, int, P8);
void g6() {
P8 s = {6, 7};
f6(1, s);
f6m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g6
// CHECK: call void @f6(i32 1, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
// CHECK: call void @f6m(i32 1, i32 2, i32 3, i32 4, i32 5, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
// CHECK: declare void @f6(i32, [4 x i32])
// CHECK: declare void @f6m(i32, i32, i32, i32, i32, [4 x i32])
}
103 changes: 103 additions & 0 deletions clang/test/CodeGen/aapcs64-align.cc
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// REQUIRES: arm-registered-target
// RUN: %clang_cc1 -triple aarch64-none-none-eabi \
// RUN: -O2 \
// RUN: -emit-llvm -o - %s | FileCheck %s

extern "C" {

// Base case, nothing interesting.
struct S {
long x, y;
};

void f0(long, S);
void f0m(long, long, long, long, long, S);
void g0() {
S s = {6, 7};
f0(1, s);
f0m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g0
// CHECK: call void @f0(i64 1, [2 x i64] [i64 6, i64 7]
// CHECK: call void @f0m{{.*}}[2 x i64] [i64 6, i64 7]
// CHECK: declare void @f0(i64, [2 x i64])
// CHECK: declare void @f0m(i64, i64, i64, i64, i64, [2 x i64])

// Aligned struct, passed according to its natural alignment.
struct __attribute__((aligned(16))) S16 {
long x, y;
} s16;

void f1(long, S16);
void f1m(long, long, long, long, long, S16);
void g1() {
S16 s = {6, 7};
f1(1, s);
f1m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g1
// CHECK: call void @f1{{.*}}[2 x i64] [i64 6, i64 7]
// CHECK: call void @f1m{{.*}}[2 x i64] [i64 6, i64 7]
// CHECK: declare void @f1(i64, [2 x i64])
// CHECK: declare void @f1m(i64, i64, i64, i64, i64, [2 x i64])

// Increased natural alignment.
struct SF16 {
long x __attribute__((aligned(16)));
long y;
};

void f3(long, SF16);
void f3m(long, long, long, long, long, SF16);
void g3() {
SF16 s = {6, 7};
f3(1, s);
f3m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g3
// CHECK: call void @f3(i64 1, i128 129127208515966861318)
// CHECK: call void @f3m(i64 1, i64 2, i64 3, i64 4, i64 5, i128 129127208515966861318)
// CHECK: declare void @f3(i64, i128)
// CHECK: declare void @f3m(i64, i64, i64, i64, i64, i128)


// Packed structure.
struct __attribute__((packed)) P {
int x;
long u;
};

void f4(int, P);
void f4m(int, int, int, int, int, P);
void g4() {
P s = {6, 7};
f4(1, s);
f4m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g4()
// CHECK: call void @f4(i32 1, [2 x i64] [i64 30064771078, i64 0])
// CHECK: void @f4m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i64] [i64 30064771078, i64 0])
// CHECK: declare void @f4(i32, [2 x i64])
// CHECK: declare void @f4m(i32, i32, i32, i32, i32, [2 x i64])


// Packed structure, overaligned, same as above.
struct __attribute__((packed, aligned(16))) P16 {
int x;
long y;
};

void f5(int, P16);
void f5m(int, int, int, int, int, P16);
void g5() {
P16 s = {6, 7};
f5(1, s);
f5m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g5()
// CHECK: call void @f5(i32 1, [2 x i64] [i64 30064771078, i64 0])
// CHECK: void @f5m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i64] [i64 30064771078, i64 0])
// CHECK: declare void @f5(i32, [2 x i64])
// CHECK: declare void @f5m(i32, i32, i32, i32, i32, [2 x i64])

}
17 changes: 10 additions & 7 deletions clang/test/CodeGen/arm-arguments.c
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Expand Up @@ -211,10 +211,13 @@ float32x4_t f35(int i, s35_with_align s1, s35_with_align s2) {
// APCS-GNU: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align {{[0-9]+}} %[[b]], i8* align {{[0-9]+}} %[[c]]
// APCS-GNU: %[[d:.*]] = bitcast %struct.s35* %[[a]] to <4 x float>*
// APCS-GNU: load <4 x float>, <4 x float>* %[[d]], align 16
// AAPCS-LABEL: define arm_aapcscc <4 x float> @f35(i32 %i, %struct.s35* byval align 8, %struct.s35* byval align 8)
// AAPCS: %[[a:.*]] = alloca %struct.s35, align 16
// AAPCS: %[[b:.*]] = bitcast %struct.s35* %[[a]] to i8*
// AAPCS: %[[c:.*]] = bitcast %struct.s35* %0 to i8*
// AAPCS: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 16 %[[b]], i8* align 8 %[[c]]
// AAPCS: %[[d:.*]] = bitcast %struct.s35* %[[a]] to <4 x float>*
// AAPCS: load <4 x float>, <4 x float>* %[[d]], align 16

// AAPCS-LABEL: define arm_aapcscc <4 x float> @f35(i32 %i, %struct.s35* byval align 4 %s1, %struct.s35* byval align 4 %s2)
// AAPCS: %[[a_addr:.*]] = alloca <4 x float>, align 16
// AAPCS: %[[b_addr:.*]] = alloca <4 x float>, align 16
// AAPCS: %[[p1:.*]] = bitcast %struct.s35* %s1 to <4 x float>*
// AAPCS: %[[a:.*]] = load <4 x float>, <4 x float>* %[[p1]], align 4
// AAPCS: %[[p2:.*]] = bitcast %struct.s35* %s2 to <4 x float>*
// AAPCS: %[[b:.*]] = load <4 x float>, <4 x float>* %[[p2]], align 4
// AAPCS: store <4 x float> %[[a]], <4 x float>* %[[a_addr]], align 16
// AAPCS: store <4 x float> %[[b]], <4 x float>* %[[b_addr]], align 16