85 changes: 85 additions & 0 deletions lld/test/ELF/arm-thumb-blx.s
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// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %S/Inputs/arm-thumb-blx-targets.s -o %ttarget
// RUN: echo "SECTIONS { \
// RUN: .R_ARM_CALL24_callee1 : { *(.R_ARM_CALL24_callee_low) } \
// RUN: .R_ARM_CALL24_callee2 : { *(.R_ARM_CALL24_callee_thumb_low) } \
// RUN: .caller : { *(.text) } \
// RUN: .R_ARM_CALL24_callee3 : { *(.R_ARM_CALL24_callee_high) } \
// RUN: .R_ARM_CALL24_callee4 : { *(.R_ARM_CALL24_callee_thumb_high) } } " > %t.script
// RUN: ld.lld --script %t.script %t %ttarget -o %t2 2>&1
// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-THUMB %s
// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-ARM %s
// REQUIRES: arm
// Test BLX instruction is chosen for Thumb BL/BLX instruction and ARM callee
// 2 byte nops are used to test the pc-rounding behaviour. As a BLX from a
// 2 byte aligned destination is defined as Align(PC,4) + immediate:00
// FIXME: llvm-mc has problems assembling BLX unless the destination is
// external. The targets of the BL and BLX instructions are in arm-thumb-blx-target.s
.syntax unified
.section .text, "ax",%progbits
.thumb
.globl _start
.balign 0x10000
.type _start,%function
_start:
blx callee_low
nop
bl callee_low
nop
blx callee_high
nop
bl callee_high
nop
blx blx_far
nop
bl blx_far
nop
// Expect BLX to thumb target to be written out as a BL
blx callee_thumb_low
nop
blx callee_thumb_high
bx lr

// CHECK-ARM: Disassembly of section .R_ARM_CALL24_callee1:
// CHECK-NEXT-ARM: callee_low:
// CHECK-NEXT-ARM: b4: 1e ff 2f e1 bx lr

// CHECK-THUMB: Disassembly of section .R_ARM_CALL24_callee2:
// CHECK-NEXT-THUMB: callee_thumb_low:
// CHECK-NEXT-THUMB: 100: 70 47 bx lr

// CHECK-THUMB: Disassembly of section .caller:
// CHECK-THUMB: _start:
// Align(0x10000,4) - 0xff50 (65360) + 4 = 0xb4 = callee_low
// CHECK-NEXT-THUMB: 10000: f0 f7 58 e8 blx #-65360
// CHECK-NEXT-THUMB: 10004: 00 bf nop
// Align(0x10006,4) - 0xff54 (65364) + 4 = 0xb4 = callee_low
// CHECK-NEXT-THUMB: 10006: f0 f7 56 e8 blx #-65364
// CHECK-NEXT-THUMB: 1000a: 00 bf nop
// Align(0x1000c,4) + 0xf0 (240) + 4 = 0x10100 = callee_high
// CHECK-NEXT-THUMB: 1000c: 00 f0 78 e8 blx #240
// CHECK-NEXT-THUMB: 10010: 00 bf nop
// Align(0x10012,4) + 0xec (236) + 4 = 0x10100 = callee_high
// CHECK-NEXT-THUMB: 10012: 00 f0 76 e8 blx #236
// CHECK-NEXT-THUMB: 10016: 00 bf nop
// Align(0x10018,4) + 0xfffffc (16777212) = 0x1010018 = blx_far
// CHECK-NEXT-THUMB: 10018: ff f3 fe c7 blx #16777212
// CHECK-NEXT-THUMB: 1001c: 00 bf nop
// Align(0x1001e,4) + 0xfffff8 (16777208) = 0x1010018 = blx_far
// CHECK-NEXT-THUMB: 1001e: ff f3 fc c7 blx #16777208
// CHECK-NEXT-THUMB: 10022: 00 bf nop
// 10024 - 0xff28 (65320) + 4 = 0x100 = callee_thumb_low
// CHECK-NEXT-THUMB: 10024: f0 f7 6c f8 bl #-65320
// CHECK-NEXT-THUMB: 10028: 00 bf nop
// 1002a + 0x1d2 (466) + 4 = 0x10200 = callee_thumb_high
// CHECK-NEXT-THUMB: 1002a: 00 f0 e9 f8 bl #466
// CHECK-NEXT-THUMB: 1002e: 70 47 bx lr


// CHECK-ARM: Disassembly of section .R_ARM_CALL24_callee3:
// CHECK-NEXT-ARM: callee_high:
// CHECK-NEXT-ARM: 10100: 1e ff 2f e1 bx lr

// CHECK: Disassembly of section .R_ARM_CALL24_callee4:
// CHECK-NEXT-THUMB:callee_thumb_high:
// CHECK-NEXT-THUMB: 10200: 70 47 bx lr
19 changes: 19 additions & 0 deletions lld/test/ELF/arm-thumb-branch-error.s
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// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %S/Inputs/far-arm-thumb-abs.s -o %tfar
// RUN: not ld.lld %t %tfar -o %t2 2>&1 | FileCheck %s
// REQUIRES: arm
.syntax unified
.section .text, "ax",%progbits
.globl _start
.balign 0x10000
.type _start,%function
_start:
// address of too_far symbols are just out of range of ARM branch with
// 26-bit immediate field and an addend of -8
bl too_far1
b too_far2
beq.w too_far3

// CHECK: R_ARM_THM_CALL out of range
// CHECK-NEXT: R_ARM_THM_JUMP24 out of range
// CHECK-NEXT: R_ARM_THM_JUMP19 out of range
59 changes: 59 additions & 0 deletions lld/test/ELF/arm-thumb-branch.s
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// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %S/Inputs/far-arm-thumb-abs.s -o %tfar
// RUN: echo "SECTIONS { \
// RUN: .callee1 : { *(.callee_low) } \
// RUN: .caller : { *(.text) } \
// RUN: .callee2 : { *(.callee_high) } } " > %t.script
// RUN: ld.lld --script %t.script %t %tfar -o %t2 2>&1
// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t2 | FileCheck %s
// REQUIRES: arm

.syntax unified
.thumb
.section .callee_low, "ax",%progbits
.align 2
.type callee_low,%function
callee_low:
bx lr

.section .text, "ax",%progbits
.globl _start
.balign 0x10000
.type _start,%function
_start:
bl callee_low
b callee_low
beq callee_low
bl callee_high
b callee_high
bne callee_high
bl far_uncond
b far_uncond
bgt far_cond
bx lr

.section .callee_high, "ax",%progbits
.align 2
.type callee_high,%function
callee_high:
bx lr

// CHECK: Disassembly of section .callee1:
// CHECK-NEXT: callee_low:
// CHECK-NEXT: b4: 70 47 bx lr
// CHECK-NEXT: Disassembly of section .caller:
// CHECK-NEXT: _start:
// CHECK-NEXT: 10000: f0 f7 58 f8 bl #-65360
// CHECK-NEXT: 10004: f0 f7 56 b8 b.w #-65364
// CHECK-NEXT: 10008: 30 f4 54 a8 beq.w #-65368
// CHECK-NEXT: 1000c: 00 f0 0c f8 bl #24
// CHECK-NEXT: 10010: 00 f0 0a b8 b.w #20
// CHECK-NEXT: 10014: 40 f0 08 80 bne.w #16
// CHECK-NEXT: 10018: ff f3 ff d7 bl #16777214
// CHECK-NEXT: 1001c: ff f3 fd 97 b.w #16777210
// CHECK-NEXT: 10020: 3f f3 ff af bgt.w #1048574
// CHECK-NEXT: 10024: 70 47 bx lr
// CHECK-NEXT: 10026: 00 00 movs r0, r0
// CHECK-NEXT: Disassembly of section .callee2:
// CHECK-NEXT: callee_high:
// CHECK-NEXT: 10028: 70 47 bx lr
72 changes: 72 additions & 0 deletions lld/test/ELF/arm-thumb-narrow-branch-check.s
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// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
// RUN: echo "SECTIONS { \
// RUN: .R_ARM_PC11_1 : { *(.R_ARM_PC11_1) } \
// RUN: .caller : { *(.caller) } \
// RUN: .R_ARM_PC11_2 : { *(.R_ARM_PC11_2) } \
// RUN: .text : { *(.text) } } " > %t.script
// RUN: ld.lld --script %t.script %t %S/Inputs/arm-thumb-narrow-branch.o -o %t2 2>&1
// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t2 | FileCheck %s
// REQUIRES: arm

// Test the R_ARM_PC11 relocation which is used with the narrow encoding of B.N
// the source of these relocations is a binary file arm-thumb-narrow-branch.o
// which has been assembled with the GNU assembler as llvm-mc doesn't emit it
// as the range of +-2048 bytes is too small to be practically useful for out
// of section branches.
.syntax unified

.global callee_low_far
.type callee_low_far,%function
callee_low_far = 0x809

.section .R_ARM_PC11_1,"ax",%progbits
.thumb
.balign 0x1000
.type callee_low,%function
.globl callee_low
callee_low:
bx lr

.text
.align 2
.thumb
.globl _start
.type _start, %function
_start:
bl callers
bx lr

.section .R_ARM_PC11_2,"ax",%progbits
.thumb
.align 2
.type callee_high,%function
.globl callee_high
callee_high:
bx lr

.global callee_high_far
.type callee_high_far,%function
callee_high_far = 0x180d

// CHECK: Disassembly of section .R_ARM_PC11_1:
// CHECK-NEXT: callee_low:
// CHECK-NEXT: 1000: 70 47 bx lr
// CHECK-NEXT: Disassembly of section .caller:
// CHECK-NEXT: callers:
// 1004 - 0x800 (2048) + 4 = 0x808 = callee_low_far
// CHECK-NEXT: 1004: 00 e4 b #-2048
// 1006 - 0xa (10) + 4 = 0x1000 = callee_low
// CHECK-NEXT: 1006: fb e7 b #-10
// 1008 + 4 + 4 = 0x1010 = callee_high
// CHECK-NEXT: 1008: 02 e0 b #4
// 100a + 0x7fe (2046) + 4 = 0x180c = callee_high_far
// CHECK-NEXT: 100a: ff e3 b #2046
// CHECK-NEXT: 100c: 70 47 bx lr
// CHECK-NEXT: 100e: 00 bf nop
// CHECK-NEXT: Disassembly of section .R_ARM_PC11_2:
// CHECK-NEXT: callee_high:
// CHECK-NEXT: 1010: 70 47 bx lr
// CHECK-NEXT: Disassembly of section .text:
// CHECK-NEXT: _start:
// CHECK-NEXT: 1014: ff f7 f6 ff bl #-20
// CHECK-NEXT: 1018: 70 47 bx lr
101 changes: 101 additions & 0 deletions lld/test/ELF/arm-thumb-plt-reloc.s
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// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %p/Inputs/arm-plt-reloc.s -o %t1
// RUN: llvm-mc -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t2
// RUN: ld.lld %t1 %t2 -o %t
// RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t | FileCheck %s
// RUN: ld.lld -shared %t1 %t2 -o %t3
// RUN: llvm-objdump -triple=thumbv7a-none-linux-gnueabi -d %t3 | FileCheck -check-prefix=DSOTHUMB %s
// RUN: llvm-objdump -triple=armv7a-none-linux-gnueabi -d %t3 | FileCheck -check-prefix=DSOARM %s
// RUN: llvm-readobj -s -r %t3 | FileCheck -check-prefix=DSOREL %s
// REQUIRES: arm
//
// Test PLT entry generation
.syntax unified
.text
.align 2
.globl _start
.type _start,%function
_start:
// FIXME, interworking is only supported for BL via BLX at the moment, when
// interworking thunks are available for b.w and b<cond>.w this can be altered
// to test the different forms of interworking.
bl func1
bl func2
bl func3

// Executable, expect no PLT
// CHECK: Disassembly of section .text:
// CHECK-NEXT: func1:
// CHECK-NEXT: 11000: 70 47 bx lr
// CHECK: func2:
// CHECK-NEXT: 11002: 70 47 bx lr
// CHECK: func3:
// CHECK-NEXT: 11004: 70 47 bx lr
// CHECK-NEXT: 11006: 00 00 movs r0, r0
// CHECK: _start:
// 11008 + 4 -12 = 0x11000 = func1
// CHECK-NEXT: 11008: ff f7 fa ff bl #-12
// 1100c + 4 -14 = 0x11002 = func2
// CHECK-NEXT: 1100c: ff f7 f9 ff bl #-14
// 11010 + 4 -16 = 0x11004 = func3
// CHECK-NEXT: 11010: ff f7 f8 ff bl #-16

// Expect PLT entries as symbols can be preempted
// .text is Thumb and .plt is ARM, llvm-objdump can currently only disassemble
// as ARM or Thumb. Work around by disassembling twice.
// DSOTHUMB: Disassembly of section .text:
// DSOTHUMB: func1:
// DSOTHUMB-NEXT: 1000: 70 47 bx lr
// DSOTHUMB: func2:
// DSOTHUMB-NEXT: 1002: 70 47 bx lr
// DSOTHUMB: func3:
// DSOTHUMB-NEXT: 1004: 70 47 bx lr
// DSOTHUMB-NEXT: 1006: 00 00 movs r0, r0
// DSOTHUMB: _start:
// 0x1008 + 0x28 + 4 = 0x1034 = PLT func1
// DSOTHUMB-NEXT: 1008: 00 f0 14 e8 blx #40
// 0x100c + 0x34 + 4 = 0x1044 = PLT func2
// DSOTHUMB-NEXT: 100c: 00 f0 1a e8 blx #52
// 0x1010 + 0x40 + 4 = 0x1054 = PLT func3
// DSOTHUMB-NEXT: 1010: 00 f0 20 e8 blx #64
// DSOARM: Disassembly of section .plt:
// DSOARM: .plt:
// DSOARM-NEXT: 1020: 04 e0 2d e5 str lr, [sp, #-4]!
// DSOARM-NEXT: 1024: 04 e0 9f e5 ldr lr, [pc, #4]
// DSOARM-NEXT: 1028: 0e e0 8f e0 add lr, pc, lr
// DSOARM-NEXT: 102c: 08 f0 be e5 ldr pc, [lr, #8]!
// DSOARM-NEXT: 1030: d0 1f 00 00
// 0x1028 + 8 + 1fd0 = 0x3000
// DSOARM-NEXT: 1034: 04 c0 9f e5 ldr r12, [pc, #4]
// DSOARM-NEXT: 1038: 0f c0 8c e0 add r12, r12, pc
// DSOARM-NEXT: 103c: 00 f0 9c e5 ldr pc, [r12]
// DSOARM-NEXT: 1040: cc 1f 00 00
// 0x1038 + 8 + 1fcc = 0x300c
// DSOARM-NEXT: 1044: 04 c0 9f e5 ldr r12, [pc, #4]
// DSOARM-NEXT: 1048: 0f c0 8c e0 add r12, r12, pc
// DSOARM-NEXT: 104c: 00 f0 9c e5 ldr pc, [r12]
// DSOARM-NEXT: 1050: c0 1f 00 00
// 0x1048 + 8 + 1fc0 = 0x3010
// DSOARM-NEXT: 1054: 04 c0 9f e5 ldr r12, [pc, #4]
// DSOARM-NEXT: 1058: 0f c0 8c e0 add r12, r12, pc
// DSOARM-NEXT: 105c: 00 f0 9c e5 ldr pc, [r12]
// DSOARM-NEXT: 1060: b4 1f 00 00
// 0x1058 + 8 + 1fb4 = 0x3014

// DSOREL: Name: .got.plt
// DSOREL-NEXT: Type: SHT_PROGBITS
// DSOREL-NEXT: Flags [
// DSOREL-NEXT: SHF_ALLOC
// DSOREL-NEXT: SHF_WRITE
// DSOREL-NEXT: ]
// DSOREL-NEXT: Address: 0x3000
// DSOREL-NEXT: Offset:
// DSOREL-NEXT: Size: 24
// DSOREL-NEXT: Link:
// DSOREL-NEXT: Info:
// DSOREL-NEXT: AddressAlignment: 4
// DSOREL-NEXT: EntrySize:
// DSOREL: Relocations [
// DSOREL-NEXT: Section (4) .rel.plt {
// DSOREL-NEXT: 0x300C R_ARM_JUMP_SLOT func1 0x0
// DSOREL-NEXT: 0x3010 R_ARM_JUMP_SLOT func2 0x0
// DSOREL-NEXT: 0x3014 R_ARM_JUMP_SLOT func3 0x0