20 changes: 20 additions & 0 deletions llvm/lib/CodeGen/TargetLoweringBase.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -206,6 +206,16 @@ static void InitLibcallNames(const char **Names, const Triple &TT) {
Names[RTLIB::FLOOR_F80] = "floorl";
Names[RTLIB::FLOOR_F128] = "floorl";
Names[RTLIB::FLOOR_PPCF128] = "floorl";
Names[RTLIB::FMIN_F32] = "fminf";
Names[RTLIB::FMIN_F64] = "fmin";
Names[RTLIB::FMIN_F80] = "fminl";
Names[RTLIB::FMIN_F128] = "fminl";
Names[RTLIB::FMIN_PPCF128] = "fminl";
Names[RTLIB::FMAX_F32] = "fmaxf";
Names[RTLIB::FMAX_F64] = "fmax";
Names[RTLIB::FMAX_F80] = "fmaxl";
Names[RTLIB::FMAX_F128] = "fmaxl";
Names[RTLIB::FMAX_PPCF128] = "fmaxl";
Names[RTLIB::ROUND_F32] = "roundf";
Names[RTLIB::ROUND_F64] = "round";
Names[RTLIB::ROUND_F80] = "roundl";
Expand Down Expand Up @@ -757,6 +767,8 @@ void TargetLoweringBase::initActions() {
// These operations default to expand.
setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand);
setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand);
setOperationAction(ISD::FMINNUM, (MVT::SimpleValueType)VT, Expand);
setOperationAction(ISD::FMAXNUM, (MVT::SimpleValueType)VT, Expand);

// These library functions default to expand.
setOperationAction(ISD::FROUND, (MVT::SimpleValueType)VT, Expand);
Expand Down Expand Up @@ -793,6 +805,8 @@ void TargetLoweringBase::initActions() {
setOperationAction(ISD::FEXP , MVT::f16, Expand);
setOperationAction(ISD::FEXP2, MVT::f16, Expand);
setOperationAction(ISD::FFLOOR, MVT::f16, Expand);
setOperationAction(ISD::FMINNUM, MVT::f16, Expand);
setOperationAction(ISD::FMAXNUM, MVT::f16, Expand);
setOperationAction(ISD::FNEARBYINT, MVT::f16, Expand);
setOperationAction(ISD::FCEIL, MVT::f16, Expand);
setOperationAction(ISD::FRINT, MVT::f16, Expand);
Expand All @@ -804,6 +818,8 @@ void TargetLoweringBase::initActions() {
setOperationAction(ISD::FEXP , MVT::f32, Expand);
setOperationAction(ISD::FEXP2, MVT::f32, Expand);
setOperationAction(ISD::FFLOOR, MVT::f32, Expand);
setOperationAction(ISD::FMINNUM, MVT::f32, Expand);
setOperationAction(ISD::FMAXNUM, MVT::f32, Expand);
setOperationAction(ISD::FNEARBYINT, MVT::f32, Expand);
setOperationAction(ISD::FCEIL, MVT::f32, Expand);
setOperationAction(ISD::FRINT, MVT::f32, Expand);
Expand All @@ -815,6 +831,8 @@ void TargetLoweringBase::initActions() {
setOperationAction(ISD::FEXP , MVT::f64, Expand);
setOperationAction(ISD::FEXP2, MVT::f64, Expand);
setOperationAction(ISD::FFLOOR, MVT::f64, Expand);
setOperationAction(ISD::FMINNUM, MVT::f64, Expand);
setOperationAction(ISD::FMAXNUM, MVT::f64, Expand);
setOperationAction(ISD::FNEARBYINT, MVT::f64, Expand);
setOperationAction(ISD::FCEIL, MVT::f64, Expand);
setOperationAction(ISD::FRINT, MVT::f64, Expand);
Expand All @@ -826,6 +844,8 @@ void TargetLoweringBase::initActions() {
setOperationAction(ISD::FEXP , MVT::f128, Expand);
setOperationAction(ISD::FEXP2, MVT::f128, Expand);
setOperationAction(ISD::FFLOOR, MVT::f128, Expand);
setOperationAction(ISD::FMINNUM, MVT::f128, Expand);
setOperationAction(ISD::FMAXNUM, MVT::f128, Expand);
setOperationAction(ISD::FNEARBYINT, MVT::f128, Expand);
setOperationAction(ISD::FCEIL, MVT::f128, Expand);
setOperationAction(ISD::FRINT, MVT::f128, Expand);
Expand Down
2 changes: 2 additions & 0 deletions llvm/lib/Target/R600/AMDGPUISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -347,6 +347,8 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :

for (MVT VT : FloatVectorTypes) {
setOperationAction(ISD::FABS, VT, Expand);
setOperationAction(ISD::FMINNUM, VT, Expand);
setOperationAction(ISD::FMAXNUM, VT, Expand);
setOperationAction(ISD::FADD, VT, Expand);
setOperationAction(ISD::FCEIL, VT, Expand);
setOperationAction(ISD::FCOS, VT, Expand);
Expand Down
5 changes: 5 additions & 0 deletions llvm/lib/Target/R600/SIISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -90,6 +90,11 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) :
setOperationAction(ISD::FSIN, MVT::f32, Custom);
setOperationAction(ISD::FCOS, MVT::f32, Custom);

setOperationAction(ISD::FMINNUM, MVT::f32, Legal);
setOperationAction(ISD::FMAXNUM, MVT::f32, Legal);
setOperationAction(ISD::FMINNUM, MVT::f64, Legal);
setOperationAction(ISD::FMAXNUM, MVT::f64, Legal);

// We need to custom lower vector stores from local memory
setOperationAction(ISD::LOAD, MVT::v4i32, Custom);
setOperationAction(ISD::LOAD, MVT::v8i32, Custom);
Expand Down
9 changes: 5 additions & 4 deletions llvm/lib/Target/R600/SIInstructions.td
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Original file line number Diff line number Diff line change
Expand Up @@ -1407,8 +1407,8 @@ defm V_MAX_LEGACY_F32 : VOP2Inst <vop2<0xe>, "V_MAX_LEGACY_F32",
VOP_F32_F32_F32, AMDGPUfmax
>;

defm V_MIN_F32 : VOP2Inst <vop2<0xf>, "V_MIN_F32", VOP_F32_F32_F32>;
defm V_MAX_F32 : VOP2Inst <vop2<0x10>, "V_MAX_F32", VOP_F32_F32_F32>;
defm V_MIN_F32 : VOP2Inst <vop2<0xf>, "V_MIN_F32", VOP_F32_F32_F32, fminnum>;
defm V_MAX_F32 : VOP2Inst <vop2<0x10>, "V_MAX_F32", VOP_F32_F32_F32, fmaxnum>;
defm V_MIN_I32 : VOP2Inst <vop2<0x11>, "V_MIN_I32", VOP_I32_I32_I32, AMDGPUsmin>;
defm V_MAX_I32 : VOP2Inst <vop2<0x12>, "V_MAX_I32", VOP_I32_I32_I32, AMDGPUsmax>;
defm V_MIN_U32 : VOP2Inst <vop2<0x13>, "V_MIN_U32", VOP_I32_I32_I32, AMDGPUumin>;
Expand Down Expand Up @@ -1593,11 +1593,12 @@ defm V_ADD_F64 : VOP3Inst <vop3<0x164>, "V_ADD_F64",
defm V_MUL_F64 : VOP3Inst <vop3<0x165>, "V_MUL_F64",
VOP_F64_F64_F64, fmul
>;

defm V_MIN_F64 : VOP3Inst <vop3<0x166>, "V_MIN_F64",
VOP_F64_F64_F64
VOP_F64_F64_F64, fminnum
>;
defm V_MAX_F64 : VOP3Inst <vop3<0x167>, "V_MAX_F64",
VOP_F64_F64_F64
VOP_F64_F64_F64, fmaxnum
>;

} // isCommutable = 1
Expand Down
2 changes: 2 additions & 0 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -811,6 +811,8 @@ void X86TargetLowering::resetOperationActions() {
setOperationAction(ISD::FLOG10, MVT::f80, Expand);
setOperationAction(ISD::FEXP, MVT::f80, Expand);
setOperationAction(ISD::FEXP2, MVT::f80, Expand);
setOperationAction(ISD::FMINNUM, MVT::f80, Expand);
setOperationAction(ISD::FMAXNUM, MVT::f80, Expand);

// First set operation action for all vector types to either promote
// (for widening) or expand (for scalarization). Then we will selectively
Expand Down
86 changes: 86 additions & 0 deletions llvm/test/CodeGen/PowerPC/fmaxnum.ll
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@@ -0,0 +1,86 @@
; RUN: llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s

declare float @fmaxf(float, float)
declare double @fmax(double, double)
declare ppc_fp128 @fmaxl(ppc_fp128, ppc_fp128)
declare float @llvm.maxnum.f32(float, float)
declare double @llvm.maxnum.f64(double, double)
declare ppc_fp128 @llvm.maxnum.ppcf128(ppc_fp128, ppc_fp128)

declare <2 x float> @llvm.maxnum.v2f32(<2 x float>, <2 x float>)
declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
declare <8 x float> @llvm.maxnum.v8f32(<8 x float>, <8 x float>)

; CHECK-LABEL: @test_fmaxf
; CHECK: bl fmaxf
define float @test_fmaxf(float %x, float %y) {
%z = call float @fmaxf(float %x, float %y) readnone
ret float %z
}

; CHECK-LABEL: @test_fmax
; CHECK: bl fmax
define double @test_fmax(double %x, double %y) {
%z = call double @fmax(double %x, double %y) readnone
ret double %z
}

; CHECK-LABEL: @test_fmaxl
; CHECK: bl fmaxl
define ppc_fp128 @test_fmaxl(ppc_fp128 %x, ppc_fp128 %y) {
%z = call ppc_fp128 @fmaxl(ppc_fp128 %x, ppc_fp128 %y) readnone
ret ppc_fp128 %z
}

; CHECK-LABEL: @test_intrinsic_fmaxf
; CHECK: bl fmaxf
define float @test_intrinsic_fmaxf(float %x, float %y) {
%z = call float @llvm.maxnum.f32(float %x, float %y) readnone
ret float %z
}

; CHECK-LABEL: @test_intrinsic_fmax
; CHECK: bl fmax
define double @test_intrinsic_fmax(double %x, double %y) {
%z = call double @llvm.maxnum.f64(double %x, double %y) readnone
ret double %z
}

; CHECK-LABEL: @test_intrinsic_fmaxl
; CHECK: bl fmaxl
define ppc_fp128 @test_intrinsic_fmaxl(ppc_fp128 %x, ppc_fp128 %y) {
%z = call ppc_fp128 @llvm.maxnum.ppcf128(ppc_fp128 %x, ppc_fp128 %y) readnone
ret ppc_fp128 %z
}

; CHECK-LABEL: @test_intrinsic_fmaxf_v2f32
; CHECK: bl fmaxf
; CHECK: bl fmaxf
define <2 x float> @test_intrinsic_fmaxf_v2f32(<2 x float> %x, <2 x float> %y) {
%z = call <2 x float> @llvm.maxnum.v2f32(<2 x float> %x, <2 x float> %y) readnone
ret <2 x float> %z
}

; CHECK-LABEL: @test_intrinsic_fmaxf_v4f32
; CHECK: bl fmaxf
; CHECK: bl fmaxf
; CHECK: bl fmaxf
; CHECK: bl fmaxf
define <4 x float> @test_intrinsic_fmaxf_v4f32(<4 x float> %x, <4 x float> %y) {
%z = call <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float> %y) readnone
ret <4 x float> %z
}

; CHECK-LABEL: @test_intrinsic_fmaxf_v8f32
; CHECK: bl fmaxf
; CHECK: bl fmaxf
; CHECK: bl fmaxf
; CHECK: bl fmaxf
; CHECK: bl fmaxf
; CHECK: bl fmaxf
; CHECK: bl fmaxf
; CHECK: bl fmaxf
define <8 x float> @test_intrinsic_fmaxf_v8f32(<8 x float> %x, <8 x float> %y) {
%z = call <8 x float> @llvm.maxnum.v8f32(<8 x float> %x, <8 x float> %y) readnone
ret <8 x float> %z
}
86 changes: 86 additions & 0 deletions llvm/test/CodeGen/PowerPC/fminnum.ll
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@@ -0,0 +1,86 @@
; RUN: llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s

declare float @fminf(float, float)
declare double @fmin(double, double)
declare ppc_fp128 @fminl(ppc_fp128, ppc_fp128)
declare float @llvm.minnum.f32(float, float)
declare double @llvm.minnum.f64(double, double)
declare ppc_fp128 @llvm.minnum.ppcf128(ppc_fp128, ppc_fp128)

declare <2 x float> @llvm.minnum.v2f32(<2 x float>, <2 x float>)
declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
declare <8 x float> @llvm.minnum.v8f32(<8 x float>, <8 x float>)

; CHECK-LABEL: @test_fminf
; CHECK: bl fminf
define float @test_fminf(float %x, float %y) {
%z = call float @fminf(float %x, float %y) readnone
ret float %z
}

; CHECK-LABEL: @test_fmin
; CHECK: bl fmin
define double @test_fmin(double %x, double %y) {
%z = call double @fmin(double %x, double %y) readnone
ret double %z
}

; CHECK-LABEL: @test_fminl
; CHECK: bl fminl
define ppc_fp128 @test_fminl(ppc_fp128 %x, ppc_fp128 %y) {
%z = call ppc_fp128 @fminl(ppc_fp128 %x, ppc_fp128 %y) readnone
ret ppc_fp128 %z
}

; CHECK-LABEL: @test_intrinsic_fmin_f32
; CHECK: bl fminf
define float @test_intrinsic_fmin_f32(float %x, float %y) {
%z = call float @llvm.minnum.f32(float %x, float %y) readnone
ret float %z
}

; CHECK-LABEL: @test_intrinsic_fmin_f64
; CHECK: bl fmin
define double @test_intrinsic_fmin_f64(double %x, double %y) {
%z = call double @llvm.minnum.f64(double %x, double %y) readnone
ret double %z
}

; CHECK-LABEL: @test_intrinsic_fmin_f128
; CHECK: bl fminl
define ppc_fp128 @test_intrinsic_fmin_f128(ppc_fp128 %x, ppc_fp128 %y) {
%z = call ppc_fp128 @llvm.minnum.ppcf128(ppc_fp128 %x, ppc_fp128 %y) readnone
ret ppc_fp128 %z
}

; CHECK-LABEL: @test_intrinsic_fminf_v2f32
; CHECK: bl fminf
; CHECK: bl fminf
define <2 x float> @test_intrinsic_fminf_v2f32(<2 x float> %x, <2 x float> %y) {
%z = call <2 x float> @llvm.minnum.v2f32(<2 x float> %x, <2 x float> %y) readnone
ret <2 x float> %z
}

; CHECK-LABEL: @test_intrinsic_fmin_v4f32
; CHECK: bl fminf
; CHECK: bl fminf
; CHECK: bl fminf
; CHECK: bl fminf
define <4 x float> @test_intrinsic_fmin_v4f32(<4 x float> %x, <4 x float> %y) {
%z = call <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float> %y) readnone
ret <4 x float> %z
}

; CHECK-LABEL: @test_intrinsic_fmin_v8f32
; CHECK: bl fminf
; CHECK: bl fminf
; CHECK: bl fminf
; CHECK: bl fminf
; CHECK: bl fminf
; CHECK: bl fminf
; CHECK: bl fminf
; CHECK: bl fminf
define <8 x float> @test_intrinsic_fmin_v8f32(<8 x float> %x, <8 x float> %y) {
%z = call <8 x float> @llvm.minnum.v8f32(<8 x float> %x, <8 x float> %y) readnone
ret <8 x float> %z
}
75 changes: 75 additions & 0 deletions llvm/test/CodeGen/R600/fmaxnum.f64.ll
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@@ -0,0 +1,75 @@
; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s

declare double @llvm.maxnum.f64(double, double) #0
declare <2 x double> @llvm.maxnum.v2f64(<2 x double>, <2 x double>) #0
declare <4 x double> @llvm.maxnum.v4f64(<4 x double>, <4 x double>) #0
declare <8 x double> @llvm.maxnum.v8f64(<8 x double>, <8 x double>) #0
declare <16 x double> @llvm.maxnum.v16f64(<16 x double>, <16 x double>) #0

; FUNC-LABEL: @test_fmax_f64
; SI: V_MAX_F64
define void @test_fmax_f64(double addrspace(1)* %out, double %a, double %b) nounwind {
%val = call double @llvm.maxnum.f64(double %a, double %b) #0
store double %val, double addrspace(1)* %out, align 8
ret void
}

; FUNC-LABEL: @test_fmax_v2f64
; SI: V_MAX_F64
; SI: V_MAX_F64
define void @test_fmax_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %a, <2 x double> %b) nounwind {
%val = call <2 x double> @llvm.maxnum.v2f64(<2 x double> %a, <2 x double> %b) #0
store <2 x double> %val, <2 x double> addrspace(1)* %out, align 16
ret void
}

; FUNC-LABEL: @test_fmax_v4f64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
define void @test_fmax_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %a, <4 x double> %b) nounwind {
%val = call <4 x double> @llvm.maxnum.v4f64(<4 x double> %a, <4 x double> %b) #0
store <4 x double> %val, <4 x double> addrspace(1)* %out, align 32
ret void
}

; FUNC-LABEL: @test_fmax_v8f64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
define void @test_fmax_v8f64(<8 x double> addrspace(1)* %out, <8 x double> %a, <8 x double> %b) nounwind {
%val = call <8 x double> @llvm.maxnum.v8f64(<8 x double> %a, <8 x double> %b) #0
store <8 x double> %val, <8 x double> addrspace(1)* %out, align 64
ret void
}

; FUNC-LABEL: @test_fmax_v16f64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
; SI: V_MAX_F64
define void @test_fmax_v16f64(<16 x double> addrspace(1)* %out, <16 x double> %a, <16 x double> %b) nounwind {
%val = call <16 x double> @llvm.maxnum.v16f64(<16 x double> %a, <16 x double> %b) #0
store <16 x double> %val, <16 x double> addrspace(1)* %out, align 128
ret void
}

attributes #0 = { nounwind readnone }
191 changes: 191 additions & 0 deletions llvm/test/CodeGen/R600/fmaxnum.ll
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@@ -0,0 +1,191 @@
; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s

declare float @llvm.maxnum.f32(float, float) #0
declare <2 x float> @llvm.maxnum.v2f32(<2 x float>, <2 x float>) #0
declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>) #0
declare <8 x float> @llvm.maxnum.v8f32(<8 x float>, <8 x float>) #0
declare <16 x float> @llvm.maxnum.v16f32(<16 x float>, <16 x float>) #0

declare double @llvm.maxnum.f64(double, double)

; FUNC-LABEL: @test_fmax_f32
; SI: V_MAX_F32_e32
define void @test_fmax_f32(float addrspace(1)* %out, float %a, float %b) nounwind {
%val = call float @llvm.maxnum.f32(float %a, float %b) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @test_fmax_v2f32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
define void @test_fmax_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) nounwind {
%val = call <2 x float> @llvm.maxnum.v2f32(<2 x float> %a, <2 x float> %b) #0
store <2 x float> %val, <2 x float> addrspace(1)* %out, align 8
ret void
}

; FUNC-LABEL: @test_fmax_v4f32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
define void @test_fmax_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %a, <4 x float> %b) nounwind {
%val = call <4 x float> @llvm.maxnum.v4f32(<4 x float> %a, <4 x float> %b) #0
store <4 x float> %val, <4 x float> addrspace(1)* %out, align 16
ret void
}

; FUNC-LABEL: @test_fmax_v8f32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
define void @test_fmax_v8f32(<8 x float> addrspace(1)* %out, <8 x float> %a, <8 x float> %b) nounwind {
%val = call <8 x float> @llvm.maxnum.v8f32(<8 x float> %a, <8 x float> %b) #0
store <8 x float> %val, <8 x float> addrspace(1)* %out, align 32
ret void
}

; FUNC-LABEL: @test_fmax_v16f32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
; SI: V_MAX_F32_e32
define void @test_fmax_v16f32(<16 x float> addrspace(1)* %out, <16 x float> %a, <16 x float> %b) nounwind {
%val = call <16 x float> @llvm.maxnum.v16f32(<16 x float> %a, <16 x float> %b) #0
store <16 x float> %val, <16 x float> addrspace(1)* %out, align 64
ret void
}

; FUNC-LABEL: @constant_fold_fmax_f32
; SI-NOT: V_MAX_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 2.0
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmax_f32(float addrspace(1)* %out) nounwind {
%val = call float @llvm.maxnum.f32(float 1.0, float 2.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmax_f32_nan_nan
; SI-NOT: V_MAX_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0x7fc00000
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmax_f32_nan_nan(float addrspace(1)* %out) nounwind {
%val = call float @llvm.maxnum.f32(float 0x7FF8000000000000, float 0x7FF8000000000000) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmax_f32_val_nan
; SI-NOT: V_MAX_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 1.0
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmax_f32_val_nan(float addrspace(1)* %out) nounwind {
%val = call float @llvm.maxnum.f32(float 1.0, float 0x7FF8000000000000) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmax_f32_nan_val
; SI-NOT: V_MAX_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 1.0
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmax_f32_nan_val(float addrspace(1)* %out) nounwind {
%val = call float @llvm.maxnum.f32(float 0x7FF8000000000000, float 1.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmax_f32_p0_p0
; SI-NOT: V_MAX_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmax_f32_p0_p0(float addrspace(1)* %out) nounwind {
%val = call float @llvm.maxnum.f32(float 0.0, float 0.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmax_f32_p0_n0
; SI-NOT: V_MAX_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmax_f32_p0_n0(float addrspace(1)* %out) nounwind {
%val = call float @llvm.maxnum.f32(float 0.0, float -0.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmax_f32_n0_p0
; SI-NOT: V_MAX_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0x80000000
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmax_f32_n0_p0(float addrspace(1)* %out) nounwind {
%val = call float @llvm.maxnum.f32(float -0.0, float 0.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmax_f32_n0_n0
; SI-NOT: V_MAX_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0x80000000
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmax_f32_n0_n0(float addrspace(1)* %out) nounwind {
%val = call float @llvm.maxnum.f32(float -0.0, float -0.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @fmax_var_immediate_f32
; SI: V_MAX_F32_e64 {{v[0-9]+}}, 2.0, {{s[0-9]+}}
define void @fmax_var_immediate_f32(float addrspace(1)* %out, float %a) nounwind {
%val = call float @llvm.maxnum.f32(float %a, float 2.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @fmax_immediate_var_f32
; SI: V_MAX_F32_e64 {{v[0-9]+}}, 2.0, {{s[0-9]+}}
define void @fmax_immediate_var_f32(float addrspace(1)* %out, float %a) nounwind {
%val = call float @llvm.maxnum.f32(float 2.0, float %a) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @fmax_var_literal_f32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0x42c60000
; SI: V_MAX_F32_e32 {{v[0-9]+}}, {{s[0-9]+}}, [[REG]]
define void @fmax_var_literal_f32(float addrspace(1)* %out, float %a) nounwind {
%val = call float @llvm.maxnum.f32(float %a, float 99.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @fmax_literal_var_f32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0x42c60000
; SI: V_MAX_F32_e32 {{v[0-9]+}}, {{s[0-9]+}}, [[REG]]
define void @fmax_literal_var_f32(float addrspace(1)* %out, float %a) nounwind {
%val = call float @llvm.maxnum.f32(float 99.0, float %a) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

attributes #0 = { nounwind readnone }
75 changes: 75 additions & 0 deletions llvm/test/CodeGen/R600/fminnum.f64.ll
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; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s

declare double @llvm.minnum.f64(double, double) #0
declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>) #0
declare <4 x double> @llvm.minnum.v4f64(<4 x double>, <4 x double>) #0
declare <8 x double> @llvm.minnum.v8f64(<8 x double>, <8 x double>) #0
declare <16 x double> @llvm.minnum.v16f64(<16 x double>, <16 x double>) #0

; FUNC-LABEL: @test_fmin_f64
; SI: V_MIN_F64
define void @test_fmin_f64(double addrspace(1)* %out, double %a, double %b) nounwind {
%val = call double @llvm.minnum.f64(double %a, double %b) #0
store double %val, double addrspace(1)* %out, align 8
ret void
}

; FUNC-LABEL: @test_fmin_v2f64
; SI: V_MIN_F64
; SI: V_MIN_F64
define void @test_fmin_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %a, <2 x double> %b) nounwind {
%val = call <2 x double> @llvm.minnum.v2f64(<2 x double> %a, <2 x double> %b) #0
store <2 x double> %val, <2 x double> addrspace(1)* %out, align 16
ret void
}

; FUNC-LABEL: @test_fmin_v4f64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
define void @test_fmin_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %a, <4 x double> %b) nounwind {
%val = call <4 x double> @llvm.minnum.v4f64(<4 x double> %a, <4 x double> %b) #0
store <4 x double> %val, <4 x double> addrspace(1)* %out, align 32
ret void
}

; FUNC-LABEL: @test_fmin_v8f64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
define void @test_fmin_v8f64(<8 x double> addrspace(1)* %out, <8 x double> %a, <8 x double> %b) nounwind {
%val = call <8 x double> @llvm.minnum.v8f64(<8 x double> %a, <8 x double> %b) #0
store <8 x double> %val, <8 x double> addrspace(1)* %out, align 64
ret void
}

; FUNC-LABEL: @test_fmin_v16f64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
; SI: V_MIN_F64
define void @test_fmin_v16f64(<16 x double> addrspace(1)* %out, <16 x double> %a, <16 x double> %b) nounwind {
%val = call <16 x double> @llvm.minnum.v16f64(<16 x double> %a, <16 x double> %b) #0
store <16 x double> %val, <16 x double> addrspace(1)* %out, align 128
ret void
}

attributes #0 = { nounwind readnone }
189 changes: 189 additions & 0 deletions llvm/test/CodeGen/R600/fminnum.ll
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; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s

declare float @llvm.minnum.f32(float, float) #0
declare <2 x float> @llvm.minnum.v2f32(<2 x float>, <2 x float>) #0
declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>) #0
declare <8 x float> @llvm.minnum.v8f32(<8 x float>, <8 x float>) #0
declare <16 x float> @llvm.minnum.v16f32(<16 x float>, <16 x float>) #0

; FUNC-LABEL: @test_fmin_f32
; SI: V_MIN_F32_e32
define void @test_fmin_f32(float addrspace(1)* %out, float %a, float %b) nounwind {
%val = call float @llvm.minnum.f32(float %a, float %b) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @test_fmin_v2f32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
define void @test_fmin_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) nounwind {
%val = call <2 x float> @llvm.minnum.v2f32(<2 x float> %a, <2 x float> %b) #0
store <2 x float> %val, <2 x float> addrspace(1)* %out, align 8
ret void
}

; FUNC-LABEL: @test_fmin_v4f32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
define void @test_fmin_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %a, <4 x float> %b) nounwind {
%val = call <4 x float> @llvm.minnum.v4f32(<4 x float> %a, <4 x float> %b) #0
store <4 x float> %val, <4 x float> addrspace(1)* %out, align 16
ret void
}

; FUNC-LABEL: @test_fmin_v8f32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
define void @test_fmin_v8f32(<8 x float> addrspace(1)* %out, <8 x float> %a, <8 x float> %b) nounwind {
%val = call <8 x float> @llvm.minnum.v8f32(<8 x float> %a, <8 x float> %b) #0
store <8 x float> %val, <8 x float> addrspace(1)* %out, align 32
ret void
}

; FUNC-LABEL: @test_fmin_v16f32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
; SI: V_MIN_F32_e32
define void @test_fmin_v16f32(<16 x float> addrspace(1)* %out, <16 x float> %a, <16 x float> %b) nounwind {
%val = call <16 x float> @llvm.minnum.v16f32(<16 x float> %a, <16 x float> %b) #0
store <16 x float> %val, <16 x float> addrspace(1)* %out, align 64
ret void
}

; FUNC-LABEL: @constant_fold_fmin_f32
; SI-NOT: V_MIN_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 1.0
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmin_f32(float addrspace(1)* %out) nounwind {
%val = call float @llvm.minnum.f32(float 1.0, float 2.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmin_f32_nan_nan
; SI-NOT: V_MIN_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0x7fc00000
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmin_f32_nan_nan(float addrspace(1)* %out) nounwind {
%val = call float @llvm.minnum.f32(float 0x7FF8000000000000, float 0x7FF8000000000000) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmin_f32_val_nan
; SI-NOT: V_MIN_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 1.0
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmin_f32_val_nan(float addrspace(1)* %out) nounwind {
%val = call float @llvm.minnum.f32(float 1.0, float 0x7FF8000000000000) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmin_f32_nan_val
; SI-NOT: V_MIN_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 1.0
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmin_f32_nan_val(float addrspace(1)* %out) nounwind {
%val = call float @llvm.minnum.f32(float 0x7FF8000000000000, float 1.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmin_f32_p0_p0
; SI-NOT: V_MIN_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmin_f32_p0_p0(float addrspace(1)* %out) nounwind {
%val = call float @llvm.minnum.f32(float 0.0, float 0.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmin_f32_p0_n0
; SI-NOT: V_MIN_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmin_f32_p0_n0(float addrspace(1)* %out) nounwind {
%val = call float @llvm.minnum.f32(float 0.0, float -0.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmin_f32_n0_p0
; SI-NOT: V_MIN_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0x80000000
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmin_f32_n0_p0(float addrspace(1)* %out) nounwind {
%val = call float @llvm.minnum.f32(float -0.0, float 0.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @constant_fold_fmin_f32_n0_n0
; SI-NOT: V_MIN_F32_e32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0x80000000
; SI: BUFFER_STORE_DWORD [[REG]]
define void @constant_fold_fmin_f32_n0_n0(float addrspace(1)* %out) nounwind {
%val = call float @llvm.minnum.f32(float -0.0, float -0.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @fmin_var_immediate_f32
; SI: V_MIN_F32_e64 {{v[0-9]+}}, 2.0, {{s[0-9]+}}
define void @fmin_var_immediate_f32(float addrspace(1)* %out, float %a) nounwind {
%val = call float @llvm.minnum.f32(float %a, float 2.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @fmin_immediate_var_f32
; SI: V_MIN_F32_e64 {{v[0-9]+}}, 2.0, {{s[0-9]+}}
define void @fmin_immediate_var_f32(float addrspace(1)* %out, float %a) nounwind {
%val = call float @llvm.minnum.f32(float 2.0, float %a) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @fmin_var_literal_f32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0x42c60000
; SI: V_MIN_F32_e32 {{v[0-9]+}}, {{s[0-9]+}}, [[REG]]
define void @fmin_var_literal_f32(float addrspace(1)* %out, float %a) nounwind {
%val = call float @llvm.minnum.f32(float %a, float 99.0) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

; FUNC-LABEL: @fmin_literal_var_f32
; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 0x42c60000
; SI: V_MIN_F32_e32 {{v[0-9]+}}, {{s[0-9]+}}, [[REG]]
define void @fmin_literal_var_f32(float addrspace(1)* %out, float %a) nounwind {
%val = call float @llvm.minnum.f32(float 99.0, float %a) #0
store float %val, float addrspace(1)* %out, align 4
ret void
}

attributes #0 = { nounwind readnone }
50 changes: 50 additions & 0 deletions llvm/test/CodeGen/X86/fmaxnum.ll
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; RUN: llc -march=x86 -mtriple=i386-linux-gnu < %s | FileCheck %s

declare float @fmaxf(float, float)
declare double @fmax(double, double)
declare x86_fp80 @fmaxl(x86_fp80, x86_fp80)
declare float @llvm.maxnum.f32(float, float)
declare double @llvm.maxnum.f64(double, double)
declare x86_fp80 @llvm.maxnum.f80(x86_fp80, x86_fp80)

; CHECK-LABEL: @test_fmaxf
; CHECK: calll fmaxf
define float @test_fmaxf(float %x, float %y) {
%z = call float @fmaxf(float %x, float %y) readnone
ret float %z
}

; CHECK-LABEL: @test_fmax
; CHECK: calll fmax
define double @test_fmax(double %x, double %y) {
%z = call double @fmax(double %x, double %y) readnone
ret double %z
}

; CHECK-LABEL: @test_fmaxl
; CHECK: calll fmaxl
define x86_fp80 @test_fmaxl(x86_fp80 %x, x86_fp80 %y) {
%z = call x86_fp80 @fmaxl(x86_fp80 %x, x86_fp80 %y) readnone
ret x86_fp80 %z
}

; CHECK-LABEL: @test_intrinsic_fmaxf
; CHECK: calll fmaxf
define float @test_intrinsic_fmaxf(float %x, float %y) {
%z = call float @llvm.maxnum.f32(float %x, float %y) readnone
ret float %z
}

; CHECK-LABEL: @test_intrinsic_fmax
; CHECK: calll fmax
define double @test_intrinsic_fmax(double %x, double %y) {
%z = call double @llvm.maxnum.f64(double %x, double %y) readnone
ret double %z
}

; CHECK-LABEL: @test_intrinsic_fmaxl
; CHECK: calll fmaxl
define x86_fp80 @test_intrinsic_fmaxl(x86_fp80 %x, x86_fp80 %y) {
%z = call x86_fp80 @llvm.maxnum.f80(x86_fp80 %x, x86_fp80 %y) readnone
ret x86_fp80 %z
}
95 changes: 95 additions & 0 deletions llvm/test/CodeGen/X86/fminnum.ll
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; RUN: llc -march=x86 -mtriple=i386-linux-gnu -mattr=+sse,+sse2 < %s | FileCheck %s

declare float @fminf(float, float)
declare double @fmin(double, double)
declare x86_fp80 @fminl(x86_fp80, x86_fp80)
declare float @llvm.minnum.f32(float, float)
declare double @llvm.minnum.f64(double, double)
declare x86_fp80 @llvm.minnum.f80(x86_fp80, x86_fp80)

declare <2 x float> @llvm.minnum.v2f32(<2 x float>, <2 x float>)
declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>)
declare <8 x double> @llvm.minnum.v8f64(<8 x double>, <8 x double>)

; CHECK-LABEL: @test_fminf
; CHECK: jmp fminf
define float @test_fminf(float %x, float %y) {
%z = call float @fminf(float %x, float %y) readnone
ret float %z
}

; CHECK-LABEL: @test_fmin
; CHECK: jmp fmin
define double @test_fmin(double %x, double %y) {
%z = call double @fmin(double %x, double %y) readnone
ret double %z
}

; CHECK-LABEL: @test_fminl
; CHECK: calll fminl
define x86_fp80 @test_fminl(x86_fp80 %x, x86_fp80 %y) {
%z = call x86_fp80 @fminl(x86_fp80 %x, x86_fp80 %y) readnone
ret x86_fp80 %z
}

; CHECK-LABEL: @test_intrinsic_fminf
; CHECK: jmp fminf
define float @test_intrinsic_fminf(float %x, float %y) {
%z = call float @llvm.minnum.f32(float %x, float %y) readnone
ret float %z
}

; CHECK-LABEL: @test_intrinsic_fmin
; CHECK: jmp fmin
define double @test_intrinsic_fmin(double %x, double %y) {
%z = call double @llvm.minnum.f64(double %x, double %y) readnone
ret double %z
}

; CHECK-LABEL: @test_intrinsic_fminl
; CHECK: calll fminl
define x86_fp80 @test_intrinsic_fminl(x86_fp80 %x, x86_fp80 %y) {
%z = call x86_fp80 @llvm.minnum.f80(x86_fp80 %x, x86_fp80 %y) readnone
ret x86_fp80 %z
}

; CHECK-LABEL: @test_intrinsic_fmin_v2f32
; CHECK: calll fminf
; CHECK: calll fminf
define <2 x float> @test_intrinsic_fmin_v2f32(<2 x float> %x, <2 x float> %y) {
%z = call <2 x float> @llvm.minnum.v2f32(<2 x float> %x, <2 x float> %y) readnone
ret <2 x float> %z
}

; CHECK-LABEL: @test_intrinsic_fmin_v4f32
; CHECK: calll fminf
; CHECK: calll fminf
; CHECK: calll fminf
; CHECK: calll fminf
define <4 x float> @test_intrinsic_fmin_v4f32(<4 x float> %x, <4 x float> %y) {
%z = call <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float> %y) readnone
ret <4 x float> %z
}

; CHECK-LABEL: @test_intrinsic_fmin_v2f64
; CHECK: calll fmin
; CHECK: calll fmin
define <2 x double> @test_intrinsic_fmin_v2f64(<2 x double> %x, <2 x double> %y) {
%z = call <2 x double> @llvm.minnum.v2f64(<2 x double> %x, <2 x double> %y) readnone
ret <2 x double> %z
}

; CHECK-LABEL: @test_intrinsic_fmin_v8f64
; CHECK: calll fmin
; CHECK: calll fmin
; CHECK: calll fmin
; CHECK: calll fmin
; CHECK: calll fmin
; CHECK: calll fmin
; CHECK: calll fmin
; CHECK: calll fmin
define <8 x double> @test_intrinsic_fmin_v8f64(<8 x double> %x, <8 x double> %y) {
%z = call <8 x double> @llvm.minnum.v8f64(<8 x double> %x, <8 x double> %y) readnone
ret <8 x double> %z
}