1,988 changes: 994 additions & 994 deletions llvm/test/CodeGen/X86/popcnt.ll
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138 changes: 69 additions & 69 deletions llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
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Original file line number Diff line number Diff line change
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X32
; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X64
; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefixes=CHECK,X86
; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefixes=CHECK,X64

; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/tbm-builtins.c

define i32 @test__bextri_u32(i32 %a0) {
; X32-LABEL: test__bextri_u32:
; X32: # %bb.0:
; X32-NEXT: bextrl $3841, {{[0-9]+}}(%esp), %eax # imm = 0xF01
; X32-NEXT: retl
; X86-LABEL: test__bextri_u32:
; X86: # %bb.0:
; X86-NEXT: bextrl $3841, {{[0-9]+}}(%esp), %eax # imm = 0xF01
; X86-NEXT: retl
;
; X64-LABEL: test__bextri_u32:
; X64: # %bb.0:
Expand All @@ -19,12 +19,12 @@ define i32 @test__bextri_u32(i32 %a0) {
}

define i32 @test__blcfill_u32(i32 %a0) {
; X32-LABEL: test__blcfill_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: leal 1(%ecx), %eax
; X32-NEXT: andl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blcfill_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal 1(%ecx), %eax
; X86-NEXT: andl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blcfill_u32:
; X64: # %bb.0:
Expand All @@ -38,13 +38,13 @@ define i32 @test__blcfill_u32(i32 %a0) {
}

define i32 @test__blci_u32(i32 %a0) {
; X32-LABEL: test__blci_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: leal 1(%ecx), %eax
; X32-NEXT: xorl $-1, %eax
; X32-NEXT: orl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blci_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal 1(%ecx), %eax
; X86-NEXT: xorl $-1, %eax
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blci_u32:
; X64: # %bb.0:
Expand All @@ -60,14 +60,14 @@ define i32 @test__blci_u32(i32 %a0) {
}

define i32 @test__blcic_u32(i32 %a0) {
; X32-LABEL: test__blcic_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: xorl $-1, %ecx
; X32-NEXT: addl $1, %eax
; X32-NEXT: andl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blcic_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: xorl $-1, %ecx
; X86-NEXT: addl $1, %eax
; X86-NEXT: andl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blcic_u32:
; X64: # %bb.0:
Expand All @@ -84,12 +84,12 @@ define i32 @test__blcic_u32(i32 %a0) {
}

define i32 @test__blcmsk_u32(i32 %a0) {
; X32-LABEL: test__blcmsk_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: leal 1(%ecx), %eax
; X32-NEXT: xorl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blcmsk_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal 1(%ecx), %eax
; X86-NEXT: xorl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blcmsk_u32:
; X64: # %bb.0:
Expand All @@ -103,12 +103,12 @@ define i32 @test__blcmsk_u32(i32 %a0) {
}

define i32 @test__blcs_u32(i32 %a0) {
; X32-LABEL: test__blcs_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: leal 1(%ecx), %eax
; X32-NEXT: orl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blcs_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal 1(%ecx), %eax
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blcs_u32:
; X64: # %bb.0:
Expand All @@ -122,12 +122,12 @@ define i32 @test__blcs_u32(i32 %a0) {
}

define i32 @test__blsfill_u32(i32 %a0) {
; X32-LABEL: test__blsfill_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: leal -1(%ecx), %eax
; X32-NEXT: orl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blsfill_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal -1(%ecx), %eax
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blsfill_u32:
; X64: # %bb.0:
Expand All @@ -141,14 +141,14 @@ define i32 @test__blsfill_u32(i32 %a0) {
}

define i32 @test__blsic_u32(i32 %a0) {
; X32-LABEL: test__blsic_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: xorl $-1, %ecx
; X32-NEXT: subl $1, %eax
; X32-NEXT: orl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blsic_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: xorl $-1, %ecx
; X86-NEXT: subl $1, %eax
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blsic_u32:
; X64: # %bb.0:
Expand All @@ -165,14 +165,14 @@ define i32 @test__blsic_u32(i32 %a0) {
}

define i32 @test__t1mskc_u32(i32 %a0) {
; X32-LABEL: test__t1mskc_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: xorl $-1, %ecx
; X32-NEXT: addl $1, %eax
; X32-NEXT: orl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__t1mskc_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: xorl $-1, %ecx
; X86-NEXT: addl $1, %eax
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__t1mskc_u32:
; X64: # %bb.0:
Expand All @@ -189,14 +189,14 @@ define i32 @test__t1mskc_u32(i32 %a0) {
}

define i32 @test__tzmsk_u32(i32 %a0) {
; X32-LABEL: test__tzmsk_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: xorl $-1, %ecx
; X32-NEXT: subl $1, %eax
; X32-NEXT: andl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__tzmsk_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: xorl $-1, %ecx
; X86-NEXT: subl $1, %eax
; X86-NEXT: andl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__tzmsk_u32:
; X64: # %bb.0:
Expand Down
534 changes: 267 additions & 267 deletions llvm/test/CodeGen/X86/xop-intrinsics-fast-isel.ll
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158 changes: 51 additions & 107 deletions llvm/test/CodeGen/X86/xop-mask-comments.ll
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Original file line number Diff line number Diff line change
@@ -1,87 +1,62 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X64

;
; VPPERM
;

define <16 x i8> @vpperm_shuffle_unary(<16 x i8> %a0) {
; X32-LABEL: vpperm_shuffle_unary:
; X32: # %bb.0:
; X32-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
; X32-NEXT: retl
;
; X64-LABEL: vpperm_shuffle_unary:
; X64: # %bb.0:
; X64-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
; X64-NEXT: retq
; CHECK-LABEL: vpperm_shuffle_unary:
; CHECK: # %bb.0:
; CHECK-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
; CHECK-NEXT: ret{{[l|q]}}
%1 = tail call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a0, <16 x i8> <i8 31, i8 14, i8 29, i8 12, i8 27, i8 10, i8 25, i8 8, i8 23, i8 6, i8 21, i8 4, i8 19, i8 2, i8 17, i8 0>)
ret <16 x i8> %1
}

define <16 x i8> @vpperm_shuffle_unary_undef(<16 x i8> %a0) {
; X32-LABEL: vpperm_shuffle_unary_undef:
; X32: # %bb.0:
; X32-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
; X32-NEXT: retl
;
; X64-LABEL: vpperm_shuffle_unary_undef:
; X64: # %bb.0:
; X64-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
; X64-NEXT: retq
; CHECK-LABEL: vpperm_shuffle_unary_undef:
; CHECK: # %bb.0:
; CHECK-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
; CHECK-NEXT: ret{{[l|q]}}
%1 = tail call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> undef, <16 x i8> <i8 31, i8 14, i8 29, i8 12, i8 27, i8 10, i8 25, i8 8, i8 23, i8 6, i8 21, i8 4, i8 19, i8 2, i8 17, i8 0>)
ret <16 x i8> %1
}

define <16 x i8> @vpperm_shuffle_unary_zero(<16 x i8> %a0) {
; X32-LABEL: vpperm_shuffle_unary_zero:
; X32: # %bb.0:
; X32-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3],zero,xmm0[1],zero
; X32-NEXT: retl
;
; X64-LABEL: vpperm_shuffle_unary_zero:
; X64: # %bb.0:
; X64-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3],zero,xmm0[1],zero
; X64-NEXT: retq
; CHECK-LABEL: vpperm_shuffle_unary_zero:
; CHECK: # %bb.0:
; CHECK-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3],zero,xmm0[1],zero
; CHECK-NEXT: ret{{[l|q]}}
%1 = tail call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a0, <16 x i8> <i8 31, i8 14, i8 29, i8 12, i8 27, i8 10, i8 25, i8 8, i8 23, i8 6, i8 21, i8 4, i8 19, i8 130, i8 17, i8 128>)
ret <16 x i8> %1
}

define <16 x i8> @vpperm_shuffle_binary(<16 x i8> %a0, <16 x i8> %a1) {
; X32-LABEL: vpperm_shuffle_binary:
; X32: # %bb.0:
; X32-NEXT: vpperm {{.*#+}} xmm0 = xmm1[15],xmm0[14],xmm1[13],xmm0[12],xmm1[11],xmm0[10],xmm1[9],xmm0[8],xmm1[7],xmm0[6],xmm1[5],xmm0[4],xmm1[3],xmm0[2],xmm1[1],xmm0[0]
; X32-NEXT: retl
;
; X64-LABEL: vpperm_shuffle_binary:
; X64: # %bb.0:
; X64-NEXT: vpperm {{.*#+}} xmm0 = xmm1[15],xmm0[14],xmm1[13],xmm0[12],xmm1[11],xmm0[10],xmm1[9],xmm0[8],xmm1[7],xmm0[6],xmm1[5],xmm0[4],xmm1[3],xmm0[2],xmm1[1],xmm0[0]
; X64-NEXT: retq
; CHECK-LABEL: vpperm_shuffle_binary:
; CHECK: # %bb.0:
; CHECK-NEXT: vpperm {{.*#+}} xmm0 = xmm1[15],xmm0[14],xmm1[13],xmm0[12],xmm1[11],xmm0[10],xmm1[9],xmm0[8],xmm1[7],xmm0[6],xmm1[5],xmm0[4],xmm1[3],xmm0[2],xmm1[1],xmm0[0]
; CHECK-NEXT: ret{{[l|q]}}
%1 = tail call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 31, i8 14, i8 29, i8 12, i8 27, i8 10, i8 25, i8 8, i8 23, i8 6, i8 21, i8 4, i8 19, i8 2, i8 17, i8 0>)
ret <16 x i8> %1
}

define <16 x i8> @vpperm_shuffle_binary_zero(<16 x i8> %a0, <16 x i8> %a1) {
; X32-LABEL: vpperm_shuffle_binary_zero:
; X32: # %bb.0:
; X32-NEXT: vpperm {{.*#+}} xmm0 = xmm1[15],xmm0[14],xmm1[13],xmm0[12],xmm1[11],xmm0[10],xmm1[9],xmm0[8],xmm1[7],xmm0[6],xmm1[5],xmm0[4],zero,zero,zero,zero
; X32-NEXT: retl
;
; X64-LABEL: vpperm_shuffle_binary_zero:
; X64: # %bb.0:
; X64-NEXT: vpperm {{.*#+}} xmm0 = xmm1[15],xmm0[14],xmm1[13],xmm0[12],xmm1[11],xmm0[10],xmm1[9],xmm0[8],xmm1[7],xmm0[6],xmm1[5],xmm0[4],zero,zero,zero,zero
; X64-NEXT: retq
; CHECK-LABEL: vpperm_shuffle_binary_zero:
; CHECK: # %bb.0:
; CHECK-NEXT: vpperm {{.*#+}} xmm0 = xmm1[15],xmm0[14],xmm1[13],xmm0[12],xmm1[11],xmm0[10],xmm1[9],xmm0[8],xmm1[7],xmm0[6],xmm1[5],xmm0[4],zero,zero,zero,zero
; CHECK-NEXT: ret{{[l|q]}}
%1 = tail call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 31, i8 14, i8 29, i8 12, i8 27, i8 10, i8 25, i8 8, i8 23, i8 6, i8 21, i8 4, i8 147, i8 130, i8 145, i8 128>)
ret <16 x i8> %1
}

; we can't decode vpperm's other permute ops
define <16 x i8> @vpperm_shuffle_general(<16 x i8> %a0, <16 x i8> %a1) {
; X32-LABEL: vpperm_shuffle_general:
; X32: # %bb.0:
; X32-NEXT: vpperm {{\.LCPI.*}}, %xmm0, %xmm0, %xmm0
; X32-NEXT: retl
; X86-LABEL: vpperm_shuffle_general:
; X86: # %bb.0:
; X86-NEXT: vpperm {{\.LCPI.*}}, %xmm0, %xmm0, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: vpperm_shuffle_general:
; X64: # %bb.0:
Expand All @@ -98,87 +73,56 @@ define <16 x i8> @vpperm_shuffle_general(<16 x i8> %a0, <16 x i8> %a1) {
; Note: _mm_permute2_pd shouldn't be used for constant shuffles as there will always
; be a quicker (and smaller) alternative.
define <2 x double> @vpermil2pd_21(<2 x double> %a0, <2 x double> %a1) {
; X32-LABEL: vpermil2pd_21:
; X32: # %bb.0:
; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X32-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; X32-NEXT: retl
;
; X64-LABEL: vpermil2pd_21:
; X64: # %bb.0:
; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X64-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; X64-NEXT: retq
; CHECK-LABEL: vpermil2pd_21:
; CHECK: # %bb.0:
; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1
; CHECK-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-NEXT: ret{{[l|q]}}
%1 = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x i64> <i64 10, i64 1>, i8 2)
ret <2 x double> %1
}

define <4 x double> @vpermil2pd256_0062(<4 x double> %a0, <4 x double> %a1) {
; X32-LABEL: vpermil2pd256_0062:
; X32: # %bb.0:
; X32-NEXT: vpermil2pd {{.*#+}} ymm0 = ymm0[0,0],ymm1[2],ymm0[2]
; X32-NEXT: retl
;
; X64-LABEL: vpermil2pd256_0062:
; X64: # %bb.0:
; X64-NEXT: vpermil2pd {{.*#+}} ymm0 = ymm0[0,0],ymm1[2],ymm0[2]
; X64-NEXT: retq
; CHECK-LABEL: vpermil2pd256_0062:
; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd {{.*#+}} ymm0 = ymm0[0,0],ymm1[2],ymm0[2]
; CHECK-NEXT: ret{{[l|q]}}
%1 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x i64> <i64 0, i64 0, i64 4, i64 0>, i8 0)
ret <4 x double> %1
}

define <4 x double> @vpermil2pd256_zz73(<4 x double> %a0, <4 x double> %a1) {
; X32-LABEL: vpermil2pd256_zz73:
; X32: # %bb.0:
; X32-NEXT: vpermil2pd {{.*#+}} ymm0 = zero,zero,ymm1[3],ymm0[3]
; X32-NEXT: retl
;
; X64-LABEL: vpermil2pd256_zz73:
; X64: # %bb.0:
; X64-NEXT: vpermil2pd {{.*#+}} ymm0 = zero,zero,ymm1[3],ymm0[3]
; X64-NEXT: retq
; CHECK-LABEL: vpermil2pd256_zz73:
; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd {{.*#+}} ymm0 = zero,zero,ymm1[3],ymm0[3]
; CHECK-NEXT: ret{{[l|q]}}
%1 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x i64> <i64 0, i64 0, i64 14, i64 10>, i8 3)
ret <4 x double> %1
}

define <4 x float> @vpermil2ps_0561(<4 x float> %a0, <4 x float> %a1) {
; X32-LABEL: vpermil2ps_0561:
; X32: # %bb.0:
; X32-NEXT: vpermil2ps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[1]
; X32-NEXT: retl
;
; X64-LABEL: vpermil2ps_0561:
; X64: # %bb.0:
; X64-NEXT: vpermil2ps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[1]
; X64-NEXT: retq
; CHECK-LABEL: vpermil2ps_0561:
; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2ps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[1]
; CHECK-NEXT: ret{{[l|q]}}
%1 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 0, i32 5, i32 6, i32 1>, i8 0)
ret <4 x float> %1
}

define <8 x float> @vpermil2ps256_098144FE(<8 x float> %a0, <8 x float> %a1) {
; X32-LABEL: vpermil2ps256_098144FE:
; X32: # %bb.0:
; X32-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],ymm1[1,0],ymm0[1,4,4],ymm1[7,6]
; X32-NEXT: retl
;
; X64-LABEL: vpermil2ps256_098144FE:
; X64: # %bb.0:
; X64-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],ymm1[1,0],ymm0[1,4,4],ymm1[7,6]
; X64-NEXT: retq
; CHECK-LABEL: vpermil2ps256_098144FE:
; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],ymm1[1,0],ymm0[1,4,4],ymm1[7,6]
; CHECK-NEXT: ret{{[l|q]}}
%1 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 0, i32 5, i32 4, i32 1, i32 0, i32 0, i32 7, i32 6>, i8 0)
ret <8 x float> %1
}

define <8 x float> @vpermil2ps256_0zz8BzzA(<8 x float> %a0, <8 x float> %a1) {
; X32-LABEL: vpermil2ps256_0zz8BzzA:
; X32: # %bb.0:
; X32-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],zero,zero,ymm1[0,7],zero,zero,ymm1[6]
; X32-NEXT: retl
;
; X64-LABEL: vpermil2ps256_0zz8BzzA:
; X64: # %bb.0:
; X64-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],zero,zero,ymm1[0,7],zero,zero,ymm1[6]
; X64-NEXT: retq
; CHECK-LABEL: vpermil2ps256_0zz8BzzA:
; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],zero,zero,ymm1[0,7],zero,zero,ymm1[6]
; CHECK-NEXT: ret{{[l|q]}}
%1 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 0, i32 8, i32 8, i32 4, i32 7, i32 8, i32 8, i32 6>, i8 2)
ret <8 x float> %1
}
Expand Down
102 changes: 51 additions & 51 deletions llvm/test/CodeGen/X86/xor-icmp.ll
View file
Original file line number Diff line number Diff line change
@@ -1,19 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=CHECK,X86
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=CHECK,X64
; rdar://7367229

define i32 @t(i32 %a, i32 %b) nounwind ssp {
; X32-LABEL: t:
; X32: # %bb.0: # %entry
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: xorb {{[0-9]+}}(%esp), %al
; X32-NEXT: testb $64, %al
; X32-NEXT: je .LBB0_1
; X32-NEXT: # %bb.2: # %bb1
; X32-NEXT: jmp bar # TAILCALL
; X32-NEXT: .LBB0_1: # %bb
; X32-NEXT: jmp foo # TAILCALL
; X86-LABEL: t:
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: xorb {{[0-9]+}}(%esp), %al
; X86-NEXT: testb $64, %al
; X86-NEXT: je .LBB0_1
; X86-NEXT: # %bb.2: # %bb1
; X86-NEXT: jmp bar # TAILCALL
; X86-NEXT: .LBB0_1: # %bb
; X86-NEXT: jmp foo # TAILCALL
;
; X64-LABEL: t:
; X64: # %bb.0: # %entry
Expand Down Expand Up @@ -47,18 +47,18 @@ declare i32 @foo(...)
declare i32 @bar(...)

define i32 @t2(i32 %x, i32 %y) nounwind ssp {
; X32-LABEL: t2:
; X32: # %bb.0: # %entry
; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; X32-NEXT: sete %al
; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; X32-NEXT: sete %cl
; X32-NEXT: cmpb %al, %cl
; X32-NEXT: je .LBB1_1
; X32-NEXT: # %bb.2: # %bb
; X32-NEXT: jmp foo # TAILCALL
; X32-NEXT: .LBB1_1: # %return
; X32-NEXT: retl
; X86-LABEL: t2:
; X86: # %bb.0: # %entry
; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; X86-NEXT: sete %al
; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; X86-NEXT: sete %cl
; X86-NEXT: cmpb %al, %cl
; X86-NEXT: je .LBB1_1
; X86-NEXT: # %bb.2: # %bb
; X86-NEXT: jmp foo # TAILCALL
; X86-NEXT: .LBB1_1: # %return
; X86-NEXT: retl
;
; X64-LABEL: t2:
; X64: # %bb.0: # %entry
Expand Down Expand Up @@ -92,12 +92,12 @@ return: ; preds = %entry
; https://bugs.llvm.org/show_bug.cgi?id=45703

define i1 @xor_not_bools(i1 zeroext %x, i1 zeroext %y) nounwind {
; X32-LABEL: xor_not_bools:
; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: xorb {{[0-9]+}}(%esp), %al
; X32-NEXT: xorb $1, %al
; X32-NEXT: retl
; X86-LABEL: xor_not_bools:
; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: xorb {{[0-9]+}}(%esp), %al
; X86-NEXT: xorb $1, %al
; X86-NEXT: retl
;
; X64-LABEL: xor_not_bools:
; X64: # %bb.0:
Expand All @@ -114,15 +114,15 @@ define i1 @xor_not_bools(i1 zeroext %x, i1 zeroext %y) nounwind {
; This is probably not canonical IR; just testing another possible pattern.

define zeroext i1 @xor_not_cmps(i32 %x, i32 %y) nounwind {
; X32-LABEL: xor_not_cmps:
; X32: # %bb.0:
; X32-NEXT: cmpl $42, {{[0-9]+}}(%esp)
; X32-NEXT: setne %cl
; X32-NEXT: cmpl $235, {{[0-9]+}}(%esp)
; X32-NEXT: sete %al
; X32-NEXT: xorb %cl, %al
; X32-NEXT: xorb $1, %al
; X32-NEXT: retl
; X86-LABEL: xor_not_cmps:
; X86: # %bb.0:
; X86-NEXT: cmpl $42, {{[0-9]+}}(%esp)
; X86-NEXT: setne %cl
; X86-NEXT: cmpl $235, {{[0-9]+}}(%esp)
; X86-NEXT: sete %al
; X86-NEXT: xorb %cl, %al
; X86-NEXT: xorb $1, %al
; X86-NEXT: retl
;
; X64-LABEL: xor_not_cmps:
; X64: # %bb.0:
Expand All @@ -141,18 +141,18 @@ define zeroext i1 @xor_not_cmps(i32 %x, i32 %y) nounwind {
}

define zeroext i1 @xor_not_cmps_extra_use(i32 %x, i32 %y, i32* %p) nounwind {
; X32-LABEL: xor_not_cmps_extra_use:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: cmpl $42, {{[0-9]+}}(%esp)
; X32-NEXT: setne %dl
; X32-NEXT: cmpl $235, {{[0-9]+}}(%esp)
; X32-NEXT: sete %al
; X32-NEXT: xorb %dl, %al
; X32-NEXT: movzbl %al, %edx
; X32-NEXT: movl %edx, (%ecx)
; X32-NEXT: xorb $1, %al
; X32-NEXT: retl
; X86-LABEL: xor_not_cmps_extra_use:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: cmpl $42, {{[0-9]+}}(%esp)
; X86-NEXT: setne %dl
; X86-NEXT: cmpl $235, {{[0-9]+}}(%esp)
; X86-NEXT: sete %al
; X86-NEXT: xorb %dl, %al
; X86-NEXT: movzbl %al, %edx
; X86-NEXT: movl %edx, (%ecx)
; X86-NEXT: xorb $1, %al
; X86-NEXT: retl
;
; X64-LABEL: xor_not_cmps_extra_use:
; X64: # %bb.0:
Expand Down
344 changes: 167 additions & 177 deletions llvm/test/CodeGen/X86/xor.ll
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