24 changes: 12 additions & 12 deletions llvm/test/CodeGen/X86/avx512-intrinsics.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -934,10 +934,10 @@ declare i32 @llvm.x86.avx512.cvttss2usi(<4 x float>, i32) nounwind readnone
define i32 @test_x86_avx512_cvtsd2usi32(<2 x double> %a0) {
; CHECK-LABEL: test_x86_avx512_cvtsd2usi32:
; CHECK: # %bb.0:
; CHECK-NEXT: vcvtsd2usi %xmm0, %eax
; CHECK-NEXT: vcvtsd2usi {rz-sae}, %xmm0, %ecx
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: vcvtsd2usi %xmm0, %ecx
; CHECK-NEXT: vcvtsd2usi {rz-sae}, %xmm0, %edx
; CHECK-NEXT: vcvtsd2usi {rd-sae}, %xmm0, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: ret{{[l|q]}}

Expand All @@ -953,10 +953,10 @@ declare i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double>, i32) nounwind readnone
define i32 @test_x86_avx512_cvtsd2si32(<2 x double> %a0) {
; CHECK-LABEL: test_x86_avx512_cvtsd2si32:
; CHECK: # %bb.0:
; CHECK-NEXT: vcvtsd2si %xmm0, %eax
; CHECK-NEXT: vcvtsd2si {rz-sae}, %xmm0, %ecx
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: vcvtsd2si %xmm0, %ecx
; CHECK-NEXT: vcvtsd2si {rz-sae}, %xmm0, %edx
; CHECK-NEXT: vcvtsd2si {rd-sae}, %xmm0, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: ret{{[l|q]}}

Expand All @@ -972,10 +972,10 @@ declare i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double>, i32) nounwind readnone
define i32 @test_x86_avx512_cvtss2usi32(<4 x float> %a0) {
; CHECK-LABEL: test_x86_avx512_cvtss2usi32:
; CHECK: # %bb.0:
; CHECK-NEXT: vcvtss2usi %xmm0, %eax
; CHECK-NEXT: vcvtss2usi {rz-sae}, %xmm0, %ecx
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: vcvtss2usi %xmm0, %ecx
; CHECK-NEXT: vcvtss2usi {rz-sae}, %xmm0, %edx
; CHECK-NEXT: vcvtss2usi {rd-sae}, %xmm0, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: ret{{[l|q]}}

Expand All @@ -991,10 +991,10 @@ declare i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float>, i32) nounwind readnone
define i32 @test_x86_avx512_cvtss2si32(<4 x float> %a0) {
; CHECK-LABEL: test_x86_avx512_cvtss2si32:
; CHECK: # %bb.0:
; CHECK-NEXT: vcvtss2si %xmm0, %eax
; CHECK-NEXT: vcvtss2si {rz-sae}, %xmm0, %ecx
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: vcvtss2si %xmm0, %ecx
; CHECK-NEXT: vcvtss2si {rz-sae}, %xmm0, %edx
; CHECK-NEXT: vcvtss2si {rd-sae}, %xmm0, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: ret{{[l|q]}}

Expand Down
38 changes: 19 additions & 19 deletions llvm/test/CodeGen/X86/avx512-regcall-Mask.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -35,32 +35,32 @@ define dso_local x86_regcallcc i64 @test_argv64i1(<64 x i1> %x0, <64 x i1> %x1,
;
; WIN64-LABEL: test_argv64i1:
; WIN64: # %bb.0:
; WIN64-NEXT: addq %rdx, %rcx
; WIN64-NEXT: addq %rdi, %rcx
; WIN64-NEXT: addq %rsi, %rcx
; WIN64-NEXT: addq %r8, %rcx
; WIN64-NEXT: addq %r9, %rcx
; WIN64-NEXT: addq %r10, %rcx
; WIN64-NEXT: addq %r11, %rcx
; WIN64-NEXT: addq %r12, %rcx
; WIN64-NEXT: addq %r14, %rcx
; WIN64-NEXT: addq %r15, %rcx
; WIN64-NEXT: addq %rcx, %rax
; WIN64-NEXT: addq %rdx, %rax
; WIN64-NEXT: addq %rdi, %rax
; WIN64-NEXT: addq %rsi, %rax
; WIN64-NEXT: addq %r8, %rax
; WIN64-NEXT: addq %r9, %rax
; WIN64-NEXT: addq %r10, %rax
; WIN64-NEXT: addq %r11, %rax
; WIN64-NEXT: addq %r12, %rax
; WIN64-NEXT: addq %r14, %rax
; WIN64-NEXT: addq %r15, %rax
; WIN64-NEXT: addq {{[0-9]+}}(%rsp), %rax
; WIN64-NEXT: retq
;
; LINUXOSX64-LABEL: test_argv64i1:
; LINUXOSX64: # %bb.0:
; LINUXOSX64-NEXT: addq %rdx, %rcx
; LINUXOSX64-NEXT: addq %rdi, %rcx
; LINUXOSX64-NEXT: addq %rsi, %rcx
; LINUXOSX64-NEXT: addq %r8, %rcx
; LINUXOSX64-NEXT: addq %r9, %rcx
; LINUXOSX64-NEXT: addq %r12, %rcx
; LINUXOSX64-NEXT: addq %r13, %rcx
; LINUXOSX64-NEXT: addq %r14, %rcx
; LINUXOSX64-NEXT: addq %r15, %rcx
; LINUXOSX64-NEXT: addq %rcx, %rax
; LINUXOSX64-NEXT: addq %rdx, %rax
; LINUXOSX64-NEXT: addq %rdi, %rax
; LINUXOSX64-NEXT: addq %rsi, %rax
; LINUXOSX64-NEXT: addq %r8, %rax
; LINUXOSX64-NEXT: addq %r9, %rax
; LINUXOSX64-NEXT: addq %r12, %rax
; LINUXOSX64-NEXT: addq %r13, %rax
; LINUXOSX64-NEXT: addq %r14, %rax
; LINUXOSX64-NEXT: addq %r15, %rax
; LINUXOSX64-NEXT: addq {{[0-9]+}}(%rsp), %rax
; LINUXOSX64-NEXT: addq {{[0-9]+}}(%rsp), %rax
; LINUXOSX64-NEXT: retq
Expand Down
71 changes: 36 additions & 35 deletions llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -939,7 +939,7 @@ define dso_local x86_regcallcc i32 @testi32_inp(i32 %a1, i32 %a2, i32 %a3, i32 %
; X32: # %bb.0:
; X32-NEXT: pushl %ebp
; X32-NEXT: pushl %ebx
; X32-NEXT: subl $12, %esp
; X32-NEXT: subl $16, %esp
; X32-NEXT: movl %esi, (%esp) # 4-byte Spill
; X32-NEXT: movl %edi, %esi
; X32-NEXT: movl %edx, %ebx
Expand All @@ -950,36 +950,37 @@ define dso_local x86_regcallcc i32 @testi32_inp(i32 %a1, i32 %a2, i32 %a3, i32 %
; X32-NEXT: subl %esi, %ebx
; X32-NEXT: movl %edi, %eax
; X32-NEXT: subl %ecx, %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X32-NEXT: movl %ebp, %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: subl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: imull %eax, %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl %esi, %eax
; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
; X32-NEXT: imull %ebx, %eax
; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %esi, %edx
; X32-NEXT: subl {{[0-9]+}}(%esp), %edx
; X32-NEXT: imull %ebx, %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X32-NEXT: movl (%esp), %ebx # 4-byte Reload
; X32-NEXT: subl {{[0-9]+}}(%esp), %ebx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl %edx, %ecx
; X32-NEXT: subl %ebp, %ebx
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: subl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: imull %ebx, %ecx
; X32-NEXT: addl %eax, %ecx
; X32-NEXT: addl %edx, %ecx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: addl (%esp), %eax # 4-byte Folded Reload
; X32-NEXT: addl {{[0-9]+}}(%esp), %ebp
; X32-NEXT: imull %ebp, %edi
; X32-NEXT: addl (%esp), %ebp # 4-byte Folded Reload
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
; X32-NEXT: imull %edx, %edi
; X32-NEXT: addl {{[0-9]+}}(%esp), %esi
; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: addl %esi, %edi
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
; X32-NEXT: imull %eax, %edx
; X32-NEXT: addl %edx, %edi
; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
; X32-NEXT: imull %ebp, %eax
; X32-NEXT: addl %esi, %eax
; X32-NEXT: addl %eax, %edi
; X32-NEXT: addl %ecx, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, %eax
; X32-NEXT: addl $12, %esp
; X32-NEXT: addl $16, %esp
; X32-NEXT: popl %ebx
; X32-NEXT: popl %ebp
; X32-NEXT: retl
Expand Down Expand Up @@ -1013,18 +1014,18 @@ define dso_local x86_regcallcc i32 @testi32_inp(i32 %a1, i32 %a2, i32 %a3, i32 %
; WIN64-NEXT: # kill: def $r11d killed $r11d killed $r11
; WIN64-NEXT: subl %r12d, %r11d
; WIN64-NEXT: imull %edx, %r11d
; WIN64-NEXT: addl %r9d, %r11d
; WIN64-NEXT: leal (%r14,%r15), %edx
; WIN64-NEXT: movl %r14d, %r9d
; WIN64-NEXT: subl %r15d, %r9d
; WIN64-NEXT: imull %esi, %r9d
; WIN64-NEXT: addl %r11d, %r9d
; WIN64-NEXT: # kill: def $r14d killed $r14d killed $r14
; WIN64-NEXT: subl %r15d, %r14d
; WIN64-NEXT: imull %esi, %r14d
; WIN64-NEXT: addl %r11d, %r14d
; WIN64-NEXT: addl %ecx, %eax
; WIN64-NEXT: imull %r8d, %eax
; WIN64-NEXT: imull %ebx, %r10d
; WIN64-NEXT: addl %r10d, %eax
; WIN64-NEXT: imull %edi, %edx
; WIN64-NEXT: addl %r10d, %edx
; WIN64-NEXT: addl %edx, %eax
; WIN64-NEXT: addl %r14d, %eax
; WIN64-NEXT: addl %r9d, %eax
; WIN64-NEXT: popq %rbx
; WIN64-NEXT: retq
Expand Down Expand Up @@ -1054,19 +1055,19 @@ define dso_local x86_regcallcc i32 @testi32_inp(i32 %a1, i32 %a2, i32 %a3, i32 %
; LINUXOSX64-NEXT: leal (%r13,%r14), %r11d
; LINUXOSX64-NEXT: movl %r13d, %r12d
; LINUXOSX64-NEXT: subl %r14d, %r12d
; LINUXOSX64-NEXT: movl {{[0-9]+}}(%rsp), %r14d
; LINUXOSX64-NEXT: imull %edx, %r12d
; LINUXOSX64-NEXT: movl {{[0-9]+}}(%rsp), %edx
; LINUXOSX64-NEXT: addl %r9d, %r12d
; LINUXOSX64-NEXT: movl %r15d, %r9d
; LINUXOSX64-NEXT: subl %edx, %r9d
; LINUXOSX64-NEXT: imull %esi, %r9d
; LINUXOSX64-NEXT: addl %r12d, %r9d
; LINUXOSX64-NEXT: movl %r15d, %edx
; LINUXOSX64-NEXT: subl %r14d, %edx
; LINUXOSX64-NEXT: imull %esi, %edx
; LINUXOSX64-NEXT: addl %r12d, %edx
; LINUXOSX64-NEXT: addl %ecx, %eax
; LINUXOSX64-NEXT: imull %r8d, %eax
; LINUXOSX64-NEXT: imull %r10d, %r11d
; LINUXOSX64-NEXT: addl %r11d, %eax
; LINUXOSX64-NEXT: addl %r15d, %edx
; LINUXOSX64-NEXT: imull %edi, %edx
; LINUXOSX64-NEXT: addl %r15d, %r14d
; LINUXOSX64-NEXT: imull %edi, %r14d
; LINUXOSX64-NEXT: addl %r11d, %r14d
; LINUXOSX64-NEXT: addl %r14d, %eax
; LINUXOSX64-NEXT: addl %edx, %eax
; LINUXOSX64-NEXT: addl %r9d, %eax
; LINUXOSX64-NEXT: retq
Expand Down
192 changes: 96 additions & 96 deletions llvm/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
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14 changes: 7 additions & 7 deletions llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -124,10 +124,10 @@ define i64 @scalar_i64(i64 %x, i64 %y, ptr %divdst) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: pushl %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: calll __divdi3
Expand All @@ -136,10 +136,10 @@ define i64 @scalar_i64(i64 %x, i64 %y, ptr %divdst) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl %ecx, 4(%edx)
; X86-NEXT: movl %eax, (%edx)
; X86-NEXT: imull %eax, %ebp
; X86-NEXT: mull %ebx
; X86-NEXT: addl %ebp, %edx
; X86-NEXT: imull %ebx, %ecx
; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebp
; X86-NEXT: imull %ebp, %ecx
; X86-NEXT: addl %ebx, %ecx
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: subl %eax, %esi
; X86-NEXT: sbbl %ecx, %edi
Expand Down Expand Up @@ -192,8 +192,8 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
; X64-NEXT: movq %rax, (%rbx)
; X64-NEXT: imulq %rax, %r14
; X64-NEXT: mulq %r15
; X64-NEXT: addq %r14, %rdx
; X64-NEXT: imulq %r15, %rcx
; X64-NEXT: addq %r14, %rcx
; X64-NEXT: addq %rdx, %rcx
; X64-NEXT: subq %rax, %r13
; X64-NEXT: sbbq %rcx, %r12
Expand Down
14 changes: 7 additions & 7 deletions llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -124,10 +124,10 @@ define i64 @scalar_i64(i64 %x, i64 %y, ptr %divdst) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: pushl %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: calll __udivdi3
Expand All @@ -136,10 +136,10 @@ define i64 @scalar_i64(i64 %x, i64 %y, ptr %divdst) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl %ecx, 4(%edx)
; X86-NEXT: movl %eax, (%edx)
; X86-NEXT: imull %eax, %ebp
; X86-NEXT: mull %ebx
; X86-NEXT: addl %ebp, %edx
; X86-NEXT: imull %ebx, %ecx
; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebp
; X86-NEXT: imull %ebp, %ecx
; X86-NEXT: addl %ebx, %ecx
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: subl %eax, %esi
; X86-NEXT: sbbl %ecx, %edi
Expand Down Expand Up @@ -192,8 +192,8 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
; X64-NEXT: movq %rax, (%rbx)
; X64-NEXT: imulq %rax, %r14
; X64-NEXT: mulq %r15
; X64-NEXT: addq %r14, %rdx
; X64-NEXT: imulq %r15, %rcx
; X64-NEXT: addq %r14, %rcx
; X64-NEXT: addq %rdx, %rcx
; X64-NEXT: subq %rax, %r13
; X64-NEXT: sbbq %rcx, %r12
Expand Down
42 changes: 21 additions & 21 deletions llvm/test/CodeGen/X86/divide-by-constant.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -793,9 +793,9 @@ define i64 @udiv_i64_3(i64 %x) nounwind {
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: imull $-1431655766, %ecx, %ecx # imm = 0xAAAAAAAA
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-1431655765, %edi, %ecx # imm = 0xAAAAAAAB
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-1431655765, %edi, %esi # imm = 0xAAAAAAAB
; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi
; X32-NEXT: popl %edi
; X32-NEXT: popl %ebx
Expand Down Expand Up @@ -836,9 +836,9 @@ define i64 @udiv_i64_5(i64 %x) nounwind {
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: imull $-858993460, %ecx, %ecx # imm = 0xCCCCCCCC
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-858993459, %edi, %esi # imm = 0xCCCCCCCD
; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi
; X32-NEXT: popl %edi
; X32-NEXT: popl %ebx
Expand Down Expand Up @@ -880,9 +880,9 @@ define i64 @udiv_i64_15(i64 %x) nounwind {
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %edx
; X32-NEXT: imull $-286331154, %ecx, %ecx # imm = 0xEEEEEEEE
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-286331153, %edi, %ecx # imm = 0xEEEEEEEF
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-286331153, %edi, %esi # imm = 0xEEEEEEEF
; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi
; X32-NEXT: popl %edi
; X32-NEXT: retl
Expand Down Expand Up @@ -924,9 +924,9 @@ define i64 @udiv_i64_17(i64 %x) nounwind {
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: imull $-252645136, %ecx, %ecx # imm = 0xF0F0F0F0
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-252645135, %edi, %ecx # imm = 0xF0F0F0F1
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-252645135, %edi, %esi # imm = 0xF0F0F0F1
; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi
; X32-NEXT: popl %edi
; X32-NEXT: popl %ebx
Expand Down Expand Up @@ -969,9 +969,9 @@ define i64 @udiv_i64_255(i64 %x) nounwind {
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %edx
; X32-NEXT: imull $-16843010, %ecx, %ecx # imm = 0xFEFEFEFE
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-16843009, %esi, %ecx # imm = 0xFEFEFEFF
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-16843009, %esi, %esi # imm = 0xFEFEFEFF
; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi
; X32-NEXT: retl
;
Expand Down Expand Up @@ -1012,9 +1012,9 @@ define i64 @udiv_i64_257(i64 %x) nounwind {
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: imull $-16711936, %ecx, %ecx # imm = 0xFF00FF00
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-16711935, %edi, %ecx # imm = 0xFF00FF01
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-16711935, %edi, %esi # imm = 0xFF00FF01
; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi
; X32-NEXT: popl %edi
; X32-NEXT: popl %ebx
Expand Down Expand Up @@ -1148,9 +1148,9 @@ define i64 @udiv_i64_12(i64 %x) nounwind {
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: imull $-1431655766, %ecx, %ecx # imm = 0xAAAAAAAA
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-1431655765, %edi, %ecx # imm = 0xAAAAAAAB
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull $-1431655765, %edi, %esi # imm = 0xAAAAAAAB
; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi
; X32-NEXT: popl %edi
; X32-NEXT: popl %ebx
Expand Down
36 changes: 18 additions & 18 deletions llvm/test/CodeGen/X86/divmod128.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -482,8 +482,8 @@ define i128 @udiv_i128_3(i128 %x) nounwind {
; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq
;
Expand All @@ -505,8 +505,8 @@ define i128 @udiv_i128_3(i128 %x) nounwind {
; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq
entry:
Expand All @@ -532,8 +532,8 @@ define i128 @udiv_i128_5(i128 %x) nounwind {
; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq
;
Expand All @@ -555,8 +555,8 @@ define i128 @udiv_i128_5(i128 %x) nounwind {
; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq
entry:
Expand Down Expand Up @@ -584,8 +584,8 @@ define i128 @udiv_i128_15(i128 %x) nounwind {
; X86-64-NEXT: movabsq $-1229782938247303441, %r8 # imm = 0xEEEEEEEEEEEEEEEF
; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq
;
Expand All @@ -609,8 +609,8 @@ define i128 @udiv_i128_15(i128 %x) nounwind {
; WIN64-NEXT: movabsq $-1229782938247303441, %r10 # imm = 0xEEEEEEEEEEEEEEEF
; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq
entry:
Expand Down Expand Up @@ -638,8 +638,8 @@ define i128 @udiv_i128_17(i128 %x) nounwind {
; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq
;
Expand All @@ -663,8 +663,8 @@ define i128 @udiv_i128_17(i128 %x) nounwind {
; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq
entry:
Expand Down Expand Up @@ -694,8 +694,8 @@ define i128 @udiv_i128_255(i128 %x) nounwind {
; X86-64-NEXT: movabsq $-72340172838076673, %r8 # imm = 0xFEFEFEFEFEFEFEFF
; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq
;
Expand All @@ -721,8 +721,8 @@ define i128 @udiv_i128_255(i128 %x) nounwind {
; WIN64-NEXT: movabsq $-72340172838076673, %r10 # imm = 0xFEFEFEFEFEFEFEFF
; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq
entry:
Expand Down Expand Up @@ -750,8 +750,8 @@ define i128 @udiv_i128_257(i128 %x) nounwind {
; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq
;
Expand All @@ -775,8 +775,8 @@ define i128 @udiv_i128_257(i128 %x) nounwind {
; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq
entry:
Expand Down Expand Up @@ -806,8 +806,8 @@ define i128 @udiv_i128_65535(i128 %x) nounwind {
; X86-64-NEXT: movabsq $-281479271743489, %r8 # imm = 0xFFFEFFFEFFFEFFFF
; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq
;
Expand All @@ -833,8 +833,8 @@ define i128 @udiv_i128_65535(i128 %x) nounwind {
; WIN64-NEXT: movabsq $-281479271743489, %r10 # imm = 0xFFFEFFFEFFFEFFFF
; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq
entry:
Expand Down Expand Up @@ -862,8 +862,8 @@ define i128 @udiv_i128_65537(i128 %x) nounwind {
; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq
;
Expand All @@ -887,8 +887,8 @@ define i128 @udiv_i128_65537(i128 %x) nounwind {
; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq
entry:
Expand Down Expand Up @@ -916,8 +916,8 @@ define i128 @udiv_i128_12(i128 %x) nounwind {
; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq
;
Expand All @@ -941,8 +941,8 @@ define i128 @udiv_i128_12(i128 %x) nounwind {
; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq
entry:
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/fold-add.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -97,10 +97,10 @@ define dso_local i64 @neg_0x80000001() #0 {
; MSTATIC-NEXT: movabsq $-2147483649, %rcx
; MSTATIC-NEXT: movabsq $foo, %rax
; MSTATIC-NEXT: addq %rcx, %rax
; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax
; MPIC-NEXT: movabsq $foo@GOTOFF, %rcx
; MPIC-NEXT: addq %rax, %rcx
; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rcx
; MPIC-NEXT: movabsq $foo@GOTOFF, %rdx
; MPIC-NEXT: movabsq $-2147483649, %rax
; MPIC-NEXT: addq %rdx, %rax
; MPIC-NEXT: addq %rcx, %rax
entry:
ret i64 add (i64 ptrtoint (ptr @foo to i64), i64 -2147483649)
Expand Down
126 changes: 62 additions & 64 deletions llvm/test/CodeGen/X86/fold-tied-op.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -24,87 +24,85 @@ define i64 @fn1() #0 {
; CHECK-NEXT: .cfi_offset %esi, -20
; CHECK-NEXT: .cfi_offset %edi, -16
; CHECK-NEXT: .cfi_offset %ebx, -12
; CHECK-NEXT: movl $-1028477379, %ebx # imm = 0xC2B2AE3D
; CHECK-NEXT: movl $668265295, %ecx # imm = 0x27D4EB4F
; CHECK-NEXT: movl a, %edi
; CHECK-NEXT: cmpl $0, (%edi)
; CHECK-NEXT: movl $-1028477379, %edi # imm = 0xC2B2AE3D
; CHECK-NEXT: movl $668265295, %ebx # imm = 0x27D4EB4F
; CHECK-NEXT: movl a, %eax
; CHECK-NEXT: cmpl $0, (%eax)
; CHECK-NEXT: je .LBB0_2
; CHECK-NEXT: # %bb.1: # %if.then
; CHECK-NEXT: movl 8(%edi), %esi
; CHECK-NEXT: movl 12(%edi), %eax
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: shldl $1, %esi, %edx
; CHECK-NEXT: orl %eax, %edx
; CHECK-NEXT: leal (%esi,%esi), %eax
; CHECK-NEXT: orl %esi, %eax
; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: movl 16(%edi), %ebx
; CHECK-NEXT: movl 20(%edi), %esi
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: shldl $2, %ebx, %eax
; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: movl %ebx, %eax
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: shldl $31, %eax, %ebx
; CHECK-NEXT: shll $2, %eax
; CHECK-NEXT: orl %ebx, %eax
; CHECK-NEXT: movl 8(%eax), %edi
; CHECK-NEXT: movl 12(%eax), %esi
; CHECK-NEXT: movl %esi, %edx
; CHECK-NEXT: shldl $1, %edi, %edx
; CHECK-NEXT: orl %esi, %edx
; CHECK-NEXT: leal (%edi,%edi), %ecx
; CHECK-NEXT: orl %edi, %ecx
; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: movl 16(%eax), %ecx
; CHECK-NEXT: movl 20(%eax), %esi
; CHECK-NEXT: movl %esi, %edi
; CHECK-NEXT: shldl $2, %ecx, %edi
; CHECK-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: movl %esi, %edi
; CHECK-NEXT: shldl $31, %ecx, %edi
; CHECK-NEXT: shll $2, %ecx
; CHECK-NEXT: orl %edi, %ecx
; CHECK-NEXT: shrl %esi
; CHECK-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; CHECK-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: adcl %edx, %esi
; CHECK-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: movl 24(%edi), %eax
; CHECK-NEXT: movl 28(%eax), %ecx
; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: movl 24(%eax), %eax
; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: movl $-1028477379, %ebx # imm = 0xC2B2AE3D
; CHECK-NEXT: movl $-1028477379, %ecx # imm = 0xC2B2AE3D
; CHECK-NEXT: imull %eax, %ecx
; CHECK-NEXT: mull %ebx
; CHECK-NEXT: movl %eax, %edi
; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; CHECK-NEXT: imull %eax, %ebx
; CHECK-NEXT: mull %ecx
; CHECK-NEXT: movl %eax, %esi
; CHECK-NEXT: addl %ebx, %edx
; CHECK-NEXT: movl 28(%edi), %edi
; CHECK-NEXT: imull %edi, %ecx
; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: addl %ecx, %ebx
; CHECK-NEXT: addl %edx, %ebx
; CHECK-NEXT: imull $1336530590, %eax, %ecx # imm = 0x4FA9D69E
; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; CHECK-NEXT: imull $-2056954758, %edx, %eax # imm = 0x85655C7A
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: movl %edx, %eax
; CHECK-NEXT: movl $1336530590, %edx # imm = 0x4FA9D69E
; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; CHECK-NEXT: movl %ebx, %eax
; CHECK-NEXT: mull %edx
; CHECK-NEXT: imull $-2056954758, %ebx, %ebx # imm = 0x85655C7A
; CHECK-NEXT: addl %edx, %ebx
; CHECK-NEXT: imull $1336530590, %edi, %edx # imm = 0x4FA9D69E
; CHECK-NEXT: addl %ebx, %edx
; CHECK-NEXT: shrdl $3, %ecx, %esi
; CHECK-NEXT: sarl $3, %ecx
; CHECK-NEXT: orl %edx, %ecx
; CHECK-NEXT: orl %eax, %esi
; CHECK-NEXT: movl $-66860409, %ebx # imm = 0xFC03CA87
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: mull %ebx
; CHECK-NEXT: movl %eax, %edi
; CHECK-NEXT: imull $326129324, %esi, %eax # imm = 0x137056AC
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: imull $-66860409, %ecx, %ecx # imm = 0xFC03CA87
; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: shrdl $3, %ebx, %edi
; CHECK-NEXT: sarl $3, %ebx
; CHECK-NEXT: orl %ecx, %ebx
; CHECK-NEXT: orl %eax, %edi
; CHECK-NEXT: imull $326129324, %edi, %eax # imm = 0x137056AC
; CHECK-NEXT: imull $-66860409, %ebx, %ecx # imm = 0xFC03CA87
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: xorl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; CHECK-NEXT: xorl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; CHECK-NEXT: movl %edi, b
; CHECK-NEXT: movl $-66860409, %ebx # imm = 0xFC03CA87
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: mull %ebx
; CHECK-NEXT: imull $326129324, %edi, %esi # imm = 0x137056AC
; CHECK-NEXT: addl %edx, %esi
; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: xorl %esi, %ecx
; CHECK-NEXT: xorl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; CHECK-NEXT: movl %ecx, b+4
; CHECK-NEXT: imull $326129324, %eax, %edx # imm = 0x137056AC
; CHECK-NEXT: imull $-66860409, %ecx, %ecx # imm = 0xFC03CA87
; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: movl %eax, b
; CHECK-NEXT: mull %ebx
; CHECK-NEXT: jmp .LBB0_3
; CHECK-NEXT: .LBB0_2: # %if.else
; CHECK-NEXT: xorl b+4, %ebx
; CHECK-NEXT: xorl b, %ecx
; CHECK-NEXT: movl $1419758215, %edx # imm = 0x549FCA87
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: mull %edx
; CHECK-NEXT: imull $93298681, %ecx, %esi # imm = 0x58F9FF9
; CHECK-NEXT: addl %edx, %esi
; CHECK-NEXT: imull $1419758215, %ebx, %ecx # imm = 0x549FCA87
; CHECK-NEXT: .LBB0_3: # %if.end
; CHECK-NEXT: xorl b+4, %edi
; CHECK-NEXT: xorl b, %ebx
; CHECK-NEXT: movl $1419758215, %ecx # imm = 0x549FCA87
; CHECK-NEXT: movl %ebx, %eax
; CHECK-NEXT: mull %ecx
; CHECK-NEXT: imull $93298681, %ebx, %esi # imm = 0x58F9FF9
; CHECK-NEXT: imull $1419758215, %edi, %ecx # imm = 0x549FCA87
; CHECK-NEXT: addl %esi, %ecx
; CHECK-NEXT: .LBB0_3: # %if.end
; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: addl $-1028477341, %eax # imm = 0xC2B2AE63
; CHECK-NEXT: adcl $-2048144777, %ecx # imm = 0x85EBCA77
; CHECK-NEXT: movl %eax, b
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/h-registers-1.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,11 +30,11 @@ define i64 @foo(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h)
; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %r8d
; CHECK-NEXT: addq %rdi, %rsi
; CHECK-NEXT: addq %rbp, %rdx
; CHECK-NEXT: addq %rsi, %rdx
; CHECK-NEXT: addq %rbx, %rcx
; CHECK-NEXT: addq %r8, %rax
; CHECK-NEXT: addq %rcx, %rax
; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: addq %rsi, %rax
; CHECK-NEXT: popq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: popq %rbp
Expand Down Expand Up @@ -63,11 +63,11 @@ define i64 @foo(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h)
; GNUX32-NEXT: movzbl {{[0-9]+}}(%esp), %r8d
; GNUX32-NEXT: addq %rdi, %rsi
; GNUX32-NEXT: addq %rbp, %rdx
; GNUX32-NEXT: addq %rsi, %rdx
; GNUX32-NEXT: addq %rbx, %rcx
; GNUX32-NEXT: addq %r8, %rax
; GNUX32-NEXT: addq %rcx, %rax
; GNUX32-NEXT: addq %rdx, %rax
; GNUX32-NEXT: addq %rsi, %rax
; GNUX32-NEXT: popq %rbx
; GNUX32-NEXT: .cfi_def_cfa_offset 16
; GNUX32-NEXT: popq %rbp
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/hipe-cc.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ entry:

define cc 11 {i32, i32, i32} @addfour(i32 %hp, i32 %p, i32 %x, i32 %y, i32 %z) nounwind {
entry:
; CHECK: addl %edx, %eax
; CHECK: addl %edx, %ecx
; CHECK-NEXT: addl %ecx, %eax
%0 = add i32 %x, %y
%1 = add i32 %0, %z
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/hipe-cc64.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -23,9 +23,9 @@ entry:

define cc 11 {i64, i64, i64} @addfour(i64 %hp, i64 %p, i64 %x, i64 %y, i64 %z, i64 %w) nounwind {
entry:
; CHECK: leaq (%rsi,%rdx), %rax
; CHECK-NEXT: addq %rcx, %rax
; CHECK: leaq (%rdx,%rcx), %rax
; CHECK-NEXT: addq %r8, %rax
; CHECK-NEXT: addq %rsi, %rax
%0 = add i64 %x, %y
%1 = add i64 %0, %z
%2 = add i64 %1, %w
Expand Down
13 changes: 9 additions & 4 deletions llvm/test/CodeGen/X86/imul.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -450,13 +450,18 @@ define i64 @test6(i64 %a) {
;
; X86-LABEL: test6:
; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shll $5, %ecx
; X86-NEXT: addl %eax, %ecx
; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %esi
; X86-NEXT: shll $5, %esi
; X86-NEXT: movl $33, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %esi, %edx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
entry:
%tmp3 = mul i64 %a, 33
Expand Down
28 changes: 14 additions & 14 deletions llvm/test/CodeGen/X86/lea-opt-cse4.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -71,13 +71,13 @@ define void @foo_loop(ptr nocapture %ctx, i32 %n) local_unnamed_addr #0 {
; X64-NEXT: # %bb.2: # %exit
; X64-NEXT: addl %eax, %ecx
; X64-NEXT: leal 1(%rax,%rcx), %ecx
; X64-NEXT: addl %eax, %ecx
; X64-NEXT: addl %eax, %ecx
; X64-NEXT: addl %eax, %ecx
; X64-NEXT: addl %eax, %ecx
; X64-NEXT: addl %eax, %ecx
; X64-NEXT: addl %eax, %ecx
; X64-NEXT: movl %ecx, 16(%rdi)
; X64-NEXT: leal (%rax,%rax), %edx
; X64-NEXT: addl %eax, %edx
; X64-NEXT: addl %eax, %edx
; X64-NEXT: addl %eax, %edx
; X64-NEXT: addl %eax, %edx
; X64-NEXT: addl %ecx, %edx
; X64-NEXT: movl %edx, 16(%rdi)
; X64-NEXT: retq
;
; X86-LABEL: foo_loop:
Expand All @@ -102,13 +102,13 @@ define void @foo_loop(ptr nocapture %ctx, i32 %n) local_unnamed_addr #0 {
; X86-NEXT: # %bb.2: # %exit
; X86-NEXT: addl %ecx, %esi
; X86-NEXT: leal 1(%ecx,%esi), %edx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: movl %edx, 16(%eax)
; X86-NEXT: leal (%ecx,%ecx), %esi
; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %edx, %esi
; X86-NEXT: movl %esi, 16(%eax)
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: popl %edi
Expand Down
12 changes: 4 additions & 8 deletions llvm/test/CodeGen/X86/lea-opt2.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -35,13 +35,11 @@ entry:
define i32 @test2(ptr %p, i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: test2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: # kill: def $edx killed $edx def $rdx
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: addl %esi, %ecx
; CHECK-NEXT: movl %ecx, (%rdi)
; CHECK-NEXT: subl %edx, %eax
; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
; CHECK-NEXT: retq
entry:
%0 = add i32 %a, %b
Expand All @@ -55,13 +53,11 @@ entry:
define i32 @test3(ptr %p, i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: test3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: # kill: def $edx killed $edx def $rdx
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: addl %esi, %ecx
; CHECK-NEXT: movl %ecx, (%rdi)
; CHECK-NEXT: subl %edx, %eax
; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
; CHECK-NEXT: retq
entry:
%0 = add i32 %a, %b
Expand Down Expand Up @@ -114,8 +110,8 @@ define i64 @test6(ptr %p, i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: test6:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: addq %rdx, %rcx
; CHECK-NEXT: addq %rax, %rcx
; CHECK-NEXT: addq %rdx, %rcx
; CHECK-NEXT: movq %rcx, (%rdi)
; CHECK-NEXT: subq %rdx, %rax
; CHECK-NEXT: retq
Expand All @@ -132,8 +128,8 @@ define i64 @test7(ptr %p, i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: test7:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: addq %rdx, %rcx
; CHECK-NEXT: addq %rax, %rcx
; CHECK-NEXT: addq %rdx, %rcx
; CHECK-NEXT: movq %rcx, (%rdi)
; CHECK-NEXT: subq %rdx, %rax
; CHECK-NEXT: retq
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/lrshrink.ll
View file
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell | FileCheck %s

; Checks if "%7 = add nuw nsw i64 %4, %2" is moved before the last call
; to minimize live-range.
Expand Down Expand Up @@ -33,10 +33,10 @@ define i64 @test(i1 %a, i64 %r1, i64 %r2, i64 %s1, i64 %s2, i64 %t1, i64 %t2) {
; CHECK-NEXT: addq %r14, %r15
; CHECK-NEXT: callq _Z3foov@PLT
; CHECK-NEXT: movl %eax, %r14d
; CHECK-NEXT: addq %r15, %r14
; CHECK-NEXT: callq _Z3foov@PLT
; CHECK-NEXT: movl %eax, %eax
; CHECK-NEXT: addq %r14, %rax
; CHECK-NEXT: addq %r15, %rax
; CHECK-NEXT: addq %rbx, %rax
; CHECK-NEXT: popq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 24
Expand Down
219 changes: 111 additions & 108 deletions llvm/test/CodeGen/X86/midpoint-int.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -304,40 +304,41 @@ define i64 @scalar_i64_signed_reg_reg(i64 %a1, i64 %a2) nounwind {
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: cmpl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %edi, %edx
; X86-NEXT: sbbl %ebp, %edx
; X86-NEXT: setl %dl
; X86-NEXT: movzbl %dl, %ebx
; X86-NEXT: cmpl %ebp, %eax
; X86-NEXT: movl %edi, %ecx
; X86-NEXT: sbbl %esi, %ecx
; X86-NEXT: setl %cl
; X86-NEXT: movzbl %cl, %edx
; X86-NEXT: jl .LBB5_1
; X86-NEXT: # %bb.2:
; X86-NEXT: movl %esi, %ebx
; X86-NEXT: movl %ebp, %esi
; X86-NEXT: movl %ebp, %ecx
; X86-NEXT: movl %ebp, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: jmp .LBB5_3
; X86-NEXT: .LBB5_1:
; X86-NEXT: movl %edi, %edx
; X86-NEXT: movl %eax, %esi
; X86-NEXT: movl %ebp, %ecx
; X86-NEXT: movl %ebp, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %edi, %ebx
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl %ebp, %esi
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: .LBB5_3:
; X86-NEXT: negl %ebx
; X86-NEXT: movl %ebx, %ebp
; X86-NEXT: negl %edx
; X86-NEXT: movl %edx, %ebp
; X86-NEXT: orl $1, %ebp
; X86-NEXT: subl %esi, %eax
; X86-NEXT: sbbl %edx, %edi
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: sbbl %ebx, %edi
; X86-NEXT: shrdl $1, %edi, %eax
; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebx, %edx
; X86-NEXT: shrl %edi
; X86-NEXT: imull %eax, %edx
; X86-NEXT: imull %ebp, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: mull %ebp
; X86-NEXT: addl %edi, %edx
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: adcl %ecx, %edx
; X86-NEXT: addl %esi, %eax
; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx
Expand Down Expand Up @@ -376,42 +377,43 @@ define i64 @scalar_i64_unsigned_reg_reg(i64 %a1, i64 %a2) nounwind {
; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: xorl %ebx, %ebx
; X86-NEXT: cmpl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %edi, %edx
; X86-NEXT: sbbl %ebp, %edx
; X86-NEXT: setb %dl
; X86-NEXT: sbbl %ebx, %ebx
; X86-NEXT: testb %dl, %dl
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: cmpl %ebx, %eax
; X86-NEXT: movl %edi, %ecx
; X86-NEXT: sbbl %esi, %ecx
; X86-NEXT: setb %cl
; X86-NEXT: sbbl %edx, %edx
; X86-NEXT: testb %cl, %cl
; X86-NEXT: jne .LBB6_1
; X86-NEXT: # %bb.2:
; X86-NEXT: movl %ebp, %ecx
; X86-NEXT: movl %ebp, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %esi, %ebp
; X86-NEXT: movl %ebx, %esi
; X86-NEXT: movl %ebx, %ecx
; X86-NEXT: jmp .LBB6_3
; X86-NEXT: .LBB6_1:
; X86-NEXT: movl %edi, %edx
; X86-NEXT: movl %eax, %esi
; X86-NEXT: movl %ebp, %ecx
; X86-NEXT: movl %ebp, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %edi, %ebp
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl %ebx, %esi
; X86-NEXT: movl %ebx, %eax
; X86-NEXT: .LBB6_3:
; X86-NEXT: movl %ebx, %ebp
; X86-NEXT: orl $1, %ebp
; X86-NEXT: subl %esi, %eax
; X86-NEXT: sbbl %edx, %edi
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: orl $1, %ebx
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: sbbl %ebp, %edi
; X86-NEXT: shrdl $1, %edi, %eax
; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebx, %edx
; X86-NEXT: shrl %edi
; X86-NEXT: imull %ebp, %edi
; X86-NEXT: imull %eax, %edx
; X86-NEXT: imull %ebx, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: mull %ebx
; X86-NEXT: addl %edi, %edx
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: adcl %ecx, %edx
; X86-NEXT: addl %esi, %eax
; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx
Expand Down Expand Up @@ -456,39 +458,39 @@ define i64 @scalar_i64_signed_mem_reg(ptr %a1_addr, i64 %a2) nounwind {
; X86-NEXT: pushl %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl (%ecx), %esi
; X86-NEXT: movl 4(%ecx), %ecx
; X86-NEXT: cmpl %esi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl (%edx), %ecx
; X86-NEXT: movl 4(%edx), %esi
; X86-NEXT: cmpl %ecx, %eax
; X86-NEXT: movl %edi, %edx
; X86-NEXT: sbbl %ecx, %edx
; X86-NEXT: sbbl %esi, %edx
; X86-NEXT: setl %dl
; X86-NEXT: movzbl %dl, %ebx
; X86-NEXT: movzbl %dl, %edx
; X86-NEXT: jl .LBB7_1
; X86-NEXT: # %bb.2:
; X86-NEXT: movl %ecx, (%esp) # 4-byte Spill
; X86-NEXT: movl %esi, %edx
; X86-NEXT: movl %esi, (%esp) # 4-byte Spill
; X86-NEXT: movl %ecx, %ebx
; X86-NEXT: jmp .LBB7_3
; X86-NEXT: .LBB7_1:
; X86-NEXT: movl %edi, (%esp) # 4-byte Spill
; X86-NEXT: movl %eax, %edx
; X86-NEXT: movl %ecx, %edi
; X86-NEXT: movl %esi, %eax
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: .LBB7_3:
; X86-NEXT: negl %ebx
; X86-NEXT: movl %ebx, %ebp
; X86-NEXT: negl %edx
; X86-NEXT: movl %edx, %ebp
; X86-NEXT: orl $1, %ebp
; X86-NEXT: subl %edx, %eax
; X86-NEXT: subl %ebx, %eax
; X86-NEXT: sbbl (%esp), %edi # 4-byte Folded Reload
; X86-NEXT: shrdl $1, %edi, %eax
; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebx, %edx
; X86-NEXT: shrl %edi
; X86-NEXT: imull %eax, %edx
; X86-NEXT: imull %ebp, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: mull %ebp
; X86-NEXT: addl %edi, %edx
; X86-NEXT: addl %esi, %eax
; X86-NEXT: adcl %ecx, %edx
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: adcl %esi, %edx
; X86-NEXT: addl $4, %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
Expand Down Expand Up @@ -531,41 +533,42 @@ define i64 @scalar_i64_signed_reg_mem(i64 %a1, ptr %a2_addr) nounwind {
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl (%edx), %eax
; X86-NEXT: movl 4(%edx), %edi
; X86-NEXT: cmpl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %edi, %edx
; X86-NEXT: sbbl %ebp, %edx
; X86-NEXT: setl %dl
; X86-NEXT: movzbl %dl, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl (%ecx), %eax
; X86-NEXT: movl 4(%ecx), %edi
; X86-NEXT: cmpl %ebp, %eax
; X86-NEXT: movl %edi, %ecx
; X86-NEXT: sbbl %esi, %ecx
; X86-NEXT: setl %cl
; X86-NEXT: movzbl %cl, %edx
; X86-NEXT: jl .LBB8_1
; X86-NEXT: # %bb.2:
; X86-NEXT: movl %esi, %ebx
; X86-NEXT: movl %ebp, %esi
; X86-NEXT: movl %ebp, %ecx
; X86-NEXT: movl %ebp, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: jmp .LBB8_3
; X86-NEXT: .LBB8_1:
; X86-NEXT: movl %edi, %edx
; X86-NEXT: movl %eax, %esi
; X86-NEXT: movl %ebp, %ecx
; X86-NEXT: movl %ebp, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %edi, %ebx
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl %ebp, %esi
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: .LBB8_3:
; X86-NEXT: negl %ebx
; X86-NEXT: movl %ebx, %ebp
; X86-NEXT: negl %edx
; X86-NEXT: movl %edx, %ebp
; X86-NEXT: orl $1, %ebp
; X86-NEXT: subl %esi, %eax
; X86-NEXT: sbbl %edx, %edi
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: sbbl %ebx, %edi
; X86-NEXT: shrdl $1, %edi, %eax
; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebx, %edx
; X86-NEXT: shrl %edi
; X86-NEXT: imull %eax, %edx
; X86-NEXT: imull %ebp, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: mull %ebp
; X86-NEXT: addl %edi, %edx
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: adcl %ecx, %edx
; X86-NEXT: addl %esi, %eax
; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx
Expand Down Expand Up @@ -610,40 +613,40 @@ define i64 @scalar_i64_signed_mem_mem(ptr %a1_addr, ptr %a2_addr) nounwind {
; X86-NEXT: pushl %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl (%eax), %esi
; X86-NEXT: movl 4(%eax), %ecx
; X86-NEXT: movl (%eax), %ecx
; X86-NEXT: movl 4(%eax), %esi
; X86-NEXT: movl (%edx), %eax
; X86-NEXT: movl 4(%edx), %edi
; X86-NEXT: cmpl %esi, %eax
; X86-NEXT: cmpl %ecx, %eax
; X86-NEXT: movl %edi, %edx
; X86-NEXT: sbbl %ecx, %edx
; X86-NEXT: sbbl %esi, %edx
; X86-NEXT: setl %dl
; X86-NEXT: movzbl %dl, %ebx
; X86-NEXT: movzbl %dl, %edx
; X86-NEXT: jl .LBB9_1
; X86-NEXT: # %bb.2:
; X86-NEXT: movl %ecx, (%esp) # 4-byte Spill
; X86-NEXT: movl %esi, %edx
; X86-NEXT: movl %esi, (%esp) # 4-byte Spill
; X86-NEXT: movl %ecx, %ebx
; X86-NEXT: jmp .LBB9_3
; X86-NEXT: .LBB9_1:
; X86-NEXT: movl %edi, (%esp) # 4-byte Spill
; X86-NEXT: movl %eax, %edx
; X86-NEXT: movl %ecx, %edi
; X86-NEXT: movl %esi, %eax
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: .LBB9_3:
; X86-NEXT: negl %ebx
; X86-NEXT: movl %ebx, %ebp
; X86-NEXT: negl %edx
; X86-NEXT: movl %edx, %ebp
; X86-NEXT: orl $1, %ebp
; X86-NEXT: subl %edx, %eax
; X86-NEXT: subl %ebx, %eax
; X86-NEXT: sbbl (%esp), %edi # 4-byte Folded Reload
; X86-NEXT: shrdl $1, %edi, %eax
; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebx, %edx
; X86-NEXT: shrl %edi
; X86-NEXT: imull %eax, %edx
; X86-NEXT: imull %ebp, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: mull %ebp
; X86-NEXT: addl %edi, %edx
; X86-NEXT: addl %esi, %eax
; X86-NEXT: adcl %ecx, %edx
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: adcl %esi, %edx
; X86-NEXT: addl $4, %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/X86/misched-balance.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,8 +9,8 @@ define void @unrolled_mmult1(ptr %tmp55, ptr %tmp56, ptr %pre, ptr %pre94,
entry:
br label %for.body

; imull folded loads should be in order and interleaved with addl, never
; adjacent. Also check that we have no spilling.
; imull folded loads should be in order, addl may be reordered to reduce total
; latency. Also check that we have no spilling.
;
; Since mmult1 IR is already in good order, this effectively ensure
; the scheduler maintains source order.
Expand All @@ -22,28 +22,28 @@ entry:
; CHECK: addl
; CHECK: imull 8
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 12
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: addl
; CHECK: imull 16
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 20
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 24
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: addl
; CHECK: imull 28
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 32
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 36
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: addl
; CHECK-NOT: {{imull|rsp}}
; CHECK-LABEL: %end
for.body:
Expand Down Expand Up @@ -127,28 +127,28 @@ end:
; CHECK: addl
; CHECK: imull 8
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 12
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: addl
; CHECK: imull 16
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 20
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 24
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: addl
; CHECK: imull 28
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 32
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 36
; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: addl
; CHECK-NOT: {{imull|rsp}}
; CHECK-LABEL: %end
define void @unrolled_mmult2(ptr %tmp55, ptr %tmp56, ptr %pre, ptr %pre94,
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/misched-matrix.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -33,25 +33,25 @@
; ILPMIN: imull
; ILPMIN: addl
; ILPMIN: imull
; ILPMIN: addl
; ILPMIN: imull
; ILPMIN: addl
; ILPMIN: addl
; ILPMIN: movl %{{.*}}, 4(
; ILPMIN: imull
; ILPMIN: imull
; ILPMIN: addl
; ILPMIN: imull
; ILPMIN: addl
; ILPMIN: imull
; ILPMIN: addl
; ILPMIN: addl
; ILPMIN: movl %{{.*}}, 8(
; ILPMIN: imull
; ILPMIN: imull
; ILPMIN: addl
; ILPMIN: imull
; ILPMIN: addl
; ILPMIN: imull
; ILPMIN: addl
; ILPMIN: addl
; ILPMIN: movl %{{.*}}, 12(
; ILPMIN-LABEL: %for.end
;
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/mul-constant-i16.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -558,10 +558,10 @@ define i16 @test_mul_by_28(i16 %x) {
define i16 @test_mul_by_29(i16 %x) {
; X86-LABEL: test_mul_by_29:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
; X86-NEXT: addl %eax, %eax
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
Expand Down
9 changes: 5 additions & 4 deletions llvm/test/CodeGen/X86/mul-constant-i32.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -900,10 +900,10 @@ define i32 @test_mul_by_28(i32 %x) {
define i32 @test_mul_by_29(i32 %x) {
; X86-LABEL: test_mul_by_29:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
; X86-NEXT: addl %eax, %eax
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: retl
;
Expand Down Expand Up @@ -1179,6 +1179,7 @@ define i32 @test_mul_by_66(i32 %x) {
;
; X64-SLM-LABEL: test_mul_by_66:
; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: def $edi killed $edi def $rdi
; X64-SLM-NEXT: movl %edi, %eax
; X64-SLM-NEXT: shll $6, %eax
; X64-SLM-NEXT: addl %edi, %eax
Expand Down
71 changes: 48 additions & 23 deletions llvm/test/CodeGen/X86/mul-constant-i64.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -498,13 +498,18 @@ define i64 @test_mul_by_16(i64 %x) {
define i64 @test_mul_by_17(i64 %x) {
; X86-LABEL: test_mul_by_17:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shll $4, %ecx
; X86-NEXT: addl %eax, %ecx
; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %esi
; X86-NEXT: shll $4, %esi
; X86-NEXT: movl $17, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %esi, %edx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
;
; X86-NOOPT-LABEL: test_mul_by_17:
Expand Down Expand Up @@ -685,13 +690,18 @@ define i64 @test_mul_by_21(i64 %x) {
define i64 @test_mul_by_22(i64 %x) {
; X86-LABEL: test_mul_by_22:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %ecx
; X86-NEXT: addl %eax, %ecx
; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %eax
; X86-NEXT: leal (%ecx,%eax,4), %esi
; X86-NEXT: movl $22, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %esi, %edx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
;
; X86-NOOPT-LABEL: test_mul_by_22:
Expand Down Expand Up @@ -844,13 +854,18 @@ define i64 @test_mul_by_25(i64 %x) {
define i64 @test_mul_by_26(i64 %x) {
; X86-LABEL: test_mul_by_26:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %ecx
; X86-NEXT: addl %eax, %ecx
; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %eax
; X86-NEXT: leal (%eax,%eax,4), %esi
; X86-NEXT: movl $26, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %esi, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
;
; X86-NOOPT-LABEL: test_mul_by_26:
Expand Down Expand Up @@ -924,13 +939,18 @@ define i64 @test_mul_by_27(i64 %x) {
define i64 @test_mul_by_28(i64 %x) {
; X86-LABEL: test_mul_by_28:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
; X86-NEXT: addl %eax, %ecx
; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %esi
; X86-NEXT: movl $28, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %esi, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
;
; X86-NOOPT-LABEL: test_mul_by_28:
Expand Down Expand Up @@ -971,14 +991,19 @@ define i64 @test_mul_by_28(i64 %x) {
define i64 @test_mul_by_29(i64 %x) {
; X86-LABEL: test_mul_by_29:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
; X86-NEXT: addl %eax, %ecx
; X86-NEXT: addl %eax, %ecx
; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %esi
; X86-NEXT: addl %ecx, %ecx
; X86-NEXT: movl $29, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %esi, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
;
; X86-NOOPT-LABEL: test_mul_by_29:
Expand Down Expand Up @@ -1501,8 +1526,8 @@ define i64 @test_mul_spec(i64 %x) nounwind {
; X86-NEXT: movl %esi, %eax
; X86-NEXT: mull %edi
; X86-NEXT: imull %esi, %ebx
; X86-NEXT: addl %ebx, %edx
; X86-NEXT: imull %ecx, %edi
; X86-NEXT: addl %ebx, %edi
; X86-NEXT: addl %edi, %edx
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
Expand Down Expand Up @@ -1537,8 +1562,8 @@ define i64 @test_mul_spec(i64 %x) nounwind {
; X86-NOOPT-NEXT: movl %esi, %eax
; X86-NOOPT-NEXT: mull %edi
; X86-NOOPT-NEXT: imull %esi, %ebx
; X86-NOOPT-NEXT: addl %ebx, %edx
; X86-NOOPT-NEXT: imull %ecx, %edi
; X86-NOOPT-NEXT: addl %ebx, %edi
; X86-NOOPT-NEXT: addl %edi, %edx
; X86-NOOPT-NEXT: popl %esi
; X86-NOOPT-NEXT: popl %edi
Expand Down
4,653 changes: 2,313 additions & 2,340 deletions llvm/test/CodeGen/X86/mul-i1024.ll
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Large diffs are not rendered by default.

316 changes: 159 additions & 157 deletions llvm/test/CodeGen/X86/mul-i256.ll
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Large diffs are not rendered by default.

1,079 changes: 535 additions & 544 deletions llvm/test/CodeGen/X86/mul-i512.ll
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Large diffs are not rendered by default.

61 changes: 30 additions & 31 deletions llvm/test/CodeGen/X86/mul128.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,8 +9,8 @@ define i128 @foo(i128 %t, i128 %u) {
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: imulq %rdi, %rcx
; X64-NEXT: mulq %rdx
; X64-NEXT: addq %rcx, %rdx
; X64-NEXT: imulq %rsi, %r8
; X64-NEXT: addq %rcx, %r8
; X64-NEXT: addq %r8, %rdx
; X64-NEXT: retq
;
Expand All @@ -30,57 +30,56 @@ define i128 @foo(i128 %t, i128 %u) {
; X86-NEXT: .cfi_offset %edi, -16
; X86-NEXT: .cfi_offset %ebx, -12
; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: imull %ecx, %ebp
; X86-NEXT: movl %esi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: imull %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: imull %ebp, %esi
; X86-NEXT: addl %eax, %esi
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %ecx
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %edx, %esi
; X86-NEXT: movl %edi, %eax
; X86-NEXT: movl %edi, %edx
; X86-NEXT: imull {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: imull %esi, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %ebp, %edi
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: imull %ebp, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: imull %esi, %ecx
; X86-NEXT: imull %edi, %ecx
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: mull %edi
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-NEXT: adcl %edi, %ecx
; X86-NEXT: movl %esi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %edi
; X86-NEXT: adcl %esi, %ecx
; X86-NEXT: movl %edi, %eax
; X86-NEXT: mull %ebp
; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl %edi, %esi
; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %edi
; X86-NEXT: mull %ebp
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %esi, %ebp
; X86-NEXT: adcl %ebx, %edi
; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl %edi, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %edi
; X86-NEXT: addl %ebp, %edi
; X86-NEXT: adcl %ebx, %esi
; X86-NEXT: setb %bl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %edi, %eax
; X86-NEXT: addl %esi, %eax
; X86-NEXT: movzbl %bl, %esi
; X86-NEXT: adcl %esi, %edx
; X86-NEXT: addl (%esp), %eax # 4-byte Folded Reload
; X86-NEXT: adcl %ecx, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ebp, 4(%ecx)
; X86-NEXT: movl %edi, 4(%ecx)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %esi, (%ecx)
; X86-NEXT: movl %eax, 8(%ecx)
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/mul64.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -11,8 +11,8 @@ define i64 @foo(i64 %t, i64 %u) nounwind {
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %esi
; X32-NEXT: imull {{[0-9]+}}(%esp), %ecx
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull {{[0-9]+}}(%esp), %esi
; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi
; X32-NEXT: retl
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/muloti.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -22,8 +22,8 @@ define %0 @x(i64 %a.coerce0, i64 %a.coerce1, i64 %b.coerce0, i64 %b.coerce1) nou
; CHECK-NEXT: movq %rdx, %rax
; CHECK-NEXT: mulq %rbx
; CHECK-NEXT: movq %rax, %r8
; CHECK-NEXT: addq %rdi, %rdx
; CHECK-NEXT: imulq %rcx, %rbx
; CHECK-NEXT: addq %rdi, %rbx
; CHECK-NEXT: addq %rdx, %rbx
; CHECK-NEXT: movq %rcx, %rdi
; CHECK-NEXT: sarq $63, %rdi
Expand All @@ -32,8 +32,8 @@ define %0 @x(i64 %a.coerce0, i64 %a.coerce1, i64 %b.coerce0, i64 %b.coerce1) nou
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: mulq %r9
; CHECK-NEXT: movq %rax, %r10
; CHECK-NEXT: addq %r14, %rdx
; CHECK-NEXT: imulq %r9, %rdi
; CHECK-NEXT: addq %r14, %rdi
; CHECK-NEXT: addq %rdx, %rdi
; CHECK-NEXT: addq %r8, %r10
; CHECK-NEXT: adcq %rbx, %rdi
Expand Down
326 changes: 157 additions & 169 deletions llvm/test/CodeGen/X86/popcnt.ll
View file

Large diffs are not rendered by default.

8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/pr34080-2.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -31,10 +31,6 @@ define void @computeJD(ptr) nounwind {
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: imull %edx
; CHECK-NEXT: movl %edx, %edi
; CHECK-NEXT: movl %edx, %eax
; CHECK-NEXT: shrl $31, %eax
; CHECK-NEXT: sarl $7, %edi
; CHECK-NEXT: addl %eax, %edi
; CHECK-NEXT: imull $36525, %esi, %eax # imm = 0x8EAD
; CHECK-NEXT: addl $172251900, %eax # imm = 0xA445AFC
; CHECK-NEXT: movl $1374389535, %edx # imm = 0x51EB851F
Expand All @@ -43,7 +39,11 @@ define void @computeJD(ptr) nounwind {
; CHECK-NEXT: shrl $31, %eax
; CHECK-NEXT: sarl $5, %edx
; CHECK-NEXT: addl %eax, %edx
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: shrl $31, %eax
; CHECK-NEXT: addl 16(%ebx), %ecx
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: sarl $7, %edi
; CHECK-NEXT: addl %edi, %ecx
; CHECK-NEXT: leal 257(%ecx,%edx), %eax
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/pr36865.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13,10 +13,10 @@ define void @main() {
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movl (%rax), %ecx
; CHECK-NEXT: addl 0, %eax
; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%rsp)
; CHECK-NEXT: addl %ecx, %ecx
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %ecx
; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%rsp)
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: imull %eax, %ecx
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/reassociate-add.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,12 +12,12 @@ define void @add8(i8 %x0, i8 %x1, i8 %x2, i8* %p) {
; CHECK: # %bb.0:
; CHECK-NEXT: orb $16, %dil
; CHECK-NEXT: orb $32, %sil
; CHECK-NEXT: addb %dil, %sil
; CHECK-NEXT: addb $-8, %dl
; CHECK-NEXT: orb $7, %dl
; CHECK-NEXT: movzbl %dl, %eax
; CHECK-NEXT: imull $100, %eax, %eax
; CHECK-NEXT: addb %sil, %al
; CHECK-NEXT: addb %dil, %al
; CHECK-NEXT: movb %al, (%rcx)
; CHECK-NEXT: retq
%v0 = or i8 %x0, 16
Expand All @@ -36,11 +36,11 @@ define void @add16(i16 %x0, i16 %x1, i16 %x2, i16* %p) {
; CHECK: # %bb.0:
; CHECK-NEXT: orl $16, %edi
; CHECK-NEXT: orl $32, %esi
; CHECK-NEXT: addl %edi, %esi
; CHECK-NEXT: addl $-8, %edx
; CHECK-NEXT: orl $7, %edx
; CHECK-NEXT: imull $100, %edx, %eax
; CHECK-NEXT: addl %esi, %eax
; CHECK-NEXT: addl %edi, %eax
; CHECK-NEXT: movw %ax, (%rcx)
; CHECK-NEXT: retq
%v0 = or i16 %x0, 16
Expand All @@ -59,11 +59,11 @@ define void @add32(i32 %x0, i32 %x1, i32 %x2, i32* %p) {
; CHECK: # %bb.0:
; CHECK-NEXT: orl $16, %edi
; CHECK-NEXT: orl $32, %esi
; CHECK-NEXT: addl %edi, %esi
; CHECK-NEXT: addl $-8, %edx
; CHECK-NEXT: orl $7, %edx
; CHECK-NEXT: imull $100, %edx, %eax
; CHECK-NEXT: addl %esi, %eax
; CHECK-NEXT: addl %edi, %eax
; CHECK-NEXT: movl %eax, (%rcx)
; CHECK-NEXT: retq
%v0 = or i32 %x0, 16
Expand All @@ -82,11 +82,11 @@ define void @add64(i64 %x0, i64 %x1, i64 %x2, i64* %p) {
; CHECK: # %bb.0:
; CHECK-NEXT: orq $16, %rdi
; CHECK-NEXT: orq $32, %rsi
; CHECK-NEXT: addq %rdi, %rsi
; CHECK-NEXT: addq $-8, %rdx
; CHECK-NEXT: orq $7, %rdx
; CHECK-NEXT: imulq $100, %rdx, %rax
; CHECK-NEXT: addq %rsi, %rax
; CHECK-NEXT: addq %rdi, %rax
; CHECK-NEXT: movq %rax, (%rcx)
; CHECK-NEXT: retq
%v0 = or i64 %x0, 16
Expand Down
621 changes: 307 additions & 314 deletions llvm/test/CodeGen/X86/smul-with-overflow.ll
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Large diffs are not rendered by default.

2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/smul_fix.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -231,8 +231,8 @@ define i64 @func5(i64 %x, i64 %y) {
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %esi
; X86-NEXT: imull {{[0-9]+}}(%esp), %ecx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: imull {{[0-9]+}}(%esp), %esi
; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %esi, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
Expand Down
60 changes: 30 additions & 30 deletions llvm/test/CodeGen/X86/smul_fix_sat.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -369,8 +369,8 @@ define i64 @func5(i64 %x, i64 %y) {
; X86-NEXT: .cfi_def_cfa_offset 16
; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 20
; X86-NEXT: subl $8, %esp
; X86-NEXT: .cfi_def_cfa_offset 28
; X86-NEXT: subl $12, %esp
; X86-NEXT: .cfi_def_cfa_offset 32
; X86-NEXT: .cfi_offset %esi, -20
; X86-NEXT: .cfi_offset %edi, -16
; X86-NEXT: .cfi_offset %ebx, -12
Expand All @@ -383,62 +383,62 @@ define i64 @func5(i64 %x, i64 %y) {
; X86-NEXT: movl %eax, %edi
; X86-NEXT: imull %ebx, %edi
; X86-NEXT: mull %ebx
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-NEXT: addl %edi, %edx
; X86-NEXT: movl %ebp, %edi
; X86-NEXT: movl %eax, %esi
; X86-NEXT: imull %ebp, %ebx
; X86-NEXT: addl %edi, %ebx
; X86-NEXT: addl %edx, %ebx
; X86-NEXT: movl %ebp, %edi
; X86-NEXT: sarl $31, %edi
; X86-NEXT: movl %edi, %ebp
; X86-NEXT: imull %ecx, %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %edi, %edx
; X86-NEXT: imull %ecx, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl %edi, %eax
; X86-NEXT: mull %esi
; X86-NEXT: addl %ebp, %edx
; X86-NEXT: imull %esi, %edi
; X86-NEXT: imull %ebp, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: mull %ebp
; X86-NEXT: addl %edx, %edi
; X86-NEXT: addl (%esp), %eax # 4-byte Folded Reload
; X86-NEXT: addl %esi, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %ebx, %edi
; X86-NEXT: movl %esi, %eax
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ebp
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: addl %eax, %ebp
; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl %edx, %ebp
; X86-NEXT: addl %eax, %ebx
; X86-NEXT: adcl $0, %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: mull %edx
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %esi
; X86-NEXT: addl %eax, %ebp
; X86-NEXT: adcl %ebx, %esi
; X86-NEXT: setb %bl
; X86-NEXT: addl %eax, %ebx
; X86-NEXT: adcl %ebp, %esi
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: mull %ebp
; X86-NEXT: addl %esi, %eax
; X86-NEXT: movzbl %bl, %esi
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload
; X86-NEXT: adcl %esi, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: adcl %edi, %edx
; X86-NEXT: movl %ebp, %edi
; X86-NEXT: movl %ebx, %edi
; X86-NEXT: sarl $31, %edi
; X86-NEXT: xorl %edi, %edx
; X86-NEXT: xorl %eax, %edi
; X86-NEXT: xorl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: xorl %ebp, %ecx
; X86-NEXT: sarl $31, %ecx
; X86-NEXT: movl %ecx, %esi
; X86-NEXT: xorl $2147483647, %esi # imm = 0x7FFFFFFF
; X86-NEXT: orl %edx, %edi
; X86-NEXT: notl %ecx
; X86-NEXT: cmovel (%esp), %ecx # 4-byte Folded Reload
; X86-NEXT: cmovel %ebp, %esi
; X86-NEXT: cmovel {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: cmovel %ebx, %esi
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl %esi, %edx
; X86-NEXT: addl $8, %esp
; X86-NEXT: addl $12, %esp
; X86-NEXT: .cfi_def_cfa_offset 20
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 16
Expand Down
1,419 changes: 705 additions & 714 deletions llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
View file

Large diffs are not rendered by default.

71 changes: 36 additions & 35 deletions llvm/test/CodeGen/X86/sse-regcall.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -196,7 +196,7 @@ define x86_regcallcc i32 @testi32_inp(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a
; WIN32: # %bb.0:
; WIN32-NEXT: pushl %ebp
; WIN32-NEXT: pushl %ebx
; WIN32-NEXT: subl $12, %esp
; WIN32-NEXT: subl $16, %esp
; WIN32-NEXT: movl %esi, (%esp) # 4-byte Spill
; WIN32-NEXT: movl %edi, %esi
; WIN32-NEXT: movl %edx, %ebx
Expand All @@ -207,36 +207,37 @@ define x86_regcallcc i32 @testi32_inp(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a
; WIN32-NEXT: subl %esi, %ebx
; WIN32-NEXT: movl %edi, %eax
; WIN32-NEXT: subl %ecx, %eax
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; WIN32-NEXT: movl %ebp, %ecx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: subl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: imull %eax, %ecx
; WIN32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %esi
; WIN32-NEXT: movl %esi, %eax
; WIN32-NEXT: subl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: imull %ebx, %eax
; WIN32-NEXT: addl %ecx, %eax
; WIN32-NEXT: movl %esi, %edx
; WIN32-NEXT: subl {{[0-9]+}}(%esp), %edx
; WIN32-NEXT: imull %ebx, %edx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; WIN32-NEXT: movl (%esp), %ebx # 4-byte Reload
; WIN32-NEXT: subl {{[0-9]+}}(%esp), %ebx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edx
; WIN32-NEXT: movl %edx, %ecx
; WIN32-NEXT: subl %ebp, %ebx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: movl %eax, %ecx
; WIN32-NEXT: subl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: imull %ebx, %ecx
; WIN32-NEXT: addl %eax, %ecx
; WIN32-NEXT: addl %edx, %ecx
; WIN32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: addl (%esp), %eax # 4-byte Folded Reload
; WIN32-NEXT: addl {{[0-9]+}}(%esp), %ebp
; WIN32-NEXT: imull %ebp, %edi
; WIN32-NEXT: addl (%esp), %ebp # 4-byte Folded Reload
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edx
; WIN32-NEXT: addl {{[0-9]+}}(%esp), %edx
; WIN32-NEXT: imull %edx, %edi
; WIN32-NEXT: addl {{[0-9]+}}(%esp), %esi
; WIN32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; WIN32-NEXT: addl %esi, %edi
; WIN32-NEXT: addl {{[0-9]+}}(%esp), %edx
; WIN32-NEXT: imull %eax, %edx
; WIN32-NEXT: addl %edx, %edi
; WIN32-NEXT: addl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: imull %ebp, %eax
; WIN32-NEXT: addl %esi, %eax
; WIN32-NEXT: addl %eax, %edi
; WIN32-NEXT: addl %ecx, %edi
; WIN32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; WIN32-NEXT: movl %edi, %eax
; WIN32-NEXT: addl $12, %esp
; WIN32-NEXT: addl $16, %esp
; WIN32-NEXT: popl %ebx
; WIN32-NEXT: popl %ebp
; WIN32-NEXT: retl
Expand Down Expand Up @@ -270,18 +271,18 @@ define x86_regcallcc i32 @testi32_inp(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a
; WIN64-NEXT: # kill: def $r11d killed $r11d killed $r11
; WIN64-NEXT: subl %r12d, %r11d
; WIN64-NEXT: imull %edx, %r11d
; WIN64-NEXT: addl %r9d, %r11d
; WIN64-NEXT: leal (%r14,%r15), %edx
; WIN64-NEXT: movl %r14d, %r9d
; WIN64-NEXT: subl %r15d, %r9d
; WIN64-NEXT: imull %esi, %r9d
; WIN64-NEXT: addl %r11d, %r9d
; WIN64-NEXT: # kill: def $r14d killed $r14d killed $r14
; WIN64-NEXT: subl %r15d, %r14d
; WIN64-NEXT: imull %esi, %r14d
; WIN64-NEXT: addl %r11d, %r14d
; WIN64-NEXT: addl %ecx, %eax
; WIN64-NEXT: imull %r8d, %eax
; WIN64-NEXT: imull %ebx, %r10d
; WIN64-NEXT: addl %r10d, %eax
; WIN64-NEXT: imull %edi, %edx
; WIN64-NEXT: addl %r10d, %edx
; WIN64-NEXT: addl %edx, %eax
; WIN64-NEXT: addl %r14d, %eax
; WIN64-NEXT: addl %r9d, %eax
; WIN64-NEXT: popq %rbx
; WIN64-NEXT: retq
Expand Down Expand Up @@ -311,19 +312,19 @@ define x86_regcallcc i32 @testi32_inp(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a
; LINUXOSX-NEXT: leal (%r13,%r14), %r11d
; LINUXOSX-NEXT: movl %r13d, %r12d
; LINUXOSX-NEXT: subl %r14d, %r12d
; LINUXOSX-NEXT: movl {{[0-9]+}}(%rsp), %r14d
; LINUXOSX-NEXT: imull %edx, %r12d
; LINUXOSX-NEXT: movl {{[0-9]+}}(%rsp), %edx
; LINUXOSX-NEXT: addl %r9d, %r12d
; LINUXOSX-NEXT: movl %r15d, %r9d
; LINUXOSX-NEXT: subl %edx, %r9d
; LINUXOSX-NEXT: imull %esi, %r9d
; LINUXOSX-NEXT: addl %r12d, %r9d
; LINUXOSX-NEXT: movl %r15d, %edx
; LINUXOSX-NEXT: subl %r14d, %edx
; LINUXOSX-NEXT: imull %esi, %edx
; LINUXOSX-NEXT: addl %r12d, %edx
; LINUXOSX-NEXT: addl %ecx, %eax
; LINUXOSX-NEXT: imull %r8d, %eax
; LINUXOSX-NEXT: imull %r10d, %r11d
; LINUXOSX-NEXT: addl %r11d, %eax
; LINUXOSX-NEXT: addl %r15d, %edx
; LINUXOSX-NEXT: imull %edi, %edx
; LINUXOSX-NEXT: addl %r15d, %r14d
; LINUXOSX-NEXT: imull %edi, %r14d
; LINUXOSX-NEXT: addl %r11d, %r14d
; LINUXOSX-NEXT: addl %r14d, %eax
; LINUXOSX-NEXT: addl %edx, %eax
; LINUXOSX-NEXT: addl %r9d, %eax
; LINUXOSX-NEXT: retq
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/X86/stack-clash-large.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -98,13 +98,13 @@ define void @push_before_probe(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i
; CHECK-X64-NEXT: .cfi_def_cfa_offset 71888
; CHECK-X64-NEXT: .cfi_offset %rax, -16
; CHECK-X64-NEXT: movl 71888(%rsp), %eax
; CHECK-X64-NEXT: addl %esi, %edi
; CHECK-X64-NEXT: addl %ecx, %edx
; CHECK-X64-NEXT: addl %edi, %edx
; CHECK-X64-NEXT: addl %r9d, %r8d
; CHECK-X64-NEXT: addl 71896(%rsp), %eax
; CHECK-X64-NEXT: addl %esi, %edx
; CHECK-X64-NEXT: addl %r9d, %eax
; CHECK-X64-NEXT: addl %r8d, %eax
; CHECK-X64-NEXT: addl %edx, %eax
; CHECK-X64-NEXT: addl %edi, %eax
; CHECK-X64-NEXT: movl %eax, 264(%rsp)
; CHECK-X64-NEXT: movl %eax, 28664(%rsp)
; CHECK-X64-NEXT: addq $71872, %rsp # imm = 0x118C0
Expand Down Expand Up @@ -141,16 +141,16 @@ define void @push_before_probe(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i
; CHECK-X86-NEXT: .cfi_offset %edx, -12
; CHECK-X86-NEXT: .cfi_offset %esi, -8
; CHECK-X86-NEXT: movl 72056(%esp), %eax
; CHECK-X86-NEXT: movl 72048(%esp), %edx
; CHECK-X86-NEXT: movl 72040(%esp), %ecx
; CHECK-X86-NEXT: movl 72048(%esp), %ecx
; CHECK-X86-NEXT: movl 72040(%esp), %edx
; CHECK-X86-NEXT: movl 72032(%esp), %esi
; CHECK-X86-NEXT: addl 72036(%esp), %esi
; CHECK-X86-NEXT: addl 72044(%esp), %ecx
; CHECK-X86-NEXT: addl %esi, %ecx
; CHECK-X86-NEXT: addl 72052(%esp), %edx
; CHECK-X86-NEXT: addl 72044(%esp), %edx
; CHECK-X86-NEXT: addl 72052(%esp), %ecx
; CHECK-X86-NEXT: addl 72060(%esp), %eax
; CHECK-X86-NEXT: addl %edx, %eax
; CHECK-X86-NEXT: addl %ecx, %eax
; CHECK-X86-NEXT: addl %edx, %eax
; CHECK-X86-NEXT: addl %esi, %eax
; CHECK-X86-NEXT: movl %eax, 392(%esp)
; CHECK-X86-NEXT: movl %eax, 28792(%esp)
; CHECK-X86-NEXT: addl $72012, %esp # imm = 0x1194C
Expand Down Expand Up @@ -184,13 +184,13 @@ define void @push_before_probe(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i
; CHECK-X32-NEXT: .cfi_def_cfa_offset 71888
; CHECK-X32-NEXT: .cfi_offset %rax, -16
; CHECK-X32-NEXT: movl 71888(%esp), %eax
; CHECK-X32-NEXT: addl %esi, %edi
; CHECK-X32-NEXT: addl %ecx, %edx
; CHECK-X32-NEXT: addl %edi, %edx
; CHECK-X32-NEXT: addl %r9d, %r8d
; CHECK-X32-NEXT: addl 71896(%esp), %eax
; CHECK-X32-NEXT: addl %esi, %edx
; CHECK-X32-NEXT: addl %r9d, %eax
; CHECK-X32-NEXT: addl %r8d, %eax
; CHECK-X32-NEXT: addl %edx, %eax
; CHECK-X32-NEXT: addl %edi, %eax
; CHECK-X32-NEXT: movl %eax, 264(%esp)
; CHECK-X32-NEXT: movl %eax, 28664(%esp)
; CHECK-X32-NEXT: addl $71872, %esp # imm = 0x118C0
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/X86/statepoint-live-in.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -442,12 +442,12 @@ define i64 @test11(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl %edi, %ebx
; CHECK-NEXT: movl %esi, %r15d
; CHECK-NEXT: movl %edi, %ebp
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %edx, %r12d
; CHECK-NEXT: movl %ecx, %r13d
; CHECK-NEXT: movl %r8d, %ebp
; CHECK-NEXT: movl %r9d, %r14d
; CHECK-NEXT: movl %r8d, %r14d
; CHECK-NEXT: movl %r9d, %r15d
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
Expand All @@ -472,11 +472,10 @@ define i64 @test11(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: callq _bar ## 160-byte Folded Reload
; CHECK-NEXT: Ltmp13:
; CHECK-NEXT: addq %r15, %rbx
; CHECK-NEXT: addq %r12, %rbx
; CHECK-NEXT: addq %r13, %rbx
; CHECK-NEXT: addq %rbp, %rbx
; CHECK-NEXT: addq %r14, %rbx
; CHECK-NEXT: addq %r15, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
Expand Down Expand Up @@ -517,6 +516,7 @@ define i64 @test11(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %
; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: addq %rbp, %rbx
; CHECK-NEXT: movq %rbx, %rax
; CHECK-NEXT: addq $168, %rsp
; CHECK-NEXT: popq %rbx
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/X86/statepoint-regs.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -554,12 +554,12 @@ define i64 @test11(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl %edi, %ebx
; CHECK-NEXT: movl %esi, %r15d
; CHECK-NEXT: movl %edi, %ebp
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %edx, %r12d
; CHECK-NEXT: movl %ecx, %r13d
; CHECK-NEXT: movl %r8d, %ebp
; CHECK-NEXT: movl %r9d, %r14d
; CHECK-NEXT: movl %r8d, %r14d
; CHECK-NEXT: movl %r9d, %r15d
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
Expand All @@ -584,11 +584,10 @@ define i64 @test11(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: callq _bar ## 160-byte Folded Reload
; CHECK-NEXT: Ltmp14:
; CHECK-NEXT: addq %r15, %rbx
; CHECK-NEXT: addq %r12, %rbx
; CHECK-NEXT: addq %r13, %rbx
; CHECK-NEXT: addq %rbp, %rbx
; CHECK-NEXT: addq %r14, %rbx
; CHECK-NEXT: addq %r15, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
Expand Down Expand Up @@ -629,6 +628,7 @@ define i64 @test11(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %
; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: addq %rbp, %rbx
; CHECK-NEXT: movq %rbx, %rax
; CHECK-NEXT: addq $168, %rsp
; CHECK-NEXT: popq %rbx
Expand Down
10 changes: 6 additions & 4 deletions llvm/test/CodeGen/X86/swift-return.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -147,9 +147,11 @@ define dso_local i32 @test3(i32 %key) #0 {
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movl %edi, {{[0-9]+}}(%rsp)
; CHECK-NEXT: callq gen3@PLT
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: # kill: def $edx killed $edx def $rdx
; CHECK-NEXT: # kill: def $ecx killed $ecx def $rcx
; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: addl %r8d, %ecx
; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: addl %r8d, %eax
; CHECK-NEXT: popq %rcx
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand Down Expand Up @@ -358,9 +360,9 @@ define swiftcc { double, i64 } @test6() #0 {
; CHECK-NEXT: addsd %xmm1, %xmm0
; CHECK-NEXT: addsd %xmm2, %xmm0
; CHECK-NEXT: addsd %xmm3, %xmm0
; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: addq %rdx, %rcx
; CHECK-NEXT: addq %r8, %rcx
; CHECK-NEXT: addq %rcx, %rax
; CHECK-NEXT: addq %r8, %rax
; CHECK-NEXT: popq %rcx
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand Down
8 changes: 5 additions & 3 deletions llvm/test/CodeGen/X86/twoaddr-lea.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -31,11 +31,13 @@ define i32 @test1(i32 %X) nounwind {
define i32 @test2(i32 inreg %a, i32 inreg %b, i32 %c, i32 %d) nounwind {
; CHECK-LABEL: test2:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: ## kill: def $ecx killed $ecx def $rcx
; CHECK-NEXT: ## kill: def $edx killed $edx def $rdx
; CHECK-NEXT: ## kill: def $esi killed $esi def $rsi
; CHECK-NEXT: ## kill: def $edi killed $edi def $rdi
; CHECK-NEXT: leal (%rdi,%rsi), %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: addl %edi, %esi
; CHECK-NEXT: leal (%rdx,%rcx), %eax
; CHECK-NEXT: addl %esi, %eax
; CHECK-NEXT: retq
entry:
%add = add i32 %b, %a
Expand Down
225 changes: 111 additions & 114 deletions llvm/test/CodeGen/X86/umul-with-overflow.ll
View file

Large diffs are not rendered by default.

2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/umul_fix.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -185,8 +185,8 @@ define i64 @func5(i64 %x, i64 %y) nounwind {
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %esi
; X86-NEXT: imull {{[0-9]+}}(%esp), %ecx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: imull {{[0-9]+}}(%esp), %esi
; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %esi, %edx
; X86-NEXT: popl %esi
; X86-NEXT: retl
Expand Down
12 changes: 7 additions & 5 deletions llvm/test/CodeGen/X86/urem-seteq-nonzero.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -295,19 +295,21 @@ define i1 @t8_3_2(i8 %X) nounwind {
define i1 @t64_3_2(i64 %X) nounwind {
; X86-LABEL: t64_3_2:
; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $-1431655765, %edx # imm = 0xAAAAAAAB
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx
; X86-NEXT: imull $-1431655766, %ecx, %ecx # imm = 0xAAAAAAAA
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: imull $-1431655765, {{[0-9]+}}(%esp), %edx # imm = 0xAAAAAAAB
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: imull $-1431655765, {{[0-9]+}}(%esp), %esi # imm = 0xAAAAAAAB
; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %edx, %esi
; X86-NEXT: addl $-1431655766, %eax # imm = 0xAAAAAAAA
; X86-NEXT: adcl $-1431655766, %edx # imm = 0xAAAAAAAA
; X86-NEXT: adcl $-1431655766, %esi # imm = 0xAAAAAAAA
; X86-NEXT: cmpl $1431655765, %eax # imm = 0x55555555
; X86-NEXT: sbbl $1431655765, %edx # imm = 0x55555555
; X86-NEXT: sbbl $1431655765, %esi # imm = 0x55555555
; X86-NEXT: setb %al
; X86-NEXT: popl %esi
; X86-NEXT: retl
;
; X64-LABEL: t64_3_2:
Expand Down
48 changes: 24 additions & 24 deletions llvm/test/CodeGen/X86/vec_smulo.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3309,8 +3309,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; SSE2-NEXT: movq %r14, %rax
; SSE2-NEXT: mulq %r12
; SSE2-NEXT: movq %rax, %rdi
; SSE2-NEXT: addq %rbx, %rdx
; SSE2-NEXT: imulq %r9, %r12
; SSE2-NEXT: addq %rbx, %r12
; SSE2-NEXT: addq %rdx, %r12
; SSE2-NEXT: movq %r9, %rbx
; SSE2-NEXT: sarq $63, %rbx
Expand All @@ -3319,8 +3319,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; SSE2-NEXT: movq %rbx, %rax
; SSE2-NEXT: mulq %r10
; SSE2-NEXT: movq %rax, %r15
; SSE2-NEXT: addq %r13, %rdx
; SSE2-NEXT: imulq %r10, %rbx
; SSE2-NEXT: addq %r13, %rbx
; SSE2-NEXT: addq %rdx, %rbx
; SSE2-NEXT: addq %rdi, %r15
; SSE2-NEXT: adcq %r12, %rbx
Expand Down Expand Up @@ -3363,8 +3363,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; SSE2-NEXT: movq %rsi, %rax
; SSE2-NEXT: mulq %rbx
; SSE2-NEXT: movq %rax, %r9
; SSE2-NEXT: addq %r10, %rdx
; SSE2-NEXT: imulq %rbp, %rbx
; SSE2-NEXT: addq %r10, %rbx
; SSE2-NEXT: addq %rdx, %rbx
; SSE2-NEXT: movq %rbp, %r10
; SSE2-NEXT: sarq $63, %r10
Expand All @@ -3373,8 +3373,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; SSE2-NEXT: movq %r10, %rax
; SSE2-NEXT: mulq %r8
; SSE2-NEXT: movq %rax, %r11
; SSE2-NEXT: addq %r14, %rdx
; SSE2-NEXT: imulq %r8, %r10
; SSE2-NEXT: addq %r14, %r10
; SSE2-NEXT: addq %rdx, %r10
; SSE2-NEXT: addq %r9, %r11
; SSE2-NEXT: adcq %rbx, %r10
Expand Down Expand Up @@ -3445,8 +3445,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; SSSE3-NEXT: movq %r14, %rax
; SSSE3-NEXT: mulq %r12
; SSSE3-NEXT: movq %rax, %rdi
; SSSE3-NEXT: addq %rbx, %rdx
; SSSE3-NEXT: imulq %r9, %r12
; SSSE3-NEXT: addq %rbx, %r12
; SSSE3-NEXT: addq %rdx, %r12
; SSSE3-NEXT: movq %r9, %rbx
; SSSE3-NEXT: sarq $63, %rbx
Expand All @@ -3455,8 +3455,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; SSSE3-NEXT: movq %rbx, %rax
; SSSE3-NEXT: mulq %r10
; SSSE3-NEXT: movq %rax, %r15
; SSSE3-NEXT: addq %r13, %rdx
; SSSE3-NEXT: imulq %r10, %rbx
; SSSE3-NEXT: addq %r13, %rbx
; SSSE3-NEXT: addq %rdx, %rbx
; SSSE3-NEXT: addq %rdi, %r15
; SSSE3-NEXT: adcq %r12, %rbx
Expand Down Expand Up @@ -3499,8 +3499,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; SSSE3-NEXT: movq %rsi, %rax
; SSSE3-NEXT: mulq %rbx
; SSSE3-NEXT: movq %rax, %r9
; SSSE3-NEXT: addq %r10, %rdx
; SSSE3-NEXT: imulq %rbp, %rbx
; SSSE3-NEXT: addq %r10, %rbx
; SSSE3-NEXT: addq %rdx, %rbx
; SSSE3-NEXT: movq %rbp, %r10
; SSSE3-NEXT: sarq $63, %r10
Expand All @@ -3509,8 +3509,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; SSSE3-NEXT: movq %r10, %rax
; SSSE3-NEXT: mulq %r8
; SSSE3-NEXT: movq %rax, %r11
; SSSE3-NEXT: addq %r14, %rdx
; SSSE3-NEXT: imulq %r8, %r10
; SSSE3-NEXT: addq %r14, %r10
; SSSE3-NEXT: addq %rdx, %r10
; SSSE3-NEXT: addq %r9, %r11
; SSSE3-NEXT: adcq %rbx, %r10
Expand Down Expand Up @@ -3581,8 +3581,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; SSE41-NEXT: movq %r14, %rax
; SSE41-NEXT: mulq %r12
; SSE41-NEXT: movq %rax, %rdi
; SSE41-NEXT: addq %rbx, %rdx
; SSE41-NEXT: imulq %r9, %r12
; SSE41-NEXT: addq %rbx, %r12
; SSE41-NEXT: addq %rdx, %r12
; SSE41-NEXT: movq %r9, %rbx
; SSE41-NEXT: sarq $63, %rbx
Expand All @@ -3591,8 +3591,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; SSE41-NEXT: movq %rbx, %rax
; SSE41-NEXT: mulq %r10
; SSE41-NEXT: movq %rax, %r15
; SSE41-NEXT: addq %r13, %rdx
; SSE41-NEXT: imulq %r10, %rbx
; SSE41-NEXT: addq %r13, %rbx
; SSE41-NEXT: addq %rdx, %rbx
; SSE41-NEXT: addq %rdi, %r15
; SSE41-NEXT: adcq %r12, %rbx
Expand Down Expand Up @@ -3635,8 +3635,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; SSE41-NEXT: movq %rsi, %rax
; SSE41-NEXT: mulq %rbx
; SSE41-NEXT: movq %rax, %r9
; SSE41-NEXT: addq %r10, %rdx
; SSE41-NEXT: imulq %rbp, %rbx
; SSE41-NEXT: addq %r10, %rbx
; SSE41-NEXT: addq %rdx, %rbx
; SSE41-NEXT: movq %rbp, %r10
; SSE41-NEXT: sarq $63, %r10
Expand All @@ -3645,8 +3645,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; SSE41-NEXT: movq %r10, %rax
; SSE41-NEXT: mulq %r8
; SSE41-NEXT: movq %rax, %r11
; SSE41-NEXT: addq %r14, %rdx
; SSE41-NEXT: imulq %r8, %r10
; SSE41-NEXT: addq %r14, %r10
; SSE41-NEXT: addq %rdx, %r10
; SSE41-NEXT: addq %r9, %r11
; SSE41-NEXT: adcq %rbx, %r10
Expand Down Expand Up @@ -3716,8 +3716,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; AVX-NEXT: movq %r14, %rax
; AVX-NEXT: mulq %r12
; AVX-NEXT: movq %rax, %rdi
; AVX-NEXT: addq %rbx, %rdx
; AVX-NEXT: imulq %r9, %r12
; AVX-NEXT: addq %rbx, %r12
; AVX-NEXT: addq %rdx, %r12
; AVX-NEXT: movq %r9, %rbx
; AVX-NEXT: sarq $63, %rbx
Expand All @@ -3726,8 +3726,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; AVX-NEXT: movq %rbx, %rax
; AVX-NEXT: mulq %r10
; AVX-NEXT: movq %rax, %r15
; AVX-NEXT: addq %r13, %rdx
; AVX-NEXT: imulq %r10, %rbx
; AVX-NEXT: addq %r13, %rbx
; AVX-NEXT: addq %rdx, %rbx
; AVX-NEXT: addq %rdi, %r15
; AVX-NEXT: adcq %r12, %rbx
Expand Down Expand Up @@ -3770,8 +3770,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; AVX-NEXT: movq %rsi, %rax
; AVX-NEXT: mulq %rbx
; AVX-NEXT: movq %rax, %r9
; AVX-NEXT: addq %r10, %rdx
; AVX-NEXT: imulq %rbp, %rbx
; AVX-NEXT: addq %r10, %rbx
; AVX-NEXT: addq %rdx, %rbx
; AVX-NEXT: movq %rbp, %r10
; AVX-NEXT: sarq $63, %r10
Expand All @@ -3780,8 +3780,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; AVX-NEXT: movq %r10, %rax
; AVX-NEXT: mulq %r8
; AVX-NEXT: movq %rax, %r11
; AVX-NEXT: addq %r14, %rdx
; AVX-NEXT: imulq %r8, %r10
; AVX-NEXT: addq %r14, %r10
; AVX-NEXT: addq %rdx, %r10
; AVX-NEXT: addq %r9, %r11
; AVX-NEXT: adcq %rbx, %r10
Expand Down Expand Up @@ -3851,8 +3851,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; AVX512F-NEXT: movq %r15, %rax
; AVX512F-NEXT: mulq %r12
; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: addq %rbx, %rdx
; AVX512F-NEXT: imulq %rsi, %r12
; AVX512F-NEXT: addq %rbx, %r12
; AVX512F-NEXT: addq %rdx, %r12
; AVX512F-NEXT: movq %rsi, %rbx
; AVX512F-NEXT: sarq $63, %rbx
Expand All @@ -3861,8 +3861,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; AVX512F-NEXT: movq %rbx, %rax
; AVX512F-NEXT: mulq %r10
; AVX512F-NEXT: movq %rax, %r14
; AVX512F-NEXT: addq %r13, %rdx
; AVX512F-NEXT: imulq %r10, %rbx
; AVX512F-NEXT: addq %r13, %rbx
; AVX512F-NEXT: addq %rdx, %rbx
; AVX512F-NEXT: addq %rcx, %r14
; AVX512F-NEXT: adcq %r12, %rbx
Expand Down Expand Up @@ -3905,8 +3905,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; AVX512F-NEXT: movq %r8, %rax
; AVX512F-NEXT: mulq %rsi
; AVX512F-NEXT: movq %rax, %r10
; AVX512F-NEXT: addq %r11, %rdx
; AVX512F-NEXT: imulq %rbp, %rsi
; AVX512F-NEXT: addq %r11, %rsi
; AVX512F-NEXT: addq %rdx, %rsi
; AVX512F-NEXT: movq %rbp, %r11
; AVX512F-NEXT: sarq $63, %r11
Expand All @@ -3915,8 +3915,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; AVX512F-NEXT: movq %r11, %rax
; AVX512F-NEXT: mulq %rdi
; AVX512F-NEXT: movq %rax, %rbx
; AVX512F-NEXT: addq %r14, %rdx
; AVX512F-NEXT: imulq %rdi, %r11
; AVX512F-NEXT: addq %r14, %r11
; AVX512F-NEXT: addq %rdx, %r11
; AVX512F-NEXT: addq %r10, %rbx
; AVX512F-NEXT: adcq %rsi, %r11
Expand Down Expand Up @@ -3987,8 +3987,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; AVX512BW-NEXT: movq %r15, %rax
; AVX512BW-NEXT: mulq %r12
; AVX512BW-NEXT: movq %rax, %rcx
; AVX512BW-NEXT: addq %rbx, %rdx
; AVX512BW-NEXT: imulq %rsi, %r12
; AVX512BW-NEXT: addq %rbx, %r12
; AVX512BW-NEXT: addq %rdx, %r12
; AVX512BW-NEXT: movq %rsi, %rbx
; AVX512BW-NEXT: sarq $63, %rbx
Expand All @@ -3997,8 +3997,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; AVX512BW-NEXT: movq %rbx, %rax
; AVX512BW-NEXT: mulq %r10
; AVX512BW-NEXT: movq %rax, %r14
; AVX512BW-NEXT: addq %r13, %rdx
; AVX512BW-NEXT: imulq %r10, %rbx
; AVX512BW-NEXT: addq %r13, %rbx
; AVX512BW-NEXT: addq %rdx, %rbx
; AVX512BW-NEXT: addq %rcx, %r14
; AVX512BW-NEXT: adcq %r12, %rbx
Expand Down Expand Up @@ -4041,8 +4041,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; AVX512BW-NEXT: movq %r8, %rax
; AVX512BW-NEXT: mulq %rsi
; AVX512BW-NEXT: movq %rax, %r10
; AVX512BW-NEXT: addq %r11, %rdx
; AVX512BW-NEXT: imulq %rbp, %rsi
; AVX512BW-NEXT: addq %r11, %rsi
; AVX512BW-NEXT: addq %rdx, %rsi
; AVX512BW-NEXT: movq %rbp, %r11
; AVX512BW-NEXT: sarq $63, %r11
Expand All @@ -4051,8 +4051,8 @@ define <2 x i32> @smulo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind
; AVX512BW-NEXT: movq %r11, %rax
; AVX512BW-NEXT: mulq %rdi
; AVX512BW-NEXT: movq %rax, %rbx
; AVX512BW-NEXT: addq %r14, %rdx
; AVX512BW-NEXT: imulq %rdi, %r11
; AVX512BW-NEXT: addq %r14, %r11
; AVX512BW-NEXT: addq %rdx, %r11
; AVX512BW-NEXT: addq %r10, %rbx
; AVX512BW-NEXT: adcq %rsi, %r11
Expand Down
20 changes: 10 additions & 10 deletions llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -46,16 +46,16 @@ define void @test(<16 x i32> %a0, <16 x i32> %b0, <16 x i32> %a1, <16 x i32> %b1
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k0 # 2-byte Reload
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k1 # 2-byte Reload
; X86-NEXT: kmovw %k0, %edi
; X86-NEXT: addl %edi, %eax
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k2 # 2-byte Reload
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k3 # 2-byte Reload
; X86-NEXT: kmovw %k2, %edi
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: kmovw %k1, %ecx
; X86-NEXT: addl %edi, %ecx
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: addl %eax, %ecx
; X86-NEXT: kmovw %k1, %eax
; X86-NEXT: addl %edx, %eax
; X86-NEXT: movw %ax, (%esi)
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k0 # 2-byte Reload
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k1 # 2-byte Reload
; X86-NEXT: kmovw %k0, %edx
; X86-NEXT: addl %eax, %edx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %edi, %edx
; X86-NEXT: movw %dx, (%esi)
; X86-NEXT: leal -8(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
Expand Down Expand Up @@ -104,11 +104,11 @@ define void @test(<16 x i32> %a0, <16 x i32> %b0, <16 x i32> %a1, <16 x i32> %b1
; X64-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 # 2-byte Reload
; X64-NEXT: kmovw %k0, %edi
; X64-NEXT: kmovw %k1, %r8d
; X64-NEXT: addl %edi, %eax
; X64-NEXT: addl %ecx, %edx
; X64-NEXT: addl %r8d, %eax
; X64-NEXT: addl %esi, %eax
; X64-NEXT: addl %edx, %eax
; X64-NEXT: addl %edi, %eax
; X64-NEXT: movw %ax, (%rbx)
; X64-NEXT: leaq -8(%rbp), %rsp
; X64-NEXT: popq %rbx
Expand Down
13 changes: 6 additions & 7 deletions llvm/test/CodeGen/X86/win-smallparams.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -57,14 +57,13 @@ entry:
; WIN32: calll _manyargs

; WIN32-LABEL: _manyargs:
; WIN32: pushl %ebx
; WIN32: pushl %edi
; WIN32: pushl %esi
; WIN32-DAG: movsbl 16(%esp),
; WIN32-DAG: movswl 20(%esp),
; WIN32-DAG: movzbl 24(%esp),
; WIN32-DAG: movzwl 28(%esp),
; WIN32-DAG: movzbl 32(%esp),
; WIN32-DAG: movzwl 36(%esp),
; WIN32-DAG: movzwl 32(%esp),
; WIN32-DAG: movzbl 28(%esp),
; WIN32-DAG: movzwl 24(%esp),
; WIN32-DAG: movzbl 20(%esp),
; WIN32-DAG: movswl 16(%esp),
; WIN32-DAG: movsbl 12(%esp),
; WIN32: retl

8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/x86-cmov-converter.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -766,8 +766,8 @@ define i32 @test_cmov_memoperand_in_group(i32 %a, i32 %b, i32 %x, ptr %y.ptr) #0
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: movl %esi, %r8d
; CHECK-NEXT: .LBB9_2: # %entry
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %r8d, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: retq
;
; CHECK-FORCEALL-LABEL: test_cmov_memoperand_in_group:
Expand All @@ -781,8 +781,8 @@ define i32 @test_cmov_memoperand_in_group(i32 %a, i32 %b, i32 %x, ptr %y.ptr) #0
; CHECK-FORCEALL-NEXT: movl %edi, %eax
; CHECK-FORCEALL-NEXT: movl %esi, %r8d
; CHECK-FORCEALL-NEXT: .LBB9_2: # %entry
; CHECK-FORCEALL-NEXT: addl %edx, %eax
; CHECK-FORCEALL-NEXT: addl %r8d, %eax
; CHECK-FORCEALL-NEXT: addl %edx, %eax
; CHECK-FORCEALL-NEXT: retq
entry:
%cond = icmp ugt i32 %a, %b
Expand All @@ -808,8 +808,8 @@ define i32 @test_cmov_memoperand_in_group2(i32 %a, i32 %b, i32 %x, ptr %y.ptr) #
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: movl %esi, %r8d
; CHECK-NEXT: .LBB10_2: # %entry
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %r8d, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: retq
;
; CHECK-FORCEALL-LABEL: test_cmov_memoperand_in_group2:
Expand All @@ -823,8 +823,8 @@ define i32 @test_cmov_memoperand_in_group2(i32 %a, i32 %b, i32 %x, ptr %y.ptr) #
; CHECK-FORCEALL-NEXT: movl %edi, %eax
; CHECK-FORCEALL-NEXT: movl %esi, %r8d
; CHECK-FORCEALL-NEXT: .LBB10_2: # %entry
; CHECK-FORCEALL-NEXT: addl %edx, %eax
; CHECK-FORCEALL-NEXT: addl %r8d, %eax
; CHECK-FORCEALL-NEXT: addl %edx, %eax
; CHECK-FORCEALL-NEXT: retq
entry:
%cond = icmp ugt i32 %a, %b
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -38,8 +38,8 @@ define x86_64_sysvcc float @foo(i32 %a0, i32 %a1, float %b0) {
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: movl %edi, %edx
; CHECK-NEXT: callq bar@PLT
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: cvtsi2ss %eax, %xmm0
; CHECK-NEXT: addss %xmm1, %xmm0
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