17 changes: 8 additions & 9 deletions llvm/test/CodeGen/RISCV/codemodel-lowering.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -16,9 +16,9 @@ define i32 @lower_global(i32 %a) nounwind {
;
; RV32I-MEDIUM-LABEL: lower_global:
; RV32I-MEDIUM: # %bb.0:
; RV32I-MEDIUM-NEXT: .LBB0_1: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: .Lpcrel_hi0:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(G)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB0_1)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi0)
; RV32I-MEDIUM-NEXT: lw a0, 0(a0)
; RV32I-MEDIUM-NEXT: ret
%1 = load volatile i32, i32* @G
Expand All @@ -39,9 +39,9 @@ define void @lower_blockaddress() nounwind {
;
; RV32I-MEDIUM-LABEL: lower_blockaddress:
; RV32I-MEDIUM: # %bb.0:
; RV32I-MEDIUM-NEXT: .LBB1_1: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: .Lpcrel_hi1:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(addr)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi1)
; RV32I-MEDIUM-NEXT: li a1, 1
; RV32I-MEDIUM-NEXT: sw a1, 0(a0)
; RV32I-MEDIUM-NEXT: ret
Expand Down Expand Up @@ -79,10 +79,9 @@ define signext i32 @lower_blockaddress_displ(i32 signext %w) nounwind {
; RV32I-MEDIUM-LABEL: lower_blockaddress_displ:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: addi sp, sp, -16
; RV32I-MEDIUM-NEXT: .LBB2_4: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: .Lpcrel_hi2:
; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(.Ltmp0)
; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB2_4)
; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.Lpcrel_hi2)
; RV32I-MEDIUM-NEXT: li a2, 101
; RV32I-MEDIUM-NEXT: sw a1, 8(sp)
; RV32I-MEDIUM-NEXT: blt a0, a2, .LBB2_3
Expand Down Expand Up @@ -134,9 +133,9 @@ define float @lower_constantpool(float %a) nounwind {
;
; RV32I-MEDIUM-LABEL: lower_constantpool:
; RV32I-MEDIUM: # %bb.0:
; RV32I-MEDIUM-NEXT: .LBB3_1: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: .Lpcrel_hi3:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(.LCPI3_0)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB3_1)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi3)
; RV32I-MEDIUM-NEXT: flw ft0, 0(a0)
; RV32I-MEDIUM-NEXT: fadd.s fa0, fa0, ft0
; RV32I-MEDIUM-NEXT: ret
Expand Down
64 changes: 32 additions & 32 deletions llvm/test/CodeGen/RISCV/elf-preemption.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -18,9 +18,9 @@ define i32* @get_preemptable_var() nounwind {
;
; RV32-PIC-LABEL: get_preemptable_var:
; RV32-PIC: # %bb.0:
; RV32-PIC-NEXT: .LBB0_1: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi0:
; RV32-PIC-NEXT: auipc a0, %got_pcrel_hi(preemptable_var)
; RV32-PIC-NEXT: lw a0, %pcrel_lo(.LBB0_1)(a0)
; RV32-PIC-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi0)(a0)
; RV32-PIC-NEXT: ret
;
; RV64-STATIC-LABEL: get_preemptable_var:
Expand All @@ -31,9 +31,9 @@ define i32* @get_preemptable_var() nounwind {
;
; RV64-PIC-LABEL: get_preemptable_var:
; RV64-PIC: # %bb.0:
; RV64-PIC-NEXT: .LBB0_1: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi0:
; RV64-PIC-NEXT: auipc a0, %got_pcrel_hi(preemptable_var)
; RV64-PIC-NEXT: ld a0, %pcrel_lo(.LBB0_1)(a0)
; RV64-PIC-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi0)(a0)
; RV64-PIC-NEXT: ret
ret i32* @preemptable_var
}
Expand All @@ -48,9 +48,9 @@ define i32* @get_dsolocal_var() nounwind {
;
; RV32-PIC-LABEL: get_dsolocal_var:
; RV32-PIC: # %bb.0:
; RV32-PIC-NEXT: .LBB1_1: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi1:
; RV32-PIC-NEXT: auipc a0, %pcrel_hi(.Ldsolocal_var$local)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi1)
; RV32-PIC-NEXT: ret
;
; RV64-STATIC-LABEL: get_dsolocal_var:
Expand All @@ -61,9 +61,9 @@ define i32* @get_dsolocal_var() nounwind {
;
; RV64-PIC-LABEL: get_dsolocal_var:
; RV64-PIC: # %bb.0:
; RV64-PIC-NEXT: .LBB1_1: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi1:
; RV64-PIC-NEXT: auipc a0, %pcrel_hi(.Ldsolocal_var$local)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi1)
; RV64-PIC-NEXT: ret
ret i32* @dsolocal_var
}
Expand All @@ -78,9 +78,9 @@ define i32* @get_weak_dsolocal_var() nounwind {
;
; RV32-PIC-LABEL: get_weak_dsolocal_var:
; RV32-PIC: # %bb.0:
; RV32-PIC-NEXT: .LBB2_1: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi2:
; RV32-PIC-NEXT: auipc a0, %pcrel_hi(weak_dsolocal_var)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB2_1)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi2)
; RV32-PIC-NEXT: ret
;
; RV64-STATIC-LABEL: get_weak_dsolocal_var:
Expand All @@ -91,9 +91,9 @@ define i32* @get_weak_dsolocal_var() nounwind {
;
; RV64-PIC-LABEL: get_weak_dsolocal_var:
; RV64-PIC: # %bb.0:
; RV64-PIC-NEXT: .LBB2_1: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi2:
; RV64-PIC-NEXT: auipc a0, %pcrel_hi(weak_dsolocal_var)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB2_1)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi2)
; RV64-PIC-NEXT: ret
ret i32* @weak_dsolocal_var
}
Expand All @@ -108,9 +108,9 @@ define i32* @get_hidden_var() nounwind {
;
; RV32-PIC-LABEL: get_hidden_var:
; RV32-PIC: # %bb.0:
; RV32-PIC-NEXT: .LBB3_1: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi3:
; RV32-PIC-NEXT: auipc a0, %pcrel_hi(hidden_var)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB3_1)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi3)
; RV32-PIC-NEXT: ret
;
; RV64-STATIC-LABEL: get_hidden_var:
Expand All @@ -121,9 +121,9 @@ define i32* @get_hidden_var() nounwind {
;
; RV64-PIC-LABEL: get_hidden_var:
; RV64-PIC: # %bb.0:
; RV64-PIC-NEXT: .LBB3_1: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi3:
; RV64-PIC-NEXT: auipc a0, %pcrel_hi(hidden_var)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB3_1)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi3)
; RV64-PIC-NEXT: ret
ret i32* @hidden_var
}
Expand All @@ -138,9 +138,9 @@ define i32* @get_protected_var() nounwind {
;
; RV32-PIC-LABEL: get_protected_var:
; RV32-PIC: # %bb.0:
; RV32-PIC-NEXT: .LBB4_1: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi4:
; RV32-PIC-NEXT: auipc a0, %pcrel_hi(protected_var)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB4_1)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi4)
; RV32-PIC-NEXT: ret
;
; RV64-STATIC-LABEL: get_protected_var:
Expand All @@ -151,9 +151,9 @@ define i32* @get_protected_var() nounwind {
;
; RV64-PIC-LABEL: get_protected_var:
; RV64-PIC: # %bb.0:
; RV64-PIC-NEXT: .LBB4_1: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi4:
; RV64-PIC-NEXT: auipc a0, %pcrel_hi(protected_var)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB4_1)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi4)
; RV64-PIC-NEXT: ret
ret i32* @protected_var
}
Expand All @@ -167,9 +167,9 @@ define dso_preemptable void()* @preemptable_func() nounwind {
;
; RV32-PIC-LABEL: preemptable_func:
; RV32-PIC: # %bb.0:
; RV32-PIC-NEXT: .LBB5_1: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi5:
; RV32-PIC-NEXT: auipc a0, %got_pcrel_hi(preemptable_func)
; RV32-PIC-NEXT: lw a0, %pcrel_lo(.LBB5_1)(a0)
; RV32-PIC-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi5)(a0)
; RV32-PIC-NEXT: ret
;
; RV64-STATIC-LABEL: preemptable_func:
Expand All @@ -180,9 +180,9 @@ define dso_preemptable void()* @preemptable_func() nounwind {
;
; RV64-PIC-LABEL: preemptable_func:
; RV64-PIC: # %bb.0:
; RV64-PIC-NEXT: .LBB5_1: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi5:
; RV64-PIC-NEXT: auipc a0, %got_pcrel_hi(preemptable_func)
; RV64-PIC-NEXT: ld a0, %pcrel_lo(.LBB5_1)(a0)
; RV64-PIC-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi5)(a0)
; RV64-PIC-NEXT: ret
ret void()* bitcast(void()*()* @preemptable_func to void()*)
}
Expand All @@ -196,9 +196,9 @@ define dso_local void()* @dsolocal_func() nounwind {
;
; RV32-PIC-LABEL: dsolocal_func:
; RV32-PIC: # %bb.0:
; RV32-PIC-NEXT: .LBB6_1: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi6:
; RV32-PIC-NEXT: auipc a0, %pcrel_hi(.Ldsolocal_func$local)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB6_1)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi6)
; RV32-PIC-NEXT: ret
;
; RV64-STATIC-LABEL: dsolocal_func:
Expand All @@ -209,9 +209,9 @@ define dso_local void()* @dsolocal_func() nounwind {
;
; RV64-PIC-LABEL: dsolocal_func:
; RV64-PIC: # %bb.0:
; RV64-PIC-NEXT: .LBB6_1: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi6:
; RV64-PIC-NEXT: auipc a0, %pcrel_hi(.Ldsolocal_func$local)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB6_1)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi6)
; RV64-PIC-NEXT: ret
ret void()* bitcast(void()*()* @dsolocal_func to void()*)
}
Expand All @@ -225,9 +225,9 @@ define weak dso_local void()* @weak_dsolocal_func() nounwind {
;
; RV32-PIC-LABEL: weak_dsolocal_func:
; RV32-PIC: # %bb.0:
; RV32-PIC-NEXT: .LBB7_1: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi7:
; RV32-PIC-NEXT: auipc a0, %pcrel_hi(weak_dsolocal_func)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB7_1)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi7)
; RV32-PIC-NEXT: ret
;
; RV64-STATIC-LABEL: weak_dsolocal_func:
Expand All @@ -238,9 +238,9 @@ define weak dso_local void()* @weak_dsolocal_func() nounwind {
;
; RV64-PIC-LABEL: weak_dsolocal_func:
; RV64-PIC: # %bb.0:
; RV64-PIC-NEXT: .LBB7_1: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi7:
; RV64-PIC-NEXT: auipc a0, %pcrel_hi(weak_dsolocal_func)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB7_1)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi7)
; RV64-PIC-NEXT: ret
ret void()* bitcast(void()*()* @weak_dsolocal_func to void()*)
}
Expand Down
134 changes: 56 additions & 78 deletions llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,9 @@ define dso_local i64 @load_g_0() nounwind {
;
; RV32I-MEDIUM-LABEL: load_g_0:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .LBB0_1: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(g_0)
; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB0_1)
; RV32I-MEDIUM-NEXT: .Lpcrel_hi0:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_0)
; RV32I-MEDIUM-NEXT: addi a1, a0, %pcrel_lo(.Lpcrel_hi0)
; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
; RV32I-MEDIUM-NEXT: ret
Expand All @@ -48,10 +47,9 @@ define dso_local i64 @load_g_0() nounwind {
;
; RV64I-MEDIUM-LABEL: load_g_0:
; RV64I-MEDIUM: # %bb.0: # %entry
; RV64I-MEDIUM-NEXT: .LBB0_1: # %entry
; RV64I-MEDIUM-NEXT: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi0:
; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_0)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB0_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi0)
; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
; RV64I-MEDIUM-NEXT: ret
entry:
Expand All @@ -70,10 +68,9 @@ define dso_local i64 @load_g_1() nounwind {
;
; RV32I-MEDIUM-LABEL: load_g_1:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .LBB1_1: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(g_1)
; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB1_1)
; RV32I-MEDIUM-NEXT: .Lpcrel_hi1:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_1)
; RV32I-MEDIUM-NEXT: addi a1, a0, %pcrel_lo(.Lpcrel_hi1)
; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
; RV32I-MEDIUM-NEXT: ret
Expand All @@ -86,10 +83,9 @@ define dso_local i64 @load_g_1() nounwind {
;
; RV64I-MEDIUM-LABEL: load_g_1:
; RV64I-MEDIUM: # %bb.0: # %entry
; RV64I-MEDIUM-NEXT: .LBB1_1: # %entry
; RV64I-MEDIUM-NEXT: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi1:
; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi1)
; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
; RV64I-MEDIUM-NEXT: ret
entry:
Expand All @@ -108,10 +104,9 @@ define dso_local i64 @load_g_2() nounwind {
;
; RV32I-MEDIUM-LABEL: load_g_2:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .LBB2_1: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(g_2)
; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB2_1)
; RV32I-MEDIUM-NEXT: .Lpcrel_hi2:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_2)
; RV32I-MEDIUM-NEXT: addi a1, a0, %pcrel_lo(.Lpcrel_hi2)
; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
; RV32I-MEDIUM-NEXT: ret
Expand All @@ -124,10 +119,9 @@ define dso_local i64 @load_g_2() nounwind {
;
; RV64I-MEDIUM-LABEL: load_g_2:
; RV64I-MEDIUM: # %bb.0: # %entry
; RV64I-MEDIUM-NEXT: .LBB2_1: # %entry
; RV64I-MEDIUM-NEXT: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi2:
; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_2)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB2_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi2)
; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
; RV64I-MEDIUM-NEXT: ret
entry:
Expand All @@ -146,10 +140,9 @@ define dso_local i64 @load_g_4() nounwind {
;
; RV32I-MEDIUM-LABEL: load_g_4:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .LBB3_1: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(g_4)
; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB3_1)
; RV32I-MEDIUM-NEXT: .Lpcrel_hi3:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_4)
; RV32I-MEDIUM-NEXT: addi a1, a0, %pcrel_lo(.Lpcrel_hi3)
; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
; RV32I-MEDIUM-NEXT: ret
Expand All @@ -162,10 +155,9 @@ define dso_local i64 @load_g_4() nounwind {
;
; RV64I-MEDIUM-LABEL: load_g_4:
; RV64I-MEDIUM: # %bb.0: # %entry
; RV64I-MEDIUM-NEXT: .LBB3_1: # %entry
; RV64I-MEDIUM-NEXT: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi3:
; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_4)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB3_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi3)
; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
; RV64I-MEDIUM-NEXT: ret
entry:
Expand All @@ -183,10 +175,9 @@ define dso_local i64 @load_g_8() nounwind {
;
; RV32I-MEDIUM-LABEL: load_g_8:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .LBB4_1: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(g_8)
; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB4_1)
; RV32I-MEDIUM-NEXT: .Lpcrel_hi4:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_8)
; RV32I-MEDIUM-NEXT: addi a1, a0, %pcrel_lo(.Lpcrel_hi4)
; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
; RV32I-MEDIUM-NEXT: ret
Expand All @@ -199,10 +190,9 @@ define dso_local i64 @load_g_8() nounwind {
;
; RV64I-MEDIUM-LABEL: load_g_8:
; RV64I-MEDIUM: # %bb.0: # %entry
; RV64I-MEDIUM-NEXT: .LBB4_1: # %entry
; RV64I-MEDIUM-NEXT: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi4:
; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_8)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB4_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi4)
; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
; RV64I-MEDIUM-NEXT: ret
entry:
Expand All @@ -220,10 +210,9 @@ define dso_local i64 @load_g_16() nounwind {
;
; RV32I-MEDIUM-LABEL: load_g_16:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .LBB5_1: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(g_16)
; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB5_1)
; RV32I-MEDIUM-NEXT: .Lpcrel_hi5:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_16)
; RV32I-MEDIUM-NEXT: addi a1, a0, %pcrel_lo(.Lpcrel_hi5)
; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
; RV32I-MEDIUM-NEXT: ret
Expand All @@ -236,10 +225,9 @@ define dso_local i64 @load_g_16() nounwind {
;
; RV64I-MEDIUM-LABEL: load_g_16:
; RV64I-MEDIUM: # %bb.0: # %entry
; RV64I-MEDIUM-NEXT: .LBB5_1: # %entry
; RV64I-MEDIUM-NEXT: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi5:
; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_16)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB5_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi5)
; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
; RV64I-MEDIUM-NEXT: ret
entry:
Expand All @@ -258,10 +246,9 @@ define dso_local void @store_g_4() nounwind {
;
; RV32I-MEDIUM-LABEL: store_g_4:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .LBB6_1: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: .Lpcrel_hi6:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_4)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB6_1)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi6)
; RV32I-MEDIUM-NEXT: sw zero, 4(a0)
; RV32I-MEDIUM-NEXT: sw zero, 0(a0)
; RV32I-MEDIUM-NEXT: ret
Expand All @@ -274,10 +261,9 @@ define dso_local void @store_g_4() nounwind {
;
; RV64I-MEDIUM-LABEL: store_g_4:
; RV64I-MEDIUM: # %bb.0: # %entry
; RV64I-MEDIUM-NEXT: .LBB6_1: # %entry
; RV64I-MEDIUM-NEXT: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi6:
; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_4)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB6_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi6)
; RV64I-MEDIUM-NEXT: sd zero, 0(a0)
; RV64I-MEDIUM-NEXT: ret
entry:
Expand All @@ -295,10 +281,9 @@ define dso_local void @store_g_8() nounwind {
;
; RV32I-MEDIUM-LABEL: store_g_8:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .LBB7_1: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: .Lpcrel_hi7:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_8)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB7_1)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi7)
; RV32I-MEDIUM-NEXT: sw zero, 4(a0)
; RV32I-MEDIUM-NEXT: sw zero, 0(a0)
; RV32I-MEDIUM-NEXT: ret
Expand All @@ -311,10 +296,9 @@ define dso_local void @store_g_8() nounwind {
;
; RV64I-MEDIUM-LABEL: store_g_8:
; RV64I-MEDIUM: # %bb.0: # %entry
; RV64I-MEDIUM-NEXT: .LBB7_1: # %entry
; RV64I-MEDIUM-NEXT: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi7:
; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_8)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB7_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi7)
; RV64I-MEDIUM-NEXT: sd zero, 0(a0)
; RV64I-MEDIUM-NEXT: ret
entry:
Expand All @@ -338,10 +322,9 @@ define dso_local void @inc_g_i32() nounwind {
;
; RV32I-MEDIUM-LABEL: inc_g_i32:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .LBB8_1: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: .Lpcrel_hi8:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_4_i32)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB8_1)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi8)
; RV32I-MEDIUM-NEXT: lw a1, 0(a0)
; RV32I-MEDIUM-NEXT: addi a1, a1, 1
; RV32I-MEDIUM-NEXT: sw a1, 0(a0)
Expand All @@ -357,10 +340,9 @@ define dso_local void @inc_g_i32() nounwind {
;
; RV64I-MEDIUM-LABEL: inc_g_i32:
; RV64I-MEDIUM: # %bb.0: # %entry
; RV64I-MEDIUM-NEXT: .LBB8_1: # %entry
; RV64I-MEDIUM-NEXT: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi8:
; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_4_i32)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB8_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi8)
; RV64I-MEDIUM-NEXT: lw a1, 0(a0)
; RV64I-MEDIUM-NEXT: addiw a1, a1, 1
; RV64I-MEDIUM-NEXT: sw a1, 0(a0)
Expand Down Expand Up @@ -388,9 +370,9 @@ define dso_local i32 @load_ga() local_unnamed_addr #0 {
;
; RV32I-MEDIUM-LABEL: load_ga:
; RV32I-MEDIUM: # %bb.0:
; RV32I-MEDIUM-NEXT: .LBB9_1: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: .Lpcrel_hi9:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(ga)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB9_1)
; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi9)
; RV32I-MEDIUM-NEXT: lw a0, 4(a0)
; RV32I-MEDIUM-NEXT: ret
;
Expand All @@ -402,9 +384,9 @@ define dso_local i32 @load_ga() local_unnamed_addr #0 {
;
; RV64I-MEDIUM-LABEL: load_ga:
; RV64I-MEDIUM: # %bb.0:
; RV64I-MEDIUM-NEXT: .LBB9_1: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi9:
; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(ga)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB9_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi9)
; RV64I-MEDIUM-NEXT: lw a0, 4(a0)
; RV64I-MEDIUM-NEXT: ret
%1 = load i32, i32* getelementptr inbounds ([2 x i32], [2 x i32]* @ga, i32 0, i32 1), align 4
Expand All @@ -427,10 +409,9 @@ define dso_local i64 @load_ga_8() nounwind {
;
; RV32I-MEDIUM-LABEL: load_ga_8:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .LBB10_1: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(ga_8)
; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB10_1)
; RV32I-MEDIUM-NEXT: .Lpcrel_hi10:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(ga_8)
; RV32I-MEDIUM-NEXT: addi a1, a0, %pcrel_lo(.Lpcrel_hi10)
; RV32I-MEDIUM-NEXT: lw a0, 8(a1)
; RV32I-MEDIUM-NEXT: lw a1, 12(a1)
; RV32I-MEDIUM-NEXT: ret
Expand All @@ -443,10 +424,9 @@ define dso_local i64 @load_ga_8() nounwind {
;
; RV64I-MEDIUM-LABEL: load_ga_8:
; RV64I-MEDIUM: # %bb.0: # %entry
; RV64I-MEDIUM-NEXT: .LBB10_1: # %entry
; RV64I-MEDIUM-NEXT: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi10:
; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(ga_8)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB10_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi10)
; RV64I-MEDIUM-NEXT: ld a0, 8(a0)
; RV64I-MEDIUM-NEXT: ret
entry:
Expand All @@ -464,10 +444,9 @@ define dso_local i64 @load_ga_16() nounwind {
;
; RV32I-MEDIUM-LABEL: load_ga_16:
; RV32I-MEDIUM: # %bb.0: # %entry
; RV32I-MEDIUM-NEXT: .LBB11_1: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(ga_16)
; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB11_1)
; RV32I-MEDIUM-NEXT: .Lpcrel_hi11:
; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(ga_16)
; RV32I-MEDIUM-NEXT: addi a1, a0, %pcrel_lo(.Lpcrel_hi11)
; RV32I-MEDIUM-NEXT: lw a0, 8(a1)
; RV32I-MEDIUM-NEXT: lw a1, 12(a1)
; RV32I-MEDIUM-NEXT: ret
Expand All @@ -480,10 +459,9 @@ define dso_local i64 @load_ga_16() nounwind {
;
; RV64I-MEDIUM-LABEL: load_ga_16:
; RV64I-MEDIUM: # %bb.0: # %entry
; RV64I-MEDIUM-NEXT: .LBB11_1: # %entry
; RV64I-MEDIUM-NEXT: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi11:
; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(ga_16)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB11_1)
; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi11)
; RV64I-MEDIUM-NEXT: ld a0, 8(a0)
; RV64I-MEDIUM-NEXT: ret
entry:
Expand Down
10 changes: 4 additions & 6 deletions llvm/test/CodeGen/RISCV/jumptable.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -203,10 +203,9 @@ define void @above_threshold(i32 %in, i32* %out) nounwind {
; RV32I-MEDIUM-NEXT: bltu a2, a0, .LBB1_9
; RV32I-MEDIUM-NEXT: # %bb.1: # %entry
; RV32I-MEDIUM-NEXT: slli a0, a0, 2
; RV32I-MEDIUM-NEXT: .LBB1_10: # %entry
; RV32I-MEDIUM-NEXT: # Label of block must be emitted
; RV32I-MEDIUM-NEXT: .Lpcrel_hi0:
; RV32I-MEDIUM-NEXT: auipc a2, %pcrel_hi(.LJTI1_0)
; RV32I-MEDIUM-NEXT: addi a2, a2, %pcrel_lo(.LBB1_10)
; RV32I-MEDIUM-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)
; RV32I-MEDIUM-NEXT: add a0, a0, a2
; RV32I-MEDIUM-NEXT: lw a0, 0(a0)
; RV32I-MEDIUM-NEXT: jr a0
Expand Down Expand Up @@ -275,10 +274,9 @@ define void @above_threshold(i32 %in, i32* %out) nounwind {
; RV64I-MEDIUM-NEXT: bltu a2, a0, .LBB1_9
; RV64I-MEDIUM-NEXT: # %bb.1: # %entry
; RV64I-MEDIUM-NEXT: slli a0, a0, 3
; RV64I-MEDIUM-NEXT: .LBB1_10: # %entry
; RV64I-MEDIUM-NEXT: # Label of block must be emitted
; RV64I-MEDIUM-NEXT: .Lpcrel_hi0:
; RV64I-MEDIUM-NEXT: auipc a2, %pcrel_hi(.LJTI1_0)
; RV64I-MEDIUM-NEXT: addi a2, a2, %pcrel_lo(.LBB1_10)
; RV64I-MEDIUM-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)
; RV64I-MEDIUM-NEXT: add a0, a0, a2
; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
; RV64I-MEDIUM-NEXT: jr a0
Expand Down
48 changes: 20 additions & 28 deletions llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,10 +12,9 @@ define void @test_lla(i32 signext %n) {
; RV32I-LABEL: test_lla:
; RV32I: # %bb.0: # %entry
; RV32I-NEXT: li a1, 0
; RV32I-NEXT: .LBB0_3: # %entry
; RV32I-NEXT: # Label of block must be emitted
; RV32I-NEXT: .Lpcrel_hi0:
; RV32I-NEXT: auipc a2, %pcrel_hi(l)
; RV32I-NEXT: addi a2, a2, %pcrel_lo(.LBB0_3)
; RV32I-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)
; RV32I-NEXT: .LBB0_1: # %loop
; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
; RV32I-NEXT: lw a3, 0(a2)
Expand All @@ -27,10 +26,9 @@ define void @test_lla(i32 signext %n) {
; RV64I-LABEL: test_lla:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: li a1, 0
; RV64I-NEXT: .LBB0_3: # %entry
; RV64I-NEXT: # Label of block must be emitted
; RV64I-NEXT: .Lpcrel_hi0:
; RV64I-NEXT: auipc a2, %pcrel_hi(l)
; RV64I-NEXT: addi a2, a2, %pcrel_lo(.LBB0_3)
; RV64I-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)
; RV64I-NEXT: .LBB0_1: # %loop
; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
; RV64I-NEXT: lw a3, 0(a2)
Expand All @@ -57,10 +55,9 @@ ret:
define void @test_la(i32 signext %n) {
; RV32I-LABEL: test_la:
; RV32I: # %bb.0: # %entry
; RV32I-NEXT: .LBB1_3: # %entry
; RV32I-NEXT: # Label of block must be emitted
; RV32I-NEXT: .Lpcrel_hi1:
; RV32I-NEXT: auipc a1, %got_pcrel_hi(g)
; RV32I-NEXT: lw a1, %pcrel_lo(.LBB1_3)(a1)
; RV32I-NEXT: lw a1, %pcrel_lo(.Lpcrel_hi1)(a1)
; RV32I-NEXT: li a2, 0
; RV32I-NEXT: .LBB1_1: # %loop
; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
Expand All @@ -72,10 +69,9 @@ define void @test_la(i32 signext %n) {
;
; RV64I-LABEL: test_la:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: .LBB1_3: # %entry
; RV64I-NEXT: # Label of block must be emitted
; RV64I-NEXT: .Lpcrel_hi1:
; RV64I-NEXT: auipc a1, %got_pcrel_hi(g)
; RV64I-NEXT: ld a1, %pcrel_lo(.LBB1_3)(a1)
; RV64I-NEXT: ld a1, %pcrel_lo(.Lpcrel_hi1)(a1)
; RV64I-NEXT: li a2, 0
; RV64I-NEXT: .LBB1_1: # %loop
; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
Expand Down Expand Up @@ -103,10 +99,9 @@ ret:
define void @test_la_tls_ie(i32 signext %n) {
; RV32I-LABEL: test_la_tls_ie:
; RV32I: # %bb.0: # %entry
; RV32I-NEXT: .LBB2_3: # %entry
; RV32I-NEXT: # Label of block must be emitted
; RV32I-NEXT: auipc a2, %tls_ie_pcrel_hi(ie)
; RV32I-NEXT: lw a2, %pcrel_lo(.LBB2_3)(a2)
; RV32I-NEXT: .Lpcrel_hi2:
; RV32I-NEXT: auipc a1, %tls_ie_pcrel_hi(ie)
; RV32I-NEXT: lw a2, %pcrel_lo(.Lpcrel_hi2)(a1)
; RV32I-NEXT: li a1, 0
; RV32I-NEXT: add a2, a2, tp
; RV32I-NEXT: .LBB2_1: # %loop
Expand All @@ -119,10 +114,9 @@ define void @test_la_tls_ie(i32 signext %n) {
;
; RV64I-LABEL: test_la_tls_ie:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: .LBB2_3: # %entry
; RV64I-NEXT: # Label of block must be emitted
; RV64I-NEXT: auipc a2, %tls_ie_pcrel_hi(ie)
; RV64I-NEXT: ld a2, %pcrel_lo(.LBB2_3)(a2)
; RV64I-NEXT: .Lpcrel_hi2:
; RV64I-NEXT: auipc a1, %tls_ie_pcrel_hi(ie)
; RV64I-NEXT: ld a2, %pcrel_lo(.Lpcrel_hi2)(a1)
; RV64I-NEXT: li a1, 0
; RV64I-NEXT: add a2, a2, tp
; RV64I-NEXT: .LBB2_1: # %loop
Expand Down Expand Up @@ -158,10 +152,9 @@ define void @test_la_tls_gd(i32 signext %n) nounwind {
; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill
; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: li s2, 0
; RV32I-NEXT: .LBB3_3: # %entry
; RV32I-NEXT: # Label of block must be emitted
; RV32I-NEXT: auipc s1, %tls_gd_pcrel_hi(gd)
; RV32I-NEXT: addi s1, s1, %pcrel_lo(.LBB3_3)
; RV32I-NEXT: .Lpcrel_hi3:
; RV32I-NEXT: auipc a0, %tls_gd_pcrel_hi(gd)
; RV32I-NEXT: addi s1, a0, %pcrel_lo(.Lpcrel_hi3)
; RV32I-NEXT: .LBB3_1: # %loop
; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
; RV32I-NEXT: mv a0, s1
Expand All @@ -186,10 +179,9 @@ define void @test_la_tls_gd(i32 signext %n) nounwind {
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: li s2, 0
; RV64I-NEXT: .LBB3_3: # %entry
; RV64I-NEXT: # Label of block must be emitted
; RV64I-NEXT: auipc s1, %tls_gd_pcrel_hi(gd)
; RV64I-NEXT: addi s1, s1, %pcrel_lo(.LBB3_3)
; RV64I-NEXT: .Lpcrel_hi3:
; RV64I-NEXT: auipc a0, %tls_gd_pcrel_hi(gd)
; RV64I-NEXT: addi s1, a0, %pcrel_lo(.Lpcrel_hi3)
; RV64I-NEXT: .LBB3_1: # %loop
; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
; RV64I-NEXT: mv a0, s1
Expand Down
30 changes: 15 additions & 15 deletions llvm/test/CodeGen/RISCV/mir-target-flags.ll
View file
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
; RUN: llc -mtriple=riscv32 --code-model=small \
; RUN: -stop-after riscv-expand-pseudo %s -o %t.mir
; RUN: llc -mtriple=riscv32 -run-pass none %t.mir -o - | \
; RUN: -stop-after riscv-prera-expand-pseudo %s -o %t.mir
; RUN: llc -mtriple=riscv32 -run-pass riscv-expand-pseudo %t.mir -o - | \
; RUN: FileCheck %s -check-prefix=RV32-SMALL
;
; RUN: llc -mtriple=riscv32 --code-model=medium --relocation-model=pic \
; RUN: -stop-after riscv-expand-pseudo %s -o %t.mir
; RUN: llc -mtriple=riscv32 -run-pass none %t.mir -o - | \
; RUN: -stop-after riscv-prera-expand-pseudo %s -o %t.mir
; RUN: llc -mtriple=riscv32 -run-pass riscv-expand-pseudo %t.mir -o - | \
; RUN: FileCheck %s -check-prefix=RV32-MED

; This tests the RISC-V-specific serialization and deserialization of
Expand All @@ -24,32 +24,32 @@ define i32 @caller(i32 %a) nounwind {
; RV32-SMALL-LABEL: name: caller
; RV32-SMALL: target-flags(riscv-hi) @g_e
; RV32-SMALL-NEXT: target-flags(riscv-lo) @g_e
; RV32-SMALL: target-flags(riscv-tls-got-hi) @t_un
; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) %bb.1
; RV32-SMALL: target-flags(riscv-hi) @g_i
; RV32-SMALL-NEXT: target-flags(riscv-lo) @g_i
; RV32-SMALL: target-flags(riscv-tls-got-hi) @t_un
; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi0>
; RV32-SMALL: target-flags(riscv-tls-got-hi) @t_ld
; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) %bb.2
; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1>
; RV32-SMALL: target-flags(riscv-tls-got-hi) @t_ie
; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) %bb.3
; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi2>
; RV32-SMALL: target-flags(riscv-tprel-hi) @t_le
; RV32-SMALL-NEXT: target-flags(riscv-tprel-add) @t_le
; RV32-SMALL-NEXT: target-flags(riscv-tprel-lo) @t_le
; RV32-SMALL: target-flags(riscv-plt) @callee
;
; RV32-MED-LABEL: name: caller
; RV32-MED: target-flags(riscv-got-hi) @g_e
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) %bb.1
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi0>
; RV32-MED: target-flags(riscv-pcrel-hi) @g_i
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) %bb.2
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi1>
; RV32-MED: target-flags(riscv-tls-gd-hi) @t_un
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) %bb.3
; RV32-MED-NEXT: target-flags(riscv-plt) &__tls_get_addr
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi2>
; RV32-MED: target-flags(riscv-plt) &__tls_get_addr
; RV32-MED: target-flags(riscv-tls-gd-hi) @t_ld
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) %bb.4
; RV32-MED-NEXT: target-flags(riscv-plt) &__tls_get_addr
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi3>
; RV32-MED: target-flags(riscv-plt) &__tls_get_addr
; RV32-MED: target-flags(riscv-tls-got-hi) @t_ie
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) %bb.5
; RV32-MED-NEXT: target-flags(riscv-pcrel-lo) <mcsymbol .Lpcrel_hi4>
; RV32-MED: target-flags(riscv-tprel-hi) @t_le
; RV32-MED-NEXT: target-flags(riscv-tprel-add) @t_le
; RV32-MED-NEXT: target-flags(riscv-tprel-lo) @t_le
Expand Down
20 changes: 8 additions & 12 deletions llvm/test/CodeGen/RISCV/pic-models.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -26,10 +26,9 @@ define i32* @f1() nounwind {
;
; RV32-PIC-LABEL: f1:
; RV32-PIC: # %bb.0: # %entry
; RV32-PIC-NEXT: .LBB0_1: # %entry
; RV32-PIC-NEXT: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi0:
; RV32-PIC-NEXT: auipc a0, %got_pcrel_hi(external_var)
; RV32-PIC-NEXT: lw a0, %pcrel_lo(.LBB0_1)(a0)
; RV32-PIC-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi0)(a0)
; RV32-PIC-NEXT: ret
;
; RV64-STATIC-LABEL: f1:
Expand All @@ -40,10 +39,9 @@ define i32* @f1() nounwind {
;
; RV64-PIC-LABEL: f1:
; RV64-PIC: # %bb.0: # %entry
; RV64-PIC-NEXT: .LBB0_1: # %entry
; RV64-PIC-NEXT: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi0:
; RV64-PIC-NEXT: auipc a0, %got_pcrel_hi(external_var)
; RV64-PIC-NEXT: ld a0, %pcrel_lo(.LBB0_1)(a0)
; RV64-PIC-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi0)(a0)
; RV64-PIC-NEXT: ret
entry:
ret i32* @external_var
Expand All @@ -61,10 +59,9 @@ define i32* @f2() nounwind {
;
; RV32-PIC-LABEL: f2:
; RV32-PIC: # %bb.0: # %entry
; RV32-PIC-NEXT: .LBB1_1: # %entry
; RV32-PIC-NEXT: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi1:
; RV32-PIC-NEXT: auipc a0, %pcrel_hi(internal_var)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi1)
; RV32-PIC-NEXT: ret
;
; RV64-STATIC-LABEL: f2:
Expand All @@ -75,10 +72,9 @@ define i32* @f2() nounwind {
;
; RV64-PIC-LABEL: f2:
; RV64-PIC: # %bb.0: # %entry
; RV64-PIC-NEXT: .LBB1_1: # %entry
; RV64-PIC-NEXT: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi1:
; RV64-PIC-NEXT: auipc a0, %pcrel_hi(internal_var)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi1)
; RV64-PIC-NEXT: ret
entry:
ret i32* @internal_var
Expand Down
60 changes: 24 additions & 36 deletions llvm/test/CodeGen/RISCV/tls-models.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -23,10 +23,9 @@ define i32* @f1() nounwind {
; RV32-PIC: # %bb.0: # %entry
; RV32-PIC-NEXT: addi sp, sp, -16
; RV32-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32-PIC-NEXT: .LBB0_1: # %entry
; RV32-PIC-NEXT: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi0:
; RV32-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(unspecified)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB0_1)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi0)
; RV32-PIC-NEXT: call __tls_get_addr@plt
; RV32-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-PIC-NEXT: addi sp, sp, 16
Expand All @@ -36,30 +35,27 @@ define i32* @f1() nounwind {
; RV64-PIC: # %bb.0: # %entry
; RV64-PIC-NEXT: addi sp, sp, -16
; RV64-PIC-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64-PIC-NEXT: .LBB0_1: # %entry
; RV64-PIC-NEXT: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi0:
; RV64-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(unspecified)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB0_1)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi0)
; RV64-PIC-NEXT: call __tls_get_addr@plt
; RV64-PIC-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-PIC-NEXT: addi sp, sp, 16
; RV64-PIC-NEXT: ret
;
; RV32-NOPIC-LABEL: f1:
; RV32-NOPIC: # %bb.0: # %entry
; RV32-NOPIC-NEXT: .LBB0_1: # %entry
; RV32-NOPIC-NEXT: # Label of block must be emitted
; RV32-NOPIC-NEXT: .Lpcrel_hi0:
; RV32-NOPIC-NEXT: auipc a0, %tls_ie_pcrel_hi(unspecified)
; RV32-NOPIC-NEXT: lw a0, %pcrel_lo(.LBB0_1)(a0)
; RV32-NOPIC-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi0)(a0)
; RV32-NOPIC-NEXT: add a0, a0, tp
; RV32-NOPIC-NEXT: ret
;
; RV64-NOPIC-LABEL: f1:
; RV64-NOPIC: # %bb.0: # %entry
; RV64-NOPIC-NEXT: .LBB0_1: # %entry
; RV64-NOPIC-NEXT: # Label of block must be emitted
; RV64-NOPIC-NEXT: .Lpcrel_hi0:
; RV64-NOPIC-NEXT: auipc a0, %tls_ie_pcrel_hi(unspecified)
; RV64-NOPIC-NEXT: ld a0, %pcrel_lo(.LBB0_1)(a0)
; RV64-NOPIC-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi0)(a0)
; RV64-NOPIC-NEXT: add a0, a0, tp
; RV64-NOPIC-NEXT: ret
entry:
Expand All @@ -74,10 +70,9 @@ define i32* @f2() nounwind {
; RV32-PIC: # %bb.0: # %entry
; RV32-PIC-NEXT: addi sp, sp, -16
; RV32-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32-PIC-NEXT: .LBB1_1: # %entry
; RV32-PIC-NEXT: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi1:
; RV32-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(ld)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi1)
; RV32-PIC-NEXT: call __tls_get_addr@plt
; RV32-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-PIC-NEXT: addi sp, sp, 16
Expand All @@ -87,30 +82,27 @@ define i32* @f2() nounwind {
; RV64-PIC: # %bb.0: # %entry
; RV64-PIC-NEXT: addi sp, sp, -16
; RV64-PIC-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64-PIC-NEXT: .LBB1_1: # %entry
; RV64-PIC-NEXT: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi1:
; RV64-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(ld)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
; RV64-PIC-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi1)
; RV64-PIC-NEXT: call __tls_get_addr@plt
; RV64-PIC-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-PIC-NEXT: addi sp, sp, 16
; RV64-PIC-NEXT: ret
;
; RV32-NOPIC-LABEL: f2:
; RV32-NOPIC: # %bb.0: # %entry
; RV32-NOPIC-NEXT: .LBB1_1: # %entry
; RV32-NOPIC-NEXT: # Label of block must be emitted
; RV32-NOPIC-NEXT: .Lpcrel_hi1:
; RV32-NOPIC-NEXT: auipc a0, %tls_ie_pcrel_hi(ld)
; RV32-NOPIC-NEXT: lw a0, %pcrel_lo(.LBB1_1)(a0)
; RV32-NOPIC-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi1)(a0)
; RV32-NOPIC-NEXT: add a0, a0, tp
; RV32-NOPIC-NEXT: ret
;
; RV64-NOPIC-LABEL: f2:
; RV64-NOPIC: # %bb.0: # %entry
; RV64-NOPIC-NEXT: .LBB1_1: # %entry
; RV64-NOPIC-NEXT: # Label of block must be emitted
; RV64-NOPIC-NEXT: .Lpcrel_hi1:
; RV64-NOPIC-NEXT: auipc a0, %tls_ie_pcrel_hi(ld)
; RV64-NOPIC-NEXT: ld a0, %pcrel_lo(.LBB1_1)(a0)
; RV64-NOPIC-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi1)(a0)
; RV64-NOPIC-NEXT: add a0, a0, tp
; RV64-NOPIC-NEXT: ret
entry:
Expand All @@ -123,37 +115,33 @@ entry:
define i32* @f3() nounwind {
; RV32-PIC-LABEL: f3:
; RV32-PIC: # %bb.0: # %entry
; RV32-PIC-NEXT: .LBB2_1: # %entry
; RV32-PIC-NEXT: # Label of block must be emitted
; RV32-PIC-NEXT: .Lpcrel_hi2:
; RV32-PIC-NEXT: auipc a0, %tls_ie_pcrel_hi(ie)
; RV32-PIC-NEXT: lw a0, %pcrel_lo(.LBB2_1)(a0)
; RV32-PIC-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi2)(a0)
; RV32-PIC-NEXT: add a0, a0, tp
; RV32-PIC-NEXT: ret
;
; RV64-PIC-LABEL: f3:
; RV64-PIC: # %bb.0: # %entry
; RV64-PIC-NEXT: .LBB2_1: # %entry
; RV64-PIC-NEXT: # Label of block must be emitted
; RV64-PIC-NEXT: .Lpcrel_hi2:
; RV64-PIC-NEXT: auipc a0, %tls_ie_pcrel_hi(ie)
; RV64-PIC-NEXT: ld a0, %pcrel_lo(.LBB2_1)(a0)
; RV64-PIC-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi2)(a0)
; RV64-PIC-NEXT: add a0, a0, tp
; RV64-PIC-NEXT: ret
;
; RV32-NOPIC-LABEL: f3:
; RV32-NOPIC: # %bb.0: # %entry
; RV32-NOPIC-NEXT: .LBB2_1: # %entry
; RV32-NOPIC-NEXT: # Label of block must be emitted
; RV32-NOPIC-NEXT: .Lpcrel_hi2:
; RV32-NOPIC-NEXT: auipc a0, %tls_ie_pcrel_hi(ie)
; RV32-NOPIC-NEXT: lw a0, %pcrel_lo(.LBB2_1)(a0)
; RV32-NOPIC-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi2)(a0)
; RV32-NOPIC-NEXT: add a0, a0, tp
; RV32-NOPIC-NEXT: ret
;
; RV64-NOPIC-LABEL: f3:
; RV64-NOPIC: # %bb.0: # %entry
; RV64-NOPIC-NEXT: .LBB2_1: # %entry
; RV64-NOPIC-NEXT: # Label of block must be emitted
; RV64-NOPIC-NEXT: .Lpcrel_hi2:
; RV64-NOPIC-NEXT: auipc a0, %tls_ie_pcrel_hi(ie)
; RV64-NOPIC-NEXT: ld a0, %pcrel_lo(.LBB2_1)(a0)
; RV64-NOPIC-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi2)(a0)
; RV64-NOPIC-NEXT: add a0, a0, tp
; RV64-NOPIC-NEXT: ret
entry:
Expand Down