| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,16 @@ | ||
| // RUN: %clang_cc1 -triple x86_64-linux-gnu -fsyntax-only -verify -Wunused %s | ||
|
|
||
| __attribute__((target("sse3"))) | ||
| static int not_used_fmv() { return 1; } | ||
| __attribute__((target("avx2"))) | ||
| static int not_used_fmv() { return 2; } | ||
| __attribute__((target("default"))) | ||
| static int not_used_fmv() { return 0; } // expected-warning {{unused function 'not_used_fmv'}} | ||
|
|
||
| __attribute__((target("sse3"))) | ||
| static int definitely_used_fmv() { return 1; } | ||
| __attribute__((target("avx2"))) | ||
| static int definitely_used_fmv() { return 2; } | ||
| __attribute__((target("default"))) | ||
| static int definitely_used_fmv() { return 0; } | ||
| int definite_user() { return definitely_used_fmv(); } |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,34 @@ | ||
| ! RUN: bbc -emit-hlfir -fcuda %s -o - | FileCheck %s | ||
| ! RUN: bbc -emit-hlfir -fcuda %s -o - | fir-opt -convert-hlfir-to-fir | FileCheck %s | ||
|
|
||
| ! Test lowering of CUDA attribute on procedures. | ||
|
|
||
| attributes(host) subroutine sub_host(); end | ||
| ! CHECK: func.func @_QPsub_host() attributes {fir.cuda_attr = #fir.cuda_proc<host>} | ||
|
|
||
| attributes(device) subroutine sub_device(); end | ||
| ! CHECK: func.func @_QPsub_device() attributes {fir.cuda_attr = #fir.cuda_proc<device>} | ||
|
|
||
| attributes(host) attributes(device) subroutine sub_host_device; end | ||
| ! CHECK: func.func @_QPsub_host_device() attributes {fir.cuda_attr = #fir.cuda_proc<host_device>} | ||
|
|
||
| attributes(device) attributes(host) subroutine sub_device_host; end | ||
| ! CHECK: func.func @_QPsub_device_host() attributes {fir.cuda_attr = #fir.cuda_proc<host_device>} | ||
|
|
||
| attributes(global) subroutine sub_global(); end | ||
| ! CHECK: func.func @_QPsub_global() attributes {fir.cuda_attr = #fir.cuda_proc<global>} | ||
|
|
||
| attributes(grid_global) subroutine sub_grid_global(); end | ||
| ! CHECK: func.func @_QPsub_grid_global() attributes {fir.cuda_attr = #fir.cuda_proc<grid_global>} | ||
|
|
||
| attributes(host) integer function fct_host(); end | ||
| ! CHECK: func.func @_QPfct_host() -> i32 attributes {fir.cuda_attr = #fir.cuda_proc<host>} | ||
|
|
||
| attributes(device) integer function fct_device(); end | ||
| ! CHECK: func.func @_QPfct_device() -> i32 attributes {fir.cuda_attr = #fir.cuda_proc<device>} | ||
|
|
||
| attributes(host) attributes(device) integer function fct_host_device; end | ||
| ! CHECK: func.func @_QPfct_host_device() -> i32 attributes {fir.cuda_attr = #fir.cuda_proc<host_device>} | ||
|
|
||
| attributes(device) attributes(host) integer function fct_device_host; end | ||
| ! CHECK: func.func @_QPfct_device_host() -> i32 attributes {fir.cuda_attr = #fir.cuda_proc<host_device>} |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,20 @@ | ||
| //===-- Implementation header for frexpf128 ---------------------*- C++ -*-===// | ||
| // | ||
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
| // See https://llvm.org/LICENSE.txt for license information. | ||
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
| // | ||
| //===----------------------------------------------------------------------===// | ||
|
|
||
| #ifndef LLVM_LIBC_SRC_MATH_FREXPF128_H | ||
| #define LLVM_LIBC_SRC_MATH_FREXPF128_H | ||
|
|
||
| #include "src/__support/macros/properties/float.h" | ||
|
|
||
| namespace LIBC_NAMESPACE { | ||
|
|
||
| float128 frexpf128(float128 x, int *exp); | ||
|
|
||
| } // namespace LIBC_NAMESPACE | ||
|
|
||
| #endif // LLVM_LIBC_SRC_MATH_FREXPF128_H |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,19 @@ | ||
| //===-- Implementation of frexpf128 function ------------------------------===// | ||
| // | ||
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
| // See https://llvm.org/LICENSE.txt for license information. | ||
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
| // | ||
| //===----------------------------------------------------------------------===// | ||
|
|
||
| #include "src/math/frexpf128.h" | ||
| #include "src/__support/FPUtil/ManipulationFunctions.h" | ||
| #include "src/__support/common.h" | ||
|
|
||
| namespace LIBC_NAMESPACE { | ||
|
|
||
| LLVM_LIBC_FUNCTION(float128, frexpf128, (float128 x, int *exp)) { | ||
| return fputil::frexp(x, *exp); | ||
| } | ||
|
|
||
| } // namespace LIBC_NAMESPACE |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -10,4 +10,4 @@ | |
|
|
||
| #include "src/math/frexp.h" | ||
|
|
||
| LIST_FREXP_TESTS(double, LIBC_NAMESPACE::frexp); | ||
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,13 @@ | ||
| //===-- Unittests for frexpf128 -------------------------------------------===// | ||
| // | ||
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
| // See https://llvm.org/LICENSE.txt for license information. | ||
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
| // | ||
| //===----------------------------------------------------------------------===// | ||
|
|
||
| #include "FrexpTest.h" | ||
|
|
||
| #include "src/math/frexpf128.h" | ||
|
|
||
| LIST_FREXP_TESTS(float128, LIBC_NAMESPACE::frexpf128); |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -10,4 +10,4 @@ | |
|
|
||
| #include "src/math/frexpf.h" | ||
|
|
||
| LIST_FREXP_TESTS(float, LIBC_NAMESPACE::frexpf); | ||
| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -10,4 +10,4 @@ | |
|
|
||
| #include "src/math/frexpl.h" | ||
|
|
||
| LIST_FREXP_TESTS(long double, LIBC_NAMESPACE::frexpl); | ||
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,219 @@ | ||
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 | ||
| ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx90a < %s | FileCheck -check-prefixes=GFX90A %s | ||
| ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx940 < %s | FileCheck -check-prefixes=GFX940 %s | ||
| ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX1030 %s | ||
| ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX1100 %s | ||
|
|
||
| define amdgpu_kernel void @test_insert_extract(i32 %p, i32 %q) { | ||
| ; GFX90A-LABEL: test_insert_extract: | ||
| ; GFX90A: ; %bb.0: ; %entry | ||
| ; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 | ||
| ; GFX90A-NEXT: s_mov_b32 s2, 0 | ||
| ; GFX90A-NEXT: s_and_b64 vcc, exec, -1 | ||
| ; GFX90A-NEXT: s_mov_b32 s3, 0 | ||
| ; GFX90A-NEXT: s_mov_b32 s4, 0 | ||
| ; GFX90A-NEXT: s_mov_b32 s5, 0 | ||
| ; GFX90A-NEXT: s_mov_b32 s6, 0 | ||
| ; GFX90A-NEXT: .LBB0_1: ; %for.body | ||
| ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 | ||
| ; GFX90A-NEXT: s_waitcnt lgkmcnt(0) | ||
| ; GFX90A-NEXT: s_cmp_eq_u32 s1, 1 | ||
| ; GFX90A-NEXT: s_cselect_b64 s[8:9], -1, 0 | ||
| ; GFX90A-NEXT: s_and_b64 s[8:9], s[8:9], exec | ||
| ; GFX90A-NEXT: s_cselect_b32 s7, s4, s3 | ||
| ; GFX90A-NEXT: s_cmp_eq_u32 s1, 2 | ||
| ; GFX90A-NEXT: s_cselect_b64 s[8:9], -1, 0 | ||
| ; GFX90A-NEXT: s_and_b64 s[8:9], s[8:9], exec | ||
| ; GFX90A-NEXT: s_cselect_b32 s7, s5, s7 | ||
| ; GFX90A-NEXT: s_cmp_eq_u32 s1, 3 | ||
| ; GFX90A-NEXT: s_cselect_b64 s[8:9], -1, 0 | ||
| ; GFX90A-NEXT: s_and_b64 s[8:9], s[8:9], exec | ||
| ; GFX90A-NEXT: s_cselect_b32 s7, s6, s7 | ||
| ; GFX90A-NEXT: s_or_b32 s7, s7, s0 | ||
| ; GFX90A-NEXT: s_cmp_eq_u32 s1, 1 | ||
| ; GFX90A-NEXT: s_cselect_b64 s[8:9], -1, 0 | ||
| ; GFX90A-NEXT: s_and_b64 s[10:11], s[8:9], exec | ||
| ; GFX90A-NEXT: s_cselect_b32 s4, s7, s4 | ||
| ; GFX90A-NEXT: s_cmp_eq_u32 s1, 3 | ||
| ; GFX90A-NEXT: s_cselect_b64 s[10:11], -1, 0 | ||
| ; GFX90A-NEXT: s_and_b64 s[12:13], s[10:11], exec | ||
| ; GFX90A-NEXT: s_cselect_b32 s6, s7, s6 | ||
| ; GFX90A-NEXT: s_cmp_eq_u32 s1, 2 | ||
| ; GFX90A-NEXT: s_cselect_b64 s[12:13], -1, 0 | ||
| ; GFX90A-NEXT: s_and_b64 s[14:15], s[12:13], exec | ||
| ; GFX90A-NEXT: s_cselect_b32 s5, s7, s5 | ||
| ; GFX90A-NEXT: s_cmp_eq_u32 s1, 0 | ||
| ; GFX90A-NEXT: s_cselect_b32 s3, s7, s3 | ||
| ; GFX90A-NEXT: s_or_b64 s[8:9], s[12:13], s[8:9] | ||
| ; GFX90A-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9] | ||
| ; GFX90A-NEXT: s_and_b64 s[8:9], s[8:9], exec | ||
| ; GFX90A-NEXT: s_cselect_b32 s2, 0, s2 | ||
| ; GFX90A-NEXT: s_mov_b64 vcc, vcc | ||
| ; GFX90A-NEXT: s_cbranch_vccnz .LBB0_1 | ||
| ; GFX90A-NEXT: ; %bb.2: ; %DummyReturnBlock | ||
| ; GFX90A-NEXT: s_endpgm | ||
| ; | ||
| ; GFX940-LABEL: test_insert_extract: | ||
| ; GFX940: ; %bb.0: ; %entry | ||
| ; GFX940-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0 | ||
| ; GFX940-NEXT: s_mov_b32 s2, 0 | ||
| ; GFX940-NEXT: s_and_b64 vcc, exec, -1 | ||
| ; GFX940-NEXT: s_mov_b32 s3, 0 | ||
| ; GFX940-NEXT: s_mov_b32 s4, 0 | ||
| ; GFX940-NEXT: s_mov_b32 s5, 0 | ||
| ; GFX940-NEXT: s_mov_b32 s6, 0 | ||
| ; GFX940-NEXT: .LBB0_1: ; %for.body | ||
| ; GFX940-NEXT: ; =>This Inner Loop Header: Depth=1 | ||
| ; GFX940-NEXT: s_waitcnt lgkmcnt(0) | ||
| ; GFX940-NEXT: s_cmp_eq_u32 s1, 1 | ||
| ; GFX940-NEXT: s_cselect_b64 s[8:9], -1, 0 | ||
| ; GFX940-NEXT: s_and_b64 s[8:9], s[8:9], exec | ||
| ; GFX940-NEXT: s_cselect_b32 s7, s4, s3 | ||
| ; GFX940-NEXT: s_cmp_eq_u32 s1, 2 | ||
| ; GFX940-NEXT: s_cselect_b64 s[8:9], -1, 0 | ||
| ; GFX940-NEXT: s_and_b64 s[8:9], s[8:9], exec | ||
| ; GFX940-NEXT: s_cselect_b32 s7, s5, s7 | ||
| ; GFX940-NEXT: s_cmp_eq_u32 s1, 3 | ||
| ; GFX940-NEXT: s_cselect_b64 s[8:9], -1, 0 | ||
| ; GFX940-NEXT: s_and_b64 s[8:9], s[8:9], exec | ||
| ; GFX940-NEXT: s_cselect_b32 s7, s6, s7 | ||
| ; GFX940-NEXT: s_or_b32 s7, s7, s0 | ||
| ; GFX940-NEXT: s_cmp_eq_u32 s1, 1 | ||
| ; GFX940-NEXT: s_cselect_b64 s[8:9], -1, 0 | ||
| ; GFX940-NEXT: s_and_b64 s[10:11], s[8:9], exec | ||
| ; GFX940-NEXT: s_cselect_b32 s4, s7, s4 | ||
| ; GFX940-NEXT: s_cmp_eq_u32 s1, 3 | ||
| ; GFX940-NEXT: s_cselect_b64 s[10:11], -1, 0 | ||
| ; GFX940-NEXT: s_and_b64 s[12:13], s[10:11], exec | ||
| ; GFX940-NEXT: s_cselect_b32 s6, s7, s6 | ||
| ; GFX940-NEXT: s_cmp_eq_u32 s1, 2 | ||
| ; GFX940-NEXT: s_cselect_b64 s[12:13], -1, 0 | ||
| ; GFX940-NEXT: s_and_b64 s[14:15], s[12:13], exec | ||
| ; GFX940-NEXT: s_cselect_b32 s5, s7, s5 | ||
| ; GFX940-NEXT: s_cmp_eq_u32 s1, 0 | ||
| ; GFX940-NEXT: s_cselect_b32 s3, s7, s3 | ||
| ; GFX940-NEXT: s_or_b64 s[8:9], s[12:13], s[8:9] | ||
| ; GFX940-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9] | ||
| ; GFX940-NEXT: s_and_b64 s[8:9], s[8:9], exec | ||
| ; GFX940-NEXT: s_cselect_b32 s2, 0, s2 | ||
| ; GFX940-NEXT: s_mov_b64 vcc, vcc | ||
| ; GFX940-NEXT: s_cbranch_vccnz .LBB0_1 | ||
| ; GFX940-NEXT: ; %bb.2: ; %DummyReturnBlock | ||
| ; GFX940-NEXT: s_endpgm | ||
| ; | ||
| ; GFX1030-LABEL: test_insert_extract: | ||
| ; GFX1030: ; %bb.0: ; %entry | ||
| ; GFX1030-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 | ||
| ; GFX1030-NEXT: s_mov_b32 s2, 0 | ||
| ; GFX1030-NEXT: s_mov_b32 s3, 0 | ||
| ; GFX1030-NEXT: s_mov_b32 s4, 0 | ||
| ; GFX1030-NEXT: s_mov_b32 s5, 0 | ||
| ; GFX1030-NEXT: s_mov_b32 s6, 0 | ||
| ; GFX1030-NEXT: s_mov_b32 vcc_lo, exec_lo | ||
| ; GFX1030-NEXT: .p2align 6 | ||
| ; GFX1030-NEXT: .LBB0_1: ; %for.body | ||
| ; GFX1030-NEXT: ; =>This Inner Loop Header: Depth=1 | ||
| ; GFX1030-NEXT: s_waitcnt lgkmcnt(0) | ||
| ; GFX1030-NEXT: s_cmp_eq_u32 s1, 1 | ||
| ; GFX1030-NEXT: s_cselect_b32 s7, -1, 0 | ||
| ; GFX1030-NEXT: s_and_b32 s7, s7, exec_lo | ||
| ; GFX1030-NEXT: s_cselect_b32 s7, s4, s3 | ||
| ; GFX1030-NEXT: s_cmp_eq_u32 s1, 2 | ||
| ; GFX1030-NEXT: s_cselect_b32 s8, -1, 0 | ||
| ; GFX1030-NEXT: s_and_b32 s8, s8, exec_lo | ||
| ; GFX1030-NEXT: s_cselect_b32 s7, s5, s7 | ||
| ; GFX1030-NEXT: s_cmp_eq_u32 s1, 3 | ||
| ; GFX1030-NEXT: s_cselect_b32 s8, -1, 0 | ||
| ; GFX1030-NEXT: s_and_b32 s8, s8, exec_lo | ||
| ; GFX1030-NEXT: s_cselect_b32 s7, s6, s7 | ||
| ; GFX1030-NEXT: s_or_b32 s7, s7, s0 | ||
| ; GFX1030-NEXT: s_cmp_eq_u32 s1, 1 | ||
| ; GFX1030-NEXT: s_cselect_b32 s8, -1, 0 | ||
| ; GFX1030-NEXT: s_and_b32 s9, s8, exec_lo | ||
| ; GFX1030-NEXT: s_cselect_b32 s4, s7, s4 | ||
| ; GFX1030-NEXT: s_cmp_eq_u32 s1, 3 | ||
| ; GFX1030-NEXT: s_cselect_b32 s9, -1, 0 | ||
| ; GFX1030-NEXT: s_and_b32 s10, s9, exec_lo | ||
| ; GFX1030-NEXT: s_cselect_b32 s6, s7, s6 | ||
| ; GFX1030-NEXT: s_cmp_eq_u32 s1, 2 | ||
| ; GFX1030-NEXT: s_cselect_b32 s10, -1, 0 | ||
| ; GFX1030-NEXT: s_and_b32 s11, s10, exec_lo | ||
| ; GFX1030-NEXT: s_cselect_b32 s5, s7, s5 | ||
| ; GFX1030-NEXT: s_cmp_eq_u32 s1, 0 | ||
| ; GFX1030-NEXT: s_cselect_b32 s3, s7, s3 | ||
| ; GFX1030-NEXT: s_or_b32 s7, s10, s8 | ||
| ; GFX1030-NEXT: s_or_b32 s7, s9, s7 | ||
| ; GFX1030-NEXT: s_and_b32 s7, s7, exec_lo | ||
| ; GFX1030-NEXT: s_cselect_b32 s2, 0, s2 | ||
| ; GFX1030-NEXT: s_cbranch_vccnz .LBB0_1 | ||
| ; GFX1030-NEXT: ; %bb.2: ; %DummyReturnBlock | ||
| ; GFX1030-NEXT: s_endpgm | ||
| ; | ||
| ; GFX1100-LABEL: test_insert_extract: | ||
| ; GFX1100: ; %bb.0: ; %entry | ||
| ; GFX1100-NEXT: s_load_b64 s[0:1], s[0:1], 0x0 | ||
| ; GFX1100-NEXT: s_mov_b32 s2, 0 | ||
| ; GFX1100-NEXT: s_mov_b32 s3, 0 | ||
| ; GFX1100-NEXT: s_mov_b32 s4, 0 | ||
| ; GFX1100-NEXT: s_mov_b32 s5, 0 | ||
| ; GFX1100-NEXT: s_mov_b32 s6, 0 | ||
| ; GFX1100-NEXT: s_mov_b32 vcc_lo, exec_lo | ||
| ; GFX1100-NEXT: .p2align 6 | ||
| ; GFX1100-NEXT: .LBB0_1: ; %for.body | ||
| ; GFX1100-NEXT: ; =>This Inner Loop Header: Depth=1 | ||
| ; GFX1100-NEXT: s_waitcnt lgkmcnt(0) | ||
| ; GFX1100-NEXT: s_cmp_eq_u32 s1, 1 | ||
| ; GFX1100-NEXT: s_cselect_b32 s7, -1, 0 | ||
| ; GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) | ||
| ; GFX1100-NEXT: s_and_b32 s7, s7, exec_lo | ||
| ; GFX1100-NEXT: s_cselect_b32 s7, s4, s3 | ||
| ; GFX1100-NEXT: s_cmp_eq_u32 s1, 2 | ||
| ; GFX1100-NEXT: s_cselect_b32 s8, -1, 0 | ||
| ; GFX1100-NEXT: s_and_b32 s8, s8, exec_lo | ||
| ; GFX1100-NEXT: s_cselect_b32 s7, s5, s7 | ||
| ; GFX1100-NEXT: s_cmp_eq_u32 s1, 3 | ||
| ; GFX1100-NEXT: s_cselect_b32 s8, -1, 0 | ||
| ; GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) | ||
| ; GFX1100-NEXT: s_and_b32 s8, s8, exec_lo | ||
| ; GFX1100-NEXT: s_cselect_b32 s7, s6, s7 | ||
| ; GFX1100-NEXT: s_or_b32 s7, s7, s0 | ||
| ; GFX1100-NEXT: s_cmp_eq_u32 s1, 1 | ||
| ; GFX1100-NEXT: s_cselect_b32 s8, -1, 0 | ||
| ; GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) | ||
| ; GFX1100-NEXT: s_and_b32 s9, s8, exec_lo | ||
| ; GFX1100-NEXT: s_cselect_b32 s4, s7, s4 | ||
| ; GFX1100-NEXT: s_cmp_eq_u32 s1, 3 | ||
| ; GFX1100-NEXT: s_cselect_b32 s9, -1, 0 | ||
| ; GFX1100-NEXT: s_and_b32 s10, s9, exec_lo | ||
| ; GFX1100-NEXT: s_cselect_b32 s6, s7, s6 | ||
| ; GFX1100-NEXT: s_cmp_eq_u32 s1, 2 | ||
| ; GFX1100-NEXT: s_cselect_b32 s10, -1, 0 | ||
| ; GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) | ||
| ; GFX1100-NEXT: s_and_b32 s11, s10, exec_lo | ||
| ; GFX1100-NEXT: s_cselect_b32 s5, s7, s5 | ||
| ; GFX1100-NEXT: s_cmp_eq_u32 s1, 0 | ||
| ; GFX1100-NEXT: s_cselect_b32 s3, s7, s3 | ||
| ; GFX1100-NEXT: s_or_b32 s7, s10, s8 | ||
| ; GFX1100-NEXT: s_or_b32 s7, s9, s7 | ||
| ; GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | ||
| ; GFX1100-NEXT: s_and_b32 s7, s7, exec_lo | ||
| ; GFX1100-NEXT: s_cselect_b32 s2, 0, s2 | ||
| ; GFX1100-NEXT: s_cbranch_vccnz .LBB0_1 | ||
| ; GFX1100-NEXT: ; %bb.2: ; %DummyReturnBlock | ||
| ; GFX1100-NEXT: s_endpgm | ||
| entry: | ||
| %init = insertelement <4 x i32> zeroinitializer, i32 0, i64 0 | ||
| br label %for.body | ||
|
|
||
| for.body: ; preds = %for.body, %entry | ||
| %x1 = phi <4 x i32> [ %init, %entry ], [ %i4, %for.body ] | ||
| %x2 = phi <4 x i32> [ zeroinitializer, %entry ], [ %i2, %for.body ] | ||
| %idxprom = zext i32 %q to i64 | ||
| %e1 = extractelement <4 x i32> %x2, i64 %idxprom | ||
| %add = or i32 %e1, %p | ||
| %i2 = insertelement <4 x i32> %x2, i32 %add, i64 %idxprom | ||
| %e3 = extractelement <4 x i32> %x1, i64 %idxprom | ||
| %i4 = insertelement <4 x i32> %x1, i32 %e3, i64 0 | ||
| br label %for.body | ||
| } | ||
|
|
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,68 @@ | ||
| ; REQUIRES: aarch64-registered-target | ||
|
|
||
| ; RUN: opt -passes=lowertypetests %s -o %t.o | ||
| ; RUN: llvm-dis %t.o -o - | FileCheck %s --check-prefix=CHECK-foobar | ||
| ; CHECK-foobar: {{llvm.global.annotations = .*[foo|bar], .*[foo|bar],}} | ||
| ; RUN: llvm-dis %t.o -o - | FileCheck %s --check-prefix=CHECK-cfi | ||
| ; CHECK-cfi-NOT: {{llvm.global.annotations = .*cfi.*}} | ||
|
|
||
| target triple = "aarch64-none-linux-gnu" | ||
|
|
||
| @.src = private unnamed_addr constant [7 x i8] c"test.c\00", align 1 | ||
| @.str = private unnamed_addr constant [30 x i8] c"annotation_string_literal_bar\00", section "llvm.metadata" | ||
| @.str.1 = private unnamed_addr constant [7 x i8] c"test.c\00", section "llvm.metadata" | ||
| @.str.2 = private unnamed_addr constant [30 x i8] c"annotation_string_literal_foo\00", section "llvm.metadata" | ||
| @llvm.global.annotations = appending global [2 x { ptr, ptr, ptr, i32, ptr }] [{ ptr, ptr, ptr, i32, ptr } { ptr @bar, ptr @.str, ptr @.str.1, i32 2, ptr null }, { ptr, ptr, ptr, i32, ptr } { ptr @foo, ptr @.str.2, ptr @.str.1, i32 1, ptr null }], section "llvm.metadata" | ||
|
|
||
| define i32 @bar(i32 noundef %0) #0 !type !8 !type !9 { | ||
| %2 = alloca i32, align 4 | ||
| store i32 %0, ptr %2, align 4 | ||
| %3 = load i32, ptr %2, align 4 | ||
| %4 = call i32 @foo(i32 noundef %3) | ||
| ret i32 %4 | ||
| } | ||
|
|
||
| declare !type !8 !type !9 i32 @foo(i32 noundef) #1 | ||
|
|
||
| define i32 @test(i32 noundef %0) #0 !type !8 !type !9 { | ||
| %2 = alloca i32, align 4 | ||
| %3 = alloca ptr, align 8 | ||
| store i32 %0, ptr %2, align 4 | ||
| %4 = load i32, ptr %2, align 4 | ||
| %5 = icmp sgt i32 %4, 0 | ||
| %6 = zext i1 %5 to i64 | ||
| %7 = select i1 %5, ptr @foo, ptr @bar | ||
| store ptr %7, ptr %3, align 8 | ||
| %8 = load ptr, ptr %3, align 8 | ||
| %9 = call i1 @llvm.type.test(ptr %8, metadata !"_ZTSFiiE"), !nosanitize !10 | ||
| br i1 %9, label %11, label %10, !nosanitize !10 | ||
|
|
||
| 10: | ||
| call void @llvm.ubsantrap(i8 2) #4, !nosanitize !10 | ||
| unreachable, !nosanitize !10 | ||
|
|
||
| 11: | ||
| %12 = load i32, ptr %2, align 4 | ||
| %13 = call i32 %8(i32 noundef %12) | ||
| ret i32 %13 | ||
| } | ||
|
|
||
| declare i1 @llvm.type.test(ptr, metadata) | ||
| declare void @llvm.ubsantrap(i8 immarg) | ||
|
|
||
| attributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="non-leaf" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+fp-armv8,+neon,+v8a,-fmv" } | ||
| attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+fp-armv8,+neon,+v8a,-fmv" } | ||
| attributes #4 = { noreturn nounwind } | ||
|
|
||
| !llvm.module.flags = !{!0, !1, !2, !3, !4, !5, !6} | ||
|
|
||
| !0 = !{i32 1, !"wchar_size", i32 4} | ||
| !1 = !{i32 4, !"CFI Canonical Jump Tables", i32 0} | ||
| !2 = !{i32 8, !"PIC Level", i32 2} | ||
| !3 = !{i32 7, !"uwtable", i32 2} | ||
| !4 = !{i32 7, !"frame-pointer", i32 1} | ||
| !5 = !{i32 1, !"ThinLTO", i32 0} | ||
| !6 = !{i32 1, !"EnableSplitLTOUnit", i32 1} | ||
| !8 = !{i64 0, !"_ZTSFiiE"} | ||
| !9 = !{i64 0, !"_ZTSFiiE.generalized"} | ||
| !10 = !{} |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,94 @@ | ||
| Test EXPORTAS in importlibs. | ||
|
|
||
| RUN: split-file %s %t.dir && cd %t.dir | ||
| RUN: llvm-lib -machine:amd64 -def:test.def -out:test.lib | ||
|
|
||
| RUN: llvm-nm --print-armap test.lib | FileCheck --check-prefix=ARMAP %s | ||
|
|
||
| ARMAP: Archive map | ||
| ARMAP-NEXT: __IMPORT_DESCRIPTOR_test in test.dll | ||
| ARMAP-NEXT: __NULL_IMPORT_DESCRIPTOR in test.dll | ||
| ARMAP-NEXT: __imp_func in test.dll | ||
| ARMAP-NEXT: __imp_func2 in test.dll | ||
| ARMAP-NEXT: __imp_func3 in test.dll | ||
| ARMAP-NEXT: __imp_mydata in test.dll | ||
| ARMAP-NEXT: func in test.dll | ||
| ARMAP-NEXT: func2 in test.dll | ||
| ARMAP-NEXT: func3 in test.dll | ||
| ARMAP-NEXT: test_NULL_THUNK_DATA in test.dll | ||
|
|
||
| RUN: llvm-readobj test.lib | FileCheck --check-prefix=READOBJ %s | ||
|
|
||
| READOBJ: File: test.lib(test.dll) | ||
| READOBJ-NEXT: Format: COFF-x86-64 | ||
| READOBJ-NEXT: Arch: x86_64 | ||
| READOBJ-NEXT: AddressSize: 64bit | ||
| READOBJ-EMPTY: | ||
| READOBJ-NEXT: File: test.lib(test.dll) | ||
| READOBJ-NEXT: Format: COFF-x86-64 | ||
| READOBJ-NEXT: Arch: x86_64 | ||
| READOBJ-NEXT: AddressSize: 64bit | ||
| READOBJ-EMPTY: | ||
| READOBJ-NEXT: File: test.lib(test.dll) | ||
| READOBJ-NEXT: Format: COFF-x86-64 | ||
| READOBJ-NEXT: Arch: x86_64 | ||
| READOBJ-NEXT: AddressSize: 64bit | ||
| READOBJ-EMPTY: | ||
| READOBJ-NEXT: File: test.dll | ||
| READOBJ-NEXT: Format: COFF-import-file-x86-64 | ||
| READOBJ-NEXT: Type: code | ||
| READOBJ-NEXT: Name type: export as | ||
| READOBJ-NEXT: Export name: expfunc | ||
| READOBJ-NEXT: Symbol: __imp_func | ||
| READOBJ-NEXT: Symbol: func | ||
| READOBJ-EMPTY: | ||
| READOBJ-NEXT: File: test.dll | ||
| READOBJ-NEXT: Format: COFF-import-file-x86-64 | ||
| READOBJ-NEXT: Type: data | ||
| READOBJ-NEXT: Name type: export as | ||
| READOBJ-NEXT: Export name: expdata | ||
| READOBJ-NEXT: Symbol: __imp_mydata | ||
| READOBJ-EMPTY: | ||
| READOBJ-NEXT: File: test.dll | ||
| READOBJ-NEXT: Format: COFF-import-file-x86-64 | ||
| READOBJ-NEXT: Type: code | ||
| READOBJ-NEXT: Name type: export as | ||
| READOBJ-NEXT: Export name: expfunc2 | ||
| READOBJ-NEXT: Symbol: __imp_func2 | ||
| READOBJ-NEXT: Symbol: func2 | ||
| READOBJ-EMPTY: | ||
| READOBJ-NEXT: File: test.dll | ||
| READOBJ-NEXT: Format: COFF-import-file-x86-64 | ||
| READOBJ-NEXT: Type: code | ||
| READOBJ-NEXT: Name type: export as | ||
| READOBJ-NEXT: Export name: expfunc3 | ||
| READOBJ-NEXT: Symbol: __imp_func3 | ||
| READOBJ-NEXT: Symbol: func3 | ||
|
|
||
|
|
||
| EXPORTAS must be at the end of entry declaration. | ||
| RUN: not llvm-lib -machine:amd64 -def:test2.def -out:test2.lib 2>&1 \ | ||
| RUN: | FileCheck --check-prefix=ERROR %s | ||
| RUN: not llvm-lib -machine:amd64 -def:test3.def -out:test3.lib 2>&1 \ | ||
| RUN: | FileCheck --check-prefix=ERROR %s | ||
| ERROR: Invalid data was encountered while parsing the file | ||
|
|
||
|
|
||
| #--- test.def | ||
| LIBRARY test.dll | ||
| EXPORTS | ||
| func EXPORTAS expfunc | ||
| mydata DATA EXPORTAS expdata | ||
| func2 = myfunc2 EXPORTAS expfunc2 | ||
| func3 = otherdll.otherfunc3 EXPORTAS expfunc3 | ||
|
|
||
| #--- test2.def | ||
| LIBRARY test.dll | ||
| EXPORTS | ||
| func EXPORTAS expfunc | ||
| mydata EXPORTAS expdata DATA | ||
|
|
||
| #--- test3.def | ||
| LIBRARY test.dll | ||
| EXPORTS | ||
| mydata EXPORTAS |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -43,4 +43,4 @@ Sections: | |
| Size: 32 | ||
|
|
||
| # CHECK: 00000000 00000020 D a_data_symbol | ||
| # CHECK: 00000001 0000000d T a_func | ||
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,9 +1,9 @@ | ||
| RUN: llvm-objdump -t %p/Inputs/trivial.obj.wasm | FileCheck %s | ||
|
|
||
| CHECK: SYMBOL TABLE: | ||
| CHECK-NEXT: 00000001 g F CODE 00000018 main | ||
| CHECK-NEXT: 00000000 l O DATA 0000000d .L.str | ||
| CHECK-NEXT: 00000000 F *UND* 00000000 puts | ||
| CHECK-NEXT: 00000019 l F CODE 0000000b .LSomeOtherFunction_bitcast | ||
| CHECK-NEXT: 00000000 F *UND* 00000000 SomeOtherFunction | ||
| CHECK-NEXT: 00000010 g O DATA 00000004 var |