4 changes: 4 additions & 0 deletions llvm/test/CodeGen/MIR/AArch64/machine-dead-copy.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@
# CHECK: bb.0:
# CHECK-NOT: %w20 = COPY
name: copyprop1
allVRegsAllocated: true
body: |
bb.0:
liveins: %w0, %w1
Expand All @@ -28,6 +29,7 @@ body: |
# CHECK: bb.0:
# CHECK: %w20 = COPY
name: copyprop2
allVRegsAllocated: true
body: |
bb.0:
liveins: %w0, %w1
Expand All @@ -42,6 +44,7 @@ body: |
# CHECK: bb.0:
# CHECK-NOT: COPY
name: copyprop3
allVRegsAllocated: true
body: |
bb.0:
liveins: %w0, %w1
Expand All @@ -56,6 +59,7 @@ body: |
# CHECK: bb.0:
# CHECK-NOT: COPY
name: copyprop4
allVRegsAllocated: true
body: |
bb.0:
liveins: %w0, %w1
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1 change: 1 addition & 0 deletions llvm/test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -92,6 +92,7 @@ name: f
alignment: 1
exposesReturnsTwice: false
hasInlineAsm: false
allVRegsAllocated: true
isSSA: false
tracksRegLiveness: true
tracksSubRegLiveness: false
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12 changes: 12 additions & 0 deletions llvm/test/CodeGen/X86/machine-copy-prop.mir
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Expand Up @@ -25,6 +25,7 @@
# CHECK-NOT: COPY
# CHECK-NEXT: NOOP implicit %rax, implicit %rdi
name: copyprop_remove_kill0
allVRegsAllocated: true
body: |
bb.0:
%rax = COPY %rdi
Expand All @@ -42,6 +43,7 @@ body: |
# CHECK-NOT: COPY
# CHECK-NEXT: NOOP implicit %rax, implicit %rdi
name: copyprop_remove_kill1
allVRegsAllocated: true
body: |
bb.0:
%rax = COPY %rdi
Expand All @@ -59,6 +61,7 @@ body: |
# CHECK-NOT: COPY
# CHECK-NEXT: NOOP implicit %rax, implicit %rdi
name: copyprop_remove_kill2
allVRegsAllocated: true
body: |
bb.0:
%ax = COPY %di
Expand All @@ -76,6 +79,7 @@ body: |
# CHECK-NOT: COPY
# CHECK-NEXT: NOOP implicit %rax, implicit %rdi
name: copyprop0
allVRegsAllocated: true
body: |
bb.0:
%rax = COPY %rdi
Expand All @@ -92,6 +96,7 @@ body: |
# CHECK-NEXT: NOOP implicit %rax
# CHECK-NEXT: NOOP implicit %rax, implicit %rdi
name: copyprop1
allVRegsAllocated: true
body: |
bb.0:
%rax = COPY %rdi
Expand All @@ -108,6 +113,7 @@ body: |
# CHECK-NOT: %rax = COPY %rdi
# CHECK-NEXT: NOOP implicit %rax, implicit %rdi
name: copyprop2
allVRegsAllocated: true
body: |
bb.0:
%rax = COPY %rdi
Expand All @@ -126,6 +132,7 @@ body: |
# CHECK-NEXT: %rbp = COPY %rax
# CHECK-NEXT: NOOP implicit %rax, implicit %rbp
name: nocopyprop0
allVRegsAllocated: true
body: |
bb.0:
%rax = COPY %rbp
Expand All @@ -143,6 +150,7 @@ body: |
# CHECK-NEXT: %rax = COPY %rbp
# CHECK-NEXT: NOOP implicit %rax, implicit %rbp
name: nocopyprop1
allVRegsAllocated: true
body: |
bb.0:
%rbp = COPY %rax
Expand All @@ -160,6 +168,7 @@ body: |
# CHECK-NEXT: %rax = COPY %rbp
# CHECK-NEXT: NOOP implicit %rax, implicit %rbp
name: nocopyprop2
allVRegsAllocated: true
body: |
bb.0:
%rax = COPY %rbp
Expand All @@ -177,6 +186,7 @@ body: |
# CHECK-NEXT: %rbp = COPY %rax
# CHECK-NEXT: NOOP implicit %rax, implicit %rbp
name: nocopyprop3
allVRegsAllocated: true
body: |
bb.0:
%rbp = COPY %rax
Expand All @@ -193,6 +203,7 @@ body: |
# CHECK-NEXT: %rax = COPY %rip
# CHECK-NEXT: NOOP implicit %rax
name: nocopyprop4
allVRegsAllocated: true
body: |
bb.0:
%rax = COPY %rip
Expand All @@ -208,6 +219,7 @@ body: |
# CHECK-NEXT: %rip = COPY %rax
# CHECK-NEXT: %rip = COPY %rax
name: nocopyprop5
allVRegsAllocated: true
body: |
bb.0:
%rip = COPY %rax
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1 change: 1 addition & 0 deletions llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -159,6 +159,7 @@ name: add
alignment: 4
exposesReturnsTwice: false
hasInlineAsm: false
allVRegsAllocated: true
isSSA: false
tracksRegLiveness: true
tracksSubRegLiveness: false
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1 change: 1 addition & 0 deletions llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -161,6 +161,7 @@ name: main
alignment: 4
exposesReturnsTwice: false
hasInlineAsm: false
allVRegsAllocated: true
isSSA: false
tracksRegLiveness: true
tracksSubRegLiveness: false
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