78 changes: 72 additions & 6 deletions llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
View file
Original file line number Diff line number Diff line change
@@ -1,12 +1,18 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+m,+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA
; RUN: llc -mtriple=riscv64 -mattr=+m,+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA
; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA
; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA
; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfh,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA
; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfh,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA

; RUN: llc -mtriple=riscv32 -mattr=+m,+v -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA
; RUN: llc -mtriple=riscv64 -mattr=+m,+v -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA
; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfhmin,+zvfbfmin -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA
; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfhmin,+zvfbfmin -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA
; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfh,+zvfbfmin -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA
; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfh,+zvfbfmin -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA

; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+v -riscv-v-vector-bits-max=128 -verify-machineinstrs | FileCheck -check-prefixes=CHECK,VLS %s
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,v -riscv-v-vector-bits-max=128 -verify-machineinstrs | FileCheck -check-prefixes=CHECK,VLS %s
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+v,+zvfhmin,+zvfbfmin -riscv-v-vector-bits-max=128 -verify-machineinstrs | FileCheck -check-prefixes=CHECK,VLS %s
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+v,+zvfhmin,+zvfbfmin -riscv-v-vector-bits-max=128 -verify-machineinstrs | FileCheck -check-prefixes=CHECK,VLS %s
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+v,+zvfh,+zvfbfmin -riscv-v-vector-bits-max=128 -verify-machineinstrs | FileCheck -check-prefixes=CHECK,VLS %s
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+v,+zvfh,+zvfbfmin -riscv-v-vector-bits-max=128 -verify-machineinstrs | FileCheck -check-prefixes=CHECK,VLS %s

define void @extract_v2i8_v4i8_0(ptr %x, ptr %y) {
; CHECK-LABEL: extract_v2i8_v4i8_0:
Expand Down Expand Up @@ -866,6 +872,66 @@ define <1 x i64> @extract_v1i64_v2i64_1(<2 x i64> %x) {
ret <1 x i64> %v
}

define void @extract_v2bf16_v4bf16_0(ptr %x, ptr %y) {
; CHECK-LABEL: extract_v2bf16_v4bf16_0:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
; CHECK-NEXT: vle16.v v8, (a0)
; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
; CHECK-NEXT: vse16.v v8, (a1)
; CHECK-NEXT: ret
%a = load <4 x bfloat>, ptr %x
%c = call <2 x bfloat> @llvm.vector.extract.v2bf16.v4bf16(<4 x bfloat> %a, i64 0)
store <2 x bfloat> %c, ptr %y
ret void
}

define void @extract_v2bf16_v4bf16_2(ptr %x, ptr %y) {
; CHECK-LABEL: extract_v2bf16_v4bf16_2:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
; CHECK-NEXT: vle16.v v8, (a0)
; CHECK-NEXT: vsetivli zero, 2, e16, mf2, ta, ma
; CHECK-NEXT: vslidedown.vi v8, v8, 2
; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
; CHECK-NEXT: vse16.v v8, (a1)
; CHECK-NEXT: ret
%a = load <4 x bfloat>, ptr %x
%c = call <2 x bfloat> @llvm.vector.extract.v2bf16.v4bf16(<4 x bfloat> %a, i64 2)
store <2 x bfloat> %c, ptr %y
ret void
}

define void @extract_v2f16_v4f16_0(ptr %x, ptr %y) {
; CHECK-LABEL: extract_v2f16_v4f16_0:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
; CHECK-NEXT: vle16.v v8, (a0)
; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
; CHECK-NEXT: vse16.v v8, (a1)
; CHECK-NEXT: ret
%a = load <4 x half>, ptr %x
%c = call <2 x half> @llvm.vector.extract.v2f16.v4f16(<4 x half> %a, i64 0)
store <2 x half> %c, ptr %y
ret void
}

define void @extract_v2f16_v4f16_2(ptr %x, ptr %y) {
; CHECK-LABEL: extract_v2f16_v4f16_2:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
; CHECK-NEXT: vle16.v v8, (a0)
; CHECK-NEXT: vsetivli zero, 2, e16, mf2, ta, ma
; CHECK-NEXT: vslidedown.vi v8, v8, 2
; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
; CHECK-NEXT: vse16.v v8, (a1)
; CHECK-NEXT: ret
%a = load <4 x half>, ptr %x
%c = call <2 x half> @llvm.vector.extract.v2f16.v4f16(<4 x half> %a, i64 2)
store <2 x half> %c, ptr %y
ret void
}

declare <2 x i1> @llvm.vector.extract.v2i1.v64i1(<64 x i1> %vec, i64 %idx)
declare <8 x i1> @llvm.vector.extract.v8i1.v64i1(<64 x i1> %vec, i64 %idx)

Expand Down
102 changes: 96 additions & 6 deletions llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
View file
Original file line number Diff line number Diff line change
@@ -1,12 +1,18 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+m,+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA,RV32VLA
; RUN: llc -mtriple=riscv64 -mattr=+m,+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA,RV64VLA
; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA,RV32VLA
; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfhmin,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA,RV64VLA
; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfh,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA,RV32VLA
; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfh,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA,RV64VLA

; RUN: llc -mtriple=riscv32 -mattr=+m,+v -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA,RV32VLA
; RUN: llc -mtriple=riscv64 -mattr=+m,+v -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA,RV64VLA
; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfhmin,+zvfbfmin -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA,RV32VLA
; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfhmin,+zvfbfmin -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA,RV64VLA
; RUN: llc -mtriple=riscv32 -mattr=+m,+v,+zvfh,+zvfbfmin -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA,RV32VLA
; RUN: llc -mtriple=riscv64 -mattr=+m,+v,+zvfh,+zvfbfmin -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,VLA,RV64VLA

; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+v -riscv-v-vector-bits-max=128 -verify-machineinstrs | FileCheck -check-prefixes=CHECK,VLS,RV32VLS %s
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,v -riscv-v-vector-bits-max=128 -verify-machineinstrs | FileCheck -check-prefixes=CHECK,VLS,RV64VLS %s
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+v,+zvfhmin,+zvfbfmin -riscv-v-vector-bits-max=128 -verify-machineinstrs | FileCheck -check-prefixes=CHECK,VLS,RV32VLS %s
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+v,+zvfhmin,+zvfbfmin -riscv-v-vector-bits-max=128 -verify-machineinstrs | FileCheck -check-prefixes=CHECK,VLS,RV64VLS %s
; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+v,+zvfh,+zvfbfmin -riscv-v-vector-bits-max=128 -verify-machineinstrs | FileCheck -check-prefixes=CHECK,VLS,RV32VLS %s
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+v,+zvfh,+zvfbfmin -riscv-v-vector-bits-max=128 -verify-machineinstrs | FileCheck -check-prefixes=CHECK,VLS,RV64VLS %s

define <vscale x 8 x i32> @insert_nxv8i32_v2i32_0(<vscale x 8 x i32> %vec, ptr %svp) {
; VLA-LABEL: insert_nxv8i32_v2i32_0:
Expand Down Expand Up @@ -860,6 +866,90 @@ define void @insert_v2i64_nxv16i64_hi(ptr %psv, ptr %out) {
ret void
}

define <vscale x 8 x bfloat> @insert_nxv8bf16_v2bf16_0(<vscale x 8 x bfloat> %vec, ptr %svp) {
; VLA-LABEL: insert_nxv8bf16_v2bf16_0:
; VLA: # %bb.0:
; VLA-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
; VLA-NEXT: vle16.v v10, (a0)
; VLA-NEXT: vsetivli zero, 2, e16, m2, tu, ma
; VLA-NEXT: vmv.v.v v8, v10
; VLA-NEXT: ret
;
; VLS-LABEL: insert_nxv8bf16_v2bf16_0:
; VLS: # %bb.0:
; VLS-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
; VLS-NEXT: vle16.v v10, (a0)
; VLS-NEXT: vsetivli zero, 2, e16, m1, tu, ma
; VLS-NEXT: vmv.v.v v8, v10
; VLS-NEXT: ret
%sv = load <2 x bfloat>, ptr %svp
%v = call <vscale x 8 x bfloat> @llvm.vector.insert.v2bf16.nxv8bf16(<vscale x 8 x bfloat> %vec, <2 x bfloat> %sv, i64 0)
ret <vscale x 8 x bfloat> %v
}

define <vscale x 8 x bfloat> @insert_nxv8bf16_v2bf16_2(<vscale x 8 x bfloat> %vec, ptr %svp) {
; VLA-LABEL: insert_nxv8bf16_v2bf16_2:
; VLA: # %bb.0:
; VLA-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
; VLA-NEXT: vle16.v v10, (a0)
; VLA-NEXT: vsetivli zero, 4, e16, m2, tu, ma
; VLA-NEXT: vslideup.vi v8, v10, 2
; VLA-NEXT: ret
;
; VLS-LABEL: insert_nxv8bf16_v2bf16_2:
; VLS: # %bb.0:
; VLS-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
; VLS-NEXT: vle16.v v10, (a0)
; VLS-NEXT: vsetivli zero, 4, e16, m1, tu, ma
; VLS-NEXT: vslideup.vi v8, v10, 2
; VLS-NEXT: ret
%sv = load <2 x bfloat>, ptr %svp
%v = call <vscale x 8 x bfloat> @llvm.vector.insert.v2bf16.nxv8bf16(<vscale x 8 x bfloat> %vec, <2 x bfloat> %sv, i64 2)
ret <vscale x 8 x bfloat> %v
}

define <vscale x 8 x half> @insert_nxv8f16_v2f16_0(<vscale x 8 x half> %vec, ptr %svp) {
; VLA-LABEL: insert_nxv8f16_v2f16_0:
; VLA: # %bb.0:
; VLA-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
; VLA-NEXT: vle16.v v10, (a0)
; VLA-NEXT: vsetivli zero, 2, e16, m2, tu, ma
; VLA-NEXT: vmv.v.v v8, v10
; VLA-NEXT: ret
;
; VLS-LABEL: insert_nxv8f16_v2f16_0:
; VLS: # %bb.0:
; VLS-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
; VLS-NEXT: vle16.v v10, (a0)
; VLS-NEXT: vsetivli zero, 2, e16, m1, tu, ma
; VLS-NEXT: vmv.v.v v8, v10
; VLS-NEXT: ret
%sv = load <2 x half>, ptr %svp
%v = call <vscale x 8 x half> @llvm.vector.insert.v2f16.nxv8f16(<vscale x 8 x half> %vec, <2 x half> %sv, i64 0)
ret <vscale x 8 x half> %v
}

define <vscale x 8 x half> @insert_nxv8f16_v2f16_2(<vscale x 8 x half> %vec, ptr %svp) {
; VLA-LABEL: insert_nxv8f16_v2f16_2:
; VLA: # %bb.0:
; VLA-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
; VLA-NEXT: vle16.v v10, (a0)
; VLA-NEXT: vsetivli zero, 4, e16, m2, tu, ma
; VLA-NEXT: vslideup.vi v8, v10, 2
; VLA-NEXT: ret
;
; VLS-LABEL: insert_nxv8f16_v2f16_2:
; VLS: # %bb.0:
; VLS-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
; VLS-NEXT: vle16.v v10, (a0)
; VLS-NEXT: vsetivli zero, 4, e16, m1, tu, ma
; VLS-NEXT: vslideup.vi v8, v10, 2
; VLS-NEXT: ret
%sv = load <2 x half>, ptr %svp
%v = call <vscale x 8 x half> @llvm.vector.insert.v2f16.nxv8f16(<vscale x 8 x half> %vec, <2 x half> %sv, i64 2)
ret <vscale x 8 x half> %v
}

declare <8 x i1> @llvm.vector.insert.v4i1.v8i1(<8 x i1>, <4 x i1>, i64)
declare <32 x i1> @llvm.vector.insert.v8i1.v32i1(<32 x i1>, <8 x i1>, i64)

Expand Down
2 changes: 2 additions & 0 deletions llvm/test/ExecutionEngine/OrcLazy/lit.local.cfg
View file
Original file line number Diff line number Diff line change
@@ -1,6 +1,8 @@
import sys

if config.root.host_arch not in [
"aarch64",
"arm64",
"i386",
"x86",
"x86_64",
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/ExecutionEngine/OrcLazy/minimal-throw-catch.ll
View file
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
; REQUIRES: system-darwin
; REQUIRES: x86_64-apple
; RUN: lli -jit-kind=orc-lazy %s
;
; Basic correctness testing for eh-frame processing and registration.
Expand Down
71 changes: 45 additions & 26 deletions llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@
#include "llvm-c/Orc.h"
#include "gtest/gtest.h"

#include "llvm/Analysis/TargetLibraryInfo.h"
#include "llvm/ExecutionEngine/Orc/CompileUtils.h"
#include "llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h"
#include "llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.h"
Expand All @@ -32,6 +33,20 @@ using namespace llvm::orc;
DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ObjectLayer, LLVMOrcObjectLayerRef)
DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ThreadSafeModule, LLVMOrcThreadSafeModuleRef)

// A class that sets strings for extension attributes by querying
// TargetLibraryInfo.
struct TargetI32ArgExtensions {
std::string Ret;
std::string Arg;
TargetI32ArgExtensions(std::string TargetTriple, bool Signed = true) {
Triple T(TargetTriple);
if (auto AK = TargetLibraryInfo::getExtAttrForI32Return(T, Signed))
Ret = Attribute::getNameFromAttrKind(AK).str() + " ";
if (auto AK = TargetLibraryInfo::getExtAttrForI32Param(T, Signed))
Arg = Attribute::getNameFromAttrKind(AK).str() + " ";
}
};

// OrcCAPITestBase contains several helper methods and pointers for unit tests
// written for the LLVM-C API. It provides the following helpers:
//
Expand Down Expand Up @@ -90,6 +105,31 @@ class OrcCAPITestBase : public testing::Test {

LLVMOrcDisposeLLJIT(J);
TargetSupported = true;

// Create test functions in text format, with the proper extension
// attributes.
if (SumExample.empty()) {
TargetI32ArgExtensions ArgExt(TargetTriple);
std::ostringstream OS;
OS << "define " << ArgExt.Ret << "i32 "
<< "@sum(i32 " << ArgExt.Arg << "%x, i32 " << ArgExt.Arg << "%y)"
<< R"( {
entry:
%r = add nsw i32 %x, %y
ret i32 %r
}
)";
SumExample = OS.str();

OS << R"(
!llvm.module.flags = !{!0}
!llvm.dbg.cu = !{!1}
!0 = !{i32 2, !"Debug Info Version", i32 3}
!1 = distinct !DICompileUnit(language: DW_LANG_C99, file: !2, emissionKind: FullDebug)
!2 = !DIFile(filename: "sum.c", directory: "/tmp")
)";
SumDebugExample = OS.str();
}
}

void SetUp() override {
Expand Down Expand Up @@ -199,37 +239,16 @@ class OrcCAPITestBase : public testing::Test {

static std::string TargetTriple;
static bool TargetSupported;

static std::string SumExample;
static std::string SumDebugExample;
};

std::string OrcCAPITestBase::TargetTriple;
bool OrcCAPITestBase::TargetSupported = false;

namespace {

constexpr StringRef SumExample =
R"(
define i32 @sum(i32 %x, i32 %y) {
entry:
%r = add nsw i32 %x, %y
ret i32 %r
}
)";

constexpr StringRef SumDebugExample =
R"(
define i32 @sum(i32 %x, i32 %y) {
entry:
%r = add nsw i32 %x, %y
ret i32 %r
}
!llvm.module.flags = !{!0}
!llvm.dbg.cu = !{!1}
!0 = !{i32 2, !"Debug Info Version", i32 3}
!1 = distinct !DICompileUnit(language: DW_LANG_C99, file: !2, emissionKind: FullDebug)
!2 = !DIFile(filename: "sum.c", directory: "/tmp")
)";

} // end anonymous namespace.
std::string OrcCAPITestBase::SumExample;
std::string OrcCAPITestBase::SumDebugExample;

// Consumes the given error ref and returns the string error message.
static std::string toString(LLVMErrorRef E) {
Expand Down
31 changes: 31 additions & 0 deletions utils/bazel/llvm-project-overlay/libc/BUILD.bazel
View file
Original file line number Diff line number Diff line change
Expand Up @@ -197,6 +197,30 @@ libc_support_library(

############################ Type Proxy Header Files ###########################

libc_support_library(
name = "func_aligned_alloc",
hdrs = ["hdr/func/aligned_alloc.h"],
deps = [":hdr_stdlib_overlay"],
)

libc_support_library(
name = "func_free",
hdrs = ["hdr/func/free.h"],
deps = [":hdr_stdlib_overlay"],
)

libc_support_library(
name = "func_malloc",
hdrs = ["hdr/func/malloc.h"],
deps = [":hdr_stdlib_overlay"],
)

libc_support_library(
name = "func_realloc",
hdrs = ["hdr/func/realloc.h"],
deps = [":hdr_stdlib_overlay"],
)

libc_support_library(
name = "types_clockid_t",
hdrs = ["hdr/types/clockid_t.h"],
Expand Down Expand Up @@ -503,6 +527,9 @@ libc_support_library(
deps = [
":__support_common",
":__support_macros_properties_os",
":func_aligned_alloc",
":func_free",
":func_malloc"
],
)

Expand Down Expand Up @@ -837,6 +864,10 @@ libc_support_library(
":hdr_stdio_macros",
":hdr_stdio_overlay",
":types_off_t",
":func_aligned_alloc",
":func_free",
":func_malloc",
":func_realloc",
],
)

Expand Down
8 changes: 8 additions & 0 deletions utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
View file
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,10 @@ libc_support_library(
"//libc:__support_macros_properties_types",
"//libc:__support_osutil_io",
"//libc:__support_uint128",
"//libc:func_aligned_alloc",
"//libc:func_free",
"//libc:func_malloc",
"//libc:func_realloc",
],
)

Expand Down Expand Up @@ -61,6 +65,10 @@ libc_support_library(
"//libc:errno",
"//libc:llvm_libc_macros_stdfix_macros",
"//llvm:Support",
"//libc:func_aligned_alloc",
"//libc:func_free",
"//libc:func_malloc",
"//libc:func_realloc",
],
)

Expand Down
4 changes: 4 additions & 0 deletions utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
View file
Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,10 @@ def libc_test(name, srcs, libc_function_deps = [], copts = [], deps = [], local_
deps = [libc_internal_target(d) for d in all_function_deps] + [
"//libc/test/UnitTest:LibcUnitTest",
"//libc:__support_macros_config",
"//libc:func_aligned_alloc",
"//libc:func_free",
"//libc:func_malloc",
"//libc:func_realloc",
] + deps,
copts = copts + libc_common_copts(),
linkstatic = 1,
Expand Down