5 changes: 4 additions & 1 deletion clang/test/Headers/opencl-c-header.cl
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Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,9 @@
// RUN: %clang_cc1 -O0 -triple spir-unknown-unknown -internal-isystem ../../lib/Headers -include opencl-c.h -emit-llvm -o - %s -verify -cl-std=CL3.0 | FileCheck %s
// RUN: %clang_cc1 -O0 -triple spir-unknown-unknown -internal-isystem ../../lib/Headers -include opencl-c.h -emit-llvm -o - %s -verify -cl-std=clc++2021 | FileCheck %s

// RUN: %clang_cc1 -O0 -triple spirv32-unknown-unknown -internal-isystem ../../lib/Headers -include opencl-c.h -emit-llvm -o - %s -verify | FileCheck %s


// Test including the default header as a module.
// The module should be compiled only once and loaded from cache afterwards.
// Change the directory mode to read only to make sure no new modules are created.
Expand Down Expand Up @@ -91,7 +94,7 @@ global atomic_int z = ATOMIC_VAR_INIT(99);
// Check that extension macros are defined correctly.

// For SPIR all extensions are supported.
#if defined(__SPIR__)
#if defined(__SPIR__) || defined(__SPIRV__)

// Verify that cl_intel_planar_yuv extension is defined from OpenCL 1.2 onwards.
#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2)
Expand Down
16 changes: 15 additions & 1 deletion clang/test/Preprocessor/predefined-macros.c
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Expand Up @@ -210,7 +210,21 @@
// CHECK-SPIR64-DAG: #define __SPIR64__ 1
// CHECK-SPIR64-NOT: #define __SPIR32__ 1

// RUN: %clang_cc1 %s -E -dM -o - -x hip -triple amdgcn-amd-amdhsa \
// RUN: %clang_cc1 %s -E -dM -o - -x cl -triple spirv32-unknown-unknown \
// RUN: | FileCheck -match-full-lines %s --check-prefix=CHECK-SPIRV32
// CHECK-SPIRV32-DAG: #define __IMAGE_SUPPORT__ 1
// CHECK-SPIRV32-DAG: #define __SPIRV__ 1
// CHECK-SPIRV32-DAG: #define __SPIRV32__ 1
// CHECK-SPIRV32-NOT: #define __SPIRV64__ 1

// RUN: %clang_cc1 %s -E -dM -o - -x cl -triple spirv64-unknown-unknown \
// RUN: | FileCheck -match-full-lines %s --check-prefix=CHECK-SPIRV64
// CHECK-SPIRV64-DAG: #define __IMAGE_SUPPORT__ 1
// CHECK-SPIRV64-DAG: #define __SPIRV__ 1
// CHECK-SPIRV64-DAG: #define __SPIRV64__ 1
// CHECK-SPIRV64-NOT: #define __SPIRV32__ 1

// RUN: %clang_cc1 %s -E -dM -o - -x hip -triple amdgcn-amd-amdhsa \
// RUN: | FileCheck -match-full-lines %s --check-prefix=CHECK-HIP
// CHECK-HIP-NOT: #define __CUDA_ARCH__
// CHECK-HIP: #define __HIPCC__ 1
Expand Down
7 changes: 7 additions & 0 deletions llvm/include/llvm/ADT/Triple.h
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Expand Up @@ -93,6 +93,8 @@ class Triple {
hsail64, // AMD HSAIL with 64-bit pointers
spir, // SPIR: standard portable IR for OpenCL 32-bit version
spir64, // SPIR: standard portable IR for OpenCL 64-bit version
spirv32, // SPIR-V with 32-bit pointers
spirv64, // SPIR-V with 64-bit pointers
kalimba, // Kalimba: generic kalimba
shave, // SHAVE: Movidius vector VLIW processors
lanai, // Lanai: Lanai 32-bit
Expand Down Expand Up @@ -699,6 +701,11 @@ class Triple {
return getArch() == Triple::spir || getArch() == Triple::spir64;
}

/// Tests whether the target is SPIR-V (32/64-bit).
bool isSPIRV() const {
return getArch() == Triple::spirv32 || getArch() == Triple::spirv64;
}

/// Tests whether the target is NVPTX (32- or 64-bit).
bool isNVPTX() const {
return getArch() == Triple::nvptx || getArch() == Triple::nvptx64;
Expand Down
25 changes: 25 additions & 0 deletions llvm/lib/Support/Triple.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -67,6 +67,8 @@ StringRef Triple::getArchTypeName(ArchType Kind) {
case sparcv9: return "sparcv9";
case spir64: return "spir64";
case spir: return "spir";
case spirv32: return "spirv32";
case spirv64: return "spirv64";
case systemz: return "s390x";
case tce: return "tce";
case tcele: return "tcele";
Expand Down Expand Up @@ -147,6 +149,10 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) {

case spir:
case spir64: return "spir";

case spirv32:
case spirv64: return "spirv";

case kalimba: return "kalimba";
case lanai: return "lanai";
case shave: return "shave";
Expand Down Expand Up @@ -323,6 +329,8 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
.Case("hsail64", hsail64)
.Case("spir", spir)
.Case("spir64", spir64)
.Case("spirv32", spirv32)
.Case("spirv64", spirv64)
.Case("kalimba", kalimba)
.Case("lanai", lanai)
.Case("shave", shave)
Expand Down Expand Up @@ -456,6 +464,8 @@ static Triple::ArchType parseArch(StringRef ArchName) {
.Case("hsail64", Triple::hsail64)
.Case("spir", Triple::spir)
.Case("spir64", Triple::spir64)
.Case("spirv32", Triple::spirv32)
.Case("spirv64", Triple::spirv64)
.StartsWith("kalimba", Triple::kalimba)
.Case("lanai", Triple::lanai)
.Case("renderscript32", Triple::renderscript32)
Expand Down Expand Up @@ -759,6 +769,11 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
case Triple::wasm32:
case Triple::wasm64:
return Triple::Wasm;

case Triple::spirv32:
case Triple::spirv64:
// TODO: In future this will be Triple::SPIRV.
return Triple::UnknownObjectFormat;
}
llvm_unreachable("unknown architecture");
}
Expand Down Expand Up @@ -1328,6 +1343,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
case llvm::Triple::sparc:
case llvm::Triple::sparcel:
case llvm::Triple::spir:
case llvm::Triple::spirv32:
case llvm::Triple::tce:
case llvm::Triple::tcele:
case llvm::Triple::thumb:
Expand All @@ -1354,6 +1370,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
case llvm::Triple::riscv64:
case llvm::Triple::sparcv9:
case llvm::Triple::spir64:
case llvm::Triple::spirv64:
case llvm::Triple::systemz:
case llvm::Triple::ve:
case llvm::Triple::wasm64:
Expand Down Expand Up @@ -1413,6 +1430,7 @@ Triple Triple::get32BitArchVariant() const {
case Triple::sparc:
case Triple::sparcel:
case Triple::spir:
case Triple::spirv32:
case Triple::tce:
case Triple::tcele:
case Triple::thumb:
Expand Down Expand Up @@ -1441,6 +1459,7 @@ Triple Triple::get32BitArchVariant() const {
case Triple::riscv64: T.setArch(Triple::riscv32); break;
case Triple::sparcv9: T.setArch(Triple::sparc); break;
case Triple::spir64: T.setArch(Triple::spir); break;
case Triple::spirv64: T.setArch(Triple::spirv32); break;
case Triple::wasm64: T.setArch(Triple::wasm32); break;
case Triple::x86_64: T.setArch(Triple::x86); break;
}
Expand Down Expand Up @@ -1485,6 +1504,7 @@ Triple Triple::get64BitArchVariant() const {
case Triple::riscv64:
case Triple::sparcv9:
case Triple::spir64:
case Triple::spirv64:
case Triple::systemz:
case Triple::ve:
case Triple::wasm64:
Expand All @@ -1511,6 +1531,7 @@ Triple Triple::get64BitArchVariant() const {
case Triple::riscv32: T.setArch(Triple::riscv64); break;
case Triple::sparc: T.setArch(Triple::sparcv9); break;
case Triple::spir: T.setArch(Triple::spir64); break;
case Triple::spirv32: T.setArch(Triple::spirv64); break;
case Triple::thumb: T.setArch(Triple::aarch64); break;
case Triple::thumbeb: T.setArch(Triple::aarch64_be); break;
case Triple::wasm32: T.setArch(Triple::wasm64); break;
Expand Down Expand Up @@ -1547,6 +1568,8 @@ Triple Triple::getBigEndianArchVariant() const {
case Triple::shave:
case Triple::spir64:
case Triple::spir:
case Triple::spirv32:
case Triple::spirv64:
case Triple::wasm32:
case Triple::wasm64:
case Triple::x86:
Expand Down Expand Up @@ -1650,6 +1673,8 @@ bool Triple::isLittleEndian() const {
case Triple::sparcel:
case Triple::spir64:
case Triple::spir:
case Triple::spirv32:
case Triple::spirv64:
case Triple::tcele:
case Triple::thumb:
case Triple::ve:
Expand Down
28 changes: 28 additions & 0 deletions llvm/unittests/ADT/TripleTest.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -224,6 +224,16 @@ TEST(TripleTest, ParsedIDs) {
EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
EXPECT_EQ(Triple::UnknownOS, T.getOS());

T = Triple("spirv32-unknown-unknown");
EXPECT_EQ(Triple::spirv32, T.getArch());
EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
EXPECT_EQ(Triple::UnknownOS, T.getOS());

T = Triple("spirv64-unknown-unknown");
EXPECT_EQ(Triple::spirv64, T.getArch());
EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
EXPECT_EQ(Triple::UnknownOS, T.getOS());

T = Triple("x86_64-unknown-ananas");
EXPECT_EQ(Triple::x86_64, T.getArch());
EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
Expand Down Expand Up @@ -865,6 +875,16 @@ TEST(TripleTest, BitWidthPredicates) {
EXPECT_FALSE(T.isArch32Bit());
EXPECT_TRUE(T.isArch64Bit());

T.setArch(Triple::spirv32);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_TRUE(T.isArch32Bit());
EXPECT_FALSE(T.isArch64Bit());

T.setArch(Triple::spirv64);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_FALSE(T.isArch32Bit());
EXPECT_TRUE(T.isArch64Bit());

T.setArch(Triple::sparc);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_TRUE(T.isArch32Bit());
Expand Down Expand Up @@ -1032,6 +1052,14 @@ TEST(TripleTest, BitWidthArchVariants) {
EXPECT_EQ(Triple::spir, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::spir64, T.get64BitArchVariant().getArch());

T.setArch(Triple::spirv32);
EXPECT_EQ(Triple::spirv32, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::spirv64, T.get64BitArchVariant().getArch());

T.setArch(Triple::spirv64);
EXPECT_EQ(Triple::spirv32, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::spirv64, T.get64BitArchVariant().getArch());

T.setArch(Triple::wasm32);
EXPECT_EQ(Triple::wasm32, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::wasm64, T.get64BitArchVariant().getArch());
Expand Down