126 changes: 102 additions & 24 deletions clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c
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Expand Up @@ -10,6 +10,84 @@
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif

svint8_t test_svasrd_n_s8_z(svbool_t pg, svint8_t op1)
{
// CHECK-LABEL: test_svasrd_n_s8_z
// CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.asrd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], i32 1)
// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s8,_z,)(pg, op1, 1);
}

svint8_t test_svasrd_n_s8_z_1(svbool_t pg, svint8_t op1)
{
// CHECK-LABEL: test_svasrd_n_s8_z_1
// CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.asrd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], i32 8)
// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s8,_z,)(pg, op1, 8);
}

svint16_t test_svasrd_n_s16_z(svbool_t pg, svint16_t op1)
{
// CHECK-LABEL: test_svasrd_n_s16_z
// CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.asrd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], i32 1)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s16,_z,)(pg, op1, 1);
}

svint16_t test_svasrd_n_s16_z_1(svbool_t pg, svint16_t op1)
{
// CHECK-LABEL: test_svasrd_n_s16_z_1
// CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.asrd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s16,_z,)(pg, op1, 16);
}

svint32_t test_svasrd_n_s32_z(svbool_t pg, svint32_t op1)
{
// CHECK-LABEL: test_svasrd_n_s32_z
// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.asrd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], i32 1)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s32,_z,)(pg, op1, 1);
}

svint32_t test_svasrd_n_s32_z_1(svbool_t pg, svint32_t op1)
{
// CHECK-LABEL: test_svasrd_n_s32_z_1
// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.asrd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], i32 32)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s32,_z,)(pg, op1, 32);
}

svint64_t test_svasrd_n_s64_z(svbool_t pg, svint64_t op1)
{
// CHECK-LABEL: test_svasrd_n_s64_z
// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.asrd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], i32 1)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s64,_z,)(pg, op1, 1);
}

svint64_t test_svasrd_n_s64_z_1(svbool_t pg, svint64_t op1)
{
// CHECK-LABEL: test_svasrd_n_s64_z_1
// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.asrd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], i32 64)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s64,_z,)(pg, op1, 64);
}

svint8_t test_svasrd_n_s8_m(svbool_t pg, svint8_t op1)
{
// CHECK-LABEL: test_svasrd_n_s8_m
Expand All @@ -21,61 +99,61 @@ svint8_t test_svasrd_n_s8_m(svbool_t pg, svint8_t op1)
svint16_t test_svasrd_n_s16_m(svbool_t pg, svint16_t op1)
{
// CHECK-LABEL: test_svasrd_n_s16_m
// CHECK: %[[P0:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.asrd.nxv8i16(<vscale x 8 x i1> %[[P0]], <vscale x 8 x i16> %op1, i32 1)
// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.asrd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, i32 1)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s16,_m,)(pg, op1, 1);
}

svint32_t test_svasrd_n_s32_m(svbool_t pg, svint32_t op1)
{
// CHECK-LABEL: test_svasrd_n_s32_m
// CHECK: %[[P0:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.asrd.nxv4i32(<vscale x 4 x i1> %[[P0]], <vscale x 4 x i32> %op1, i32 1)
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.asrd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, i32 1)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s32,_m,)(pg, op1, 1);
}

svint64_t test_svasrd_n_s64_m(svbool_t pg, svint64_t op1)
{
// CHECK-LABEL: test_svasrd_n_s64_m
// CHECK: %[[P0:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.asrd.nxv2i64(<vscale x 2 x i1> %[[P0]], <vscale x 2 x i64> %op1, i32 1)
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.asrd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, i32 1)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s64,_m,)(pg, op1, 1);
}

svint8_t test_svasrd_n_s8_max_m(svbool_t pg, svint8_t op1)
svint8_t test_svasrd_n_s8_x(svbool_t pg, svint8_t op1)
{
// CHECK-LABEL: test_svasrd_n_s8_max_m
// CHECK-LABEL: test_svasrd_n_s8_x
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.asrd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, i32 8)
// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s8,_m,)(pg, op1, 8);
return SVE_ACLE_FUNC(svasrd,_n_s8,_x,)(pg, op1, 8);
}

svint16_t test_svasrd_n_s16_max_m(svbool_t pg, svint16_t op1)
svint16_t test_svasrd_n_s16_x(svbool_t pg, svint16_t op1)
{
// CHECK-LABEL: test_svasrd_n_s16_max_m
// CHECK: %[[P0:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.asrd.nxv8i16(<vscale x 8 x i1> %[[P0]], <vscale x 8 x i16> %op1, i32 16)
// CHECK-LABEL: test_svasrd_n_s16_x
// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.asrd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s16,_m,)(pg, op1, 16);
return SVE_ACLE_FUNC(svasrd,_n_s16,_x,)(pg, op1, 16);
}

svint32_t test_svasrd_n_s32_max_m(svbool_t pg, svint32_t op1)
svint32_t test_svasrd_n_s32_x(svbool_t pg, svint32_t op1)
{
// CHECK-LABEL: test_svasrd_n_s32_max_m
// CHECK: %[[P0:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.asrd.nxv4i32(<vscale x 4 x i1> %[[P0]], <vscale x 4 x i32> %op1, i32 32)
// CHECK-LABEL: test_svasrd_n_s32_x
// CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.asrd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, i32 32)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s32,_m,)(pg, op1, 32);
return SVE_ACLE_FUNC(svasrd,_n_s32,_x,)(pg, op1, 32);
}

svint64_t test_svasrd_n_s64_max_m(svbool_t pg, svint64_t op1)
svint64_t test_svasrd_n_s64_x(svbool_t pg, svint64_t op1)
{
// CHECK-LABEL: test_svasrd_n_s64_max_m
// CHECK: %[[P0:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.asrd.nxv2i64(<vscale x 2 x i1> %[[P0]], <vscale x 2 x i64> %op1, i32 64)
// CHECK-LABEL: test_svasrd_n_s64_x
// CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.asrd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, i32 64)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svasrd,_n_s64,_m,)(pg, op1, 64);
return SVE_ACLE_FUNC(svasrd,_n_s64,_x,)(pg, op1, 64);
}
41 changes: 41 additions & 0 deletions clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c
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@@ -0,0 +1,41 @@
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s

#include <arm_sve.h>

uint64_t test_svcntp_b8(svbool_t pg, svbool_t op)
{
// CHECK-LABEL: test_svcntp_b8
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntp.nxv16i1(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %op)
// CHECK: ret i64 %[[INTRINSIC]]
return svcntp_b8(pg, op);
}

uint64_t test_svcntp_b16(svbool_t pg, svbool_t op)
{
// CHECK-LABEL: test_svcntp_b16
// CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[OP:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %op)
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i1> %[[OP]])
// CHECK: ret i64 %[[INTRINSIC]]
return svcntp_b16(pg, op);
}

uint64_t test_svcntp_b32(svbool_t pg, svbool_t op)
{
// CHECK-LABEL: test_svcntp_b32
// CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[OP:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %op)
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntp.nxv4i1(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i1> %[[OP]])
// CHECK: ret i64 %[[INTRINSIC]]
return svcntp_b32(pg, op);
}

uint64_t test_svcntp_b64(svbool_t pg, svbool_t op)
{
// CHECK-LABEL: test_svcntp_b64
// CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
// CHECK-DAG: %[[OP:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %op)
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i1> %[[OP]])
// CHECK: ret i64 %[[INTRINSIC]]
return svcntp_b64(pg, op);
}
68 changes: 68 additions & 0 deletions clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c
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Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,74 @@
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif

svint32_t test_svdot_s32(svint32_t op1, svint8_t op2, svint8_t op3)
{
// CHECK-LABEL: test_svdot_s32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sdot.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svdot,_s32,,)(op1, op2, op3);
}

svint64_t test_svdot_s64(svint64_t op1, svint16_t op2, svint16_t op3)
{
// CHECK-LABEL: test_svdot_s64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sdot.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svdot,_s64,,)(op1, op2, op3);
}

svuint32_t test_svdot_u32(svuint32_t op1, svuint8_t op2, svuint8_t op3)
{
// CHECK-LABEL: test_svdot_u32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.udot.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svdot,_u32,,)(op1, op2, op3);
}

svuint64_t test_svdot_u64(svuint64_t op1, svuint16_t op2, svuint16_t op3)
{
// CHECK-LABEL: test_svdot_u64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.udot.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svdot,_u64,,)(op1, op2, op3);
}

svint32_t test_svdot_n_s32(svint32_t op1, svint8_t op2, int8_t op3)
{
// CHECK-LABEL: test_svdot_n_s32
// CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sdot.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %[[DUP]])
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svdot,_n_s32,,)(op1, op2, op3);
}

svint64_t test_svdot_n_s64(svint64_t op1, svint16_t op2, int16_t op3)
{
// CHECK-LABEL: test_svdot_n_s64
// CHECK: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sdot.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %[[DUP]])
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svdot,_n_s64,,)(op1, op2, op3);
}

svuint32_t test_svdot_n_u32(svuint32_t op1, svuint8_t op2, uint8_t op3)
{
// CHECK-LABEL: test_svdot_n_u32
// CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.udot.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %[[DUP]])
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svdot,_n_u32,,)(op1, op2, op3);
}

svuint64_t test_svdot_n_u64(svuint64_t op1, svuint16_t op2, uint16_t op3)
{
// CHECK-LABEL: test_svdot_n_u64
// CHECK: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.udot.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %[[DUP]])
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svdot,_n_u64,,)(op1, op2, op3);
}

svint32_t test_svdot_lane_s32(svint32_t op1, svint8_t op2, svint8_t op3)
{
// CHECK-LABEL: test_svdot_lane_s32
Expand Down
147 changes: 147 additions & 0 deletions clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c
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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s

#include <arm_sve.h>

#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif

svint8_t test_svqadd_s8(svint8_t op1, svint8_t op2)
{
// CHECK-LABEL: test_svqadd_s8
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqadd.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_s8,,)(op1, op2);
}

svint16_t test_svqadd_s16(svint16_t op1, svint16_t op2)
{
// CHECK-LABEL: test_svqadd_s16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqadd.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_s16,,)(op1, op2);
}

svint32_t test_svqadd_s32(svint32_t op1, svint32_t op2)
{
// CHECK-LABEL: test_svqadd_s32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqadd.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_s32,,)(op1, op2);
}

svint64_t test_svqadd_s64(svint64_t op1, svint64_t op2)
{
// CHECK-LABEL: test_svqadd_s64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqadd.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_s64,,)(op1, op2);
}

svuint8_t test_svqadd_u8(svuint8_t op1, svuint8_t op2)
{
// CHECK-LABEL: test_svqadd_u8
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqadd.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_u8,,)(op1, op2);
}

svuint16_t test_svqadd_u16(svuint16_t op1, svuint16_t op2)
{
// CHECK-LABEL: test_svqadd_u16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqadd.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_u16,,)(op1, op2);
}

svuint32_t test_svqadd_u32(svuint32_t op1, svuint32_t op2)
{
// CHECK-LABEL: test_svqadd_u32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqadd.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_u32,,)(op1, op2);
}

svuint64_t test_svqadd_u64(svuint64_t op1, svuint64_t op2)
{
// CHECK-LABEL: test_svqadd_u64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqadd.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_u64,,)(op1, op2);
}

svint8_t test_svqadd_n_s8(svint8_t op1, int8_t op2)
{
// CHECK-LABEL: test_svqadd_n_s8
// CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqadd.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_n_s8,,)(op1, op2);
}

svint16_t test_svqadd_n_s16(svint16_t op1, int16_t op2)
{
// CHECK-LABEL: test_svqadd_n_s16
// CHECK: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqadd.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_n_s16,,)(op1, op2);
}

svint32_t test_svqadd_n_s32(svint32_t op1, int32_t op2)
{
// CHECK-LABEL: test_svqadd_n_s32
// CHECK: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqadd.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_n_s32,,)(op1, op2);
}

svint64_t test_svqadd_n_s64(svint64_t op1, int64_t op2)
{
// CHECK-LABEL: test_svqadd_n_s64
// CHECK: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqadd.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_n_s64,,)(op1, op2);
}

svuint8_t test_svqadd_n_u8(svuint8_t op1, uint8_t op2)
{
// CHECK-LABEL: test_svqadd_n_u8
// CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqadd.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_n_u8,,)(op1, op2);
}

svuint16_t test_svqadd_n_u16(svuint16_t op1, uint16_t op2)
{
// CHECK-LABEL: test_svqadd_n_u16
// CHECK: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqadd.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_n_u16,,)(op1, op2);
}

svuint32_t test_svqadd_n_u32(svuint32_t op1, uint32_t op2)
{
// CHECK-LABEL: test_svqadd_n_u32
// CHECK: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqadd.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_n_u32,,)(op1, op2);
}

svuint64_t test_svqadd_n_u64(svuint64_t op1, uint64_t op2)
{
// CHECK-LABEL: test_svqadd_n_u64
// CHECK: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqadd.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqadd,_n_u64,,)(op1, op2);
}
147 changes: 147 additions & 0 deletions clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c
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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s

#include <arm_sve.h>

#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif

svint8_t test_svqsub_s8(svint8_t op1, svint8_t op2)
{
// CHECK-LABEL: test_svqsub_s8
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqsub.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_s8,,)(op1, op2);
}

svint16_t test_svqsub_s16(svint16_t op1, svint16_t op2)
{
// CHECK-LABEL: test_svqsub_s16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqsub.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_s16,,)(op1, op2);
}

svint32_t test_svqsub_s32(svint32_t op1, svint32_t op2)
{
// CHECK-LABEL: test_svqsub_s32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqsub.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_s32,,)(op1, op2);
}

svint64_t test_svqsub_s64(svint64_t op1, svint64_t op2)
{
// CHECK-LABEL: test_svqsub_s64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqsub.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_s64,,)(op1, op2);
}

svuint8_t test_svqsub_u8(svuint8_t op1, svuint8_t op2)
{
// CHECK-LABEL: test_svqsub_u8
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqsub.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_u8,,)(op1, op2);
}

svuint16_t test_svqsub_u16(svuint16_t op1, svuint16_t op2)
{
// CHECK-LABEL: test_svqsub_u16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqsub.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_u16,,)(op1, op2);
}

svuint32_t test_svqsub_u32(svuint32_t op1, svuint32_t op2)
{
// CHECK-LABEL: test_svqsub_u32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqsub.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_u32,,)(op1, op2);
}

svuint64_t test_svqsub_u64(svuint64_t op1, svuint64_t op2)
{
// CHECK-LABEL: test_svqsub_u64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqsub.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_u64,,)(op1, op2);
}

svint8_t test_svqsub_n_s8(svint8_t op1, int8_t op2)
{
// CHECK-LABEL: test_svqsub_n_s8
// CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqsub.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_n_s8,,)(op1, op2);
}

svint16_t test_svqsub_n_s16(svint16_t op1, int16_t op2)
{
// CHECK-LABEL: test_svqsub_n_s16
// CHECK: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqsub.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_n_s16,,)(op1, op2);
}

svint32_t test_svqsub_n_s32(svint32_t op1, int32_t op2)
{
// CHECK-LABEL: test_svqsub_n_s32
// CHECK: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqsub.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_n_s32,,)(op1, op2);
}

svint64_t test_svqsub_n_s64(svint64_t op1, int64_t op2)
{
// CHECK-LABEL: test_svqsub_n_s64
// CHECK: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqsub.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_n_s64,,)(op1, op2);
}

svuint8_t test_svqsub_n_u8(svuint8_t op1, uint8_t op2)
{
// CHECK-LABEL: test_svqsub_n_u8
// CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqsub.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
// CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_n_u8,,)(op1, op2);
}

svuint16_t test_svqsub_n_u16(svuint16_t op1, uint16_t op2)
{
// CHECK-LABEL: test_svqsub_n_u16
// CHECK: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqsub.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_n_u16,,)(op1, op2);
}

svuint32_t test_svqsub_n_u32(svuint32_t op1, uint32_t op2)
{
// CHECK-LABEL: test_svqsub_n_u32
// CHECK: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqsub.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_n_u32,,)(op1, op2);
}

svuint64_t test_svqsub_n_u64(svuint64_t op1, uint64_t op2)
{
// CHECK-LABEL: test_svqsub_n_u64
// CHECK: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqsub.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqsub,_n_u64,,)(op1, op2);
}
19 changes: 19 additions & 0 deletions clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c
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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s

#include <arm_sve.h>

svbool_t test_svrdffr()
{
// CHECK-LABEL: test_svrdffr
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.rdffr()
// CHECK: ret <vscale x 16 x i1> %[[INTRINSIC]]
return svrdffr();
}

svbool_t test_svrdffr_z(svbool_t pg)
{
// CHECK-LABEL: test_svrdffr_z
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.rdffr.z(<vscale x 16 x i1> %pg)
// CHECK: ret <vscale x 16 x i1> %[[INTRINSIC]]
return svrdffr_z(pg);
}
11 changes: 11 additions & 0 deletions clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c
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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s

#include <arm_sve.h>

void test_svsetffr()
{
// CHECK-LABEL: test_svsetffr
// CHECK: call void @llvm.aarch64.sve.setffr()
// CHECK: ret void
svsetffr();
}
11 changes: 11 additions & 0 deletions clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c
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// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s

#include <arm_sve.h>

void test_svwrffr(svbool_t op)
{
// CHECK-LABEL: test_svwrffr
// CHECK: call void @llvm.aarch64.sve.wrffr(<vscale x 16 x i1> %op)
// CHECK: ret void
svwrffr(op);
}
72 changes: 72 additions & 0 deletions clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_asrd.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,54 @@

#include <arm_sve.h>

svint8_t test_svasrd_n_s8_z(svbool_t pg, svint8_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 8]}}
return SVE_ACLE_FUNC(svasrd,_n_s8,_z,)(pg, op1, 0);
}

svint8_t test_svasrd_n_s8_z_1(svbool_t pg, svint8_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 8]}}
return SVE_ACLE_FUNC(svasrd,_n_s8,_z,)(pg, op1, 9);
}

svint16_t test_svasrd_n_s16_z(svbool_t pg, svint16_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svasrd,_n_s16,_z,)(pg, op1, 0);
}

svint16_t test_svasrd_n_s16_z_1(svbool_t pg, svint16_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svasrd,_n_s16,_z,)(pg, op1, 17);
}

svint32_t test_svasrd_n_s32_z(svbool_t pg, svint32_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 32]}}
return SVE_ACLE_FUNC(svasrd,_n_s32,_z,)(pg, op1, 0);
}

svint32_t test_svasrd_n_s32_z_1(svbool_t pg, svint32_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 32]}}
return SVE_ACLE_FUNC(svasrd,_n_s32,_z,)(pg, op1, 33);
}

svint64_t test_svasrd_n_s64_z(svbool_t pg, svint64_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 64]}}
return SVE_ACLE_FUNC(svasrd,_n_s64,_z,)(pg, op1, 0);
}

svint64_t test_svasrd_n_s64_z_1(svbool_t pg, svint64_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 64]}}
return SVE_ACLE_FUNC(svasrd,_n_s64,_z,)(pg, op1, 65);
}

svint8_t test_svasrd_n_s8_m(svbool_t pg, svint8_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 8]}}
Expand All @@ -33,3 +81,27 @@ svint64_t test_svasrd_n_s64_m(svbool_t pg, svint64_t op1)
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 64]}}
return SVE_ACLE_FUNC(svasrd,_n_s64,_m,)(pg, op1, 65);
}

svint8_t test_svasrd_n_s8_x(svbool_t pg, svint8_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 8]}}
return SVE_ACLE_FUNC(svasrd,_n_s8,_x,)(pg, op1, 0);
}

svint16_t test_svasrd_n_s16_x(svbool_t pg, svint16_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svasrd,_n_s16,_x,)(pg, op1, 17);
}

svint32_t test_svasrd_n_s32_x(svbool_t pg, svint32_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 32]}}
return SVE_ACLE_FUNC(svasrd,_n_s32,_x,)(pg, op1, 0);
}

svint64_t test_svasrd_n_s64_x(svbool_t pg, svint64_t op1)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 64]}}
return SVE_ACLE_FUNC(svasrd,_n_s64,_x,)(pg, op1, 65);
}
4 changes: 4 additions & 0 deletions clang/utils/TableGen/SveEmitter.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -532,6 +532,10 @@ void SVEType::applyModifier(char Mod) {
ElementBitwidth /= 2;
NumVectors = 0;
break;
case 'r':
ElementBitwidth /= 4;
NumVectors = 0;
break;
case 'K':
Signed = true;
Float = false;
Expand Down