401 changes: 401 additions & 0 deletions llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
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1 change: 1 addition & 0 deletions llvm/lib/Transforms/CMakeLists.txt
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@@ -1,5 +1,6 @@
add_subdirectory(Utils)
add_subdirectory(Instrumentation)
add_subdirectory(AggressiveInstCombine)
add_subdirectory(InstCombine)
add_subdirectory(Scalar)
add_subdirectory(IPO)
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2 changes: 1 addition & 1 deletion llvm/lib/Transforms/IPO/LLVMBuild.txt
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Expand Up @@ -20,4 +20,4 @@ type = Library
name = IPO
parent = Transforms
library_name = ipo
required_libraries = Analysis BitReader BitWriter Core InstCombine IRReader Linker Object ProfileData Scalar Support TransformUtils Vectorize Instrumentation
required_libraries = AggressiveInstCombine Analysis BitReader BitWriter Core InstCombine IRReader Linker Object ProfileData Scalar Support TransformUtils Vectorize Instrumentation
4 changes: 4 additions & 0 deletions llvm/lib/Transforms/IPO/PassManagerBuilder.cpp
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Expand Up @@ -318,6 +318,8 @@ void PassManagerBuilder::addFunctionSimplificationPasses(
MPM.add(createCorrelatedValuePropagationPass()); // Propagate conditionals
MPM.add(createCFGSimplificationPass()); // Merge & remove BBs
// Combine silly seq's
if (OptLevel > 2)
MPM.add(createAggressiveInstCombinerPass());
addInstructionCombiningPass(MPM);
if (SizeLevel == 0 && !DisableLibCallsShrinkWrap)
MPM.add(createLibCallsShrinkWrapPass());
Expand Down Expand Up @@ -765,6 +767,8 @@ void PassManagerBuilder::addLTOOptimizationPasses(legacy::PassManagerBase &PM) {
// simplification opportunities, and both can propagate functions through
// function pointers. When this happens, we often have to resolve varargs
// calls, etc, so let instcombine do this.
if (OptLevel > 2)
PM.add(createAggressiveInstCombinerPass());
addInstructionCombiningPass(PM);
addExtensionsToPM(EP_Peephole, PM);

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2 changes: 1 addition & 1 deletion llvm/lib/Transforms/LLVMBuild.txt
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Expand Up @@ -16,7 +16,7 @@
;===------------------------------------------------------------------------===;

[common]
subdirectories = Coroutines IPO InstCombine Instrumentation Scalar Utils Vectorize ObjCARC
subdirectories = AggressiveInstCombine Coroutines IPO InstCombine Instrumentation Scalar Utils Vectorize ObjCARC

[component_0]
type = Group
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2 changes: 1 addition & 1 deletion llvm/lib/Transforms/Scalar/LLVMBuild.txt
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Expand Up @@ -20,4 +20,4 @@ type = Library
name = Scalar
parent = Transforms
library_name = ScalarOpts
required_libraries = Analysis Core InstCombine Support TransformUtils
required_libraries = AggressiveInstCombine Analysis Core InstCombine Support TransformUtils
1 change: 1 addition & 0 deletions llvm/test/Other/new-pm-defaults.ll
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Expand Up @@ -126,6 +126,7 @@
; CHECK-O-NEXT: Running analysis: LazyValueAnalysis
; CHECK-O-NEXT: Running pass: CorrelatedValuePropagationPass
; CHECK-O-NEXT: Running pass: SimplifyCFGPass
; CHECK-O3-NEXT: AggressiveInstCombinePass
; CHECK-O-NEXT: Running pass: InstCombinePass
; CHECK-O1-NEXT: Running pass: LibCallsShrinkWrapPass
; CHECK-O2-NEXT: Running pass: LibCallsShrinkWrapPass
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6 changes: 4 additions & 2 deletions llvm/test/Other/new-pm-lto-defaults.ll
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Expand Up @@ -10,7 +10,8 @@
; RUN: | FileCheck %s --check-prefix=CHECK-O --check-prefix=CHECK-O2
; RUN: opt -disable-verify -debug-pass-manager \
; RUN: -passes='lto<O3>' -S %s 2>&1 \
; RUN: | FileCheck %s --check-prefix=CHECK-O --check-prefix=CHECK-O2
; RUN: | FileCheck %s --check-prefix=CHECK-O --check-prefix=CHECK-O2 \
; RUN: --check-prefix=CHECK-O3
; RUN: opt -disable-verify -debug-pass-manager \
; RUN: -passes='lto<Os>' -S %s 2>&1 \
; RUN: | FileCheck %s --check-prefix=CHECK-O --check-prefix=CHECK-O2
Expand All @@ -20,7 +21,7 @@
; RUN: opt -disable-verify -debug-pass-manager \
; RUN: -passes='lto<O3>' -S %s -passes-ep-peephole='no-op-function' 2>&1 \
; RUN: | FileCheck %s --check-prefix=CHECK-O --check-prefix=CHECK-O2 \
; RUN: --check-prefix=CHECK-EP-Peephole
; RUN: --check-prefix=CHECK-O3 --check-prefix=CHECK-EP-Peephole

; CHECK-O: Starting llvm::Module pass manager run.
; CHECK-O-NEXT: Running pass: PassManager<{{.*}}Module
Expand Down Expand Up @@ -60,6 +61,7 @@
; CHECK-O2-NEXT: Running pass: DeadArgumentEliminationPass
; CHECK-O2-NEXT: Running pass: ModuleToFunctionPassAdaptor<{{.*}}PassManager{{.*}}>
; CHECK-O2-NEXT: Starting llvm::Function pass manager run.
; CHECK-O3-NEXT: Running pass: AggressiveInstCombinePass
; CHECK-O2-NEXT: Running pass: InstCombinePass
; CHECK-EP-Peephole-NEXT: Running pass: NoOpFunctionPass
; CHECK-O2-NEXT: Finished llvm::Function pass manager run.
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1 change: 1 addition & 0 deletions llvm/test/Other/new-pm-thinlto-defaults.ll
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Expand Up @@ -111,6 +111,7 @@
; CHECK-O-NEXT: Running analysis: LazyValueAnalysis
; CHECK-O-NEXT: Running pass: CorrelatedValuePropagationPass
; CHECK-O-NEXT: Running pass: SimplifyCFGPass
; CHECK-O3-NEXT: Running pass: AggressiveInstCombinePass
; CHECK-O-NEXT: Running pass: InstCombinePass
; CHECK-O1-NEXT: Running pass: LibCallsShrinkWrapPass
; CHECK-O2-NEXT: Running pass: LibCallsShrinkWrapPass
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214 changes: 214 additions & 0 deletions llvm/test/Transforms/AggressiveInstCombine/trunc_multi_uses.ll
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -aggressive-instcombine -S | FileCheck %s
; RUN: opt < %s -passes=aggressive-instcombine -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"

; Aggressive Instcombine should be able to reduce width of these expressions.

declare i32 @use32(i32)
declare i32 @use64(i64)
declare <2 x i32> @use32_vec(<2 x i32>)
declare <2 x i32> @use64_vec(<2 x i64>)

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; These tests check cases where expression dag post-dominated by TruncInst
;; contains instruction, which has more than one usage.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

define void @multi_uses_add(i32 %X) {
; CHECK-LABEL: @multi_uses_add(
; CHECK-NEXT: [[A1:%.*]] = zext i32 [[X:%.*]] to i64
; CHECK-NEXT: [[B1:%.*]] = add i32 [[X]], 15
; CHECK-NEXT: [[C1:%.*]] = mul i32 [[B1]], [[B1]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 [[C1]])
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @use64(i64 [[A1]])
; CHECK-NEXT: ret void
;
%A1 = zext i32 %X to i64
%B1 = add i64 %A1, 15
%C1 = mul i64 %B1, %B1
%T1 = trunc i64 %C1 to i32
call i32 @use32(i32 %T1)
; make sure zext have another use that is not post-dominated by the TruncInst.
call i32 @use64(i64 %A1)
ret void
}

define void @multi_uses_or(i32 %X) {
; CHECK-LABEL: @multi_uses_or(
; CHECK-NEXT: [[A1:%.*]] = zext i32 [[X:%.*]] to i64
; CHECK-NEXT: [[B1:%.*]] = or i32 [[X]], 15
; CHECK-NEXT: [[C1:%.*]] = mul i32 [[B1]], [[B1]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 [[C1]])
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @use64(i64 [[A1]])
; CHECK-NEXT: ret void
;
%A1 = zext i32 %X to i64
%B1 = or i64 %A1, 15
%C1 = mul i64 %B1, %B1
%T1 = trunc i64 %C1 to i32
call i32 @use32(i32 %T1)
; make sure zext have another use that is not post-dominated by the TruncInst.
call i32 @use64(i64 %A1)
ret void
}

define void @multi_uses_xor(i32 %X) {
; CHECK-LABEL: @multi_uses_xor(
; CHECK-NEXT: [[A1:%.*]] = zext i32 [[X:%.*]] to i64
; CHECK-NEXT: [[B1:%.*]] = xor i32 [[X]], 15
; CHECK-NEXT: [[C1:%.*]] = mul i32 [[B1]], [[B1]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 [[C1]])
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @use64(i64 [[A1]])
; CHECK-NEXT: ret void
;
%A1 = zext i32 %X to i64
%B1 = xor i64 %A1, 15
%C1 = mul i64 %B1, %B1
%T1 = trunc i64 %C1 to i32
call i32 @use32(i32 %T1)
; make sure zext have another use that is not post-dominated by the TruncInst.
call i32 @use64(i64 %A1)
ret void
}

define void @multi_uses_and(i32 %X) {
; CHECK-LABEL: @multi_uses_and(
; CHECK-NEXT: [[A1:%.*]] = zext i32 [[X:%.*]] to i64
; CHECK-NEXT: [[B1:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[C1:%.*]] = mul i32 [[B1]], [[B1]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 [[C1]])
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @use64(i64 [[A1]])
; CHECK-NEXT: ret void
;
%A1 = zext i32 %X to i64
%B1 = and i64 %A1, 15
%C1 = mul i64 %B1, %B1
%T1 = trunc i64 %C1 to i32
call i32 @use32(i32 %T1)
; make sure zext have another use that is not post-dominated by the TruncInst.
call i32 @use64(i64 %A1)
ret void
}

define void @multi_uses_sub(i32 %X, i32 %Y) {
; CHECK-LABEL: @multi_uses_sub(
; CHECK-NEXT: [[A1:%.*]] = zext i32 [[X:%.*]] to i64
; CHECK-NEXT: [[A2:%.*]] = zext i32 [[Y:%.*]] to i64
; CHECK-NEXT: [[B1:%.*]] = sub i32 [[X]], [[Y]]
; CHECK-NEXT: [[C1:%.*]] = mul i32 [[B1]], [[B1]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @use32(i32 [[C1]])
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @use64(i64 [[A1]])
; CHECK-NEXT: [[TMP3:%.*]] = call i32 @use64(i64 [[A2]])
; CHECK-NEXT: ret void
;
%A1 = zext i32 %X to i64
%A2 = zext i32 %Y to i64
%B1 = sub i64 %A1, %A2
%C1 = mul i64 %B1, %B1
%T1 = trunc i64 %C1 to i32
call i32 @use32(i32 %T1)
; make sure zext have another use that is not post-dominated by the TruncInst.
call i32 @use64(i64 %A1)
call i32 @use64(i64 %A2)
ret void
}

define void @multi_use_vec_add(<2 x i32> %X) {
; CHECK-LABEL: @multi_use_vec_add(
; CHECK-NEXT: [[A1:%.*]] = zext <2 x i32> [[X:%.*]] to <2 x i64>
; CHECK-NEXT: [[B1:%.*]] = add <2 x i32> [[X]], <i32 15, i32 15>
; CHECK-NEXT: [[C1:%.*]] = mul <2 x i32> [[B1]], [[B1]]
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> [[C1]])
; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @use64_vec(<2 x i64> [[A1]])
; CHECK-NEXT: ret void
;
%A1 = zext <2 x i32> %X to <2 x i64>
%B1 = add <2 x i64> %A1, <i64 15, i64 15>
%C1 = mul <2 x i64> %B1, %B1
%T1 = trunc <2 x i64> %C1 to <2 x i32>
call <2 x i32> @use32_vec(<2 x i32> %T1)
; make sure zext have another use that is not post-dominated by the TruncInst.
call <2 x i32> @use64_vec(<2 x i64> %A1)
ret void
}

define void @multi_use_vec_or(<2 x i32> %X) {
; CHECK-LABEL: @multi_use_vec_or(
; CHECK-NEXT: [[A1:%.*]] = zext <2 x i32> [[X:%.*]] to <2 x i64>
; CHECK-NEXT: [[B1:%.*]] = or <2 x i32> [[X]], <i32 15, i32 15>
; CHECK-NEXT: [[C1:%.*]] = mul <2 x i32> [[B1]], [[B1]]
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> [[C1]])
; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @use64_vec(<2 x i64> [[A1]])
; CHECK-NEXT: ret void
;
%A1 = zext <2 x i32> %X to <2 x i64>
%B1 = or <2 x i64> %A1, <i64 15, i64 15>
%C1 = mul <2 x i64> %B1, %B1
%T1 = trunc <2 x i64> %C1 to <2 x i32>
call <2 x i32> @use32_vec(<2 x i32> %T1)
; make sure zext have another use that is not post-dominated by the TruncInst.
call <2 x i32> @use64_vec(<2 x i64> %A1)
ret void
}

define void @multi_use_vec_xor(<2 x i32> %X) {
; CHECK-LABEL: @multi_use_vec_xor(
; CHECK-NEXT: [[A1:%.*]] = zext <2 x i32> [[X:%.*]] to <2 x i64>
; CHECK-NEXT: [[B1:%.*]] = xor <2 x i32> [[X]], <i32 15, i32 15>
; CHECK-NEXT: [[C1:%.*]] = mul <2 x i32> [[B1]], [[B1]]
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> [[C1]])
; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @use64_vec(<2 x i64> [[A1]])
; CHECK-NEXT: ret void
;
%A1 = zext <2 x i32> %X to <2 x i64>
%B1 = xor <2 x i64> %A1, <i64 15, i64 15>
%C1 = mul <2 x i64> %B1, %B1
%T1 = trunc <2 x i64> %C1 to <2 x i32>
call <2 x i32> @use32_vec(<2 x i32> %T1)
; make sure zext have another use that is not post-dominated by the TruncInst.
call <2 x i32> @use64_vec(<2 x i64> %A1)
ret void
}

define void @multi_use_vec_and(<2 x i32> %X) {
; CHECK-LABEL: @multi_use_vec_and(
; CHECK-NEXT: [[A1:%.*]] = zext <2 x i32> [[X:%.*]] to <2 x i64>
; CHECK-NEXT: [[B1:%.*]] = and <2 x i32> [[X]], <i32 15, i32 15>
; CHECK-NEXT: [[C1:%.*]] = mul <2 x i32> [[B1]], [[B1]]
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> [[C1]])
; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @use64_vec(<2 x i64> [[A1]])
; CHECK-NEXT: ret void
;
%A1 = zext <2 x i32> %X to <2 x i64>
%B1 = and <2 x i64> %A1, <i64 15, i64 15>
%C1 = mul <2 x i64> %B1, %B1
%T1 = trunc <2 x i64> %C1 to <2 x i32>
call <2 x i32> @use32_vec(<2 x i32> %T1)
; make sure zext have another use that is not post-dominated by the TruncInst.
call <2 x i32> @use64_vec(<2 x i64> %A1)
ret void
}

define void @multi_use_vec_sub(<2 x i32> %X, <2 x i32> %Y) {
; CHECK-LABEL: @multi_use_vec_sub(
; CHECK-NEXT: [[A1:%.*]] = zext <2 x i32> [[X:%.*]] to <2 x i64>
; CHECK-NEXT: [[A2:%.*]] = zext <2 x i32> [[Y:%.*]] to <2 x i64>
; CHECK-NEXT: [[B1:%.*]] = sub <2 x i32> [[X]], [[Y]]
; CHECK-NEXT: [[C1:%.*]] = mul <2 x i32> [[B1]], [[B1]]
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @use32_vec(<2 x i32> [[C1]])
; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @use64_vec(<2 x i64> [[A1]])
; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i32> @use64_vec(<2 x i64> [[A2]])
; CHECK-NEXT: ret void
;
%A1 = zext <2 x i32> %X to <2 x i64>
%A2 = zext <2 x i32> %Y to <2 x i64>
%B1 = sub <2 x i64> %A1, %A2
%C1 = mul <2 x i64> %B1, %B1
%T1 = trunc <2 x i64> %C1 to <2 x i32>
call <2 x i32> @use32_vec(<2 x i32> %T1)
; make sure zext have another use that is not post-dominated by the TruncInst.
call <2 x i32> @use64_vec(<2 x i64> %A1)
call <2 x i32> @use64_vec(<2 x i64> %A2)
ret void
}
1 change: 1 addition & 0 deletions llvm/tools/opt/CMakeLists.txt
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@@ -1,5 +1,6 @@
set(LLVM_LINK_COMPONENTS
${LLVM_TARGETS_TO_BUILD}
AggressiveInstCombine
Analysis
BitWriter
CodeGen
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1 change: 1 addition & 0 deletions llvm/tools/opt/opt.cpp
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Expand Up @@ -395,6 +395,7 @@ int main(int argc, char **argv) {
initializeAnalysis(Registry);
initializeTransformUtils(Registry);
initializeInstCombine(Registry);
initializeAggressiveInstCombinerLegacyPassPass(Registry);
initializeInstrumentation(Registry);
initializeTarget(Registry);
// For codegen passes, only passes that do IR to IR transformation are
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