22 changes: 22 additions & 0 deletions llvm/test/CodeGen/M68k/TLS/tlsld.ll
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@@ -0,0 +1,22 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=m68k --relocation-model=pic -o - %s | FileCheck %s

@myvar = internal thread_local global i32 2, align 4

define dso_local ptr @get_addr() nounwind {
; CHECK-LABEL: get_addr:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: suba.l #4, %sp
; CHECK-NEXT: lea (_GLOBAL_OFFSET_TABLE_@GOTPCREL,%pc), %a0
; CHECK-NEXT: adda.l myvar@TLSLDM, %a0
; CHECK-NEXT: move.l %a0, (%sp)
; CHECK-NEXT: jsr (__tls_get_addr@PLT,%pc)
; CHECK-NEXT: adda.l myvar@TLSLD, %a0
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
%0 = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @myvar)
ret ptr %0
}

declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
19 changes: 19 additions & 0 deletions llvm/test/CodeGen/M68k/TLS/tlsle.ll
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@@ -0,0 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=m68k -o - %s | FileCheck %s

@myvar = internal thread_local global i32 2, align 4

define dso_local ptr @get_addr() nounwind {
; CHECK-LABEL: get_addr:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: suba.l #4, %sp
; CHECK-NEXT: jsr __m68k_read_tp@PLT
; CHECK-NEXT: adda.l myvar@TPOFF, %a0
; CHECK-NEXT: adda.l #4, %sp
; CHECK-NEXT: rts
entry:
%0 = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @myvar)
ret ptr %0
}

declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
3 changes: 3 additions & 0 deletions llvm/test/MC/Disassembler/M68k/arithmetic.txt
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Expand Up @@ -214,3 +214,6 @@

# CHECK: or.l %d1, %d6
0x8c 0x81

# CHECK: adda.l $f0001, %a0
0xd1 0xf9 0x00 0x0f 0x00 0x01
9 changes: 9 additions & 0 deletions llvm/test/MC/Disassembler/M68k/control.txt
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Expand Up @@ -12,3 +12,12 @@
0x5e 0xc0
# CHECK: nop
0x4e 0x71

# CHECK: bsr.b $1
0x61 0x01

# CHECK: bsr.w $f01
0x61 0x00 0x0f 0x01

# CHECK: bsr.l $f0001
0x61 0xff 0x00 0x0f 0x00 0x01
3 changes: 3 additions & 0 deletions llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRM.s
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Expand Up @@ -67,3 +67,6 @@ add.w (%a2), %d0
; CHECK: adda.l (%a1), %a3
; CHECK-SAME: encoding: [0xd7,0xd1]
adda.l (%a1), %a3
; CHECK: adda.l dst, %a0
; CHECK-SAME: encoding: [0xd1,0xf9,A,A,A,A]
adda.l dst,%a0
35 changes: 35 additions & 0 deletions llvm/test/MC/M68k/Control/bsr.s
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; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s

; CHECK: bsr.b .LBB0_1
; CHECK-SAME: encoding: [0x61,A]
; CHECK: fixup A - offset: 1, value: .LBB0_1-1, kind: FK_PCRel_1
bsr.b .LBB0_1
; CHECK: bsr.w .LBB0_2
; CHECK-SAME: encoding: [0x61,0x00,A,A]
; CHECK: fixup A - offset: 2, value: .LBB0_2, kind: FK_PCRel_2
bsr.w .LBB0_2
; CHECK: bsr.l .LBB0_3
; CHECK-SAME: encoding: [0x61,0xff,A,A,A,A]
; CHECK: fixup A - offset: 2, value: .LBB0_3, kind: FK_PCRel_4
bsr.l .LBB0_3
.LBB0_1:
; CHECK: add.l #0, %d0
; CHECK-SAME: encoding: [0xd0,0xbc,0x00,0x00,0x00,0x00]
add.l #0, %d0
; CHECK: rts
; CHECK-SAME: encoding: [0x4e,0x75]
rts
.LBB0_2:
; CHECK: add.l #1, %d0
; CHECK-SAME: encoding: [0xd0,0xbc,0x00,0x00,0x00,0x01]
add.l #1, %d0
; CHECK: rts
; CHECK-SAME: encoding: [0x4e,0x75]
rts
.LBB0_3:
; CHECK: add.l #1, %d0
; CHECK-SAME: encoding: [0xd0,0xbc,0x00,0x00,0x00,0x01]
add.l #1, %d0
; CHECK: rts
; CHECK-SAME: encoding: [0x4e,0x75]
rts
51 changes: 51 additions & 0 deletions llvm/test/MC/M68k/Relaxations/bsr.s
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; RUN: llvm-mc -triple=m68k -motorola-integers -filetype=obj < %s \
; RUN: | llvm-objdump -d - | FileCheck %s

; CHECK-LABEL: <TIGHT>:
TIGHT:
; CHECK: bsr.w $7a
bsr.w .LBB0_2
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
.LBB0_2:
add.l #0, %d0
rts

; CHECK-LABEL: <RELAXED>:
RELAXED:
; CHECK: bsr.b $82
bsr.b .LBB1_2
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
move.l $0, $0
.LBB1_2:
add.l #0, %d0
rts

; CHECK-LABEL: <ZERO>:
ZERO:
; CHECK: bsr.w $2
bsr.w .LBB2_1
.LBB2_1:
add.l #0, %d0
rts
5 changes: 5 additions & 0 deletions llvm/test/MC/M68k/Relocations/text-plt.s
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Expand Up @@ -7,3 +7,8 @@
; INSTR: jsr (target@PLT,%pc)
; FIXUP: fixup A - offset: 2, value: target@PLT, kind: FK_PCRel_2
jsr (target@PLT,%pc)

; RELOC: R_68K_PLT32 __tls_get_addr 0x0
; INSTR: bsr.l __tls_get_addr@PLT
; FIXUP: fixup A - offset: 2, value: __tls_get_addr@PLT, kind: FK_PCRel_4
bsr.l __tls_get_addr@PLT
9 changes: 5 additions & 4 deletions llvm/utils/UpdateTestChecks/asm.py
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Expand Up @@ -71,10 +71,11 @@ class string:

ASM_FUNCTION_M68K_RE = re.compile(
r'^_?(?P<func>[^:]+):[ \t]*;[ \t]*@"?(?P=func)"?\n'
r"(?P<body>.*?)\s*" # (body of the function)
r".Lfunc_end[0-9]+:\n",
flags=(re.M | re.S),
)
r'(?:\.L(?P=func)\$local:\n)?' # drop .L<func>$local:
r'(?:[ \t]+\.type[ \t]+\.L(?P=func)\$local,@function\n)?' # drop .type .L<func>$local,@function
r'(?P<body>.*?)\s*' # (body of the function)
r'.Lfunc_end[0-9]+:\n',
flags=(re.M | re.S))

ASM_FUNCTION_MIPS_RE = re.compile(
r'^_?(?P<func>[^:]+):[ \t]*#+[ \t]*@"?(?P=func)"?\n[^:]*?' # f: (name of func)
Expand Down