448 changes: 365 additions & 83 deletions llvm/test/MC/AArch64/arm64-fp-encoding.s
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Large diffs are not rendered by default.

4 changes: 2 additions & 2 deletions llvm/test/MC/AArch64/basic-a64-diagnostics.s
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Original file line number Diff line number Diff line change
Expand Up @@ -1603,7 +1603,7 @@
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR-NEXT: fcsel q3, q20, q9, pl
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: invalid operand for instruction
// CHECK-ERROR-NEXT: error: instruction requires: fullfp16
// CHECK-ERROR-NEXT: fcsel h9, h10, h11, mi
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: invalid operand for instruction
Expand Down Expand Up @@ -1652,7 +1652,7 @@
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR-NEXT: fmadd b3, b4, b5, b6
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: invalid operand for instruction
// CHECK-ERROR-NEXT: error: instruction requires: fullfp16
// CHECK-ERROR-NEXT: fmsub h1, h2, h3, h4
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: invalid operand for instruction
Expand Down
69 changes: 69 additions & 0 deletions llvm/test/MC/Disassembler/AArch64/arm64-scalar-fp.txt
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Original file line number Diff line number Diff line change
@@ -1,140 +1,187 @@
# RUN: llvm-mc -triple arm64-apple-darwin -mattr=neon --disassemble -output-asm-variant=1 < %s | FileCheck %s
# RUN: llvm-mc -triple arm64-apple-darwin -mattr=neon,v8.2a,fullfp16 --disassemble -output-asm-variant=1 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP16

#-----------------------------------------------------------------------------
# Floating-point arithmetic
#-----------------------------------------------------------------------------

0x41 0xc0 0xe0 0x1e
0x41 0xc0 0x20 0x1e
0x41 0xc0 0x60 0x1e

# FP16: fabs h1, h2
# CHECK: fabs s1, s2
# CHECK: fabs d1, d2

0x41 0x28 0xe3 0x1e
0x41 0x28 0x23 0x1e
0x41 0x28 0x63 0x1e

# FP16: fadd h1, h2, h3
# CHECK: fadd s1, s2, s3
# CHECK: fadd d1, d2, d3

0x41 0x18 0xe3 0x1e
0x41 0x18 0x23 0x1e
0x41 0x18 0x63 0x1e

# FP16: fdiv h1, h2, h3
# CHECK: fdiv s1, s2, s3
# CHECK: fdiv d1, d2, d3

0x41 0x10 0xc3 0x1f
0x41 0x10 0x03 0x1f
0x41 0x10 0x43 0x1f

# FP16: fmadd h1, h2, h3, h4
# CHECK: fmadd s1, s2, s3, s4
# CHECK: fmadd d1, d2, d3, d4

0x41 0x48 0xe3 0x1e
0x41 0x48 0x23 0x1e
0x41 0x48 0x63 0x1e
0x41 0x68 0xe3 0x1e
0x41 0x68 0x23 0x1e
0x41 0x68 0x63 0x1e

# FP16: fmax h1, h2, h3
# CHECK: fmax s1, s2, s3
# CHECK: fmax d1, d2, d3
# FP16: fmaxnm h1, h2, h3
# CHECK: fmaxnm s1, s2, s3
# CHECK: fmaxnm d1, d2, d3

0x41 0x58 0xe3 0x1e
0x41 0x58 0x23 0x1e
0x41 0x58 0x63 0x1e
0x41 0x78 0xe3 0x1e
0x41 0x78 0x23 0x1e
0x41 0x78 0x63 0x1e

# FP16: fmin h1, h2, h3
# CHECK: fmin s1, s2, s3
# CHECK: fmin d1, d2, d3
# FP16: fminnm h1, h2, h3
# CHECK: fminnm s1, s2, s3
# CHECK: fminnm d1, d2, d3

0x41 0x90 0xc3 0x1f
0x41 0x90 0x03 0x1f
0x41 0x90 0x43 0x1f

# FP16: fmsub h1, h2, h3, h4
# CHECK: fmsub s1, s2, s3, s4
# CHECK: fmsub d1, d2, d3, d4

0x41 0x08 0xe3 0x1e
0x41 0x08 0x23 0x1e
0x41 0x08 0x63 0x1e

# FP16: fmul h1, h2, h3
# CHECK: fmul s1, s2, s3
# CHECK: fmul d1, d2, d3

0x41 0x40 0xe1 0x1e
0x41 0x40 0x21 0x1e
0x41 0x40 0x61 0x1e

# FP16: fneg h1, h2
# CHECK: fneg s1, s2
# CHECK: fneg d1, d2

0x41 0x10 0xe3 0x1f
0x41 0x10 0x23 0x1f
0x41 0x10 0x63 0x1f

# FP16: fnmadd h1, h2, h3, h4
# CHECK: fnmadd s1, s2, s3, s4
# CHECK: fnmadd d1, d2, d3, d4

0x41 0x90 0xe3 0x1f
0x41 0x90 0x23 0x1f
0x41 0x90 0x63 0x1f

# FP16: fnmsub h1, h2, h3, h4
# CHECK: fnmsub s1, s2, s3, s4
# CHECK: fnmsub d1, d2, d3, d4

0x41 0x88 0xe3 0x1e
0x41 0x88 0x23 0x1e
0x41 0x88 0x63 0x1e

# FP16: fnmul h1, h2, h3
# CHECK: fnmul s1, s2, s3
# CHECK: fnmul d1, d2, d3

0x41 0xc0 0xe1 0x1e
0x41 0xc0 0x21 0x1e
0x41 0xc0 0x61 0x1e

# FP16: fsqrt h1, h2
# CHECK: fsqrt s1, s2
# CHECK: fsqrt d1, d2

0x41 0x38 0xe3 0x1e
0x41 0x38 0x23 0x1e
0x41 0x38 0x63 0x1e

# FP16: fsub h1, h2, h3
# CHECK: fsub s1, s2, s3
# CHECK: fsub d1, d2, d3

#-----------------------------------------------------------------------------
# Floating-point comparison
#-----------------------------------------------------------------------------

0x20 0x04 0xe2 0x1e
0x20 0x04 0x22 0x1e
0x20 0x04 0x62 0x1e
0x30 0x04 0xe2 0x1e
0x30 0x04 0x22 0x1e
0x30 0x04 0x62 0x1e

# FP16: fccmp h1, h2, #0, eq
# CHECK: fccmp s1, s2, #0, eq
# CHECK: fccmp d1, d2, #0, eq
# FP16: fccmpe h1, h2, #0, eq
# CHECK: fccmpe s1, s2, #0, eq
# CHECK: fccmpe d1, d2, #0, eq

0x20 0x20 0xe2 0x1e
0x20 0x20 0x22 0x1e
0x20 0x20 0x62 0x1e
0x28 0x20 0xe0 0x1e
0x28 0x20 0x20 0x1e
0x28 0x20 0x60 0x1e
0x30 0x20 0xe2 0x1e
0x30 0x20 0x22 0x1e
0x30 0x20 0x62 0x1e
0x38 0x20 0xe0 0x1e
0x38 0x20 0x20 0x1e
0x38 0x20 0x60 0x1e

# FP16: fcmp h1, h2
# CHECK: fcmp s1, s2
# CHECK: fcmp d1, d2
# FP16: fcmp h1, #0.0
# CHECK: fcmp s1, #0.0
# CHECK: fcmp d1, #0.0
# FP16: fcmpe h1, h2
# CHECK: fcmpe s1, s2
# CHECK: fcmpe d1, d2
# FP16: fcmpe h1, #0.0
# CHECK: fcmpe s1, #0.0
# CHECK: fcmpe d1, #0.0

#-----------------------------------------------------------------------------
# Floating-point conditional select
#-----------------------------------------------------------------------------

0x41 0x0c 0xe3 0x1e
0x41 0x0c 0x23 0x1e
0x41 0x0c 0x63 0x1e

# FP16: fcsel h1, h2, h3, eq
# CHECK: fcsel s1, s2, s3, eq
# CHECK: fcsel d1, d2, d3, eq

Expand Down Expand Up @@ -169,75 +216,97 @@
# Floating-point move
#-----------------------------------------------------------------------------

0x41 0x00 0xe7 0x1e
0x41 0x00 0xe6 0x1e
0x41 0x00 0x27 0x1e
0x41 0x00 0x26 0x1e
0x41 0x00 0x67 0x9e
0x41 0x00 0x66 0x9e

# FP16: fmov h1, w2
# FP16: fmov w1, h2
# CHECK: fmov s1, w2
# CHECK: fmov w1, s2
# CHECK: fmov d1, x2
# CHECK: fmov x1, d2

0x01 0x10 0xe8 0x1e
0x01 0x10 0x28 0x1e
0x01 0x10 0x68 0x1e
0x01 0xf0 0x7b 0x1e
0x01 0xf0 0x6b 0x1e

# FP16: fmov h1, #0.12500000
# CHECK: fmov s1, #0.12500000
# CHECK: fmov d1, #0.12500000
# CHECK: fmov d1, #-0.48437500
# CHECK: fmov d1, #0.48437500

0x41 0x40 0xe0 0x1e
0x41 0x40 0x20 0x1e
0x41 0x40 0x60 0x1e

# FP16: fmov h1, h2
# CHECK: fmov s1, s2
# CHECK: fmov d1, d2

#-----------------------------------------------------------------------------
# Floating-point round to integral
#-----------------------------------------------------------------------------

0x41 0x40 0xe6 0x1e
0x41 0x40 0x26 0x1e
0x41 0x40 0x66 0x1e

# FP16: frinta h1, h2
# CHECK: frinta s1, s2
# CHECK: frinta d1, d2

0x41 0xc0 0xe7 0x1e
0x41 0xc0 0x27 0x1e
0x41 0xc0 0x67 0x1e

# FP16: frinti h1, h2
# CHECK: frinti s1, s2
# CHECK: frinti d1, d2

0x41 0x40 0xe5 0x1e
0x41 0x40 0x25 0x1e
0x41 0x40 0x65 0x1e

# FP16: frintm h1, h2
# CHECK: frintm s1, s2
# CHECK: frintm d1, d2

0x41 0x40 0xe4 0x1e
0x41 0x40 0x24 0x1e
0x41 0x40 0x64 0x1e

# FP16: frintn h1, h2
# CHECK: frintn s1, s2
# CHECK: frintn d1, d2

0x41 0xc0 0xe4 0x1e
0x41 0xc0 0x24 0x1e
0x41 0xc0 0x64 0x1e

# FP16: frintp h1, h2
# CHECK: frintp s1, s2
# CHECK: frintp d1, d2

0x41 0x40 0xe7 0x1e
0x41 0x40 0x27 0x1e
0x41 0x40 0x67 0x1e

# FP16: frintx h1, h2
# CHECK: frintx s1, s2
# CHECK: frintx d1, d2

0x41 0xc0 0xe5 0x1e
0x41 0xc0 0x25 0x1e
0x41 0xc0 0x65 0x1e

# FP16: frintz h1, h2
# CHECK: frintz s1, s2
# CHECK: frintz d1, d2

Expand Down
112 changes: 112 additions & 0 deletions llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
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Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
# RUN: llvm-mc -triple=aarch64 -mattr=+fp-armv8 -disassemble < %s | FileCheck %s
# RUN: llvm-mc -triple=arm64 -mattr=+fp-armv8 -disassemble < %s | FileCheck %s
# RUN: llvm-mc -triple=arm64 -mattr=+fp-armv8,+fullfp16 -disassemble < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP16

#------------------------------------------------------------------------------
# Add/sub (immediate)
Expand Down Expand Up @@ -1516,6 +1517,20 @@
# Floating-point <-> fixed-point conversion
#------------------------------------------------------------------------------

# FP16: fcvtzs w3, h5, #1
# FP16: fcvtzs wzr, h20, #13
# FP16: fcvtzs w19, h0, #32
0xa3 0xfc 0xd8 0x1e
0x9f 0xce 0xd8 0x1e
0x13 0x80 0xd8 0x1e

# FP16: fcvtzs x3, h5, #1
# FP16: fcvtzs x12, h30, #45
# FP16: fcvtzs x19, h0, #64
0xa3 0xfc 0xd8 0x9e
0xcc 0x4f 0xd8 0x9e
0x13 0x00 0xd8 0x9e

# CHECK: fcvtzs w3, s5, #1
# CHECK: fcvtzs wzr, s20, #13
# CHECK: fcvtzs w19, s0, #32
Expand Down Expand Up @@ -1544,6 +1559,20 @@
0xcc 0x4f 0x58 0x9e
0x13 0x00 0x58 0x9e

# FP16: fcvtzu w3, h5, #1
# FP16: fcvtzu wzr, h20, #13
# FP16: fcvtzu w19, h0, #32
0xa3 0xfc 0xd9 0x1e
0x9f 0xce 0xd9 0x1e
0x13 0x80 0xd9 0x1e

# FP16: fcvtzu x3, h5, #1
# FP16: fcvtzu x12, h30, #45
# FP16: fcvtzu x19, h0, #64
0xa3 0xfc 0xd9 0x9e
0xcc 0x4f 0xd9 0x9e
0x13 0x00 0xd9 0x9e

# CHECK: fcvtzu w3, s5, #1
# CHECK: fcvtzu wzr, s20, #13
# CHECK: fcvtzu w19, s0, #32
Expand Down Expand Up @@ -1572,6 +1601,20 @@
0xcc 0x4f 0x59 0x9e
0x13 0x00 0x59 0x9e

# FP16: scvtf h23, w19, #1
# FP16: scvtf h31, wzr, #20
# FP16: scvtf h14, w0, #32
0x77 0xfe 0xc2 0x1e
0xff 0xb3 0xc2 0x1e
0x0e 0x80 0xc2 0x1e

# FP16: scvtf h23, x19, #1
# FP16: scvtf h31, xzr, #20
# FP16: scvtf h14, x0, #64
0x77 0xfe 0xc2 0x9e
0xff 0xb3 0xc2 0x9e
0x0e 0x00 0xc2 0x9e

# CHECK: scvtf s23, w19, #1
# CHECK: scvtf s31, wzr, #20
# CHECK: scvtf s14, w0, #32
Expand Down Expand Up @@ -1600,6 +1643,20 @@
0xff 0xb3 0x42 0x9e
0x0e 0x00 0x42 0x9e

# FP16: ucvtf h23, w19, #1
# FP16: ucvtf h31, wzr, #20
# FP16: ucvtf h14, w0, #32
0x77 0xfe 0xc3 0x1e
0xff 0xb3 0xc3 0x1e
0x0e 0x80 0xc3 0x1e

# FP16: ucvtf h23, x19, #1
# FP16: ucvtf h31, xzr, #20
# FP16: ucvtf h14, x0, #64
0x77 0xfe 0xc3 0x9e
0xff 0xb3 0xc3 0x9e
0x0e 0x00 0xc3 0x9e

# CHECK: ucvtf s23, w19, #1
# CHECK: ucvtf s31, wzr, #20
# CHECK: ucvtf s14, w0, #32
Expand Down Expand Up @@ -1631,6 +1688,61 @@
#------------------------------------------------------------------------------
# Floating-point <-> integer conversion
#------------------------------------------------------------------------------

# FP16: fcvtns w3, h31
# FP16: fcvtns xzr, h12
# FP16: fcvtnu wzr, h12
# FP16: fcvtnu x0, h0
0xe3 0x3 0xe0 0x1e
0x9f 0x1 0xe0 0x9e
0x9f 0x1 0xe1 0x1e
0x0 0x0 0xe1 0x9e

# FP16: fcvtps wzr, h9
# FP16: fcvtps x12, h20
# FP16: fcvtpu w30, h23
# FP16: fcvtpu x29, h3
0x3f 0x1 0xe8 0x1e
0x8c 0x2 0xe8 0x9e
0xfe 0x2 0xe9 0x1e
0x7d 0x0 0xe9 0x9e

# FP16: fcvtms w2, h3
# FP16: fcvtms x4, h5
# FP16: fcvtmu w6, h7
# FP16: fcvtmu x8, h9
0x62 0x0 0xf0 0x1e
0xa4 0x0 0xf0 0x9e
0xe6 0x0 0xf1 0x1e
0x28 0x1 0xf1 0x9e

# FP16: fcvtzs w10, h11
# FP16: fcvtzs x12, h13
# FP16: fcvtzu w14, h15
# FP16: fcvtzu x15, h16
0x6a 0x1 0xf8 0x1e
0xac 0x1 0xf8 0x9e
0xee 0x1 0xf9 0x1e
0xf 0x2 0xf9 0x9e

# FP16: scvtf h17, w18
# FP16: scvtf h19, x20
# FP16: ucvtf h21, w22
# FP16: scvtf h23, x24
0x51 0x2 0xe2 0x1e
0x93 0x2 0xe2 0x9e
0xd5 0x2 0xe3 0x1e
0x17 0x3 0xe2 0x9e

# FP16: fcvtas w25, h26
# FP16: fcvtas x27, h28
# FP16: fcvtau w29, h30
# FP16: fcvtau xzr, h0
0x59 0x3 0xe4 0x1e
0x9b 0x3 0xe4 0x9e
0xdd 0x3 0xe5 0x1e
0x1f 0x0 0xe5 0x9e

# CHECK: fcvtns w3, s31
# CHECK: fcvtns xzr, s12
# CHECK: fcvtnu wzr, s12
Expand Down
145 changes: 145 additions & 0 deletions llvm/test/MC/Disassembler/AArch64/fullfp16-neg.txt
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Original file line number Diff line number Diff line change
@@ -0,0 +1,145 @@
# RUN: not llvm-mc -disassemble -triple=aarch64 -mattr=+neon,-fullfp16 < %s 2>&1 | FileCheck %s
# RUN: not llvm-mc -disassemble -triple=aarch64 -mattr=-neon,-fullfp16 < %s 2>&1 | FileCheck %s

[0x41,0xc0,0xe0,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x28,0xe3,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x18,0xe3,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x10,0xc3,0x1f]
# CHECK: warning: invalid instruction encoding
[0x41,0x48,0xe3,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x68,0xe3,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x58,0xe3,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x78,0xe3,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x90,0xc3,0x1f]
# CHECK: warning: invalid instruction encoding
[0x41,0x08,0xe3,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x40,0xe1,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x10,0xe3,0x1f]
# CHECK: warning: invalid instruction encoding
[0x41,0x90,0xe3,0x1f]
# CHECK: warning: invalid instruction encoding
[0x41,0x88,0xe3,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0xc0,0xe1,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x38,0xe3,0x1e]
# CHECK: warning: invalid instruction encoding
[0x20,0x04,0xe2,0x1e]
# CHECK: warning: invalid instruction encoding
[0x30,0x04,0xe2,0x1e]
# CHECK: warning: invalid instruction encoding
[0x20,0x20,0xe2,0x1e]
# CHECK: warning: invalid instruction encoding
[0x28,0x20,0xe0,0x1e]
# CHECK: warning: invalid instruction encoding
[0x30,0x20,0xe2,0x1e]
# CHECK: warning: invalid instruction encoding
[0x38,0x20,0xe0,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x0c,0xe3,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe4,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe4,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe5,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe5,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xf0,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xf0,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xf1,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xf1,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe0,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe0,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe1,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe1,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe8,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe8,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe9,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe9,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xf8,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0xfc,0xd8,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xf8,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0xfc,0xd8,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xf9,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0xfc,0xd9,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xf9,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0xfc,0xd9,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe2,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0xfc,0xc2,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe2,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0xfc,0xc2,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe3,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0xfc,0xc3,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe3,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0xfc,0xc3,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe7,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe6,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe7,0x9e]
# CHECK: warning: invalid instruction encoding
[0x41,0x00,0xe6,0x9e]
# CHECK: warning: invalid instruction encoding
[0x01,0x10,0xe8,0x1e]
# CHECK: warning: invalid instruction encoding
[0x01,0x10,0xe8,0x1e]
# CHECK: warning: invalid instruction encoding
[0xe2,0x03,0xe7,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x40,0xe0,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x40,0xe6,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0xc0,0xe7,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x40,0xe5,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x40,0xe4,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0xc0,0xe4,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0x40,0xe7,0x1e]
# CHECK: warning: invalid instruction encoding
[0x41,0xc0,0xe5,0x1e]
# CHECK: warning: invalid instruction encoding

# CHECK-NOT: warning: invalid instruction encoding