4 changes: 2 additions & 2 deletions llvm/lib/Target/X86/X86CallLowering.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -142,7 +142,7 @@ bool X86CallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
MachineRegisterInfo &MRI = MF.getRegInfo();
const DataLayout &DL = MF.getDataLayout();

ArgInfo OrigRetInfo(VRegs, Val->getType());
ArgInfo OrigRetInfo(VRegs, Val->getType(), 0);
setArgFlags(OrigRetInfo, AttributeList::ReturnIndex, DL, F);

SmallVector<ArgInfo, 4> SplitRetInfos;
Expand Down Expand Up @@ -261,7 +261,7 @@ bool X86CallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
Arg.hasAttribute(Attribute::Nest) || VRegs[Idx].size() > 1)
return false;

ArgInfo OrigArg(VRegs[Idx], Arg.getType());
ArgInfo OrigArg(VRegs[Idx], Arg.getType(), Idx);
setArgFlags(OrigArg, Idx + AttributeList::FirstArgIndex, DL, F);
splitToValueTypes(OrigArg, SplitArgs, DL, F.getCallingConv());
Idx++;
Expand Down
2 changes: 1 addition & 1 deletion llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3576,7 +3576,7 @@ TEST_F(AArch64GISelMITest, CreateLibcall) {
auto *RetTy = Type::getVoidTy(Ctx);

EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
createLibcall(B, "abort", {{}, RetTy}, {}, CallingConv::C));
createLibcall(B, "abort", {{}, RetTy, 0}, {}, CallingConv::C));

auto CheckStr = R"(
CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
Expand Down