diff --git a/llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll b/llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
diff --git a/llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll b/llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
diff --git a/llvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll b/llvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll
diff --git a/llvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll b/llvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll
diff --git a/llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll b/llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll
diff --git a/llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll b/llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll
diff --git a/llvm/test/CodeGen/RISCV/rvv/vsuxe-rv32.ll b/llvm/test/CodeGen/RISCV/rvv/vsuxe-rv32.ll
diff --git a/llvm/test/CodeGen/RISCV/rvv/vsuxe-rv64.ll b/llvm/test/CodeGen/RISCV/rvv/vsuxe-rv64.ll
diff --git a/llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll b/llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll
diff --git a/llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll b/llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll
diff --git a/llvm/test/CodeGen/RISCV/rvv/vsxe-rv32.ll b/llvm/test/CodeGen/RISCV/rvv/vsxe-rv32.ll
diff --git a/llvm/test/CodeGen/RISCV/rvv/vsxe-rv64.ll b/llvm/test/CodeGen/RISCV/rvv/vsxe-rv64.ll
diff --git a/llvm/test/MC/RISCV/rvv/aliases.s b/llvm/test/MC/RISCV/rvv/aliases.s
@@ -54,6 +54,18 @@ vmset.m v0
 # ALIAS:    vmnot.m v0, v1                  # encoding: [0x57,0xa0,0x10,0x76]
 # NO-ALIAS: vmnand.mm       v0, v1, v1      # encoding: [0x57,0xa0,0x10,0x76]
 vmnot.m v0, v1
+# ALIAS:    vl1r.v          v0, (a0)        # encoding: [0x07,0x00,0x85,0x22]
+# NO-ALIAS: vl1re8.v        v0, (a0)        # encoding: [0x07,0x00,0x85,0x22]
+vl1r.v v0, (a0) 
+# ALIAS:    vl2r.v          v0, (a0)        # encoding: [0x07,0x00,0x85,0x42]
+# NO-ALIAS: vl2re8.v        v0, (a0)        # encoding: [0x07,0x00,0x85,0x42]
+vl2r.v v0, (a0) 
+# ALIAS:    vl4r.v          v0, (a0)        # encoding: [0x07,0x00,0x85,0x82]
+# NO-ALIAS: vl4re8.v        v0, (a0)        # encoding: [0x07,0x00,0x85,0x82]
+vl4r.v v0, (a0) 
+# ALIAS:    vl8r.v          v0, (a0)        # encoding: [0x07,0x00,0x85,0x02]
+# NO-ALIAS: vl8re8.v        v0, (a0)        # encoding: [0x07,0x00,0x85,0x02]
+vl8r.v v0, (a0) 
 # ALIAS:    vneg.v          v2, v1, v0.t    # encoding: [0x57,0x41,0x10,0x0c]
 # NO-ALIAS: vrsub.vx        v2, v1, zero, v0.t # encoding: [0x57,0x41,0x10,0x0c]
 vneg.v v2, v1, v0.t 

diff --git a/llvm/test/MC/RISCV/rvv/load.s b/llvm/test/MC/RISCV/rvv/load.s
@@ -1,12 +1,12 @@
 # RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-v %s \
-# RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN:   --riscv-no-aliases | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 # RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \
-# RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+# RUN:   | FileCheck %s --check-prefix=CHECK-ERROR
 # RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-v %s \
-# RUN:        | llvm-objdump -d --mattr=+experimental-v - \
-# RUN:        | FileCheck %s --check-prefix=CHECK-INST
+# RUN:   | llvm-objdump -d --mattr=+experimental-v - --riscv-no-aliases \
+# RUN:   | FileCheck %s --check-prefix=CHECK-INST
 # RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-v %s \
-# RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+# RUN:   | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
 
 vle8.v v8, (a0), v0.t
 # CHECK-INST: vle8.v v8, (a0), v0.t
@@ -296,104 +296,290 @@ vlse1024.v v8, (a0), a1
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 07 74 b5 1a <unknown>
 
-vlxei8.v v8, (a0), v4, v0.t
-# CHECK-INST: vlxei8.v v8, (a0), v4, v0.t
+vluxei8.v v8, (a0), v4, v0.t
+# CHECK-INST: vluxei8.v v8, (a0), v4, v0.t
+# CHECK-ENCODING: [0x07,0x04,0x45,0x04]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 04 45 04 <unknown>
+
+vluxei8.v v8, (a0), v4
+# CHECK-INST: vluxei8.v v8, (a0), v4
+# CHECK-ENCODING: [0x07,0x04,0x45,0x06]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 04 45 06 <unknown>
+
+vluxei16.v v8, (a0), v4, v0.t
+# CHECK-INST: vluxei16.v v8, (a0), v4, v0.t
+# CHECK-ENCODING: [0x07,0x54,0x45,0x04]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 54 45 04 <unknown>
+
+vluxei16.v v8, (a0), v4
+# CHECK-INST: vluxei16.v v8, (a0), v4
+# CHECK-ENCODING: [0x07,0x54,0x45,0x06]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 54 45 06 <unknown>
+
+vluxei32.v v8, (a0), v4, v0.t
+# CHECK-INST: vluxei32.v v8, (a0), v4, v0.t
+# CHECK-ENCODING: [0x07,0x64,0x45,0x04]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 64 45 04 <unknown>
+
+vluxei32.v v8, (a0), v4
+# CHECK-INST: vluxei32.v v8, (a0), v4
+# CHECK-ENCODING: [0x07,0x64,0x45,0x06]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 64 45 06 <unknown>
+
+vluxei64.v v8, (a0), v4, v0.t
+# CHECK-INST: vluxei64.v v8, (a0), v4, v0.t
+# CHECK-ENCODING: [0x07,0x74,0x45,0x04]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 74 45 04 <unknown>
+
+vluxei64.v v8, (a0), v4
+# CHECK-INST: vluxei64.v v8, (a0), v4
+# CHECK-ENCODING: [0x07,0x74,0x45,0x06]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 74 45 06 <unknown>
+
+vloxei8.v v8, (a0), v4, v0.t
+# CHECK-INST: vloxei8.v v8, (a0), v4, v0.t
 # CHECK-ENCODING: [0x07,0x04,0x45,0x0c]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 07 04 45 0c <unknown>
 
-vlxei8.v v8, (a0), v4
-# CHECK-INST: vlxei8.v v8, (a0), v4
+vloxei8.v v8, (a0), v4
+# CHECK-INST: vloxei8.v v8, (a0), v4
 # CHECK-ENCODING: [0x07,0x04,0x45,0x0e]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 07 04 45 0e <unknown>
 
-vlxei16.v v8, (a0), v4, v0.t
-# CHECK-INST: vlxei16.v v8, (a0), v4, v0.t
+vloxei16.v v8, (a0), v4, v0.t
+# CHECK-INST: vloxei16.v v8, (a0), v4, v0.t
 # CHECK-ENCODING: [0x07,0x54,0x45,0x0c]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 07 54 45 0c <unknown>
 
-vlxei16.v v8, (a0), v4
-# CHECK-INST: vlxei16.v v8, (a0), v4
+vloxei16.v v8, (a0), v4
+# CHECK-INST: vloxei16.v v8, (a0), v4
 # CHECK-ENCODING: [0x07,0x54,0x45,0x0e]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 07 54 45 0e <unknown>
 
-vlxei32.v v8, (a0), v4, v0.t
-# CHECK-INST: vlxei32.v v8, (a0), v4, v0.t
+vloxei32.v v8, (a0), v4, v0.t
+# CHECK-INST: vloxei32.v v8, (a0), v4, v0.t
 # CHECK-ENCODING: [0x07,0x64,0x45,0x0c]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 07 64 45 0c <unknown>
 
-vlxei32.v v8, (a0), v4
-# CHECK-INST: vlxei32.v v8, (a0), v4
+vloxei32.v v8, (a0), v4
+# CHECK-INST: vloxei32.v v8, (a0), v4
 # CHECK-ENCODING: [0x07,0x64,0x45,0x0e]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 07 64 45 0e <unknown>
 
-vlxei64.v v8, (a0), v4, v0.t
-# CHECK-INST: vlxei64.v v8, (a0), v4, v0.t
+vloxei64.v v8, (a0), v4, v0.t
+# CHECK-INST: vloxei64.v v8, (a0), v4, v0.t
 # CHECK-ENCODING: [0x07,0x74,0x45,0x0c]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 07 74 45 0c <unknown>
 
-vlxei64.v v8, (a0), v4
-# CHECK-INST: vlxei64.v v8, (a0), v4
+vloxei64.v v8, (a0), v4
+# CHECK-INST: vloxei64.v v8, (a0), v4
 # CHECK-ENCODING: [0x07,0x74,0x45,0x0e]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 07 74 45 0e <unknown>
 
-vlxei128.v v8, (a0), v4, v0.t
-# CHECK-INST: vlxei128.v v8, (a0), v4, v0.t
-# CHECK-ENCODING: [0x07,0x04,0x45,0x1c]
+vl1re8.v v8, (a0)
+# CHECK-INST: vl1re8.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x04,0x85,0x22]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 04 85 22 <unknown>
+
+vl1re16.v v8, (a0)
+# CHECK-INST: vl1re16.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x54,0x85,0x22]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 54 85 22 <unknown>
+
+vl1re32.v v8, (a0)
+# CHECK-INST: vl1re32.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x64,0x85,0x22]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 64 85 22 <unknown>
+
+vl1re64.v v8, (a0)
+# CHECK-INST: vl1re64.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x74,0x85,0x22]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 74 85 22 <unknown>
+
+vl1re128.v v8, (a0)
+# CHECK-INST: vl1re128.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x04,0x85,0x32]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 04 85 32 <unknown>
+
+vl1re256.v v8, (a0)
+# CHECK-INST: vl1re256.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x54,0x85,0x32]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 54 85 32 <unknown>
+
+vl1re512.v v8, (a0)
+# CHECK-INST: vl1re512.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x64,0x85,0x32]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 64 85 32 <unknown>
+
+vl1re1024.v v8, (a0)
+# CHECK-INST: vl1re1024.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x74,0x85,0x32]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 74 85 32 <unknown>
+
+vl2re8.v v8, (a0)
+# CHECK-INST: vl2re8.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x04,0x85,0x42]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 04 85 42 <unknown>
+
+vl2re16.v v8, (a0)
+# CHECK-INST: vl2re16.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x54,0x85,0x42]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 54 85 42 <unknown>
+
+vl2re32.v v8, (a0)
+# CHECK-INST: vl2re32.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x64,0x85,0x42]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 64 85 42 <unknown>
+
+vl2re64.v v8, (a0)
+# CHECK-INST: vl2re64.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x74,0x85,0x42]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 74 85 42 <unknown>
+
+vl2re128.v v8, (a0)
+# CHECK-INST: vl2re128.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x04,0x85,0x52]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 04 85 52 <unknown>
+
+vl2re256.v v8, (a0)
+# CHECK-INST: vl2re256.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x54,0x85,0x52]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 54 85 52 <unknown>
+
+vl2re512.v v8, (a0)
+# CHECK-INST: vl2re512.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x64,0x85,0x52]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 64 85 52 <unknown>
+
+vl2re1024.v v8, (a0)
+# CHECK-INST: vl2re1024.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x74,0x85,0x52]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 07 04 45 1c <unknown>
+# CHECK-UNKNOWN: 07 74 85 52 <unknown>
 
-vlxei128.v v8, (a0), v4
-# CHECK-INST: vlxei128.v v8, (a0), v4
-# CHECK-ENCODING: [0x07,0x04,0x45,0x1e]
+vl4re8.v v8, (a0)
+# CHECK-INST: vl4re8.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x04,0x85,0x82]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 07 04 45 1e <unknown>
+# CHECK-UNKNOWN: 07 04 85 82 <unknown>
 
-vlxei256.v v8, (a0), v4, v0.t
-# CHECK-INST: vlxei256.v v8, (a0), v4, v0.t
-# CHECK-ENCODING: [0x07,0x54,0x45,0x1c]
+vl4re16.v v8, (a0)
+# CHECK-INST: vl4re16.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x54,0x85,0x82]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 07 54 45 1c <unknown>
+# CHECK-UNKNOWN: 07 54 85 82 <unknown>
 
-vlxei256.v v8, (a0), v4
-# CHECK-INST: vlxei256.v v8, (a0), v4
-# CHECK-ENCODING: [0x07,0x54,0x45,0x1e]
+vl4re32.v v8, (a0)
+# CHECK-INST: vl4re32.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x64,0x85,0x82]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 07 54 45 1e <unknown>
+# CHECK-UNKNOWN: 07 64 85 82 <unknown>
 
-vlxei512.v v8, (a0), v4, v0.t
-# CHECK-INST: vlxei512.v v8, (a0), v4, v0.t
-# CHECK-ENCODING: [0x07,0x64,0x45,0x1c]
+vl4re64.v v8, (a0)
+# CHECK-INST: vl4re64.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x74,0x85,0x82]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 07 64 45 1c <unknown>
+# CHECK-UNKNOWN: 07 74 85 82 <unknown>
 
-vlxei512.v v8, (a0), v4
-# CHECK-INST: vlxei512.v v8, (a0), v4
-# CHECK-ENCODING: [0x07,0x64,0x45,0x1e]
+vl4re128.v v8, (a0)
+# CHECK-INST: vl4re128.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x04,0x85,0x92]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 07 64 45 1e <unknown>
+# CHECK-UNKNOWN: 07 04 85 92 <unknown>
 
-vlxei1024.v v8, (a0), v4, v0.t
-# CHECK-INST: vlxei1024.v v8, (a0), v4, v0.t
-# CHECK-ENCODING: [0x07,0x74,0x45,0x1c]
+vl4re256.v v8, (a0)
+# CHECK-INST: vl4re256.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x54,0x85,0x92]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 07 74 45 1c <unknown>
+# CHECK-UNKNOWN: 07 54 85 92 <unknown>
 
-vlxei1024.v v8, (a0), v4
-# CHECK-INST: vlxei1024.v v8, (a0), v4
-# CHECK-ENCODING: [0x07,0x74,0x45,0x1e]
+vl4re512.v v8, (a0)
+# CHECK-INST: vl4re512.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x64,0x85,0x92]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 07 74 45 1e <unknown>
+# CHECK-UNKNOWN: 07 64 85 92 <unknown>
 
-vl1r.v v8, (a0)
-# CHECK-INST: vl1r.v v8, (a0)
+vl4re1024.v v8, (a0)
+# CHECK-INST: vl4re1024.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x74,0x85,0x92]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 74 85 92 <unknown>
+
+vl8re8.v v8, (a0)
+# CHECK-INST: vl8re8.v v8, (a0)
 # CHECK-ENCODING: [0x07,0x04,0x85,0x02]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 07 04 85 02 <unknown>
+
+vl8re16.v v8, (a0)
+# CHECK-INST: vl8re16.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x54,0x85,0x02]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 54 85 02 <unknown>
+
+vl8re32.v v8, (a0)
+# CHECK-INST: vl8re32.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x64,0x85,0x02]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 64 85 02 <unknown>
+
+vl8re64.v v8, (a0)
+# CHECK-INST: vl8re64.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x74,0x85,0x02]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 74 85 02 <unknown>
+
+vl8re128.v v8, (a0)
+# CHECK-INST: vl8re128.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x04,0x85,0x12]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 04 85 12 <unknown>
+
+vl8re256.v v8, (a0)
+# CHECK-INST: vl8re256.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x54,0x85,0x12]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 54 85 12 <unknown>
+
+vl8re512.v v8, (a0)
+# CHECK-INST: vl8re512.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x64,0x85,0x12]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 64 85 12 <unknown>
+
+vl8re1024.v v8, (a0)
+# CHECK-INST: vl8re1024.v v8, (a0)
+# CHECK-ENCODING: [0x07,0x74,0x85,0x12]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 07 74 85 12 <unknown>
diff --git a/llvm/test/MC/RISCV/rvv/store.s b/llvm/test/MC/RISCV/rvv/store.s
@@ -1,12 +1,12 @@
 # RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-v %s \
-# RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN:   --riscv-no-aliases | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 # RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \
-# RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+# RUN:   | FileCheck %s --check-prefix=CHECK-ERROR
 # RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-v %s \
-# RUN:        | llvm-objdump -d --mattr=+experimental-v - \
-# RUN:        | FileCheck %s --check-prefix=CHECK-INST
+# RUN:   | llvm-objdump -d --mattr=+experimental-v - --riscv-no-aliases \
+# RUN:   | FileCheck %s --check-prefix=CHECK-INST
 # RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-v %s \
-# RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+# RUN:   | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
 
 vse8.v v24, (a0), v0.t
 # CHECK-INST: vse8.v v24, (a0), v0.t
@@ -200,104 +200,122 @@ vsse1024.v v24, (a0), a1
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 27 7c b5 1a <unknown>
 
-vsxei8.v v24, (a0), v4, v0.t
-# CHECK-INST: vsxei8.v v24, (a0), v4, v0.t
+vsuxei8.v v24, (a0), v4, v0.t
+# CHECK-INST: vsuxei8.v v24, (a0), v4, v0.t
+# CHECK-ENCODING: [0x27,0x0c,0x45,0x04]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 27 0c 45 04 <unknown>
+
+vsuxei8.v v24, (a0), v4
+# CHECK-INST: vsuxei8.v v24, (a0), v4
+# CHECK-ENCODING: [0x27,0x0c,0x45,0x06]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 27 0c 45 06 <unknown>
+
+vsuxei16.v v24, (a0), v4, v0.t
+# CHECK-INST: vsuxei16.v v24, (a0), v4, v0.t
+# CHECK-ENCODING: [0x27,0x5c,0x45,0x04]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 27 5c 45 04 <unknown>
+
+vsuxei16.v v24, (a0), v4
+# CHECK-INST: vsuxei16.v v24, (a0), v4
+# CHECK-ENCODING: [0x27,0x5c,0x45,0x06]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 27 5c 45 06 <unknown>
+
+vsuxei32.v v24, (a0), v4, v0.t
+# CHECK-INST: vsuxei32.v v24, (a0), v4, v0.t
+# CHECK-ENCODING: [0x27,0x6c,0x45,0x04]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 27 6c 45 04 <unknown>
+
+vsuxei32.v v24, (a0), v4
+# CHECK-INST: vsuxei32.v v24, (a0), v4
+# CHECK-ENCODING: [0x27,0x6c,0x45,0x06]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 27 6c 45 06 <unknown>
+
+vsuxei64.v v24, (a0), v4, v0.t
+# CHECK-INST: vsuxei64.v v24, (a0), v4, v0.t
+# CHECK-ENCODING: [0x27,0x7c,0x45,0x04]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 27 7c 45 04 <unknown>
+
+vsuxei64.v v24, (a0), v4
+# CHECK-INST: vsuxei64.v v24, (a0), v4
+# CHECK-ENCODING: [0x27,0x7c,0x45,0x06]
+# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
+# CHECK-UNKNOWN: 27 7c 45 06 <unknown>
+
+vsoxei8.v v24, (a0), v4, v0.t
+# CHECK-INST: vsoxei8.v v24, (a0), v4, v0.t
 # CHECK-ENCODING: [0x27,0x0c,0x45,0x0c]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 27 0c 45 0c <unknown>
 
-vsxei8.v v24, (a0), v4
-# CHECK-INST: vsxei8.v v24, (a0), v4
+vsoxei8.v v24, (a0), v4
+# CHECK-INST: vsoxei8.v v24, (a0), v4
 # CHECK-ENCODING: [0x27,0x0c,0x45,0x0e]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 27 0c 45 0e <unknown>
 
-vsxei16.v v24, (a0), v4, v0.t
-# CHECK-INST: vsxei16.v v24, (a0), v4, v0.t
+vsoxei16.v v24, (a0), v4, v0.t
+# CHECK-INST: vsoxei16.v v24, (a0), v4, v0.t
 # CHECK-ENCODING: [0x27,0x5c,0x45,0x0c]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 27 5c 45 0c <unknown>
 
-vsxei16.v v24, (a0), v4
-# CHECK-INST: vsxei16.v v24, (a0), v4
+vsoxei16.v v24, (a0), v4
+# CHECK-INST: vsoxei16.v v24, (a0), v4
 # CHECK-ENCODING: [0x27,0x5c,0x45,0x0e]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 27 5c 45 0e <unknown>
 
-vsxei32.v v24, (a0), v4, v0.t
-# CHECK-INST: vsxei32.v v24, (a0), v4, v0.t
+vsoxei32.v v24, (a0), v4, v0.t
+# CHECK-INST: vsoxei32.v v24, (a0), v4, v0.t
 # CHECK-ENCODING: [0x27,0x6c,0x45,0x0c]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 27 6c 45 0c <unknown>
 
-vsxei32.v v24, (a0), v4
-# CHECK-INST: vsxei32.v v24, (a0), v4
+vsoxei32.v v24, (a0), v4
+# CHECK-INST: vsoxei32.v v24, (a0), v4
 # CHECK-ENCODING: [0x27,0x6c,0x45,0x0e]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 27 6c 45 0e <unknown>
 
-vsxei64.v v24, (a0), v4, v0.t
-# CHECK-INST: vsxei64.v v24, (a0), v4, v0.t
+vsoxei64.v v24, (a0), v4, v0.t
+# CHECK-INST: vsoxei64.v v24, (a0), v4, v0.t
 # CHECK-ENCODING: [0x27,0x7c,0x45,0x0c]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 27 7c 45 0c <unknown>
 
-vsxei64.v v24, (a0), v4
-# CHECK-INST: vsxei64.v v24, (a0), v4
+vsoxei64.v v24, (a0), v4
+# CHECK-INST: vsoxei64.v v24, (a0), v4
 # CHECK-ENCODING: [0x27,0x7c,0x45,0x0e]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 27 7c 45 0e <unknown>
 
-vsxei128.v v24, (a0), v4, v0.t
-# CHECK-INST: vsxei128.v v24, (a0), v4, v0.t
-# CHECK-ENCODING: [0x27,0x0c,0x45,0x1c]
-# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 27 0c 45 1c <unknown>
-
-vsxei128.v v24, (a0), v4
-# CHECK-INST: vsxei128.v v24, (a0), v4
-# CHECK-ENCODING: [0x27,0x0c,0x45,0x1e]
-# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 27 0c 45 1e <unknown>
-
-vsxei256.v v24, (a0), v4, v0.t
-# CHECK-INST: vsxei256.v v24, (a0), v4, v0.t
-# CHECK-ENCODING: [0x27,0x5c,0x45,0x1c]
-# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 27 5c 45 1c <unknown>
-
-vsxei256.v v24, (a0), v4
-# CHECK-INST: vsxei256.v v24, (a0), v4
-# CHECK-ENCODING: [0x27,0x5c,0x45,0x1e]
-# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 27 5c 45 1e <unknown>
-
-vsxei512.v v24, (a0), v4, v0.t
-# CHECK-INST: vsxei512.v v24, (a0), v4, v0.t
-# CHECK-ENCODING: [0x27,0x6c,0x45,0x1c]
-# CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 27 6c 45 1c <unknown>
-
-vsxei512.v v24, (a0), v4
-# CHECK-INST: vsxei512.v v24, (a0), v4
-# CHECK-ENCODING: [0x27,0x6c,0x45,0x1e]
+vs1r.v v24, (a0)
+# CHECK-INST: vs1r.v v24, (a0)
+# CHECK-ENCODING: [0x27,0x0c,0x85,0x22]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 27 6c 45 1e <unknown>
+# CHECK-UNKNOWN: 27 0c 85 22 <unknown>
 
-vsxei1024.v v24, (a0), v4, v0.t
-# CHECK-INST: vsxei1024.v v24, (a0), v4, v0.t
-# CHECK-ENCODING: [0x27,0x7c,0x45,0x1c]
+vs2r.v v24, (a0)
+# CHECK-INST: vs2r.v v24, (a0)
+# CHECK-ENCODING: [0x27,0x0c,0x85,0x42]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 27 7c 45 1c <unknown>
+# CHECK-UNKNOWN: 27 0c 85 42 <unknown>
 
-vsxei1024.v v24, (a0), v4
-# CHECK-INST: vsxei1024.v v24, (a0), v4
-# CHECK-ENCODING: [0x27,0x7c,0x45,0x1e]
+vs4r.v v24, (a0)
+# CHECK-INST: vs4r.v v24, (a0)
+# CHECK-ENCODING: [0x27,0x0c,0x85,0x82]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
-# CHECK-UNKNOWN: 27 7c 45 1e <unknown>
+# CHECK-UNKNOWN: 27 0c 85 82 <unknown>
 
-vs1r.v v24, (a0)
-# CHECK-INST: vs1r.v v24, (a0)
+vs8r.v v24, (a0)
+# CHECK-INST: vs8r.v v24, (a0)
 # CHECK-ENCODING: [0x27,0x0c,0x85,0x02]
 # CHECK-ERROR: instruction requires the following: 'V' (Vector Instructions)
 # CHECK-UNKNOWN: 27 0c 85 02 <unknown>
diff --git a/llvm/test/MC/RISCV/rvv/zvlsseg.s b/llvm/test/MC/RISCV/rvv/zvlsseg.s