400 changes: 400 additions & 0 deletions llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-select.mir
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -mattr=+v -run-pass=legalizer %s -o - | FileCheck %s
# RUN: llc -mtriple=riscv64 -mattr=+v -run-pass=legalizer %s -o - | FileCheck %s

---
name: select_nxv1i8
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv1i8
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s8>)
; CHECK-NEXT: PseudoRET implicit $v8
%1:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF
%0:_(<vscale x 1 x s8>) = G_SELECT %1(<vscale x 1 x s1>), %2(<vscale x 1 x s8>), %2(<vscale x 1 x s8>)
$v8 = COPY %0(<vscale x 1 x s8>)
PseudoRET implicit $v8
...
---
name: select_nxv2i8
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv2i8
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s8>)
; CHECK-NEXT: PseudoRET implicit $v8
%1:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF
%0:_(<vscale x 2 x s8>) = G_SELECT %1(<vscale x 2 x s1>), %2(<vscale x 2 x s8>), %2(<vscale x 2 x s8>)
$v8 = COPY %0(<vscale x 2 x s8>)
PseudoRET implicit $v8
...
---
name: select_nxv4i8
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv4i8
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8 = COPY [[SELECT]](<vscale x 4 x s8>)
; CHECK-NEXT: PseudoRET implicit $v8
%1:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF
%0:_(<vscale x 4 x s8>) = G_SELECT %1(<vscale x 4 x s1>), %2(<vscale x 4 x s8>), %2(<vscale x 4 x s8>)
$v8 = COPY %0(<vscale x 4 x s8>)
PseudoRET implicit $v8
...
---
name: select_nxv8i8
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv8i8
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8 = COPY [[SELECT]](<vscale x 8 x s8>)
; CHECK-NEXT: PseudoRET implicit $v8
%1:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF
%0:_(<vscale x 8 x s8>) = G_SELECT %1(<vscale x 8 x s1>), %2(<vscale x 8 x s8>), %2(<vscale x 8 x s8>)
$v8 = COPY %0(<vscale x 8 x s8>)
PseudoRET implicit $v8
...
---
name: select_nxv16i8
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv16i8
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SELECT [[DEF]](<vscale x 16 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 16 x s8>)
; CHECK-NEXT: PseudoRET implicit $v8m2
%1:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF
%0:_(<vscale x 16 x s8>) = G_SELECT %1(<vscale x 16 x s1>), %2(<vscale x 16 x s8>), %2(<vscale x 16 x s8>)
$v8m2 = COPY %0(<vscale x 16 x s8>)
PseudoRET implicit $v8m2
...
---
name: select_nxv32i8
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv32i8
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 32 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 32 x s8>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SELECT [[DEF]](<vscale x 32 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 32 x s8>)
; CHECK-NEXT: PseudoRET implicit $v8m4
%1:_(<vscale x 32 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 32 x s8>) = G_IMPLICIT_DEF
%0:_(<vscale x 32 x s8>) = G_SELECT %1(<vscale x 32 x s1>), %2(<vscale x 32 x s8>), %2(<vscale x 32 x s8>)
$v8m4 = COPY %0(<vscale x 32 x s8>)
PseudoRET implicit $v8m4
...
---
name: select_nxv64i8
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv64i8
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 64 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 64 x s8>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SELECT [[DEF]](<vscale x 64 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 64 x s8>)
; CHECK-NEXT: PseudoRET implicit $v8m8
%1:_(<vscale x 64 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 64 x s8>) = G_IMPLICIT_DEF
%0:_(<vscale x 64 x s8>) = G_SELECT %1(<vscale x 64 x s1>), %2(<vscale x 64 x s8>), %2(<vscale x 64 x s8>)
$v8m8 = COPY %0(<vscale x 64 x s8>)
PseudoRET implicit $v8m8
...
---
name: select_nxv1i16
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv1i16
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s16>)
; CHECK-NEXT: PseudoRET implicit $v8
%1:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF
%0:_(<vscale x 1 x s16>) = G_SELECT %1(<vscale x 1 x s1>), %2(<vscale x 1 x s16>), %2(<vscale x 1 x s16>)
$v8 = COPY %0(<vscale x 1 x s16>)
PseudoRET implicit $v8
...
---
name: select_nxv2i16
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv2i16
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s16>)
; CHECK-NEXT: PseudoRET implicit $v8
%1:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF
%0:_(<vscale x 2 x s16>) = G_SELECT %1(<vscale x 2 x s1>), %2(<vscale x 2 x s16>), %2(<vscale x 2 x s16>)
$v8 = COPY %0(<vscale x 2 x s16>)
PseudoRET implicit $v8
...
---
name: select_nxv4i16
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv4i16
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8 = COPY [[SELECT]](<vscale x 4 x s16>)
; CHECK-NEXT: PseudoRET implicit $v8
%1:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF
%0:_(<vscale x 4 x s16>) = G_SELECT %1(<vscale x 4 x s1>), %2(<vscale x 4 x s16>), %2(<vscale x 4 x s16>)
$v8 = COPY %0(<vscale x 4 x s16>)
PseudoRET implicit $v8
...
---
name: select_nxv8i16
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv8i16
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 8 x s16>)
; CHECK-NEXT: PseudoRET implicit $v8m2
%1:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF
%0:_(<vscale x 8 x s16>) = G_SELECT %1(<vscale x 8 x s1>), %2(<vscale x 8 x s16>), %2(<vscale x 8 x s16>)
$v8m2 = COPY %0(<vscale x 8 x s16>)
PseudoRET implicit $v8m2
...
---
name: select_nxv16i16
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv16i16
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SELECT [[DEF]](<vscale x 16 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 16 x s16>)
; CHECK-NEXT: PseudoRET implicit $v8m4
%1:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF
%0:_(<vscale x 16 x s16>) = G_SELECT %1(<vscale x 16 x s1>), %2(<vscale x 16 x s16>), %2(<vscale x 16 x s16>)
$v8m4 = COPY %0(<vscale x 16 x s16>)
PseudoRET implicit $v8m4
...
---
name: select_nxv32i16
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv32i16
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 32 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 32 x s16>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 32 x s16>) = G_SELECT [[DEF]](<vscale x 32 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 32 x s16>)
; CHECK-NEXT: PseudoRET implicit $v8m8
%1:_(<vscale x 32 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 32 x s16>) = G_IMPLICIT_DEF
%0:_(<vscale x 32 x s16>) = G_SELECT %1(<vscale x 32 x s1>), %2(<vscale x 32 x s16>), %2(<vscale x 32 x s16>)
$v8m8 = COPY %0(<vscale x 32 x s16>)
PseudoRET implicit $v8m8
...
---
name: select_nxv1i32
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv1i32
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s32>)
; CHECK-NEXT: PseudoRET implicit $v8
%1:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF
%0:_(<vscale x 1 x s32>) = G_SELECT %1(<vscale x 1 x s1>), %2(<vscale x 1 x s32>), %2(<vscale x 1 x s32>)
$v8 = COPY %0(<vscale x 1 x s32>)
PseudoRET implicit $v8
...
---
name: select_nxv2i32
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv2i32
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s32>)
; CHECK-NEXT: PseudoRET implicit $v8
%1:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF
%0:_(<vscale x 2 x s32>) = G_SELECT %1(<vscale x 2 x s1>), %2(<vscale x 2 x s32>), %2(<vscale x 2 x s32>)
$v8 = COPY %0(<vscale x 2 x s32>)
PseudoRET implicit $v8
...
---
name: select_nxv4i32
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv4i32
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 4 x s32>)
; CHECK-NEXT: PseudoRET implicit $v8m2
%1:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF
%0:_(<vscale x 4 x s32>) = G_SELECT %1(<vscale x 4 x s1>), %2(<vscale x 4 x s32>), %2(<vscale x 4 x s32>)
$v8m2 = COPY %0(<vscale x 4 x s32>)
PseudoRET implicit $v8m2
...
---
name: select_nxv8i32
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv8i32
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 8 x s32>)
; CHECK-NEXT: PseudoRET implicit $v8m4
%1:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF
%0:_(<vscale x 8 x s32>) = G_SELECT %1(<vscale x 8 x s1>), %2(<vscale x 8 x s32>), %2(<vscale x 8 x s32>)
$v8m4 = COPY %0(<vscale x 8 x s32>)
PseudoRET implicit $v8m4
...
---
name: select_nxv16i32
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv16i32
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SELECT [[DEF]](<vscale x 16 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 16 x s32>)
; CHECK-NEXT: PseudoRET implicit $v8m8
%1:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF
%0:_(<vscale x 16 x s32>) = G_SELECT %1(<vscale x 16 x s1>), %2(<vscale x 16 x s32>), %2(<vscale x 16 x s32>)
$v8m8 = COPY %0(<vscale x 16 x s32>)
PseudoRET implicit $v8m8
...
---
name: select_nxv1i64
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv1i64
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s64>)
; CHECK-NEXT: PseudoRET implicit $v8
%1:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF
%0:_(<vscale x 1 x s64>) = G_SELECT %1(<vscale x 1 x s1>), %2(<vscale x 1 x s64>), %2(<vscale x 1 x s64>)
$v8 = COPY %0(<vscale x 1 x s64>)
PseudoRET implicit $v8
...
---
name: select_nxv2i64
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv2i64
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 2 x s64>)
; CHECK-NEXT: PseudoRET implicit $v8m2
%1:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF
%0:_(<vscale x 2 x s64>) = G_SELECT %1(<vscale x 2 x s1>), %2(<vscale x 2 x s64>), %2(<vscale x 2 x s64>)
$v8m2 = COPY %0(<vscale x 2 x s64>)
PseudoRET implicit $v8m2
...
---
name: select_nxv4i64
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv4i64
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 4 x s64>)
; CHECK-NEXT: PseudoRET implicit $v8m4
%1:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF
%0:_(<vscale x 4 x s64>) = G_SELECT %1(<vscale x 4 x s1>), %2(<vscale x 4 x s64>), %2(<vscale x 4 x s64>)
$v8m4 = COPY %0(<vscale x 4 x s64>)
PseudoRET implicit $v8m4
...
---
name: select_nxv8i64
legalized: false
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: select_nxv8i64
; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[DEF1]], [[DEF1]]
; CHECK-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 8 x s64>)
; CHECK-NEXT: PseudoRET implicit $v8m8
%1:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF
%2:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF
%0:_(<vscale x 8 x s64>) = G_SELECT %1(<vscale x 8 x s1>), %2(<vscale x 8 x s64>), %2(<vscale x 8 x s64>)
$v8m8 = COPY %0(<vscale x 8 x s64>)
PseudoRET implicit $v8m8
...
558 changes: 558 additions & 0 deletions llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/select.mir
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