65 changes: 0 additions & 65 deletions llvm/test/Transforms/InstCombine/align-2d-gep.ll
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This file was deleted.

27 changes: 12 additions & 15 deletions llvm/test/Transforms/InstCombine/align-addr.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,6 @@
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
target datalayout = "E-p:64:64:64-p1:32:32:32-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"

; Instcombine should be able to prove vector alignment in the
; presence of a few mild address computation tricks.

define void @test0(ptr %b, i64 %n, i64 %u, i64 %y) nounwind {
; CHECK-LABEL: @test0(
; CHECK-NEXT: entry:
Expand All @@ -20,7 +17,7 @@ define void @test0(ptr %b, i64 %n, i64 %u, i64 %y) nounwind {
; CHECK-NEXT: [[J:%.*]] = mul i64 [[I]], [[V]]
; CHECK-NEXT: [[H:%.*]] = add i64 [[J]], [[Z]]
; CHECK-NEXT: [[T8:%.*]] = getelementptr double, ptr [[E]], i64 [[H]]
; CHECK-NEXT: store <2 x double> zeroinitializer, ptr [[T8]], align 16
; CHECK-NEXT: store <2 x double> zeroinitializer, ptr [[T8]], align 8
; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[I]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], [[N]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[RETURN]], label [[BB]]
Expand Down Expand Up @@ -58,7 +55,7 @@ return:
define <16 x i8> @test1(<2 x i64> %x) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP:%.*]] = load <16 x i8>, ptr @GLOBAL, align 16
; CHECK-NEXT: [[TMP:%.*]] = load <16 x i8>, ptr @GLOBAL, align 1
; CHECK-NEXT: ret <16 x i8> [[TMP]]
;
entry:
Expand All @@ -70,7 +67,7 @@ entry:

define <16 x i8> @test1_as1(<2 x i64> %x) {
; CHECK-LABEL: @test1_as1(
; CHECK-NEXT: [[TMP:%.*]] = load <16 x i8>, ptr addrspace(1) @GLOBAL_as1, align 16
; CHECK-NEXT: [[TMP:%.*]] = load <16 x i8>, ptr addrspace(1) @GLOBAL_as1, align 1
; CHECK-NEXT: ret <16 x i8> [[TMP]]
;
%tmp = load <16 x i8>, ptr addrspace(1) @GLOBAL_as1, align 1
Expand All @@ -81,7 +78,7 @@ define <16 x i8> @test1_as1(<2 x i64> %x) {

define <16 x i8> @test1_as1_gep(<2 x i64> %x) {
; CHECK-LABEL: @test1_as1_gep(
; CHECK-NEXT: [[TMP:%.*]] = load <16 x i8>, ptr addrspace(1) getelementptr inbounds ([8 x i32], ptr addrspace(1) @GLOBAL_as1_gep, i32 0, i32 4), align 16
; CHECK-NEXT: [[TMP:%.*]] = load <16 x i8>, ptr addrspace(1) getelementptr inbounds ([8 x i32], ptr addrspace(1) @GLOBAL_as1_gep, i32 0, i32 4), align 1
; CHECK-NEXT: ret <16 x i8> [[TMP]]
;
%tmp = load <16 x i8>, ptr addrspace(1) getelementptr ([8 x i32], ptr addrspace(1) @GLOBAL_as1_gep, i16 0, i16 4), align 1
Expand Down Expand Up @@ -138,7 +135,7 @@ define <16 x i8> @ptrmask_align_unknown_ptr_align1(ptr align 1 %ptr, i64 %mask)
define <16 x i8> @ptrmask_align_unknown_ptr_align8(ptr align 8 %ptr, i64 %mask) {
; CHECK-LABEL: @ptrmask_align_unknown_ptr_align8(
; CHECK-NEXT: [[ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR:%.*]], i64 [[MASK:%.*]])
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 8
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 1
; CHECK-NEXT: ret <16 x i8> [[LOAD]]
;
%aligned = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 %mask)
Expand All @@ -150,7 +147,7 @@ define <16 x i8> @ptrmask_align_unknown_ptr_align8(ptr align 8 %ptr, i64 %mask)
define <16 x i8> @ptrmask_align2_ptr_align1(ptr align 1 %ptr) {
; CHECK-LABEL: @ptrmask_align2_ptr_align1(
; CHECK-NEXT: [[ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR:%.*]], i64 -2)
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 2
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 1
; CHECK-NEXT: ret <16 x i8> [[LOAD]]
;
%aligned = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 -2)
Expand All @@ -162,7 +159,7 @@ define <16 x i8> @ptrmask_align2_ptr_align1(ptr align 1 %ptr) {
define <16 x i8> @ptrmask_align4_ptr_align1(ptr align 1 %ptr) {
; CHECK-LABEL: @ptrmask_align4_ptr_align1(
; CHECK-NEXT: [[ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR:%.*]], i64 -4)
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 4
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 1
; CHECK-NEXT: ret <16 x i8> [[LOAD]]
;
%aligned = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 -4)
Expand All @@ -174,7 +171,7 @@ define <16 x i8> @ptrmask_align4_ptr_align1(ptr align 1 %ptr) {
define <16 x i8> @ptrmask_align8_ptr_align1(ptr align 1 %ptr) {
; CHECK-LABEL: @ptrmask_align8_ptr_align1(
; CHECK-NEXT: [[ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR:%.*]], i64 -8)
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 8
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 1
; CHECK-NEXT: ret <16 x i8> [[LOAD]]
;
%aligned = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 -8)
Expand All @@ -187,7 +184,7 @@ define <16 x i8> @ptrmask_align8_ptr_align1(ptr align 1 %ptr) {
define <16 x i8> @ptrmask_align8_ptr_align8(ptr align 8 %ptr) {
; CHECK-LABEL: @ptrmask_align8_ptr_align8(
; CHECK-NEXT: [[ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR:%.*]], i64 -8)
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 8
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 1
; CHECK-NEXT: ret <16 x i8> [[LOAD]]
;
%aligned = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 -8)
Expand All @@ -200,7 +197,7 @@ define <16 x i8> @ptrmask_align8_ptr_align8(ptr align 8 %ptr) {
define <16 x i8> @ptrmask_align8_ptr_align16(ptr align 16 %ptr) {
; CHECK-LABEL: @ptrmask_align8_ptr_align16(
; CHECK-NEXT: [[ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i64(ptr [[PTR:%.*]], i64 -8)
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 16
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 1
; CHECK-NEXT: ret <16 x i8> [[LOAD]]
;
%aligned = call ptr @llvm.ptrmask.p0.i64(ptr %ptr, i64 -8)
Expand All @@ -213,7 +210,7 @@ define <16 x i8> @ptrmask_align8_ptr_align16(ptr align 16 %ptr) {
define <16 x i8> @ptrmask_align8_ptr_align1_smallmask(ptr align 1 %ptr) {
; CHECK-LABEL: @ptrmask_align8_ptr_align1_smallmask(
; CHECK-NEXT: [[ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i32(ptr [[PTR:%.*]], i32 -8)
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 8
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 1
; CHECK-NEXT: ret <16 x i8> [[LOAD]]
;
%aligned = call ptr @llvm.ptrmask.p0.i32(ptr %ptr, i32 -8)
Expand All @@ -226,7 +223,7 @@ define <16 x i8> @ptrmask_align8_ptr_align1_smallmask(ptr align 1 %ptr) {
define <16 x i8> @ptrmask_align8_ptr_align1_bigmask(ptr align 1 %ptr) {
; CHECK-LABEL: @ptrmask_align8_ptr_align1_bigmask(
; CHECK-NEXT: [[ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i128(ptr [[PTR:%.*]], i128 -8)
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 8
; CHECK-NEXT: [[LOAD:%.*]] = load <16 x i8>, ptr [[ALIGNED]], align 1
; CHECK-NEXT: ret <16 x i8> [[LOAD]]
;
%aligned = call ptr @llvm.ptrmask.p0.i128(ptr %ptr, i128 -8)
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/InstCombine/align-attr.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ target triple = "x86_64-unknown-linux-gnu"
define i32 @foo1(ptr align 32 %a) #0 {
; CHECK-LABEL: @foo1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A:%.*]], align 32
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A:%.*]], align 4
; CHECK-NEXT: ret i32 [[TMP0]]
;
entry:
Expand All @@ -20,7 +20,7 @@ define i32 @foo2(ptr align 32 %a) #0 {
; CHECK-LABEL: @foo2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[V:%.*]] = call ptr @func1(ptr [[A:%.*]])
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 32
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4
; CHECK-NEXT: ret i32 [[TMP0]]
;
entry:
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/InstCombine/alloca-cast-debuginfo.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -26,10 +26,10 @@ target triple = "x86_64-pc-windows-msvc19.11.25508"
define void @f(ptr %p) !dbg !11 {
; CHECK-LABEL: @f(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_FOO:%.*]], align 8
; CHECK-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_FOO:%.*]], align 4
; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[LOCAL]], metadata [[META22:![0-9]+]], metadata !DIExpression()), !dbg [[DBG23:![0-9]+]]
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[P:%.*]], align 8, !dbg [[DBG24:![0-9]+]], !tbaa [[TBAA25:![0-9]+]]
; CHECK-NEXT: store i64 [[TMP0]], ptr [[LOCAL]], align 8, !dbg [[DBG29:![0-9]+]], !tbaa [[TBAA25]]
; CHECK-NEXT: store i64 [[TMP0]], ptr [[LOCAL]], align 4, !dbg [[DBG29:![0-9]+]], !tbaa [[TBAA25]]
; CHECK-NEXT: call void @escape(ptr nonnull [[LOCAL]]), !dbg [[DBG30:![0-9]+]]
; CHECK-NEXT: ret void, !dbg [[DBG31:![0-9]+]]
;
Expand Down
32 changes: 24 additions & 8 deletions llvm/test/Transforms/InstCombine/alloca.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -132,7 +132,7 @@ define void @test6() {
; NODL-NEXT: entry:
; NODL-NEXT: [[A:%.*]] = alloca { i32 }, align 8
; NODL-NEXT: [[B:%.*]] = alloca i32, align 4
; NODL-NEXT: store volatile i32 123, ptr [[A]], align 8
; NODL-NEXT: store volatile i32 123, ptr [[A]], align 4
; NODL-NEXT: tail call void @f(ptr nonnull [[B]])
; NODL-NEXT: ret void
;
Expand Down Expand Up @@ -186,13 +186,29 @@ declare ptr @llvm.stacksave()
declare void @llvm.stackrestore(ptr)

define void @test9(ptr %a) {
; ALL-LABEL: @test9(
; ALL-NEXT: entry:
; ALL-NEXT: [[ARGMEM:%.*]] = alloca inalloca <{ [[STRUCT_TYPE:%.*]] }>, align 8
; ALL-NEXT: [[TMP0:%.*]] = load i64, ptr [[A:%.*]], align 4
; ALL-NEXT: store i64 [[TMP0]], ptr [[ARGMEM]], align 8
; ALL-NEXT: call void @test9_aux(ptr nonnull inalloca(<{ [[STRUCT_TYPE]] }>) [[ARGMEM]])
; ALL-NEXT: ret void
; CHECK-LABEL: @test9(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARGMEM:%.*]] = alloca inalloca <{ [[STRUCT_TYPE:%.*]] }>, align 1
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A:%.*]], align 4
; CHECK-NEXT: store i64 [[TMP0]], ptr [[ARGMEM]], align 4
; CHECK-NEXT: call void @test9_aux(ptr nonnull inalloca(<{ [[STRUCT_TYPE]] }>) [[ARGMEM]])
; CHECK-NEXT: ret void
;
; P32-LABEL: @test9(
; P32-NEXT: entry:
; P32-NEXT: [[ARGMEM:%.*]] = alloca inalloca <{ [[STRUCT_TYPE:%.*]] }>, align 1
; P32-NEXT: [[TMP0:%.*]] = load i64, ptr [[A:%.*]], align 4
; P32-NEXT: store i64 [[TMP0]], ptr [[ARGMEM]], align 4
; P32-NEXT: call void @test9_aux(ptr nonnull inalloca(<{ [[STRUCT_TYPE]] }>) [[ARGMEM]])
; P32-NEXT: ret void
;
; NODL-LABEL: @test9(
; NODL-NEXT: entry:
; NODL-NEXT: [[ARGMEM:%.*]] = alloca inalloca <{ [[STRUCT_TYPE:%.*]] }>, align 8
; NODL-NEXT: [[TMP0:%.*]] = load i64, ptr [[A:%.*]], align 4
; NODL-NEXT: store i64 [[TMP0]], ptr [[ARGMEM]], align 8
; NODL-NEXT: call void @test9_aux(ptr nonnull inalloca(<{ [[STRUCT_TYPE]] }>) [[ARGMEM]])
; NODL-NEXT: ret void
;
entry:
%inalloca.save = call ptr @llvm.stacksave()
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/apint-shift.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -565,7 +565,7 @@ define i40 @test26(i40 %A) {
define i177 @ossfuzz_9880(i177 %X) {
; CHECK-LABEL: @ossfuzz_9880(
; CHECK-NEXT: [[A:%.*]] = alloca i177, align 8
; CHECK-NEXT: [[L1:%.*]] = load i177, ptr [[A]], align 8
; CHECK-NEXT: [[L1:%.*]] = load i177, ptr [[A]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i177 [[L1]], -1
; CHECK-NEXT: [[B5_NEG:%.*]] = sext i1 [[TMP1]] to i177
; CHECK-NEXT: [[B14:%.*]] = add i177 [[L1]], [[B5_NEG]]
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/InstCombine/assume-align.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -56,10 +56,10 @@ define void @f2(ptr %a) {
; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[TMP2]], 0
; CHECK-NEXT: br i1 [[TMP3]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: store i64 16, ptr [[TMP0]], align 8
; CHECK-NEXT: store i64 16, ptr [[TMP0]], align 4
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
; CHECK-NEXT: store i8 1, ptr [[TMP0]], align 8
; CHECK-NEXT: store i8 1, ptr [[TMP0]], align 1
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: ret void
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/InstCombine/assume-loop-align.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -22,10 +22,10 @@ define void @foo(ptr %a, ptr %b) #0 {
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDVARS_IV]]
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 64
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1
; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV]]
; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX5]], align 64
; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX5]], align 4
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 16
; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 1648
Expand Down
13 changes: 6 additions & 7 deletions llvm/test/Transforms/InstCombine/assume.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -7,20 +7,19 @@ target triple = "x86_64-unknown-linux-gnu"

declare void @llvm.assume(i1) #1

; Check that the alignment has been upgraded and that the assume has not
; been removed:
; Check that the assume has not been removed:

define i32 @foo1(ptr %a) #0 {
; DEFAULT-LABEL: @foo1(
; DEFAULT-NEXT: [[T0:%.*]] = load i32, ptr [[A:%.*]], align 32
; DEFAULT-NEXT: [[T0:%.*]] = load i32, ptr [[A:%.*]], align 4
; DEFAULT-NEXT: [[PTRINT:%.*]] = ptrtoint ptr [[A]] to i64
; DEFAULT-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 31
; DEFAULT-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
; DEFAULT-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
; DEFAULT-NEXT: ret i32 [[T0]]
;
; BUNDLES-LABEL: @foo1(
; BUNDLES-NEXT: [[T0:%.*]] = load i32, ptr [[A:%.*]], align 32
; BUNDLES-NEXT: [[T0:%.*]] = load i32, ptr [[A:%.*]], align 4
; BUNDLES-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 32) ]
; BUNDLES-NEXT: ret i32 [[T0]]
;
Expand All @@ -40,12 +39,12 @@ define i32 @foo2(ptr %a) #0 {
; DEFAULT-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 31
; DEFAULT-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
; DEFAULT-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
; DEFAULT-NEXT: [[T0:%.*]] = load i32, ptr [[A]], align 32
; DEFAULT-NEXT: [[T0:%.*]] = load i32, ptr [[A]], align 4
; DEFAULT-NEXT: ret i32 [[T0]]
;
; BUNDLES-LABEL: @foo2(
; BUNDLES-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[A:%.*]], i64 32) ]
; BUNDLES-NEXT: [[T0:%.*]] = load i32, ptr [[A]], align 32
; BUNDLES-NEXT: [[T0:%.*]] = load i32, ptr [[A]], align 4
; BUNDLES-NEXT: ret i32 [[T0]]
;
%ptrint = ptrtoint ptr %a to i64
Expand Down Expand Up @@ -266,7 +265,7 @@ define i32 @bundle2(ptr %P) {

define i1 @nonnull1(ptr %a) {
; CHECK-LABEL: @nonnull1(
; CHECK-NEXT: [[LOAD:%.*]] = load ptr, ptr [[A:%.*]], align 8, !nonnull [[META6:![0-9]+]], !noundef [[META6]]
; CHECK-NEXT: [[LOAD:%.*]] = load ptr, ptr [[A:%.*]], align 8, !nonnull !6, !noundef !6
; CHECK-NEXT: tail call void @escape(ptr nonnull [[LOAD]])
; CHECK-NEXT: ret i1 false
;
Expand Down
5 changes: 2 additions & 3 deletions llvm/test/Transforms/InstCombine/assume_inevitable.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -3,15 +3,14 @@

; Check that assume is propagated backwards through all
; operations that are `isGuaranteedToTransferExecutionToSuccessor`
; (it should reach the load and mark it as `align 32`).
define i32 @assume_inevitable(ptr %a, ptr %b, ptr %c) {
; CHECK-LABEL: @assume_inevitable(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[M:%.*]] = alloca i64, align 8
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A:%.*]], align 32
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A:%.*]], align 4
; CHECK-NEXT: [[LOADRES:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[LOADRES2:%.*]] = call i32 @llvm.annotation.i32.p0(i32 [[LOADRES]], ptr nonnull @.str, ptr nonnull @.str1, i32 2)
; CHECK-NEXT: store i32 [[LOADRES2]], ptr [[A]], align 32
; CHECK-NEXT: store i32 [[LOADRES2]], ptr [[A]], align 4
; CHECK-NEXT: [[DUMMY_EQ:%.*]] = icmp ugt i32 [[LOADRES]], 42
; CHECK-NEXT: tail call void @llvm.assume(i1 [[DUMMY_EQ]])
; CHECK-NEXT: [[M_A:%.*]] = call ptr @llvm.ptr.annotation.p0.p0(ptr nonnull [[M]], ptr nonnull @.str, ptr nonnull @.str1, i32 2, ptr null)
Expand Down
22 changes: 11 additions & 11 deletions llvm/test/Transforms/InstCombine/atomic.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -128,7 +128,7 @@ define i32 @test9() {

define i32 @test9_no_null_opt() #0 {
; CHECK-LABEL: @test9_no_null_opt(
; CHECK-NEXT: [[X:%.*]] = load atomic i32, ptr null unordered, align 4294967296
; CHECK-NEXT: [[X:%.*]] = load atomic i32, ptr null unordered, align 4
; CHECK-NEXT: ret i32 [[X]]
;
%x = load atomic i32, ptr null unordered, align 4
Expand All @@ -138,7 +138,7 @@ define i32 @test9_no_null_opt() #0 {
; FIXME: Could also fold
define i32 @test10() {
; CHECK-LABEL: @test10(
; CHECK-NEXT: [[X:%.*]] = load atomic i32, ptr null monotonic, align 4294967296
; CHECK-NEXT: [[X:%.*]] = load atomic i32, ptr null monotonic, align 4
; CHECK-NEXT: ret i32 [[X]]
;
%x = load atomic i32, ptr null monotonic, align 4
Expand All @@ -147,7 +147,7 @@ define i32 @test10() {

define i32 @test10_no_null_opt() #0 {
; CHECK-LABEL: @test10_no_null_opt(
; CHECK-NEXT: [[X:%.*]] = load atomic i32, ptr null monotonic, align 4294967296
; CHECK-NEXT: [[X:%.*]] = load atomic i32, ptr null monotonic, align 4
; CHECK-NEXT: ret i32 [[X]]
;
%x = load atomic i32, ptr null monotonic, align 4
Expand All @@ -157,7 +157,7 @@ define i32 @test10_no_null_opt() #0 {
; Would this be legal to fold? Probably?
define i32 @test11() {
; CHECK-LABEL: @test11(
; CHECK-NEXT: [[X:%.*]] = load atomic i32, ptr null seq_cst, align 4294967296
; CHECK-NEXT: [[X:%.*]] = load atomic i32, ptr null seq_cst, align 4
; CHECK-NEXT: ret i32 [[X]]
;
%x = load atomic i32, ptr null seq_cst, align 4
Expand All @@ -166,7 +166,7 @@ define i32 @test11() {

define i32 @test11_no_null_opt() #0 {
; CHECK-LABEL: @test11_no_null_opt(
; CHECK-NEXT: [[X:%.*]] = load atomic i32, ptr null seq_cst, align 4294967296
; CHECK-NEXT: [[X:%.*]] = load atomic i32, ptr null seq_cst, align 4
; CHECK-NEXT: ret i32 [[X]]
;
%x = load atomic i32, ptr null seq_cst, align 4
Expand All @@ -177,7 +177,7 @@ define i32 @test11_no_null_opt() #0 {
; ordering imposed.
define i32 @test12() {
; CHECK-LABEL: @test12(
; CHECK-NEXT: store atomic i32 poison, ptr null unordered, align 4294967296
; CHECK-NEXT: store atomic i32 poison, ptr null unordered, align 4
; CHECK-NEXT: ret i32 0
;
store atomic i32 0, ptr null unordered, align 4
Expand All @@ -186,7 +186,7 @@ define i32 @test12() {

define i32 @test12_no_null_opt() #0 {
; CHECK-LABEL: @test12_no_null_opt(
; CHECK-NEXT: store atomic i32 0, ptr null unordered, align 4294967296
; CHECK-NEXT: store atomic i32 0, ptr null unordered, align 4
; CHECK-NEXT: ret i32 0
;
store atomic i32 0, ptr null unordered, align 4
Expand All @@ -196,7 +196,7 @@ define i32 @test12_no_null_opt() #0 {
; FIXME: Could also fold
define i32 @test13() {
; CHECK-LABEL: @test13(
; CHECK-NEXT: store atomic i32 0, ptr null monotonic, align 4294967296
; CHECK-NEXT: store atomic i32 0, ptr null monotonic, align 4
; CHECK-NEXT: ret i32 0
;
store atomic i32 0, ptr null monotonic, align 4
Expand All @@ -205,7 +205,7 @@ define i32 @test13() {

define i32 @test13_no_null_opt() #0 {
; CHECK-LABEL: @test13_no_null_opt(
; CHECK-NEXT: store atomic i32 0, ptr null monotonic, align 4294967296
; CHECK-NEXT: store atomic i32 0, ptr null monotonic, align 4
; CHECK-NEXT: ret i32 0
;
store atomic i32 0, ptr null monotonic, align 4
Expand All @@ -215,7 +215,7 @@ define i32 @test13_no_null_opt() #0 {
; Would this be legal to fold? Probably?
define i32 @test14() {
; CHECK-LABEL: @test14(
; CHECK-NEXT: store atomic i32 0, ptr null seq_cst, align 4294967296
; CHECK-NEXT: store atomic i32 0, ptr null seq_cst, align 4
; CHECK-NEXT: ret i32 0
;
store atomic i32 0, ptr null seq_cst, align 4
Expand All @@ -224,7 +224,7 @@ define i32 @test14() {

define i32 @test14_no_null_opt() #0 {
; CHECK-LABEL: @test14_no_null_opt(
; CHECK-NEXT: store atomic i32 0, ptr null seq_cst, align 4294967296
; CHECK-NEXT: store atomic i32 0, ptr null seq_cst, align 4
; CHECK-NEXT: ret i32 0
;
store atomic i32 0, ptr null seq_cst, align 4
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/Transforms/InstCombine/constant-fold-address-space-pointer.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -185,7 +185,7 @@ define i32 @constant_fold_bitcast_itof_load() {

define <4 x float> @constant_fold_bitcast_vector_as() {
; CHECK-LABEL: @constant_fold_bitcast_vector_as(
; CHECK-NEXT: [[A:%.*]] = load <4 x float>, ptr addrspace(3) @g_v4f_as3, align 16
; CHECK-NEXT: [[A:%.*]] = load <4 x float>, ptr addrspace(3) @g_v4f_as3, align 4
; CHECK-NEXT: ret <4 x float> [[A]]
;
%a = load <4 x float>, ptr addrspace(3) @g_v4f_as3, align 4
Expand All @@ -196,7 +196,7 @@ define <4 x float> @constant_fold_bitcast_vector_as() {

define i32 @test_cast_gep_small_indices_as() {
; CHECK-LABEL: @test_cast_gep_small_indices_as(
; CHECK-NEXT: [[X:%.*]] = load i32, ptr addrspace(3) @i32_array_as3, align 16
; CHECK-NEXT: [[X:%.*]] = load i32, ptr addrspace(3) @i32_array_as3, align 4
; CHECK-NEXT: ret i32 [[X]]
;
%x = load i32, ptr addrspace(3) @i32_array_as3, align 4
Expand All @@ -214,7 +214,7 @@ define i32 @test_cast_gep_small_indices_as() {

define i32 @test_cast_gep_large_indices_as() {
; CHECK-LABEL: @test_cast_gep_large_indices_as(
; CHECK-NEXT: [[X:%.*]] = load i32, ptr addrspace(3) @i32_array_as3, align 16
; CHECK-NEXT: [[X:%.*]] = load i32, ptr addrspace(3) @i32_array_as3, align 4
; CHECK-NEXT: ret i32 [[X]]
;
%x = load i32, ptr addrspace(3) @i32_array_as3, align 4
Expand All @@ -223,7 +223,7 @@ define i32 @test_cast_gep_large_indices_as() {

define i32 @test_constant_cast_gep_struct_indices_as() {
; CHECK-LABEL: @test_constant_cast_gep_struct_indices_as(
; CHECK-NEXT: [[Y:%.*]] = load i32, ptr addrspace(3) getelementptr inbounds ([[STRUCT_FOO:%.*]], ptr addrspace(3) @constant_fold_global_ptr, i16 0, i32 2, i16 2), align 16
; CHECK-NEXT: [[Y:%.*]] = load i32, ptr addrspace(3) getelementptr inbounds ([[STRUCT_FOO:%.*]], ptr addrspace(3) @constant_fold_global_ptr, i16 0, i32 2, i16 2), align 4
; CHECK-NEXT: ret i32 [[Y]]
;
%x = getelementptr %struct.foo, ptr addrspace(3) @constant_fold_global_ptr, i18 0, i32 2, i12 2
Expand Down
37 changes: 9 additions & 28 deletions llvm/test/Transforms/InstCombine/constant-fold-gep.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -11,26 +11,26 @@ target datalayout = "E-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-

define void @frob() {
; CHECK-LABEL: @frob(
; CHECK-NEXT: store i32 1, ptr @Y, align 16
; CHECK-NEXT: store i32 1, ptr @Y, align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 0, i32 0, i64 1), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 0, i32 0, i64 2), align 8
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 0, i32 0, i64 2), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 0, i32 1, i64 0), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 0, i32 1, i64 1), align 16
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 0, i32 1, i64 1), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 0, i32 1, i64 2), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 1, i32 0, i64 0), align 8
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 1, i32 0, i64 0), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 1, i32 0, i64 1), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 1, i32 0, i64 2), align 16
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 1, i32 0, i64 2), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 1, i32 1, i64 0), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 1, i32 1, i64 1), align 8
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 1, i32 1, i64 1), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 1, i32 1, i64 2), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 2, i32 0, i64 0), align 16
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 2, i32 0, i64 0), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 2, i32 0, i64 1), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 2, i32 0, i64 2), align 8
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 2, i32 1, i64 0), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 2, i32 1, i64 1), align 16
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 2, i32 1, i64 1), align 8
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 0, i64 2, i32 1, i64 2), align 4
; CHECK-NEXT: store i32 1, ptr getelementptr inbounds ([3 x %struct.X], ptr @Y, i64 1, i64 0, i32 0, i64 0), align 8
; CHECK-NEXT: store i32 1, ptr getelementptr ([3 x %struct.X], ptr @Y, i64 2, i64 0, i32 0, i64 0), align 16
; CHECK-NEXT: store i32 1, ptr getelementptr ([3 x %struct.X], ptr @Y, i64 2, i64 0, i32 0, i64 0), align 8
; CHECK-NEXT: store i32 1, ptr getelementptr ([3 x %struct.X], ptr @Y, i64 1, i64 0, i32 0, i64 1), align 8
; CHECK-NEXT: ret void
;
Expand Down Expand Up @@ -97,25 +97,6 @@ entry:
ret i16 %E
}

; Check that we improve the alignment information.
; The base pointer is 16-byte aligned and we access the field at
; an offset of 8-byte.
; Every element in the @CallerInfos array is 16-byte aligned so
; any access from the following gep is 8-byte aligned.
%struct.CallerInfo = type { ptr, i32 }
@CallerInfos = global [128 x %struct.CallerInfo] zeroinitializer, align 16

define i32 @test_gep_in_struct(i64 %idx) {
; CHECK-LABEL: @test_gep_in_struct(
; CHECK-NEXT: [[NS7:%.*]] = getelementptr inbounds [128 x %struct.CallerInfo], ptr @CallerInfos, i64 0, i64 [[IDX:%.*]], i32 1
; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[NS7]], align 8
; CHECK-NEXT: ret i32 [[RES]]
;
%NS7 = getelementptr inbounds [128 x %struct.CallerInfo], ptr @CallerInfos, i64 0, i64 %idx, i32 1
%res = load i32, ptr %NS7, align 1
ret i32 %res
}

@g = external global i8
@g2 = external global i8

Expand Down
12 changes: 6 additions & 6 deletions llvm/test/Transforms/InstCombine/dbg-scalable-store-fixed-frag.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,10 +4,10 @@
define i32 @foo(<vscale x 2 x i32> %x) {
; CHECK-LABEL: @foo(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARR:%.*]] = alloca i32, align 8
; CHECK-NEXT: [[ARR:%.*]] = alloca i32, align 4
; CHECK-NEXT: call void @llvm.dbg.value(metadata <vscale x 2 x i32> undef, metadata [[META8:![0-9]+]], metadata !DIExpression()), !dbg [[DBG14:![0-9]+]]
; CHECK-NEXT: store <vscale x 2 x i32> [[X:%.*]], ptr [[ARR]], align 8
; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[ARR]], align 8
; CHECK-NEXT: store <vscale x 2 x i32> [[X:%.*]], ptr [[ARR]], align 4
; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[ARR]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
Expand All @@ -21,10 +21,10 @@ entry:
define i32 @foo2(<vscale x 2 x i32> %x) {
; CHECK-LABEL: @foo2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARR:%.*]] = alloca [4 x i32], align 8
; CHECK-NEXT: [[ARR:%.*]] = alloca [4 x i32], align 4
; CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[ARR]], metadata [[META15:![0-9]+]], metadata !DIExpression()), !dbg [[DBG17:![0-9]+]]
; CHECK-NEXT: store <vscale x 2 x i32> [[X:%.*]], ptr [[ARR]], align 8
; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[ARR]], align 8
; CHECK-NEXT: store <vscale x 2 x i32> [[X:%.*]], ptr [[ARR]], align 4
; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[ARR]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
Expand Down
80 changes: 40 additions & 40 deletions llvm/test/Transforms/InstCombine/fcmp-denormals-are-zero.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -8,13 +8,13 @@
define void @denormal_input_preserve_sign_fcmp_olt_smallest_normalized(float %f32, double %f64, half %f16) #0 {
; CHECK-LABEL: @denormal_input_preserve_sign_fcmp_olt_smallest_normalized(
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp oeq float [[F32:%.*]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp oeq double [[F64:%.*]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp oeq half [[F16:%.*]], 0xH0000
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: [[CMPF32_FLAGS:%.*]] = fcmp oeq float [[F32]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF32_FLAGS]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF32_FLAGS]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%f32.fabs = call float @llvm.fabs.f32(float %f32)
Expand All @@ -41,11 +41,11 @@ define void @denormal_input_preserve_sign_fcmp_olt_smallest_normalized(float %f3
define void @denormal_input_preserve_sign_fcmp_uge_smallest_normalized(float %f32, double %f64, half %f16) #0 {
; CHECK-LABEL: @denormal_input_preserve_sign_fcmp_uge_smallest_normalized(
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp une float [[F32:%.*]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp une double [[F64:%.*]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp une half [[F16:%.*]], 0xH0000
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%f32.fabs = call float @llvm.fabs.f32(float %f32)
Expand All @@ -67,11 +67,11 @@ define void @denormal_input_preserve_sign_fcmp_uge_smallest_normalized(float %f3
define void @denormal_input_preserve_sign_fcmp_oge_smallest_normalized(float %f32, double %f64, half %f16) #0 {
; CHECK-LABEL: @denormal_input_preserve_sign_fcmp_oge_smallest_normalized(
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp one float [[F32:%.*]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp one double [[F64:%.*]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp one half [[F16:%.*]], 0xH0000
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%f32.fabs = call float @llvm.fabs.f32(float %f32)
Expand All @@ -93,11 +93,11 @@ define void @denormal_input_preserve_sign_fcmp_oge_smallest_normalized(float %f3
define void @denormal_input_preserve_sign_fcmp_ult_smallest_normalized(float %f32, double %f64, half %f16) #0 {
; CHECK-LABEL: @denormal_input_preserve_sign_fcmp_ult_smallest_normalized(
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp ueq float [[F32:%.*]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp ueq double [[F64:%.*]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp ueq half [[F16:%.*]], 0xH0000
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%f32.fabs = call float @llvm.fabs.f32(float %f32)
Expand All @@ -117,11 +117,11 @@ define void @denormal_input_preserve_sign_fcmp_ult_smallest_normalized(float %f3
define void @denormal_input_preserve_sign_vector_fcmp_olt_smallest_normalized(<2 x float> %f32, <2 x double> %f64, <2 x half> %f16) #0 {
; CHECK-LABEL: @denormal_input_preserve_sign_vector_fcmp_olt_smallest_normalized(
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp oeq <2 x float> [[F32:%.*]], zeroinitializer
; CHECK-NEXT: store volatile <2 x i1> [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile <2 x i1> [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp oeq <2 x double> [[F64:%.*]], zeroinitializer
; CHECK-NEXT: store volatile <2 x i1> [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile <2 x i1> [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp oeq <2 x half> [[F16:%.*]], zeroinitializer
; CHECK-NEXT: store volatile <2 x i1> [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile <2 x i1> [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%f32.fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %f32)
Expand All @@ -141,11 +141,11 @@ define void @denormal_input_preserve_sign_vector_fcmp_olt_smallest_normalized(<2
define void @denormal_input_preserve_sign_vector_fcmp_uge_smallest_normalized(<2 x float> %f32, <2 x double> %f64, <2 x half> %f16) #0 {
; CHECK-LABEL: @denormal_input_preserve_sign_vector_fcmp_uge_smallest_normalized(
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp une <2 x float> [[F32:%.*]], zeroinitializer
; CHECK-NEXT: store volatile <2 x i1> [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile <2 x i1> [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp une <2 x double> [[F64:%.*]], zeroinitializer
; CHECK-NEXT: store volatile <2 x i1> [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile <2 x i1> [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp une <2 x half> [[F16:%.*]], zeroinitializer
; CHECK-NEXT: store volatile <2 x i1> [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile <2 x i1> [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%f32.fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %f32)
Expand All @@ -165,11 +165,11 @@ define void @denormal_input_preserve_sign_vector_fcmp_uge_smallest_normalized(<2
define void @denormal_input_preserve_sign_vector_fcmp_oge_smallest_normalized(<2 x float> %f32, <2 x double> %f64, <2 x half> %f16) #0 {
; CHECK-LABEL: @denormal_input_preserve_sign_vector_fcmp_oge_smallest_normalized(
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp one <2 x float> [[F32:%.*]], zeroinitializer
; CHECK-NEXT: store volatile <2 x i1> [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile <2 x i1> [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp one <2 x double> [[F64:%.*]], zeroinitializer
; CHECK-NEXT: store volatile <2 x i1> [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile <2 x i1> [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp one <2 x half> [[F16:%.*]], zeroinitializer
; CHECK-NEXT: store volatile <2 x i1> [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile <2 x i1> [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%f32.fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %f32)
Expand All @@ -189,11 +189,11 @@ define void @denormal_input_preserve_sign_vector_fcmp_oge_smallest_normalized(<2
define void @denormal_input_preserve_sign_vector_fcmp_ult_smallest_normalized(<2 x float> %f32, <2 x double> %f64, <2 x half> %f16) #0 {
; CHECK-LABEL: @denormal_input_preserve_sign_vector_fcmp_ult_smallest_normalized(
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp ueq <2 x float> [[F32:%.*]], zeroinitializer
; CHECK-NEXT: store volatile <2 x i1> [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile <2 x i1> [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp ueq <2 x double> [[F64:%.*]], zeroinitializer
; CHECK-NEXT: store volatile <2 x i1> [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile <2 x i1> [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp ueq <2 x half> [[F16:%.*]], zeroinitializer
; CHECK-NEXT: store volatile <2 x i1> [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile <2 x i1> [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%f32.fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %f32)
Expand All @@ -215,11 +215,11 @@ define void @denormal_input_preserve_sign_vector_fcmp_ult_smallest_normalized(<2
define void @denormal_input_positive_zero_fcmp_olt_smallest_normalized(float %f32, double %f64, half %f16) #1 {
; CHECK-LABEL: @denormal_input_positive_zero_fcmp_olt_smallest_normalized(
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp oeq float [[F32:%.*]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp oeq double [[F64:%.*]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp oeq half [[F16:%.*]], 0xH0000
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%f32.fabs = call float @llvm.fabs.f32(float %f32)
Expand All @@ -241,13 +241,13 @@ define void @denormal_input_ieee(float %f32, double %f64, half %f16) #2 {
; CHECK-LABEL: @denormal_input_ieee(
; CHECK-NEXT: [[F32_FABS:%.*]] = call float @llvm.fabs.f32(float [[F32:%.*]])
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp olt float [[F32_FABS]], 0x3810000000000000
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[F64_FABS:%.*]] = call double @llvm.fabs.f64(double [[F64:%.*]])
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp olt double [[F64_FABS]], 0x10000000000000
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[F16_FABS:%.*]] = call half @llvm.fabs.f16(half [[F16:%.*]])
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp olt half [[F16_FABS]], 0xH0400
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%f32.fabs = call float @llvm.fabs.f32(float %f32)
Expand All @@ -268,13 +268,13 @@ define void @denormal_input_ieee(float %f32, double %f64, half %f16) #2 {
define void @denormal_input_preserve_sign_f32_only(float %f32, double %f64, half %f16) #3 {
; CHECK-LABEL: @denormal_input_preserve_sign_f32_only(
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp oeq float [[F32:%.*]], 0.000000e+00
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[F64_FABS:%.*]] = call double @llvm.fabs.f64(double [[F64:%.*]])
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp olt double [[F64_FABS]], 0x10000000000000
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[F16_FABS:%.*]] = call half @llvm.fabs.f16(half [[F16:%.*]])
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp olt half [[F16_FABS]], 0xH0400
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%f32.fabs = call float @llvm.fabs.f32(float %f32)
Expand All @@ -295,13 +295,13 @@ define void @wrong_fcmp_type_ole(float %f32, double %f64, half %f16) #0 {
; CHECK-LABEL: @wrong_fcmp_type_ole(
; CHECK-NEXT: [[F32_FABS:%.*]] = call float @llvm.fabs.f32(float [[F32:%.*]])
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp ole float [[F32_FABS]], 0x3810000000000000
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[F64_FABS:%.*]] = call double @llvm.fabs.f64(double [[F64:%.*]])
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp ole double [[F64_FABS]], 0x10000000000000
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[F16_FABS:%.*]] = call half @llvm.fabs.f16(half [[F16:%.*]])
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp ole half [[F16_FABS]], 0xH0400
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%f32.fabs = call float @llvm.fabs.f32(float %f32)
Expand All @@ -321,11 +321,11 @@ define void @wrong_fcmp_type_ole(float %f32, double %f64, half %f16) #0 {
define void @missing_fabs(float %f32, double %f64, half %f16) #0 {
; CHECK-LABEL: @missing_fabs(
; CHECK-NEXT: [[CMPF32:%.*]] = fcmp olt float [[F32:%.*]], 0x3810000000000000
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF32]], ptr @var, align 1
; CHECK-NEXT: [[CMPF64:%.*]] = fcmp olt double [[F64:%.*]], 0x10000000000000
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF64]], ptr @var, align 1
; CHECK-NEXT: [[CMPF16:%.*]] = fcmp olt half [[F16:%.*]], 0xH0400
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 4
; CHECK-NEXT: store volatile i1 [[CMPF16]], ptr @var, align 1
; CHECK-NEXT: ret void
;
%cmpf32 = fcmp olt float %f32, 0x3810000000000000
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/InstCombine/fp-ret-bitcast.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,8 @@ define void @bork() nounwind {
; CHECK-LABEL: @bork(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[COLOR:%.*]] = alloca ptr, align 8
; CHECK-NEXT: [[TMP103:%.*]] = load ptr, ptr [[COLOR]], align 8
; CHECK-NEXT: [[TMP105:%.*]] = load ptr, ptr @"\01L_OBJC_SELECTOR_REFERENCES_81", align 8
; CHECK-NEXT: [[TMP103:%.*]] = load ptr, ptr [[COLOR]], align 4
; CHECK-NEXT: [[TMP105:%.*]] = load ptr, ptr @"\01L_OBJC_SELECTOR_REFERENCES_81", align 4
; CHECK-NEXT: [[TMP107:%.*]] = call float @objc_msgSend_fpret(ptr [[TMP103]], ptr [[TMP105]]) #[[ATTR0:[0-9]+]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: exit:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/gep-custom-dl.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,7 @@ define void @test_evaluate_gep_nested_as_ptrs(ptr addrspace(2) %B) {

define void @test_evaluate_gep_as_ptrs_array(ptr addrspace(2) %B) {
; CHECK-LABEL: @test_evaluate_gep_as_ptrs_array(
; CHECK-NEXT: store ptr addrspace(2) [[B:%.*]], ptr addrspace(1) getelementptr inbounds ([4 x ptr addrspace(2)], ptr addrspace(1) @arst, i32 0, i32 2), align 16
; CHECK-NEXT: store ptr addrspace(2) [[B:%.*]], ptr addrspace(1) getelementptr inbounds ([4 x ptr addrspace(2)], ptr addrspace(1) @arst, i32 0, i32 2), align 8
; CHECK-NEXT: ret void
;

Expand Down
8 changes: 4 additions & 4 deletions llvm/test/Transforms/InstCombine/getelementptr.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -91,7 +91,7 @@ define void @test5_as1(i8 %B) {
; This should be turned into a constexpr instead of being an instruction
define void @test_evaluate_gep_nested_as_ptrs(ptr addrspace(2) %B) {
; CHECK-LABEL: @test_evaluate_gep_nested_as_ptrs(
; CHECK-NEXT: store ptr addrspace(2) [[B:%.*]], ptr addrspace(1) @global_as1_as2_ptr, align 8
; CHECK-NEXT: store ptr addrspace(2) [[B:%.*]], ptr addrspace(1) @global_as1_as2_ptr, align 4
; CHECK-NEXT: ret void
;
store ptr addrspace(2) %B, ptr addrspace(1) @global_as1_as2_ptr
Expand Down Expand Up @@ -458,7 +458,7 @@ define i32 @test20_as1(ptr addrspace(1) %P, i32 %A, i32 %B) {
define i32 @test21() {
; CHECK-LABEL: @test21(
; CHECK-NEXT: [[PBOB1:%.*]] = alloca [[INTSTRUCT:%.*]], align 8
; CHECK-NEXT: [[RVAL:%.*]] = load i32, ptr [[PBOB1]], align 8
; CHECK-NEXT: [[RVAL:%.*]] = load i32, ptr [[PBOB1]], align 4
; CHECK-NEXT: ret i32 [[RVAL]]
;
%pbob1 = alloca %intstruct
Expand Down Expand Up @@ -668,11 +668,11 @@ define i1 @test31(ptr %A) {
define ptr @test32(ptr %v) {
; CHECK-LABEL: @test32(
; CHECK-NEXT: [[A:%.*]] = alloca [4 x ptr], align 16
; CHECK-NEXT: store ptr null, ptr [[A]], align 16
; CHECK-NEXT: store ptr null, ptr [[A]], align 8
; CHECK-NEXT: [[D:%.*]] = getelementptr inbounds { [16 x i8] }, ptr [[A]], i64 0, i32 0, i64 8
; CHECK-NEXT: store ptr [[V:%.*]], ptr [[D]], align 8
; CHECK-NEXT: [[F:%.*]] = getelementptr inbounds [4 x ptr], ptr [[A]], i64 0, i64 2
; CHECK-NEXT: [[G:%.*]] = load ptr, ptr [[F]], align 16
; CHECK-NEXT: [[G:%.*]] = load ptr, ptr [[F]], align 8
; CHECK-NEXT: ret ptr [[G]]
;
%A = alloca [4 x ptr], align 16
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/InstCombine/load-cmp.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -216,7 +216,7 @@ define i1 @test10_struct(i32 %x) {
define i1 @test10_struct_noinbounds(i32 %x) {
; CHECK-LABEL: @test10_struct_noinbounds(
; CHECK-NEXT: [[P:%.*]] = getelementptr [[FOO:%.*]], ptr @GS, i32 [[X:%.*]], i32 0
; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[P]], align 8
; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[Q]], 9
; CHECK-NEXT: ret i1 [[R]]
;
Expand Down Expand Up @@ -254,7 +254,7 @@ define i1 @test10_struct_noinbounds_i16(i16 %x) {
; CHECK-LABEL: @test10_struct_noinbounds_i16(
; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[X:%.*]] to i32
; CHECK-NEXT: [[P:%.*]] = getelementptr [[FOO:%.*]], ptr @GS, i32 [[TMP1]], i32 0
; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[P]], align 8
; CHECK-NEXT: [[Q:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[Q]], 0
; CHECK-NEXT: ret i1 [[R]]
;
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/load-combine-metadata-dominance.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -125,7 +125,7 @@ define void @combine_metadata_dominance6(ptr %p) {
; CHECK-NEXT: br label [[BB1:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[A:%.*]] = load ptr, ptr [[P]], align 8, !align !2, !noundef !0
; CHECK-NEXT: store i32 0, ptr [[A]], align 8
; CHECK-NEXT: store i32 0, ptr [[A]], align 4
; CHECK-NEXT: ret void
;
entry:
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/Transforms/InstCombine/load.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -175,9 +175,9 @@ define <16 x i8> @test13(<2 x i64> %x) {
define i8 @test14(i8 %x, i32 %y) {
; CHECK-LABEL: @test14(
; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i8 [[X:%.*]], ptr [[A]], align 4
; CHECK-NEXT: store i8 [[X:%.*]], ptr [[A]], align 1
; CHECK-NEXT: store i32 [[Y:%.*]], ptr [[A]], align 4
; CHECK-NEXT: [[R:%.*]] = load i8, ptr [[A]], align 4
; CHECK-NEXT: [[R:%.*]] = load i8, ptr [[A]], align 1
; CHECK-NEXT: ret i8 [[R]]
;
%a = alloca i32
Expand All @@ -193,9 +193,9 @@ define i8 @test14(i8 %x, i32 %y) {

define i8 @test15(i8 %x, i32 %y) {
; CHECK-LABEL: @test15(
; CHECK-NEXT: store i8 [[X:%.*]], ptr @test15_global, align 4
; CHECK-NEXT: store i8 [[X:%.*]], ptr @test15_global, align 1
; CHECK-NEXT: store i32 [[Y:%.*]], ptr @test15_global, align 4
; CHECK-NEXT: [[R:%.*]] = load i8, ptr @test15_global, align 4
; CHECK-NEXT: [[R:%.*]] = load i8, ptr @test15_global, align 1
; CHECK-NEXT: ret i8 [[R]]
;
store i8 %x, ptr @test15_global
Expand Down Expand Up @@ -420,7 +420,7 @@ define i32 @load_via_strip_invariant_group() {

define i4 @test_vector_load_i4_non_byte_sized() {
; CHECK-LABEL: @test_vector_load_i4_non_byte_sized(
; CHECK-NEXT: [[RES0:%.*]] = load i4, ptr @foo, align 8
; CHECK-NEXT: [[RES0:%.*]] = load i4, ptr @foo, align 1
; CHECK-NEXT: ret i4 [[RES0]]
;
%ptr0 = getelementptr i8, ptr @foo, i64 0
Expand Down
20 changes: 10 additions & 10 deletions llvm/test/Transforms/InstCombine/loadstore-alignment.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ target datalayout = "E-p:64:64:64-p1:64:64:64-p2:32:32:32-a0:0:8-f32:32:32-f64:6

define <2 x i64> @static_hem() {
; CHECK-LABEL: @static_hem(
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr getelementptr (<2 x i64>, ptr @x, i64 7), align 16
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr getelementptr (<2 x i64>, ptr @x, i64 7), align 1
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%t = getelementptr <2 x i64>, ptr @x, i32 7
Expand All @@ -21,7 +21,7 @@ define <2 x i64> @hem(i32 %i) {
; CHECK-LABEL: @hem(
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64
; CHECK-NEXT: [[T:%.*]] = getelementptr <2 x i64>, ptr @x, i64 [[TMP1]]
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr [[T]], align 16
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr [[T]], align 1
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%t = getelementptr <2 x i64>, ptr @x, i32 %i
Expand All @@ -34,7 +34,7 @@ define <2 x i64> @hem_2d(i32 %i, i32 %j) {
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[J:%.*]] to i64
; CHECK-NEXT: [[T:%.*]] = getelementptr [13 x <2 x i64>], ptr @xx, i64 [[TMP1]], i64 [[TMP2]]
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr [[T]], align 16
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr [[T]], align 1
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%t = getelementptr [13 x <2 x i64>], ptr @xx, i32 %i, i32 %j
Expand All @@ -44,7 +44,7 @@ define <2 x i64> @hem_2d(i32 %i, i32 %j) {

define <2 x i64> @foo() {
; CHECK-LABEL: @foo(
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @x, align 16
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @x, align 1
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%tmp1 = load <2 x i64>, ptr @x, align 1
Expand All @@ -55,7 +55,7 @@ define <2 x i64> @bar() {
; CHECK-LABEL: @bar(
; CHECK-NEXT: [[T:%.*]] = alloca <2 x i64>, align 16
; CHECK-NEXT: call void @kip(ptr nonnull [[T]])
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr [[T]], align 16
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr [[T]], align 1
; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%t = alloca <2 x i64>
Expand All @@ -66,7 +66,7 @@ define <2 x i64> @bar() {

define void @static_hem_store(<2 x i64> %y) {
; CHECK-LABEL: @static_hem_store(
; CHECK-NEXT: store <2 x i64> [[Y:%.*]], ptr getelementptr (<2 x i64>, ptr @x, i64 7), align 16
; CHECK-NEXT: store <2 x i64> [[Y:%.*]], ptr getelementptr (<2 x i64>, ptr @x, i64 7), align 1
; CHECK-NEXT: ret void
;
%t = getelementptr <2 x i64>, ptr @x, i32 7
Expand All @@ -78,7 +78,7 @@ define void @hem_store(i32 %i, <2 x i64> %y) {
; CHECK-LABEL: @hem_store(
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64
; CHECK-NEXT: [[T:%.*]] = getelementptr <2 x i64>, ptr @x, i64 [[TMP1]]
; CHECK-NEXT: store <2 x i64> [[Y:%.*]], ptr [[T]], align 16
; CHECK-NEXT: store <2 x i64> [[Y:%.*]], ptr [[T]], align 1
; CHECK-NEXT: ret void
;
%t = getelementptr <2 x i64>, ptr @x, i32 %i
Expand All @@ -91,7 +91,7 @@ define void @hem_2d_store(i32 %i, i32 %j, <2 x i64> %y) {
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[J:%.*]] to i64
; CHECK-NEXT: [[T:%.*]] = getelementptr [13 x <2 x i64>], ptr @xx, i64 [[TMP1]], i64 [[TMP2]]
; CHECK-NEXT: store <2 x i64> [[Y:%.*]], ptr [[T]], align 16
; CHECK-NEXT: store <2 x i64> [[Y:%.*]], ptr [[T]], align 1
; CHECK-NEXT: ret void
;
%t = getelementptr [13 x <2 x i64>], ptr @xx, i32 %i, i32 %j
Expand All @@ -101,7 +101,7 @@ define void @hem_2d_store(i32 %i, i32 %j, <2 x i64> %y) {

define void @foo_store(<2 x i64> %y) {
; CHECK-LABEL: @foo_store(
; CHECK-NEXT: store <2 x i64> [[Y:%.*]], ptr @x, align 16
; CHECK-NEXT: store <2 x i64> [[Y:%.*]], ptr @x, align 1
; CHECK-NEXT: ret void
;
store <2 x i64> %y, ptr @x, align 1
Expand All @@ -112,7 +112,7 @@ define void @bar_store(<2 x i64> %y) {
; CHECK-LABEL: @bar_store(
; CHECK-NEXT: [[T:%.*]] = alloca <2 x i64>, align 16
; CHECK-NEXT: call void @kip(ptr nonnull [[T]])
; CHECK-NEXT: store <2 x i64> [[Y:%.*]], ptr [[T]], align 16
; CHECK-NEXT: store <2 x i64> [[Y:%.*]], ptr [[T]], align 1
; CHECK-NEXT: ret void
;
%t = alloca <2 x i64>
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/InstCombine/memcpy-from-global.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ define float @test1(i32 %hash, float %x, float %y, float %z, float %w) {
; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP3]], 124
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[TMP5]] to i64
; CHECK-NEXT: [[TMP753:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP0]]
; CHECK-NEXT: [[TMP9:%.*]] = load float, ptr [[TMP753]], align 16
; CHECK-NEXT: [[TMP9:%.*]] = load float, ptr [[TMP753]], align 4
; CHECK-NEXT: [[TMP11:%.*]] = fmul float [[TMP9]], [[X:%.*]]
; CHECK-NEXT: [[TMP13:%.*]] = fadd float [[TMP11]], 0.000000e+00
; CHECK-NEXT: [[TMP17_SUM52:%.*]] = or i32 [[TMP5]], 1
Expand All @@ -22,7 +22,7 @@ define float @test1(i32 %hash, float %x, float %y, float %z, float %w) {
; CHECK-NEXT: [[TMP27_SUM50:%.*]] = or i32 [[TMP5]], 2
; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP27_SUM50]] to i64
; CHECK-NEXT: [[TMP2849:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP2]]
; CHECK-NEXT: [[TMP29:%.*]] = load float, ptr [[TMP2849]], align 8
; CHECK-NEXT: [[TMP29:%.*]] = load float, ptr [[TMP2849]], align 4
; CHECK-NEXT: [[TMP31:%.*]] = fmul float [[TMP29]], [[Z:%.*]]
; CHECK-NEXT: [[TMP33:%.*]] = fadd float [[TMP31]], [[TMP23]]
; CHECK-NEXT: [[TMP37_SUM48:%.*]] = or i32 [[TMP5]], 3
Expand Down
31 changes: 16 additions & 15 deletions llvm/test/Transforms/InstCombine/merging-multiple-stores-into-successor.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,12 +30,11 @@ define void @_Z4testv() {
; CHECK-NEXT: [[I11:%.*]] = trunc i64 [[I7]] to i32
; CHECK-NEXT: br label [[BB12]]
; CHECK: bb12:
; CHECK-NEXT: [[STOREMERGE1:%.*]] = phi i32 [ [[I11]], [[BB10]] ], [ 1, [[BB9]] ]
; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32 [ 1, [[BB9]] ], [ [[I11]], [[BB10]] ]
; CHECK-NEXT: store i32 [[STOREMERGE1]], ptr @arr_2, align 4
; CHECK-NEXT: store i32 [[STOREMERGE]], ptr @arr_2, align 4
; CHECK-NEXT: store i16 [[I4]], ptr @arr_4, align 2
; CHECK-NEXT: [[I8:%.*]] = sext i16 [[I4]] to i32
; CHECK-NEXT: store i32 [[I8]], ptr @arr_3, align 16
; CHECK-NEXT: store i32 [[I8]], ptr @arr_3, align 4
; CHECK-NEXT: store i32 [[STOREMERGE]], ptr getelementptr inbounds ([0 x i32], ptr @arr_2, i64 0, i64 1), align 4
; CHECK-NEXT: store i16 [[I4]], ptr getelementptr inbounds ([0 x i16], ptr @arr_4, i64 0, i64 1), align 2
; CHECK-NEXT: store i32 [[I8]], ptr getelementptr inbounds ([8 x i32], ptr @arr_3, i64 0, i64 1), align 4
Expand Down Expand Up @@ -109,13 +108,13 @@ define i32 @diff_types_diff_width_no_merge(i1 %cond, i32 %a, i64 %b) {
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i64, align 8
; CHECK-NEXT: br i1 [[COND:%.*]], label [[A:%.*]], label [[B:%.*]]
; CHECK: A:
; CHECK-NEXT: store i32 [[A:%.*]], ptr [[ALLOCA]], align 8
; CHECK-NEXT: store i32 [[A:%.*]], ptr [[ALLOCA]], align 4
; CHECK-NEXT: br label [[SINK:%.*]]
; CHECK: B:
; CHECK-NEXT: store i64 [[B:%.*]], ptr [[ALLOCA]], align 8
; CHECK-NEXT: store i64 [[B:%.*]], ptr [[ALLOCA]], align 4
; CHECK-NEXT: br label [[SINK]]
; CHECK: sink:
; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[ALLOCA]], align 8
; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[ALLOCA]], align 4
; CHECK-NEXT: ret i32 [[VAL]]
;
entry:
Expand All @@ -135,10 +134,10 @@ sink:
define <4 x i32> @vec_no_merge(i1 %cond, <2 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @vec_no_merge(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i64, align 16
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i64, align 8
; CHECK-NEXT: br i1 [[COND:%.*]], label [[A:%.*]], label [[B:%.*]]
; CHECK: A:
; CHECK-NEXT: store <2 x i32> [[A:%.*]], ptr [[ALLOCA]], align 16
; CHECK-NEXT: store <2 x i32> [[A:%.*]], ptr [[ALLOCA]], align 8
; CHECK-NEXT: br label [[SINK:%.*]]
; CHECK: B:
; CHECK-NEXT: store <4 x i32> [[B:%.*]], ptr [[ALLOCA]], align 16
Expand Down Expand Up @@ -199,13 +198,13 @@ define %struct.tup @multi_elem_struct_no_merge(i1 %cond, %struct.tup %a, half %b
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i64, align 8
; CHECK-NEXT: br i1 [[COND:%.*]], label [[A:%.*]], label [[B:%.*]]
; CHECK: A:
; CHECK-NEXT: store [[STRUCT_TUP:%.*]] [[A:%.*]], ptr [[ALLOCA]], align 8
; CHECK-NEXT: store [[STRUCT_TUP:%.*]] [[A:%.*]], ptr [[ALLOCA]], align 4
; CHECK-NEXT: br label [[SINK:%.*]]
; CHECK: B:
; CHECK-NEXT: store half [[B:%.*]], ptr [[ALLOCA]], align 8
; CHECK-NEXT: store half [[B:%.*]], ptr [[ALLOCA]], align 2
; CHECK-NEXT: br label [[SINK]]
; CHECK: sink:
; CHECK-NEXT: [[VAL:%.*]] = load [[STRUCT_TUP]], ptr [[ALLOCA]], align 8
; CHECK-NEXT: [[VAL:%.*]] = load [[STRUCT_TUP]], ptr [[ALLOCA]], align 4
; CHECK-NEXT: ret [[STRUCT_TUP]] [[VAL]]
;
entry:
Expand Down Expand Up @@ -234,7 +233,7 @@ define i16 @same_types_diff_align_no_merge(i1 %cond, i16 %a, i16 %b) {
; CHECK-NEXT: store i16 [[B:%.*]], ptr [[ALLOCA]], align 4
; CHECK-NEXT: br label [[SINK]]
; CHECK: sink:
; CHECK-NEXT: [[VAL:%.*]] = load i16, ptr [[ALLOCA]], align 4
; CHECK-NEXT: [[VAL:%.*]] = load i16, ptr [[ALLOCA]], align 2
; CHECK-NEXT: ret i16 [[VAL]]
;
entry:
Expand All @@ -254,15 +253,17 @@ sink:
define i64 @ptrtoint_merge(i1 %cond, i64 %a, ptr %b) {
; CHECK-LABEL: @ptrtoint_merge(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca ptr, align 8
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB0:%.*]], label [[BB1:%.*]]
; CHECK: BB0:
; CHECK-NEXT: store i64 [[A:%.*]], ptr [[ALLOCA]], align 4
; CHECK-NEXT: br label [[SINK:%.*]]
; CHECK: BB1:
; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[B:%.*]] to i64
; CHECK-NEXT: store ptr [[B:%.*]], ptr [[ALLOCA]], align 8
; CHECK-NEXT: br label [[SINK]]
; CHECK: sink:
; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i64 [ [[A:%.*]], [[BB0]] ], [ [[TMP0]], [[BB1]] ]
; CHECK-NEXT: ret i64 [[STOREMERGE]]
; CHECK-NEXT: [[VAL:%.*]] = load i64, ptr [[ALLOCA]], align 4
; CHECK-NEXT: ret i64 [[VAL]]
;
entry:
%alloca = alloca ptr
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/InstCombine/phi.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -508,8 +508,8 @@ define i32 @test16(ptr addrspace(1) %pointer1, i32 %flag, ptr %pointer2)
; CHECK-LABEL: @test16(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[POINTER1_ADDR:%.*]] = alloca ptr addrspace(1), align 8
; CHECK-NEXT: [[POINTER2_ADDR:%.*]] = alloca ptr, align 8
; CHECK-NEXT: [[POINTER1_ADDR:%.*]] = alloca ptr addrspace(1), align 4
; CHECK-NEXT: [[POINTER2_ADDR:%.*]] = alloca ptr, align 4
; CHECK-NEXT: store ptr addrspace(1) [[POINTER1:%.*]], ptr [[POINTER1_ADDR]], align 8
; CHECK-NEXT: store ptr [[POINTER2:%.*]], ptr [[POINTER2_ADDR]], align 8
; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[FLAG:%.*]], 0
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/InstCombine/pr33689_same_bitwidth.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,9 @@ define void @f(i1 %cond) {
; CHECK: bb2:
; CHECK-NEXT: [[T9:%.*]] = load ptr, ptr @b, align 2
; CHECK-NEXT: store i16 0, ptr [[T9]], align 2
; CHECK-NEXT: [[T10:%.*]] = load i32, ptr [[T1]], align 8
; CHECK-NEXT: [[T10:%.*]] = load i32, ptr [[T1]], align 4
; CHECK-NEXT: [[T11:%.*]] = add i32 [[T10]], -1
; CHECK-NEXT: store i32 [[T11]], ptr [[T1]], align 8
; CHECK-NEXT: store i32 [[T11]], ptr [[T1]], align 4
; CHECK-NEXT: ret void
;
bb0:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/pr44552.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@
define i16 @main() {
; CHECK-LABEL: @main(
; CHECK-NEXT: entry:
; CHECK-NEXT: store i64 0, ptr @csmith_sink_, align 8
; CHECK-NEXT: store i64 0, ptr @csmith_sink_, align 1
; CHECK-NEXT: ret i16 0
;
entry:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/pr59613.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
; This used to crash, depending on the particular worklist iteration order.
define void @pr59613(<6 x i16> %0) {
; CHECK-LABEL: @pr59613(
; CHECK-NEXT: store <6 x i16> poison, ptr null, align 4294967296
; CHECK-NEXT: store <6 x i16> poison, ptr null, align 16
; CHECK-NEXT: ret void
;
%cmp1 = icmp ne <6 x i16> %0, zeroinitializer
Expand Down
32 changes: 16 additions & 16 deletions llvm/test/Transforms/InstCombine/scalable-cast-of-alloc.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -21,9 +21,9 @@ entry:
define void @scalable4i32_to_fixed16i32(ptr %out) {
; CHECK-LABEL: @scalable4i32_to_fixed16i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 4 x i32>, align 64
; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr [[TMP]], align 64
; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <16 x i32>, ptr [[TMP]], align 64
; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 4 x i32>, align 16
; CHECK-NEXT: store <16 x i32> zeroinitializer, ptr [[TMP]], align 16
; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <16 x i32>, ptr [[TMP]], align 16
; CHECK-NEXT: store <16 x i32> [[RELOAD]], ptr [[OUT:%.*]], align 16
; CHECK-NEXT: ret void
;
Expand Down Expand Up @@ -55,9 +55,9 @@ entry:
define void @scalable16i32_to_fixed16i32(ptr %out) {
; CHECK-LABEL: @scalable16i32_to_fixed16i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 16 x i32>, align 64
; CHECK-NEXT: store volatile <16 x i32> zeroinitializer, ptr [[TMP]], align 64
; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <16 x i32>, ptr [[TMP]], align 64
; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 16 x i32>, align 16
; CHECK-NEXT: store volatile <16 x i32> zeroinitializer, ptr [[TMP]], align 16
; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <16 x i32>, ptr [[TMP]], align 16
; CHECK-NEXT: store <16 x i32> [[RELOAD]], ptr [[OUT:%.*]], align 16
; CHECK-NEXT: ret void
;
Expand All @@ -72,9 +72,9 @@ entry:
define void @scalable32i32_to_scalable16i32(ptr %out) {
; CHECK-LABEL: @scalable32i32_to_scalable16i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 32 x i32>, align 64
; CHECK-NEXT: store volatile <vscale x 16 x i32> zeroinitializer, ptr [[TMP]], align 64
; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <vscale x 16 x i32>, ptr [[TMP]], align 64
; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 32 x i32>, align 16
; CHECK-NEXT: store volatile <vscale x 16 x i32> zeroinitializer, ptr [[TMP]], align 16
; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <vscale x 16 x i32>, ptr [[TMP]], align 16
; CHECK-NEXT: store <vscale x 16 x i32> [[RELOAD]], ptr [[OUT:%.*]], align 16
; CHECK-NEXT: ret void
;
Expand All @@ -89,9 +89,9 @@ entry:
define void @scalable32i16_to_scalable16i32(ptr %out) {
; CHECK-LABEL: @scalable32i16_to_scalable16i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 32 x i16>, align 64
; CHECK-NEXT: store volatile <vscale x 16 x i32> zeroinitializer, ptr [[TMP]], align 64
; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <vscale x 16 x i32>, ptr [[TMP]], align 64
; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 32 x i16>, align 16
; CHECK-NEXT: store volatile <vscale x 16 x i32> zeroinitializer, ptr [[TMP]], align 16
; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <vscale x 16 x i32>, ptr [[TMP]], align 16
; CHECK-NEXT: store <vscale x 16 x i32> [[RELOAD]], ptr [[OUT:%.*]], align 16
; CHECK-NEXT: ret void
;
Expand All @@ -106,11 +106,11 @@ entry:
define void @scalable32i16_to_scalable16i32_multiuse(ptr %out, ptr %out2) {
; CHECK-LABEL: @scalable32i16_to_scalable16i32_multiuse(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 32 x i16>, align 64
; CHECK-NEXT: store volatile <vscale x 16 x i32> zeroinitializer, ptr [[TMP]], align 64
; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <vscale x 16 x i32>, ptr [[TMP]], align 64
; CHECK-NEXT: [[TMP:%.*]] = alloca <vscale x 32 x i16>, align 16
; CHECK-NEXT: store volatile <vscale x 16 x i32> zeroinitializer, ptr [[TMP]], align 16
; CHECK-NEXT: [[RELOAD:%.*]] = load volatile <vscale x 16 x i32>, ptr [[TMP]], align 16
; CHECK-NEXT: store <vscale x 16 x i32> [[RELOAD]], ptr [[OUT:%.*]], align 16
; CHECK-NEXT: [[RELOAD2:%.*]] = load volatile <vscale x 32 x i16>, ptr [[TMP]], align 64
; CHECK-NEXT: [[RELOAD2:%.*]] = load volatile <vscale x 32 x i16>, ptr [[TMP]], align 16
; CHECK-NEXT: store <vscale x 32 x i16> [[RELOAD2]], ptr [[OUT2:%.*]], align 16
; CHECK-NEXT: ret void
;
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/Transforms/InstCombine/select.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1212,8 +1212,8 @@ define ptr @test83(i1 %flag) {
; CHECK-NEXT: [[Y:%.*]] = alloca i64, align 8
; CHECK-NEXT: call void @scribble_on_i64(ptr nonnull [[X]])
; CHECK-NEXT: call void @scribble_on_i64(ptr nonnull [[Y]])
; CHECK-NEXT: [[T:%.*]] = load i64, ptr [[X]], align 8
; CHECK-NEXT: store i64 [[T]], ptr [[Y]], align 8
; CHECK-NEXT: [[T:%.*]] = load i64, ptr [[X]], align 4
; CHECK-NEXT: store i64 [[T]], ptr [[Y]], align 4
; CHECK-NEXT: [[V:%.*]] = inttoptr i64 [[T]] to ptr
; CHECK-NEXT: ret ptr [[V]]
;
Expand Down Expand Up @@ -1261,8 +1261,8 @@ define ptr @test85(i1 %flag) {
; CHECK-NEXT: [[Y:%.*]] = alloca i128, align 8
; CHECK-NEXT: call void @scribble_on_i128(ptr nonnull [[X]])
; CHECK-NEXT: call void @scribble_on_i128(ptr nonnull [[Y]])
; CHECK-NEXT: [[T:%.*]] = load i128, ptr [[X]], align 8
; CHECK-NEXT: store i128 [[T]], ptr [[Y]], align 8
; CHECK-NEXT: [[T:%.*]] = load i128, ptr [[X]], align 4
; CHECK-NEXT: store i128 [[T]], ptr [[Y]], align 4
; CHECK-NEXT: [[X_VAL:%.*]] = load ptr, ptr [[X]], align 8
; CHECK-NEXT: [[Y_VAL:%.*]] = load ptr, ptr [[Y]], align 8
; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG:%.*]], ptr [[X_VAL]], ptr [[Y_VAL]]
Expand Down Expand Up @@ -1290,8 +1290,8 @@ define i128 @test86(i1 %flag) {
; CHECK-NEXT: call void @scribble_on_i128(ptr nonnull [[Y]])
; CHECK-NEXT: [[T:%.*]] = load ptr, ptr [[X]], align 8
; CHECK-NEXT: store ptr [[T]], ptr [[Y]], align 8
; CHECK-NEXT: [[X_VAL:%.*]] = load i128, ptr [[X]], align 8
; CHECK-NEXT: [[Y_VAL:%.*]] = load i128, ptr [[Y]], align 8
; CHECK-NEXT: [[X_VAL:%.*]] = load i128, ptr [[X]], align 4
; CHECK-NEXT: [[Y_VAL:%.*]] = load i128, ptr [[Y]], align 4
; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG:%.*]], i128 [[X_VAL]], i128 [[Y_VAL]]
; CHECK-NEXT: ret i128 [[V]]
;
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/store.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,7 @@ define void @store_into_undef(ptr %P) {

define void @store_into_null(ptr %P) {
; CHECK-LABEL: @store_into_null(
; CHECK-NEXT: store i32 poison, ptr null, align 4294967296
; CHECK-NEXT: store i32 poison, ptr null, align 4
; CHECK-NEXT: ret void
;
store i32 124, ptr null
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/trivial-dse-calls.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -124,7 +124,7 @@ define void @test_neg_unmodeled_write() {
define i32 @test_neg_captured_by_call() {
; CHECK-LABEL: @test_neg_captured_by_call(
; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[A2:%.*]] = alloca ptr, align 8
; CHECK-NEXT: [[A2:%.*]] = alloca ptr, align 4
; CHECK-NEXT: call void @f2(ptr nonnull writeonly [[A]], ptr nonnull [[A2]]) #[[ATTR3]]
; CHECK-NEXT: [[A_COPY_CAST:%.*]] = load ptr, ptr [[A2]], align 8
; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[A_COPY_CAST]], align 4
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/InstCombine/vscale_gep.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@ define i32 @gep_alloca_inbounds_vscale_zero() {
; CHECK-LABEL: @gep_alloca_inbounds_vscale_zero(
; CHECK-NEXT: [[A:%.*]] = alloca <vscale x 4 x i32>, align 16
; CHECK-NEXT: [[TMP:%.*]] = getelementptr inbounds <vscale x 4 x i32>, ptr [[A]], i64 0, i64 2
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[TMP]], align 8
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[TMP]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
%a = alloca <vscale x 4 x i32>
Expand All @@ -55,7 +55,7 @@ define i32 @gep_alloca_inbounds_vscale_nonzero() {
; CHECK-LABEL: @gep_alloca_inbounds_vscale_nonzero(
; CHECK-NEXT: [[A:%.*]] = alloca <vscale x 4 x i32>, align 16
; CHECK-NEXT: [[TMP:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[A]], i64 1, i64 2
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[TMP]], align 8
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[TMP]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
%a = alloca <vscale x 4 x i32>
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/LoopVectorize/X86/pr42674.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,8 +9,8 @@
define zeroext i8 @sum() {
; CHECK-LABEL: @sum(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <64 x i8>, ptr getelementptr inbounds ([128 x i8], ptr @bytes, i64 0, i64 64), align 16
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <64 x i8>, ptr @bytes, align 16
; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <64 x i8>, ptr getelementptr inbounds ([128 x i8], ptr @bytes, i64 0, i64 64), align 1
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <64 x i8>, ptr @bytes, align 1
; CHECK-NEXT: [[BIN_RDX:%.*]] = add <64 x i8> [[WIDE_LOAD2]], [[WIDE_LOAD]]
; CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.vector.reduce.add.v64i8(<64 x i8> [[BIN_RDX]])
; CHECK-NEXT: ret i8 [[TMP0]]
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/Transforms/LoopVectorize/X86/small-size.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -29,12 +29,12 @@ define void @example1() optsize {
; CHECK: vector.body:
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[INDEX]]
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 16
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[INDEX]]
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP2]], align 16
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP2]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]]
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[INDEX]]
; CHECK-NEXT: store <4 x i32> [[TMP3]], ptr [[TMP4]], align 16
; CHECK-NEXT: store <4 x i32> [[TMP3]], ptr [[TMP4]], align 4
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256
; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
Expand Down Expand Up @@ -90,7 +90,7 @@ define void @example2(i32 %n, i32 %x) optsize {
; CHECK-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
; CHECK: pred.store.if:
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[INDEX]]
; CHECK-NEXT: store i32 [[X:%.*]], ptr [[TMP5]], align 16
; CHECK-NEXT: store i32 [[X:%.*]], ptr [[TMP5]], align 4
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]]
; CHECK: pred.store.continue:
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP3]], i64 1
Expand All @@ -106,7 +106,7 @@ define void @example2(i32 %n, i32 %x) optsize {
; CHECK: pred.store.if3:
; CHECK-NEXT: [[TMP10:%.*]] = or i64 [[INDEX]], 2
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP10]]
; CHECK-NEXT: store i32 [[X]], ptr [[TMP11]], align 8
; CHECK-NEXT: store i32 [[X]], ptr [[TMP11]], align 4
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]]
; CHECK: pred.store.continue4:
; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP3]], i64 3
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -25,10 +25,10 @@ define i32 @main() #0 {
; CHECK: vector.body:
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [40000 x i8], ptr addrspace(1) @Y, i64 0, i64 [[INDEX]]
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr addrspace(1) [[TMP0]], align 4
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr addrspace(1) [[TMP0]], align 1
; CHECK-NEXT: [[TMP1:%.*]] = add <4 x i8> [[WIDE_LOAD]], <i8 1, i8 1, i8 1, i8 1>
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [40000 x i8], ptr @X, i64 0, i64 [[INDEX]]
; CHECK-NEXT: store <4 x i8> [[TMP1]], ptr [[TMP2]], align 4
; CHECK-NEXT: store <4 x i8> [[TMP1]], ptr [[TMP2]], align 1
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 40000
; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/Transforms/LoopVectorize/non-const-n.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,12 +20,12 @@ define void @example1(i32 %n) nounwind uwtable ssp {
; CHECK: vector.body:
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[INDEX]]
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP2]], align 16
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP2]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[INDEX]]
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP3]], align 16
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP3]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]]
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[INDEX]]
; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[TMP5]], align 16
; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[TMP5]], align 4
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX]], [[TMP1]]
; CHECK-NEXT: br i1 [[TMP6]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@ define void @caller1(i1 %c, ptr align 1 %ptr) {
; ASSUMPTIONS-OFF-NEXT: br i1 [[C:%.*]], label [[COMMON_RET:%.*]], label [[FALSE2:%.*]]
; ASSUMPTIONS-OFF: common.ret:
; ASSUMPTIONS-OFF-NEXT: [[DOTSINK:%.*]] = phi i64 [ 3, [[FALSE2]] ], [ 2, [[TMP0:%.*]] ]
; ASSUMPTIONS-OFF-NEXT: store volatile i64 0, ptr [[PTR:%.*]], align 8
; ASSUMPTIONS-OFF-NEXT: store volatile i64 0, ptr [[PTR:%.*]], align 4
; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, ptr [[PTR]], align 4
; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, ptr [[PTR]], align 4
; ASSUMPTIONS-OFF-NEXT: store volatile i64 -1, ptr [[PTR]], align 4
Expand Down