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@@ -18,6 +18,7 @@ declare <vscale x 1 x i64> @llvm.riscv.vle.mask.nxv1i64(
define <vscale x 1 x double > @test1 (i64 %avl , <vscale x 1 x double > %a , <vscale x 1 x double > %b ) nounwind {
; CHECK-LABEL: test1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli a0, a0, e32, mf2, ta, mu
; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, mu
; CHECK-NEXT: vfadd.vv v8, v8, v9
; CHECK-NEXT: ret
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@@ -412,7 +413,7 @@ define i64 @avl_forward1b_neg(<vscale x 2 x i32> %v, <vscale x 2 x i32>* %p) nou
; CHECK-LABEL: avl_forward1b_neg:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetivli a1, 6, e16, m1, ta, mu
; CHECK-NEXT: vsetivli zero, 6 , e32, m1, ta, mu
; CHECK-NEXT: vsetvli zero, a1 , e32, m1, ta, mu
; CHECK-NEXT: vse32.v v8, (a0)
; CHECK-NEXT: mv a0, a1
; CHECK-NEXT: ret
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@@ -467,6 +468,7 @@ entry:
define void @avl_forward4 (<vscale x 2 x i32 > %v , <vscale x 2 x i32 >* %p , i64 %reg ) nounwind {
; CHECK-LABEL: avl_forward4:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli a1, a1, e16, m1, ta, mu
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, mu
; CHECK-NEXT: vse32.v v8, (a0)
; CHECK-NEXT: ret
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@@ -480,10 +482,10 @@ entry:
define i64 @avl_forward4b (<vscale x 2 x i32 > %v , <vscale x 2 x i32 >* %p , i64 %reg ) nounwind {
; CHECK-LABEL: avl_forward4b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli a2 , a1, e16, m1, ta, mu
; CHECK-NEXT: vsetvli a1 , a1, e16, m1, ta, mu
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, mu
; CHECK-NEXT: vse32.v v8, (a0)
; CHECK-NEXT: mv a0, a2
; CHECK-NEXT: mv a0, a1
; CHECK-NEXT: ret
entry:
%vl = tail call i64 @llvm.riscv.vsetvli (i64 %reg , i64 1 , i64 0 )
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@@ -496,6 +498,7 @@ entry:
define <vscale x 1 x i64 > @vleNff (i64* %str , i64 %n , i64 %x ) {
; CHECK-LABEL: vleNff:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli a1, a1, e8, m4, ta, mu
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, mu
; CHECK-NEXT: vle64ff.v v8, (a0)
; CHECK-NEXT: vsetvli zero, zero, e64, m1, tu, mu
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@@ -516,6 +519,7 @@ entry:
define <vscale x 1 x i64 > @vleNff2 (i64* %str , i64 %n , i64 %x ) {
; CHECK-LABEL: vleNff2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vsetvli a1, a1, e8, m4, ta, mu
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, mu
; CHECK-NEXT: vle64ff.v v8, (a0)
; CHECK-NEXT: vadd.vx v8, v8, a2
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@@ -541,6 +545,7 @@ define <vscale x 2 x i32> @avl_forward5(<vscale x 2 x i32>* %addr) {
; CHECK-LABEL: avl_forward5:
; CHECK: # %bb.0:
; CHECK-NEXT: li a1, 32
; CHECK-NEXT: vsetvli a1, a1, e8, m4, ta, mu
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, mu
; CHECK-NEXT: vle32.v v8, (a0)
; CHECK-NEXT: ret
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