diff --git a/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h b/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
@@ -135,7 +135,7 @@ class RISCVMachineFunctionInfo : public MachineFunctionInfo {
   bool isPushable(const MachineFunction &MF) const {
     // We cannot use fixed locations for the callee saved spill slots if the
     // function uses a varargs save area.
-    // TODO: Use a seperate placement for vararg registers to enable Zcmp.
+    // TODO: Use a separate placement for vararg registers to enable Zcmp.
     return MF.getSubtarget<RISCVSubtarget>().hasStdExtZcmp() &&
            !MF.getTarget().Options.DisableFramePointerElim(MF) &&
            VarArgsSaveSize == 0;

diff --git a/llvm/lib/TargetParser/RISCVISAInfo.cpp b/llvm/lib/TargetParser/RISCVISAInfo.cpp
@@ -757,7 +757,7 @@ RISCVISAInfo::parseArchString(StringRef Arch, bool EnableExperimentalExtension,
                 Ext, SeenExtMap, IgnoreUnknown, EnableExperimentalExtension,
                 ExperimentalExtensionVersionCheck))
           return std::move(E);
-        // Multi-letter extension must be seperate following extension with
+        // Multi-letter extension must be separate following extension with
         // underscore
         break;
       } else {

diff --git a/llvm/lib/TextAPI/Utils.cpp b/llvm/lib/TextAPI/Utils.cpp
@@ -215,7 +215,7 @@ llvm::MachO::parseAliasList(std::unique_ptr<llvm::MemoryBuffer> &Buffer) {
     if (L.starts_with("#"))
       continue;
     StringRef Symbol, Remain, Alias;
-    // Base symbol is seperated by whitespace.
+    // Base symbol is separated by whitespace.
     std::tie(Symbol, Remain) = getToken(L);
     // The Alias symbol ends before a comment or EOL.
     std::tie(Alias, Remain) = getToken(Remain, "#");

diff --git a/llvm/lib/Transforms/IPO/Attributor.cpp b/llvm/lib/Transforms/IPO/Attributor.cpp
@@ -132,13 +132,13 @@ static cl::opt<bool>
 #ifndef NDEBUG
 static cl::list<std::string>
     SeedAllowList("attributor-seed-allow-list", cl::Hidden,
-                  cl::desc("Comma seperated list of attribute names that are "
+                  cl::desc("Comma separated list of attribute names that are "
                            "allowed to be seeded."),
                   cl::CommaSeparated);
 
 static cl::list<std::string> FunctionSeedAllowList(
     "attributor-function-seed-allow-list", cl::Hidden,
-    cl::desc("Comma seperated list of function names that are "
+    cl::desc("Comma separated list of function names that are "
              "allowed to be seeded."),
     cl::CommaSeparated);
 #endif

diff --git a/llvm/lib/Transforms/IPO/SampleProfileProbe.cpp b/llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
@@ -343,7 +343,7 @@ uint32_t SampleProfileProber::getCallsiteId(const Instruction *Call) const {
 void SampleProfileProber::instrumentOneFunc(Function &F, TargetMachine *TM) {
   Module *M = F.getParent();
   MDBuilder MDB(F.getContext());
-  // Since the GUID from probe desc and inline stack are computed seperately, we
+  // Since the GUID from probe desc and inline stack are computed separately, we
   // need to make sure their names are consistent, so here also use the name
   // from debug info.
   StringRef FName = F.getName();

diff --git a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
@@ -1323,7 +1323,7 @@ static void findBasePointers(DominatorTree &DT, DefiningValueMapTy &DVCache,
                              IsKnownBaseMapTy &KnownBases) {
   StatepointLiveSetTy PotentiallyDerivedPointers = result.LiveSet;
   // We assume that all pointers passed to deopt are base pointers; as an
-  // optimization, we can use this to avoid seperately materializing the base
+  // optimization, we can use this to avoid separately materializing the base
   // pointer graph.  This is only relevant since we're very conservative about
   // generating new conflict nodes during base pointer insertion.  If we were
   // smarter there, this would be irrelevant.

diff --git a/llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp b/llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
@@ -849,7 +849,7 @@ bool llvm::UnrollRuntimeLoopRemainder(
      for (unsigned i = 0; i < oldNumOperands; i++){
        auto *PredBB =PN.getIncomingBlock(i);
        if (PredBB == Latch)
-         // The latch exit is handled seperately, see connectX
+         // The latch exit is handled separately, see connectX
          continue;
        if (!L->contains(PredBB))
          // Even if we had dedicated exits, the code above inserted an

diff --git a/llvm/test/CodeGen/X86/AMX/amx-greedy-ra.ll b/llvm/test/CodeGen/X86/AMX/amx-greedy-ra.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs -stop-after tileconfig | FileCheck %s
 
-; Test the tile register is allocated in a seperate pass.
+; Test the tile register is allocated in a separate pass.
 
 define i16 @foo(i32 noundef %t, i16 %row, i16 %col) nounwind {
   ; CHECK-LABEL: name: foo

diff --git a/llvm/test/CodeGen/X86/apx/shift-eflags.ll b/llvm/test/CodeGen/X86/apx/shift-eflags.ll
@@ -159,7 +159,7 @@ define i32 @shl_const1_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; ashr by variable - use seperate test
+; ashr by variable - use separate test
 define i32 @ashr_var(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: ashr_var:
 ; CHECK:       # %bb.0:
@@ -176,7 +176,7 @@ define i32 @ashr_var(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; lshr by variable - use seperate test
+; lshr by variable - use separate test
 define i32 @lshr_var(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: lshr_var:
 ; CHECK:       # %bb.0:
@@ -193,7 +193,7 @@ define i32 @lshr_var(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; shl by variable - use seperate test
+; shl by variable - use separate test
 define i32 @shl_var(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: shl_var:
 ; CHECK:       # %bb.0:
@@ -210,7 +210,7 @@ define i32 @shl_var(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; ashr by variable and using result - use seperate test
+; ashr by variable and using result - use separate test
 define i32 @ashr_var_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: ashr_var_self_select:
 ; CHECK:       # %bb.0:
@@ -226,7 +226,7 @@ define i32 @ashr_var_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; lshr by variable and using result - use seperate test
+; lshr by variable and using result - use separate test
 define i32 @lshr_var_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: lshr_var_self_select:
 ; CHECK:       # %bb.0:
@@ -242,7 +242,7 @@ define i32 @lshr_var_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; shl by variable and using result - use seperate test
+; shl by variable and using result - use separate test
 define i32 @shl_var_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: shl_var_self_select:
 ; CHECK:       # %bb.0:
@@ -258,7 +258,7 @@ define i32 @shl_var_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; ashr by non-zero variable - use seperate test
+; ashr by non-zero variable - use separate test
 define i32 @ashr_var_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: ashr_var_amt_never_zero:
 ; CHECK:       # %bb.0:
@@ -275,7 +275,7 @@ define i32 @ashr_var_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; lshr by non-zero variable - use seperate test
+; lshr by non-zero variable - use separate test
 define i32 @lshr_var_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: lshr_var_amt_never_zero:
 ; CHECK:       # %bb.0:
@@ -292,7 +292,7 @@ define i32 @lshr_var_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; shl by non-zero variable - use seperate test
+; shl by non-zero variable - use separate test
 define i32 @shl_var_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: shl_var_amt_never_zero:
 ; CHECK:       # %bb.0:
@@ -309,7 +309,7 @@ define i32 @shl_var_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; ashr by non-zero variable and using result - use seperate test
+; ashr by non-zero variable and using result - use separate test
 define i32 @ashr_var_self_select_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: ashr_var_self_select_amt_never_zero:
 ; CHECK:       # %bb.0:
@@ -325,7 +325,7 @@ define i32 @ashr_var_self_select_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %
   ret i32 %r
 }
 
-; lshr by non-zero variable and using result - use seperate test
+; lshr by non-zero variable and using result - use separate test
 define i32 @lshr_var_self_select_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: lshr_var_self_select_amt_never_zero:
 ; CHECK:       # %bb.0:
@@ -341,7 +341,7 @@ define i32 @lshr_var_self_select_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %
   ret i32 %r
 }
 
-; shl by non-zero variable and using result - use seperate test
+; shl by non-zero variable and using result - use separate test
 define i32 @shl_var_self_select_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: shl_var_self_select_amt_never_zero:
 ; CHECK:       # %bb.0:

diff --git a/llvm/test/CodeGen/X86/merge-consecutive-stores-nt.ll b/llvm/test/CodeGen/X86/merge-consecutive-stores-nt.ll
@@ -158,7 +158,7 @@ define void @merge_2_v4f32_align32_mix_ntstore(ptr %a0, ptr %a1) nounwind {
 }
 
 ; AVX2 can't perform NT-load-ymm on 16-byte aligned memory.
-; Must be kept seperate as VMOVNTDQA xmm.
+; Must be kept separate as VMOVNTDQA xmm.
 define void @merge_2_v4f32_align16_ntload(ptr %a0, ptr %a1) nounwind {
 ; X86-LABEL: merge_2_v4f32_align16_ntload:
 ; X86:       # %bb.0:
@@ -211,7 +211,7 @@ define void @merge_2_v4f32_align16_ntload(ptr %a0, ptr %a1) nounwind {
 }
 
 ; AVX can't perform NT-store-ymm on 16-byte aligned memory.
-; Must be kept seperate as VMOVNTPS xmm.
+; Must be kept separate as VMOVNTPS xmm.
 define void @merge_2_v4f32_align16_ntstore(ptr %a0, ptr %a1) nounwind {
 ; X86-LABEL: merge_2_v4f32_align16_ntstore:
 ; X86:       # %bb.0:

diff --git a/llvm/test/CodeGen/X86/shift-eflags.ll b/llvm/test/CodeGen/X86/shift-eflags.ll
@@ -171,7 +171,7 @@ define i32 @shl_const1_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; ashr by variable - use seperate test
+; ashr by variable - use separate test
 define i32 @ashr_var(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: ashr_var:
 ; CHECK:       # %bb.0:
@@ -188,7 +188,7 @@ define i32 @ashr_var(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; lshr by variable - use seperate test
+; lshr by variable - use separate test
 define i32 @lshr_var(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: lshr_var:
 ; CHECK:       # %bb.0:
@@ -205,7 +205,7 @@ define i32 @lshr_var(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; shl by variable - use seperate test
+; shl by variable - use separate test
 define i32 @shl_var(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: shl_var:
 ; CHECK:       # %bb.0:
@@ -222,7 +222,7 @@ define i32 @shl_var(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; ashr by variable and using result - use seperate test
+; ashr by variable and using result - use separate test
 define i32 @ashr_var_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: ashr_var_self_select:
 ; CHECK:       # %bb.0:
@@ -239,7 +239,7 @@ define i32 @ashr_var_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; lshr by variable and using result - use seperate test
+; lshr by variable and using result - use separate test
 define i32 @lshr_var_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: lshr_var_self_select:
 ; CHECK:       # %bb.0:
@@ -256,7 +256,7 @@ define i32 @lshr_var_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; shl by variable and using result - use seperate test
+; shl by variable and using result - use separate test
 define i32 @shl_var_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: shl_var_self_select:
 ; CHECK:       # %bb.0:
@@ -273,7 +273,7 @@ define i32 @shl_var_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; ashr by non-zero variable - use seperate test
+; ashr by non-zero variable - use separate test
 define i32 @ashr_var_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: ashr_var_amt_never_zero:
 ; CHECK:       # %bb.0:
@@ -292,7 +292,7 @@ define i32 @ashr_var_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; lshr by non-zero variable - use seperate test
+; lshr by non-zero variable - use separate test
 define i32 @lshr_var_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: lshr_var_amt_never_zero:
 ; CHECK:       # %bb.0:
@@ -311,7 +311,7 @@ define i32 @lshr_var_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; shl by non-zero variable - use seperate test
+; shl by non-zero variable - use separate test
 define i32 @shl_var_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: shl_var_amt_never_zero:
 ; CHECK:       # %bb.0:
@@ -330,7 +330,7 @@ define i32 @shl_var_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
   ret i32 %r
 }
 
-; ashr by non-zero variable and using result - use seperate test
+; ashr by non-zero variable and using result - use separate test
 define i32 @ashr_var_self_select_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: ashr_var_self_select_amt_never_zero:
 ; CHECK:       # %bb.0:
@@ -349,7 +349,7 @@ define i32 @ashr_var_self_select_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %
   ret i32 %r
 }
 
-; lshr by non-zero variable and using result - use seperate test
+; lshr by non-zero variable and using result - use separate test
 define i32 @lshr_var_self_select_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: lshr_var_self_select_amt_never_zero:
 ; CHECK:       # %bb.0:
@@ -368,7 +368,7 @@ define i32 @lshr_var_self_select_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %
   ret i32 %r
 }
 
-; shl by non-zero variable and using result - use seperate test
+; shl by non-zero variable and using result - use separate test
 define i32 @shl_var_self_select_amt_never_zero(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: shl_var_self_select_amt_never_zero:
 ; CHECK:       # %bb.0:

diff --git a/llvm/test/Transforms/InstSimplify/constant-fold-fp-denormal.ll b/llvm/test/Transforms/InstSimplify/constant-fold-fp-denormal.ll
@@ -2,7 +2,7 @@
 ; RUN: opt -S -passes=instsimplify < %s | FileCheck %s
 
 ; Test cases for denormal handling mode when constant folding floating point
-; operations. Input and output modes are checked seperately.
+; operations. Input and output modes are checked separately.
 
 ; ============================================================================ ;
 ; fadd tests

diff --git a/llvm/test/Transforms/LoopVectorize/LoongArch/defaults.ll b/llvm/test/Transforms/LoopVectorize/LoongArch/defaults.ll
@@ -4,7 +4,7 @@
 ;; This is a collection of tests whose only purpose is to show changes in the
 ;; default configuration.  Please keep these tests minimal - if you're testing
 ;; functionality of some specific configuration, please place that in a
-;; seperate test file with a hard coded configuration (even if that
+;; separate test file with a hard coded configuration (even if that
 ;; configuration is the current default).
 
 target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"

diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/defaults.ll b/llvm/test/Transforms/LoopVectorize/RISCV/defaults.ll
@@ -4,7 +4,7 @@
 ; This is a collection of tests whose only purpose is to show changes in the
 ; default configuration.  Please keep these tests minimal - if you're testing
 ; functionality of some specific configuration, please place that in a
-; seperate test file with a hard coded configuration (even if that
+; separate test file with a hard coded configuration (even if that
 ; configuration is the current default).
 
 target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"

diff --git a/llvm/test/Transforms/SeparateConstOffsetFromGEP/split-gep-or-as-add.ll b/llvm/test/Transforms/SeparateConstOffsetFromGEP/split-gep-or-as-add.ll
@@ -3,7 +3,7 @@
 
 ;; Check that or operations, either with operands with no bits in common or that
 ;; are disjoint are lowered into constant GEPs. Note that because this is a
-;; target-independent test, the GEP seperator will lower the seperated-off constant
+;; target-independent test, the GEP separator will lower the separated-off constant
 ;; part to ptrtoint-based arithmetic.
 
 define void @testOrDoesntSplit(ptr %p) {

diff --git a/llvm/test/Verifier/alloc-size-failedparse.ll b/llvm/test/Verifier/alloc-size-failedparse.ll
@@ -1,7 +1,7 @@
 ; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s
 ;
 ; We handle allocsize with identical args in the parser, rather than the
-; verifier. So, a seperate test is needed.
+; verifier. So, a separate test is needed.
 
 ; CHECK: 'allocsize' indices can't refer to the same parameter
 declare ptr @a(i32, i32) allocsize(0, 0)
diff --git a/llvm/test/tools/llvm-ar/windows-path.test b/llvm/test/tools/llvm-ar/windows-path.test
@@ -1,4 +1,4 @@
-# Test that windows path seperators are handled correctly.
+# Test that windows path separators are handled correctly.
 REQUIRES: system-windows
 
 # Note: many of these tests depend on relative paths, so we have to cd to a

diff --git a/llvm/test/tools/llvm-objcopy/ELF/mirror-permissions-win.test b/llvm/test/tools/llvm-objcopy/ELF/mirror-permissions-win.test
@@ -1,7 +1,7 @@
 ## Test that permissions for ouput files are mirrored
 ## from their input files.
 
-## The Unix version of this test is seperated because it needs
+## The Unix version of this test is separated because it needs
 ## to use umask(1). Windows has no umask, so it can be considered
 ## to be always 0, the required behavior.
 # REQUIRES: system-windows

diff --git a/llvm/tools/llvm-cov/CodeCoverage.cpp b/llvm/tools/llvm-cov/CodeCoverage.cpp
@@ -515,7 +515,7 @@ void CodeCoverageTool::remapPathNames(const CoverageMapping &Coverage) {
   if (!PathRemappings)
     return;
 
-  // Convert remapping paths to native paths with trailing seperators.
+  // Convert remapping paths to native paths with trailing separators.
   auto nativeWithTrailing = [](StringRef Path) -> std::string {
     if (Path.empty())
       return "";

diff --git a/llvm/tools/llvm-profgen/PerfReader.cpp b/llvm/tools/llvm-profgen/PerfReader.cpp
@@ -564,7 +564,7 @@ bool PerfScriptReader::extractLBRStack(TraceStream &TraceIt,
   // The raw format of LBR stack is like:
   // 0x4005c8/0x4005dc/P/-/-/0 0x40062f/0x4005b0/P/-/-/0 ...
   //                           ... 0x4005c8/0x4005dc/P/-/-/0
-  // It's in FIFO order and seperated by whitespace.
+  // It's in FIFO order and separated by whitespace.
   SmallVector<StringRef, 32> Records;
   TraceIt.getCurrentLine().rtrim().split(Records, " ", -1, false);
   auto WarnInvalidLBR = [](TraceStream &TraceIt) {

diff --git a/llvm/unittests/Support/Path.cpp b/llvm/unittests/Support/Path.cpp
@@ -626,8 +626,8 @@ TEST(SupportDeathTest, TempDirectoryOnWindows) {
   // different values of specific env vars. To prevent corrupting env vars of
   // the current process all checks are done in separated processes.
   EXPECT_TEMP_DIR(_wputenv_s(L"TMP", L"C:\\OtherFolder"), "C:\\OtherFolder");
-  EXPECT_TEMP_DIR(_wputenv_s(L"TMP", L"C:/Unix/Path/Seperators"),
-                  "C:\\Unix\\Path\\Seperators");
+  EXPECT_TEMP_DIR(_wputenv_s(L"TMP", L"C:/Unix/Path/Separators"),
+                  "C:\\Unix\\Path\\Separators");
   EXPECT_TEMP_DIR(_wputenv_s(L"TMP", L"Local Path"), ".+\\Local Path$");
   EXPECT_TEMP_DIR(_wputenv_s(L"TMP", L"F:\\TrailingSep\\"), "F:\\TrailingSep");
   EXPECT_TEMP_DIR(

diff --git a/mlir/include/mlir/Analysis/Presburger/IntegerRelation.h b/mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
@@ -642,7 +642,7 @@ class IntegerRelation {
   /// the split become symbols, or some of the symbols immediately after the
   /// split become dimensions.
   void setDimSymbolSeparation(unsigned newSymbolCount) {
-    space.setVarSymbolSeperation(newSymbolCount);
+    space.setVarSymbolSeparation(newSymbolCount);
   }
 
   /// Return a set corresponding to all points in the domain of the relation.

diff --git a/mlir/include/mlir/Analysis/Presburger/PresburgerSpace.h b/mlir/include/mlir/Analysis/Presburger/PresburgerSpace.h
@@ -236,7 +236,7 @@ class PresburgerSpace {
   /// symbol count, either a chunk of dimensional variables immediately before
   /// the split become symbols, or some of the symbols immediately after the
   /// split become dimensions.
-  void setVarSymbolSeperation(unsigned newSymbolCount);
+  void setVarSymbolSeparation(unsigned newSymbolCount);
 
   /// Swaps the posA^th variable of kindA and posB^th variable of kindB.
   void swapVar(VarKind kindA, VarKind kindB, unsigned posA, unsigned posB);

diff --git a/mlir/include/mlir/Dialect/OpenMP/OpenMPInterfaces.h b/mlir/include/mlir/Dialect/OpenMP/OpenMPInterfaces.h
@@ -28,7 +28,7 @@
 
 namespace mlir::omp {
 // You can override defaults here or implement more complex implementations of
-// functions. Or define a completely seperate external model implementation,
+// functions. Or define a completely separate external model implementation,
 // to override the existing implementation.
 struct OffloadModuleDefaultModel
     : public OffloadModuleInterface::ExternalModel<OffloadModuleDefaultModel,

diff --git a/mlir/lib/Analysis/Presburger/PresburgerSpace.cpp b/mlir/lib/Analysis/Presburger/PresburgerSpace.cpp
@@ -286,7 +286,7 @@ bool PresburgerSpace::isAligned(const PresburgerSpace &other,
   return getNumVarKind(kind) == other.getNumVarKind(kind);
 }
 
-void PresburgerSpace::setVarSymbolSeperation(unsigned newSymbolCount) {
+void PresburgerSpace::setVarSymbolSeparation(unsigned newSymbolCount) {
   assert(newSymbolCount <= getNumDimAndSymbolVars() &&
          "invalid separation position");
   numRange = numRange + numSymbols - newSymbolCount;

diff --git a/mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h b/mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h
@@ -79,7 +79,7 @@ struct GPUPrintfOpToHIPLowering : public ConvertOpToLLVMPattern<gpu::PrintfOp> {
 /// The lowering of gpu.printf to a call to an external printf() function
 ///
 /// This pass will add a declaration of printf() to the GPUModule if needed
-/// and seperate out the format strings into global constants. For some
+/// and separate out the format strings into global constants. For some
 /// runtimes, such as OpenCL on AMD, this is sufficient setup, as the compiler
 /// will lower printf calls to appropriate device-side code
 struct GPUPrintfOpToLLVMCallLowering

diff --git a/mlir/lib/Dialect/LLVMIR/IR/BasicPtxBuilderInterface.cpp b/mlir/lib/Dialect/LLVMIR/IR/BasicPtxBuilderInterface.cpp
@@ -65,7 +65,7 @@ void PtxBuilder::insertValue(Value v, PTXRegisterMod itype) {
   auto getModifier = [&]() -> const char * {
     if (itype == PTXRegisterMod::ReadWrite) {
       assert(false && "Read-Write modifier is not supported. Try setting the "
-                      "same value as Write and Read seperately.");
+                      "same value as Write and Read separately.");
       return "+";
     }
     if (itype == PTXRegisterMod::Write) {

diff --git a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
@@ -2263,7 +2263,7 @@ static llvm::omp::OpenMPOffloadMappingFlags mapParentWithMembers(
 
   // This creates the initial MEMBER_OF mapping that consists of
   // the parent/top level container (same as above effectively, except
-  // with a fixed initial compile time size and seperate maptype which
+  // with a fixed initial compile time size and separate maptype which
   // indicates the true mape type (tofrom etc.). This parent mapping is
   // only relevant if the structure in its totality is being mapped,
   // otherwise the above suffices.
@@ -2388,7 +2388,7 @@ static void processMapWithMembersOf(
 
   // If we have a partial map (no parent referenced in the map clauses of the
   // directive, only members) and only a single member, we do not need to bind
-  // the map of the member to the parent, we can pass the member seperately.
+  // the map of the member to the parent, we can pass the member separately.
   if (parentClause.getMembers().size() == 1 && parentClause.getPartialMap()) {
     auto memberClause = llvm::cast<mlir::omp::MapInfoOp>(
         parentClause.getMembers()[0].getDefiningOp());
@@ -2425,7 +2425,7 @@ createAlteredByCaptureMap(MapInfoData &mapData,
                           LLVM::ModuleTranslation &moduleTranslation,
                           llvm::IRBuilderBase &builder) {
   for (size_t i = 0; i < mapData.MapClause.size(); ++i) {
-    // if it's declare target, skip it, it's handled seperately.
+    // if it's declare target, skip it, it's handled separately.
     if (!mapData.IsDeclareTarget[i]) {
       auto mapOp =
           mlir::dyn_cast_if_present<mlir::omp::MapInfoOp>(mapData.MapClause[i]);

diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom_prod.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom_prod.mlir
@@ -27,7 +27,7 @@
 // REDEFINE: %{sparsifier_opts} = enable-runtime-library=false enable-buffer-initialization=true vl=2 reassociate-fp-reductions=true enable-index-optimizations=true
 // RUN: %{compile} | %{run} | FileCheck %s
 
-// Product reductions - kept in a seperate file as these are not supported by
+// Product reductions - kept in a separate file as these are not supported by
 // the AArch64 SVE backend (so the set-up is a bit different to
 // sparse_reducitons.mlir)
 

diff --git a/mlir/test/Target/LLVMIR/omptarget-constant-alloca-raise.mlir b/mlir/test/Target/LLVMIR/omptarget-constant-alloca-raise.mlir
@@ -5,7 +5,7 @@
 // compiler. Certain LLVM IR optimisation passes will perform runtime breaking 
 // transformations on allocations not found to be in the entry block, current
 // OpenMP dialect lowering of TargetOp's will inject user allocations after
-// compiler generated entry code, in a seperate block, this test checks that
+// compiler generated entry code, in a separate block, this test checks that
 // a small function which attempts to raise some of these (specifically 
 // constant sized) allocations performs its task reasonably in these 
 // scenarios. 

diff --git a/openmp/tools/Modules/FindOpenMPTarget.cmake b/openmp/tools/Modules/FindOpenMPTarget.cmake
@@ -200,7 +200,7 @@ function(_OPENMP_TARGET_DEVICE_GET_FLAGS LANG DEVICE OPENMP_FLAG_VAR OPENMP_LIB_
     file(APPEND ${CMAKE_BINARY_DIR}${CMAKE_FILES_DIRECTORY}/CMakeOutput.log
       "Compilation successful, adding flags for ${DEVICE}.\n\n")
 
-    # Clang has a seperate library for target offloading.
+    # Clang has a separate library for target offloading.
     if(CMAKE_${LANG}_COMPILER_ID STREQUAL "Clang")
       find_library(OpenMPTarget_libomptarget_LIBRARY
         NAMES omptarget