429 changes: 429 additions & 0 deletions llvm/test/CodeGen/ARM/fp16-fusedMAC.ll
View file

Large diffs are not rendered by default.

50 changes: 25 additions & 25 deletions llvm/test/CodeGen/ARM/fusedMAC.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,15 +5,15 @@

; Check generated fused MAC and MLS.

define double @fusedMACTest1(double %d1, double %d2, double %d3) {
define arm_aapcs_vfpcc double @fusedMACTest1(double %d1, double %d2, double %d3) {
;CHECK-LABEL: fusedMACTest1:
;CHECK: vfma.f64
%1 = fmul double %d1, %d2
%2 = fadd double %1, %d3
ret double %2
}

define float @fusedMACTest2(float %f1, float %f2, float %f3) {
define arm_aapcs_vfpcc float @fusedMACTest2(float %f1, float %f2, float %f3) {
;CHECK-LABEL: fusedMACTest2:
;CHECK: vfma.f32

Expand All @@ -26,23 +26,23 @@ define float @fusedMACTest2(float %f1, float %f2, float %f3) {
ret float %2
}

define double @fusedMACTest3(double %d1, double %d2, double %d3) {
define arm_aapcs_vfpcc double @fusedMACTest3(double %d1, double %d2, double %d3) {
;CHECK-LABEL: fusedMACTest3:
;CHECK: vfms.f64
%1 = fmul double %d2, %d3
%2 = fsub double %d1, %1
ret double %2
}

define float @fusedMACTest4(float %f1, float %f2, float %f3) {
define arm_aapcs_vfpcc float @fusedMACTest4(float %f1, float %f2, float %f3) {
;CHECK-LABEL: fusedMACTest4:
;CHECK: vfms.f32
%1 = fmul float %f2, %f3
%2 = fsub float %f1, %1
ret float %2
}

define double @fusedMACTest5(double %d1, double %d2, double %d3) {
define arm_aapcs_vfpcc double @fusedMACTest5(double %d1, double %d2, double %d3) {
;CHECK-LABEL: fusedMACTest5:
;CHECK: vfnma.f64
%1 = fmul double %d1, %d2
Expand All @@ -51,7 +51,7 @@ define double @fusedMACTest5(double %d1, double %d2, double %d3) {
ret double %3
}

define float @fusedMACTest6(float %f1, float %f2, float %f3) {
define arm_aapcs_vfpcc float @fusedMACTest6(float %f1, float %f2, float %f3) {
;CHECK-LABEL: fusedMACTest6:
;CHECK: vfnma.f32
%1 = fmul float %f1, %f2
Expand All @@ -60,79 +60,79 @@ define float @fusedMACTest6(float %f1, float %f2, float %f3) {
ret float %3
}

define double @fusedMACTest7(double %d1, double %d2, double %d3) {
define arm_aapcs_vfpcc double @fusedMACTest7(double %d1, double %d2, double %d3) {
;CHECK-LABEL: fusedMACTest7:
;CHECK: vfnms.f64
%1 = fmul double %d1, %d2
%2 = fsub double %1, %d3
ret double %2
}

define float @fusedMACTest8(float %f1, float %f2, float %f3) {
define arm_aapcs_vfpcc float @fusedMACTest8(float %f1, float %f2, float %f3) {
;CHECK-LABEL: fusedMACTest8:
;CHECK: vfnms.f32
%1 = fmul float %f1, %f2
%2 = fsub float %1, %f3
ret float %2
}

define <2 x float> @fusedMACTest9(<2 x float> %a, <2 x float> %b) {
define arm_aapcs_vfpcc <2 x float> @fusedMACTest9(<2 x float> %a, <2 x float> %b) {
;CHECK-LABEL: fusedMACTest9:
;CHECK: vfma.f32
%mul = fmul <2 x float> %a, %b
%add = fadd <2 x float> %mul, %a
ret <2 x float> %add
}

define <2 x float> @fusedMACTest10(<2 x float> %a, <2 x float> %b) {
define arm_aapcs_vfpcc <2 x float> @fusedMACTest10(<2 x float> %a, <2 x float> %b) {
;CHECK-LABEL: fusedMACTest10:
;CHECK: vfms.f32
%mul = fmul <2 x float> %a, %b
%sub = fsub <2 x float> %a, %mul
ret <2 x float> %sub
}

define <4 x float> @fusedMACTest11(<4 x float> %a, <4 x float> %b) {
define arm_aapcs_vfpcc <4 x float> @fusedMACTest11(<4 x float> %a, <4 x float> %b) {
;CHECK-LABEL: fusedMACTest11:
;CHECK: vfma.f32
%mul = fmul <4 x float> %a, %b
%add = fadd <4 x float> %mul, %a
ret <4 x float> %add
}

define <4 x float> @fusedMACTest12(<4 x float> %a, <4 x float> %b) {
define arm_aapcs_vfpcc <4 x float> @fusedMACTest12(<4 x float> %a, <4 x float> %b) {
;CHECK-LABEL: fusedMACTest12:
;CHECK: vfms.f32
%mul = fmul <4 x float> %a, %b
%sub = fsub <4 x float> %a, %mul
ret <4 x float> %sub
}

define float @test_fma_f32(float %a, float %b, float %c) nounwind readnone ssp {
define arm_aapcs_vfpcc float @test_fma_f32(float %a, float %b, float %c) nounwind readnone ssp {
entry:
; CHECK: test_fma_f32
; CHECK: vfma.f32
%tmp1 = tail call float @llvm.fma.f32(float %a, float %b, float %c) nounwind readnone
ret float %tmp1
}

define double @test_fma_f64(double %a, double %b, double %c) nounwind readnone ssp {
define arm_aapcs_vfpcc double @test_fma_f64(double %a, double %b, double %c) nounwind readnone ssp {
entry:
; CHECK: test_fma_f64
; CHECK: vfma.f64
%tmp1 = tail call double @llvm.fma.f64(double %a, double %b, double %c) nounwind readnone
ret double %tmp1
}

define <2 x float> @test_fma_v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind readnone ssp {
define arm_aapcs_vfpcc <2 x float> @test_fma_v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind readnone ssp {
entry:
; CHECK: test_fma_v2f32
; CHECK: vfma.f32
%tmp1 = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind
ret <2 x float> %tmp1
}

define double @test_fms_f64(double %a, double %b, double %c) nounwind readnone ssp {
define arm_aapcs_vfpcc double @test_fms_f64(double %a, double %b, double %c) nounwind readnone ssp {
entry:
; CHECK: test_fms_f64
; CHECK: vfms.f64
Expand All @@ -141,7 +141,7 @@ entry:
ret double %tmp2
}

define double @test_fms_f64_2(double %a, double %b, double %c) nounwind readnone ssp {
define arm_aapcs_vfpcc double @test_fms_f64_2(double %a, double %b, double %c) nounwind readnone ssp {
entry:
; CHECK: test_fms_f64_2
; CHECK: vfms.f64
Expand All @@ -150,7 +150,7 @@ entry:
ret double %tmp2
}

define float @test_fnms_f32(float %a, float %b, float* %c) nounwind readnone ssp {
define arm_aapcs_vfpcc float @test_fnms_f32(float %a, float %b, float* %c) nounwind readnone ssp {
; CHECK: test_fnms_f32
; CHECK: vfnms.f32
%tmp1 = load float, float* %c, align 4
Expand All @@ -159,7 +159,7 @@ define float @test_fnms_f32(float %a, float %b, float* %c) nounwind readnone ssp
ret float %tmp3
}

define double @test_fnms_f64(double %a, double %b, double %c) nounwind readnone ssp {
define arm_aapcs_vfpcc double @test_fnms_f64(double %a, double %b, double %c) nounwind readnone ssp {
entry:
; CHECK: test_fnms_f64
; CHECK: vfnms.f64
Expand All @@ -169,7 +169,7 @@ entry:
ret double %tmp3
}

define double @test_fnms_f64_2(double %a, double %b, double %c) nounwind readnone ssp {
define arm_aapcs_vfpcc double @test_fnms_f64_2(double %a, double %b, double %c) nounwind readnone ssp {
entry:
; CHECK: test_fnms_f64_2
; CHECK: vfnms.f64
Expand All @@ -179,7 +179,7 @@ entry:
ret double %tmp3
}

define double @test_fnma_f64(double %a, double %b, double %c) nounwind readnone ssp {
define arm_aapcs_vfpcc double @test_fnma_f64(double %a, double %b, double %c) nounwind readnone ssp {
entry:
; CHECK: test_fnma_f64
; CHECK: vfnma.f64
Expand All @@ -188,7 +188,7 @@ entry:
ret double %tmp2
}

define double @test_fnma_f64_2(double %a, double %b, double %c) nounwind readnone ssp {
define arm_aapcs_vfpcc double @test_fnma_f64_2(double %a, double %b, double %c) nounwind readnone ssp {
entry:
; CHECK: test_fnma_f64_2
; CHECK: vfnma.f64
Expand All @@ -198,7 +198,7 @@ entry:
ret double %tmp3
}

define float @test_fma_const_fold(float %a, float %b) nounwind {
define arm_aapcs_vfpcc float @test_fma_const_fold(float %a, float %b) nounwind {
; CHECK: test_fma_const_fold
; CHECK-NOT: vfma
; CHECK-NOT: vmul
Expand All @@ -207,7 +207,7 @@ define float @test_fma_const_fold(float %a, float %b) nounwind {
ret float %ret
}

define float @test_fma_canonicalize(float %a, float %b) nounwind {
define arm_aapcs_vfpcc float @test_fma_canonicalize(float %a, float %b) nounwind {
; CHECK: test_fma_canonicalize
; CHECK: vmov.f32 [[R1:s[0-9]+]], #2.000000e+00
; CHECK: vfma.f32 {{s[0-9]+}}, {{s[0-9]+}}, [[R1]]
Expand All @@ -216,7 +216,7 @@ define float @test_fma_canonicalize(float %a, float %b) nounwind {
}

; Check that very wide vector fma's can be split into legal fma's.
define void @test_fma_v8f32(<8 x float> %a, <8 x float> %b, <8 x float> %c, <8 x float>* %p) nounwind readnone ssp {
define arm_aapcs_vfpcc void @test_fma_v8f32(<8 x float> %a, <8 x float> %b, <8 x float> %c, <8 x float>* %p) nounwind readnone ssp {
; CHECK: test_fma_v8f32
; CHECK: vfma.f32
; CHECK: vfma.f32
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/Thumb2/float-intrinsics-double.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -201,7 +201,7 @@ define double @fmuladd_d(double %a, double %b, double %c) {
; SOFT: bl __aeabi_dadd
; VFP4: vmul.f64
; VFP4: vadd.f64
; FP-ARMv8: vmla.f64
; FP-ARMv8: vfma.f64
%1 = call double @llvm.fmuladd.f64(double %a, double %b, double %c)
ret double %1
}
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/Thumb2/float-intrinsics-float.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -194,7 +194,7 @@ define float @fmuladd_f(float %a, float %b, float %c) {
; CHECK-LABEL: fmuladd_f:
; SOFT: bl __aeabi_fmul
; SOFT: bl __aeabi_fadd
; VMLA: vmla.f32
; VMLA: vfma.f32
; NO-VMLA: vmul.f32
; NO-VMLA: vadd.f32
%1 = call float @llvm.fmuladd.f32(float %a, float %b, float %c)
Expand Down