4 changes: 2 additions & 2 deletions llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
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Original file line number Diff line number Diff line change
Expand Up @@ -40,8 +40,8 @@ MCCodeEmitter *createRISCVMCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,
MCContext &Ctx);

MCAsmBackend *createRISCVAsmBackend(const Target &T, const MCRegisterInfo &MRI,
const Triple &TT, StringRef CPU,
MCAsmBackend *createRISCVAsmBackend(const Target &T, const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);

std::unique_ptr<MCObjectWriter>
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5 changes: 3 additions & 2 deletions llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
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Expand Up @@ -14,6 +14,7 @@
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCFixupKindInfo.h"
#include "llvm/MC/MCObjectWriter.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/MCValue.h"
#include "llvm/Support/TargetRegistry.h"

Expand Down Expand Up @@ -301,8 +302,8 @@ namespace {
} // end anonymous namespace

MCAsmBackend *llvm::createSparcAsmBackend(const Target &T,
const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const Triple &TT, StringRef CPU,
const MCTargetOptions &Options) {
return new ELFSparcAsmBackend(T, TT.getOS());
return new ELFSparcAsmBackend(T, STI.getTargetTriple().getOS());
}
4 changes: 2 additions & 2 deletions llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
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Original file line number Diff line number Diff line change
Expand Up @@ -40,8 +40,8 @@ Target &getTheSparcelTarget();
MCCodeEmitter *createSparcMCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,
MCContext &Ctx);
MCAsmBackend *createSparcAsmBackend(const Target &T, const MCRegisterInfo &MRI,
const Triple &TT, StringRef CPU,
MCAsmBackend *createSparcAsmBackend(const Target &T, const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectWriter>
createSparcELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
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6 changes: 4 additions & 2 deletions llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@
#include "llvm/MC/MCFixupKindInfo.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCObjectWriter.h"
#include "llvm/MC/MCSubtargetInfo.h"

using namespace llvm;

Expand Down Expand Up @@ -122,9 +123,10 @@ bool SystemZMCAsmBackend::writeNopData(uint64_t Count,
}

MCAsmBackend *llvm::createSystemZMCAsmBackend(const Target &T,
const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const Triple &TT, StringRef CPU,
const MCTargetOptions &Options) {
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
uint8_t OSABI =
MCELFObjectTargetWriter::getOSABI(STI.getTargetTriple().getOS());
return new SystemZMCAsmBackend(OSABI);
}
2 changes: 1 addition & 1 deletion llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
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Original file line number Diff line number Diff line change
Expand Up @@ -89,8 +89,8 @@ MCCodeEmitter *createSystemZMCCodeEmitter(const MCInstrInfo &MCII,
MCContext &Ctx);

MCAsmBackend *createSystemZMCAsmBackend(const Target &T,
const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const Triple &TT, StringRef CPU,
const MCTargetOptions &Options);

std::unique_ptr<MCObjectWriter> createSystemZObjectWriter(raw_pwrite_stream &OS,
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11 changes: 7 additions & 4 deletions llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
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Expand Up @@ -843,10 +843,12 @@ class DarwinX86_64AsmBackend : public DarwinX86AsmBackend {
} // end anonymous namespace

MCAsmBackend *llvm::createX86_32AsmBackend(const Target &T,
const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const Triple &TheTriple,
StringRef CPU,
const MCTargetOptions &Options) {
const Triple &TheTriple = STI.getTargetTriple();
StringRef CPU = STI.getCPU();
llvm::errs() << "create x86-32 backend with CPU: " << CPU << "\n";
if (TheTriple.isOSBinFormatMachO())
return new DarwinX86_32AsmBackend(T, MRI, CPU);

Expand All @@ -862,10 +864,11 @@ MCAsmBackend *llvm::createX86_32AsmBackend(const Target &T,
}

MCAsmBackend *llvm::createX86_64AsmBackend(const Target &T,
const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const Triple &TheTriple,
StringRef CPU,
const MCTargetOptions &Options) {
const Triple &TheTriple = STI.getTargetTriple();
StringRef CPU = STI.getCPU();
if (TheTriple.isOSBinFormatMachO()) {
MachO::CPUSubTypeX86 CS =
StringSwitch<MachO::CPUSubTypeX86>(TheTriple.getArchName())
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10 changes: 6 additions & 4 deletions llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
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Original file line number Diff line number Diff line change
Expand Up @@ -70,11 +70,13 @@ MCCodeEmitter *createX86MCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,
MCContext &Ctx);

MCAsmBackend *createX86_32AsmBackend(const Target &T, const MCRegisterInfo &MRI,
const Triple &TT, StringRef CPU,
MCAsmBackend *createX86_32AsmBackend(const Target &T,
const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
MCAsmBackend *createX86_64AsmBackend(const Target &T, const MCRegisterInfo &MRI,
const Triple &TT, StringRef CPU,
MCAsmBackend *createX86_64AsmBackend(const Target &T,
const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);

/// Implements X86-only directives for assembly emission.
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10 changes: 5 additions & 5 deletions llvm/tools/dsymutil/DwarfLinker.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -672,19 +672,19 @@ bool DwarfStreamer::init(Triple TheTriple) {
MC.reset(new MCContext(MAI.get(), MRI.get(), MOFI.get()));
MOFI->InitMCObjectFileInfo(TheTriple, /*PIC*/ false, *MC);

MSTI.reset(TheTarget->createMCSubtargetInfo(TripleName, "", ""));
if (!MSTI)
return error("no subtarget info for target " + TripleName, Context);

MCTargetOptions Options;
MAB = TheTarget->createMCAsmBackend(*MRI, TripleName, "", Options);
MAB = TheTarget->createMCAsmBackend(*MSTI, *MRI, Options);
if (!MAB)
return error("no asm backend for target " + TripleName, Context);

MII.reset(TheTarget->createMCInstrInfo());
if (!MII)
return error("no instr info info for target " + TripleName, Context);

MSTI.reset(TheTarget->createMCSubtargetInfo(TripleName, "", ""));
if (!MSTI)
return error("no subtarget info for target " + TripleName, Context);

MCE = TheTarget->createMCCodeEmitter(*MII, *MRI, *MC);
if (!MCE)
return error("no code emitter for target " + TripleName, Context);
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12 changes: 6 additions & 6 deletions llvm/tools/llvm-dwp/llvm-dwp.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -673,20 +673,20 @@ int main(int argc, char **argv) {
MCContext MC(MAI.get(), MRI.get(), &MOFI);
MOFI.InitMCObjectFileInfo(TheTriple, /*PIC*/ false, MC);

std::unique_ptr<MCSubtargetInfo> MSTI(
TheTarget->createMCSubtargetInfo(TripleName, "", ""));
if (!MSTI)
return error("no subtarget info for target " + TripleName, Context);

MCTargetOptions Options;
auto MAB = TheTarget->createMCAsmBackend(*MRI, TripleName, "", Options);
auto MAB = TheTarget->createMCAsmBackend(*MSTI, *MRI, Options);
if (!MAB)
return error("no asm backend for target " + TripleName, Context);

std::unique_ptr<MCInstrInfo> MII(TheTarget->createMCInstrInfo());
if (!MII)
return error("no instr info info for target " + TripleName, Context);

std::unique_ptr<MCSubtargetInfo> MSTI(
TheTarget->createMCSubtargetInfo(TripleName, "", ""));
if (!MSTI)
return error("no subtarget info for target " + TripleName, Context);

MCCodeEmitter *MCE = TheTarget->createMCCodeEmitter(*MII, *MRI, MC);
if (!MCE)
return error("no code emitter for target " + TripleName, Context);
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5 changes: 2 additions & 3 deletions llvm/tools/llvm-mc/llvm-mc.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -567,7 +567,7 @@ int main(int argc, char **argv) {
MCAsmBackend *MAB = nullptr;
if (ShowEncoding) {
CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, Ctx);
MAB = TheTarget->createMCAsmBackend(*MRI, TripleName, MCPU, MCOptions);
MAB = TheTarget->createMCAsmBackend(*STI, *MRI, MCOptions);
}
auto FOut = llvm::make_unique<formatted_raw_ostream>(*OS);
Str.reset(TheTarget->createAsmStreamer(
Expand All @@ -588,8 +588,7 @@ int main(int argc, char **argv) {
}

MCCodeEmitter *CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, Ctx);
MCAsmBackend *MAB = TheTarget->createMCAsmBackend(*MRI, TripleName, MCPU,
MCOptions);
MCAsmBackend *MAB = TheTarget->createMCAsmBackend(*STI, *MRI, MCOptions);
Str.reset(TheTarget->createMCObjectStreamer(
TheTriple, Ctx, std::unique_ptr<MCAsmBackend>(MAB), *OS,
std::unique_ptr<MCCodeEmitter>(CE), *STI, MCOptions.MCRelaxAll,
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12 changes: 6 additions & 6 deletions llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -152,8 +152,13 @@ llvm::Error dwarfgen::Generator::init(Triple TheTriple, uint16_t V) {
MC.reset(new MCContext(MAI.get(), MRI.get(), MOFI.get()));
MOFI->InitMCObjectFileInfo(TheTriple, /*PIC*/ false, *MC);

MSTI.reset(TheTarget->createMCSubtargetInfo(TripleName, "", ""));
if (!MSTI)
return make_error<StringError>("no subtarget info for target " + TripleName,
inconvertibleErrorCode());

MCTargetOptions MCOptions = InitMCTargetOptionsFromFlags();
MAB = TheTarget->createMCAsmBackend(*MRI, TripleName, "", MCOptions);
MAB = TheTarget->createMCAsmBackend(*MSTI, *MRI, MCOptions);
if (!MAB)
return make_error<StringError>("no asm backend for target " + TripleName,
inconvertibleErrorCode());
Expand All @@ -164,11 +169,6 @@ llvm::Error dwarfgen::Generator::init(Triple TheTriple, uint16_t V) {
TripleName,
inconvertibleErrorCode());

MSTI.reset(TheTarget->createMCSubtargetInfo(TripleName, "", ""));
if (!MSTI)
return make_error<StringError>("no subtarget info for target " + TripleName,
inconvertibleErrorCode());

MCE = TheTarget->createMCCodeEmitter(*MII, *MRI, *MC);
if (!MCE)
return make_error<StringError>("no code emitter for target " + TripleName,
Expand Down