9,919 changes: 9,919 additions & 0 deletions llvm/test/CodeGen/X86/pcsections-atomics.ll

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84 changes: 12 additions & 72 deletions llvm/test/CodeGen/X86/pcsections.ll
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@@ -1,3 +1,7 @@
; This test should verify that adding !pcsections metadata is encoded properly
; by the AsmPrinter. For tests to check that metadata is propagated to
; assembly, see pcsections-*.ll tests.

; RUN: llc -O0 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
; RUN: llc -O1 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
; RUN: llc -O2 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
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ret i64 %0
}

define i64 @test_simple_atomic() {
; CHECK-LABEL: test_simple_atomic:
; CHECK: .Lpcsection1:
; CHECK-NEXT: movq
; CHECK-NOT: .Lpcsection
; CHECK: addq
; CHECK-NEXT: retq
; CHECK-NEXT: .Lfunc_end3:
; CHECK: .section section_no_aux,"awo",@progbits,.text
; CHECK-NEXT: .Lpcsection_base5:
; DEFCM-NEXT: .long .Lpcsection1-.Lpcsection_base5
; LARGE-NEXT: .quad .Lpcsection1-.Lpcsection_base5
; CHECK-NEXT: .text
entry:
%0 = load atomic i64, ptr @foo monotonic, align 8, !pcsections !0
%1 = load i64, ptr @bar, align 8
%add = add nsw i64 %1, %0
ret i64 %add
}

define i64 @test_complex_atomic() {
; CHECK-LABEL: test_complex_atomic:
; CHECK: movl $1
; CHECK-NEXT: .Lpcsection2:
; CHECK-NEXT: lock xaddq
; CHECK-NOT: .Lpcsection
; CHECK: movq
; CHECK: addq
; CHECK: retq
; CHECK-NEXT: .Lfunc_end4:
; CHECK: .section section_no_aux,"awo",@progbits,.text
; CHECK-NEXT: .Lpcsection_base6:
; DEFCM-NEXT: .long .Lpcsection2-.Lpcsection_base6
; LARGE-NEXT: .quad .Lpcsection2-.Lpcsection_base6
; CHECK-NEXT: .text
entry:
%0 = atomicrmw add ptr @foo, i64 1 monotonic, align 8, !pcsections !0
%1 = load i64, ptr @bar, align 8
%inc = add nsw i64 %1, 1
store i64 %inc, ptr @bar, align 8
%add = add nsw i64 %1, %0
ret i64 %add
}

define void @mixed_atomic_non_atomic() {
; CHECK-LABEL: mixed_atomic_non_atomic:
; CHECK: .Lpcsection
; CHECK-NEXT: movl $1
; CHECK: .section section_no_aux,"awo",@progbits,.text
; CHECK-NEXT: .Lpcsection_base7:
; DEFCM-NEXT: .long .Lpcsection3-.Lpcsection_base7
; LARGE-NEXT: .quad .Lpcsection3-.Lpcsection_base7
; CHECK-NEXT: .text
entry:
%0 = load volatile i32, ptr @foo, align 4
%inc = add nsw i32 %0, 1
store volatile i32 %inc, ptr @foo, align 4
store atomic volatile i32 1, ptr @foo monotonic, align 4, !pcsections !0
%1 = load volatile i32, ptr @foo, align 4
%dec = add nsw i32 %1, -1
store volatile i32 %dec, ptr @foo, align 4
ret void
}

define void @multiple_uleb128() !pcsections !6 {
; CHECK-LABEL: multiple_uleb128:
; CHECK: .section section_aux,"awo",@progbits,.text
; CHECK-NEXT: .Lpcsection_base8:
; DEFCM-NEXT: .long .Lfunc_begin3-.Lpcsection_base8
; LARGE-NEXT: .quad .Lfunc_begin3-.Lpcsection_base8
; CHECK-NEXT: .uleb128 .Lfunc_end6-.Lfunc_begin3
; CHECK-NEXT: .Lpcsection_base5:
; DEFCM-NEXT: .long .Lfunc_begin3-.Lpcsection_base5
; LARGE-NEXT: .quad .Lfunc_begin3-.Lpcsection_base5
; CHECK-NEXT: .uleb128 .Lfunc_end3-.Lfunc_begin3
; CHECK-NEXT: .byte 42
; CHECK-NEXT: .ascii "\345\216&"
; CHECK-NEXT: .byte 255
; CHECK-NEXT: .section section_aux_21264,"awo",@progbits,.text
; CHECK-NEXT: .Lpcsection_base9:
; DEFCM-NEXT: .long .Lfunc_begin3-.Lpcsection_base9
; LARGE-NEXT: .quad .Lfunc_begin3-.Lpcsection_base9
; CHECK-NEXT: .long .Lfunc_end6-.Lfunc_begin3
; CHECK-NEXT: .Lpcsection_base6:
; DEFCM-NEXT: .long .Lfunc_begin3-.Lpcsection_base6
; LARGE-NEXT: .quad .Lfunc_begin3-.Lpcsection_base6
; CHECK-NEXT: .long .Lfunc_end3-.Lfunc_begin3
; CHECK-NEXT: .long 21264
; CHECK-NEXT: .text
entry:
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