569 changes: 565 additions & 4 deletions llvm/test/CodeGen/X86/vec-strict-fptoint-128.ll
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511 changes: 507 additions & 4 deletions llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll
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396 changes: 394 additions & 2 deletions llvm/test/CodeGen/X86/vec-strict-inttofp-128.ll
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Expand Up @@ -3,11 +3,17 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=SSE,SSE-64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=AVX,AVX1,AVX-32,AVX1-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=AVX,AVX1,AVX-64,AVX1-64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f,avx512vl -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=AVX,AVX512VL,AVX-32,AVX512VL-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,avx512vl -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=AVX,AVX512VL,AVX-64,AVX512VL-64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=AVX,AVX512F,AVX-32,AVX512F-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=AVX,AVX512F,AVX-64,AVX512F-64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512vl -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=AVX,AVX512VL,AVX-32,AVX512VL-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=AVX,AVX512VL,AVX-64,AVX512VL-64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512f,avx512dq -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=AVX,AVX512DQ,AVX512DQ-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f,avx512dq -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=AVX,AVX512DQ,AVX512DQ-64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512dq,avx512vl -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=AVX,AVX512DQVL,AVX512DQVL-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512dq,avx512vl -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=AVX,AVX512DQVL,AVX512DQVL-64

declare <2 x float> @llvm.experimental.constrained.sitofp.v2f32.v2i64(<2 x i64>, metadata, metadata)
declare <2 x float> @llvm.experimental.constrained.uitofp.v2f32.v2i64(<2 x i64>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.sitofp.v4f32.v4i1(<4 x i1>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.uitofp.v4f32.v4i1(<4 x i1>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.sitofp.v4f32.v4i8(<4 x i8>, metadata, metadata)
Expand All @@ -27,6 +33,287 @@ declare <2 x double> @llvm.experimental.constrained.uitofp.v2f64.v2i32(<2 x i32>
declare <2 x double> @llvm.experimental.constrained.sitofp.v2f64.v2i64(<2 x i64>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.uitofp.v2f64.v2i64(<2 x i64>, metadata, metadata)

define <2 x float> @sitofp_v2i64_v2f32(<2 x i64> %x) #0 {
; SSE-32-LABEL: sitofp_v2i64_v2f32:
; SSE-32: # %bb.0:
; SSE-32-NEXT: pushl %ebp
; SSE-32-NEXT: .cfi_def_cfa_offset 8
; SSE-32-NEXT: .cfi_offset %ebp, -8
; SSE-32-NEXT: movl %esp, %ebp
; SSE-32-NEXT: .cfi_def_cfa_register %ebp
; SSE-32-NEXT: andl $-8, %esp
; SSE-32-NEXT: subl $24, %esp
; SSE-32-NEXT: movq %xmm0, {{[0-9]+}}(%esp)
; SSE-32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; SSE-32-NEXT: movq %xmm0, {{[0-9]+}}(%esp)
; SSE-32-NEXT: fildll {{[0-9]+}}(%esp)
; SSE-32-NEXT: fstps (%esp)
; SSE-32-NEXT: fildll {{[0-9]+}}(%esp)
; SSE-32-NEXT: fstps {{[0-9]+}}(%esp)
; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE-32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE-32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-32-NEXT: movl %ebp, %esp
; SSE-32-NEXT: popl %ebp
; SSE-32-NEXT: .cfi_def_cfa %esp, 4
; SSE-32-NEXT: retl
;
; SSE-64-LABEL: sitofp_v2i64_v2f32:
; SSE-64: # %bb.0:
; SSE-64-NEXT: movq %xmm0, %rax
; SSE-64-NEXT: cvtsi2ss %rax, %xmm1
; SSE-64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; SSE-64-NEXT: movq %xmm0, %rax
; SSE-64-NEXT: xorps %xmm0, %xmm0
; SSE-64-NEXT: cvtsi2ss %rax, %xmm0
; SSE-64-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; SSE-64-NEXT: movaps %xmm1, %xmm0
; SSE-64-NEXT: retq
;
; AVX-32-LABEL: sitofp_v2i64_v2f32:
; AVX-32: # %bb.0:
; AVX-32-NEXT: pushl %ebp
; AVX-32-NEXT: .cfi_def_cfa_offset 8
; AVX-32-NEXT: .cfi_offset %ebp, -8
; AVX-32-NEXT: movl %esp, %ebp
; AVX-32-NEXT: .cfi_def_cfa_register %ebp
; AVX-32-NEXT: andl $-8, %esp
; AVX-32-NEXT: subl $24, %esp
; AVX-32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)
; AVX-32-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,3,0,1]
; AVX-32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)
; AVX-32-NEXT: fildll {{[0-9]+}}(%esp)
; AVX-32-NEXT: fstps (%esp)
; AVX-32-NEXT: fildll {{[0-9]+}}(%esp)
; AVX-32-NEXT: fstps {{[0-9]+}}(%esp)
; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-32-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
; AVX-32-NEXT: movl %ebp, %esp
; AVX-32-NEXT: popl %ebp
; AVX-32-NEXT: .cfi_def_cfa %esp, 4
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: sitofp_v2i64_v2f32:
; AVX-64: # %bb.0:
; AVX-64-NEXT: vpextrq $1, %xmm0, %rax
; AVX-64-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; AVX-64-NEXT: vmovq %xmm0, %rax
; AVX-64-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; AVX-64-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; AVX-64-NEXT: retq
;
; AVX512DQ-32-LABEL: sitofp_v2i64_v2f32:
; AVX512DQ-32: # %bb.0:
; AVX512DQ-32-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-32-NEXT: vcvtqq2ps %zmm0, %ymm1
; AVX512DQ-32-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,3,0,1]
; AVX512DQ-32-NEXT: vcvtqq2ps %zmm0, %ymm0
; AVX512DQ-32-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],zero,zero
; AVX512DQ-32-NEXT: vzeroupper
; AVX512DQ-32-NEXT: retl
;
; AVX512DQ-64-LABEL: sitofp_v2i64_v2f32:
; AVX512DQ-64: # %bb.0:
; AVX512DQ-64-NEXT: vpextrq $1, %xmm0, %rax
; AVX512DQ-64-NEXT: vcvtsi2ss %rax, %xmm1, %xmm1
; AVX512DQ-64-NEXT: vmovq %xmm0, %rax
; AVX512DQ-64-NEXT: vcvtsi2ss %rax, %xmm2, %xmm0
; AVX512DQ-64-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; AVX512DQ-64-NEXT: retq
;
; AVX512DQVL-LABEL: sitofp_v2i64_v2f32:
; AVX512DQVL: # %bb.0:
; AVX512DQVL-NEXT: vcvtqq2ps %xmm0, %xmm0
; AVX512DQVL-NEXT: ret{{[l|q]}}
%result = call <2 x float> @llvm.experimental.constrained.sitofp.v2f32.v2i64(<2 x i64> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret <2 x float> %result
}

define <2 x float> @uitofp_v2i64_v2f32(<2 x i64> %x) #0 {
; SSE-32-LABEL: uitofp_v2i64_v2f32:
; SSE-32: # %bb.0:
; SSE-32-NEXT: pushl %ebp
; SSE-32-NEXT: .cfi_def_cfa_offset 8
; SSE-32-NEXT: .cfi_offset %ebp, -8
; SSE-32-NEXT: movl %esp, %ebp
; SSE-32-NEXT: .cfi_def_cfa_register %ebp
; SSE-32-NEXT: andl $-8, %esp
; SSE-32-NEXT: subl $24, %esp
; SSE-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; SSE-32-NEXT: movq %xmm1, {{[0-9]+}}(%esp)
; SSE-32-NEXT: movq %xmm0, {{[0-9]+}}(%esp)
; SSE-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3]
; SSE-32-NEXT: movd %xmm1, %eax
; SSE-32-NEXT: xorl %ecx, %ecx
; SSE-32-NEXT: testl %eax, %eax
; SSE-32-NEXT: setns %cl
; SSE-32-NEXT: fildll {{[0-9]+}}(%esp)
; SSE-32-NEXT: fadds {{\.LCPI.*}}(,%ecx,4)
; SSE-32-NEXT: fstps (%esp)
; SSE-32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
; SSE-32-NEXT: movd %xmm0, %eax
; SSE-32-NEXT: xorl %ecx, %ecx
; SSE-32-NEXT: testl %eax, %eax
; SSE-32-NEXT: setns %cl
; SSE-32-NEXT: fildll {{[0-9]+}}(%esp)
; SSE-32-NEXT: fadds {{\.LCPI.*}}(,%ecx,4)
; SSE-32-NEXT: fstps {{[0-9]+}}(%esp)
; SSE-32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE-32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE-32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-32-NEXT: movl %ebp, %esp
; SSE-32-NEXT: popl %ebp
; SSE-32-NEXT: .cfi_def_cfa %esp, 4
; SSE-32-NEXT: retl
;
; SSE-64-LABEL: uitofp_v2i64_v2f32:
; SSE-64: # %bb.0:
; SSE-64-NEXT: movdqa %xmm0, %xmm1
; SSE-64-NEXT: movq %xmm0, %rax
; SSE-64-NEXT: movq %rax, %rcx
; SSE-64-NEXT: shrq %rcx
; SSE-64-NEXT: movl %eax, %edx
; SSE-64-NEXT: andl $1, %edx
; SSE-64-NEXT: orq %rcx, %rdx
; SSE-64-NEXT: testq %rax, %rax
; SSE-64-NEXT: cmovnsq %rax, %rdx
; SSE-64-NEXT: xorps %xmm0, %xmm0
; SSE-64-NEXT: cvtsi2ss %rdx, %xmm0
; SSE-64-NEXT: jns .LBB1_2
; SSE-64-NEXT: # %bb.1:
; SSE-64-NEXT: addss %xmm0, %xmm0
; SSE-64-NEXT: .LBB1_2:
; SSE-64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
; SSE-64-NEXT: movq %xmm1, %rax
; SSE-64-NEXT: movq %rax, %rcx
; SSE-64-NEXT: shrq %rcx
; SSE-64-NEXT: movl %eax, %edx
; SSE-64-NEXT: andl $1, %edx
; SSE-64-NEXT: orq %rcx, %rdx
; SSE-64-NEXT: testq %rax, %rax
; SSE-64-NEXT: cmovnsq %rax, %rdx
; SSE-64-NEXT: xorps %xmm1, %xmm1
; SSE-64-NEXT: cvtsi2ss %rdx, %xmm1
; SSE-64-NEXT: jns .LBB1_4
; SSE-64-NEXT: # %bb.3:
; SSE-64-NEXT: addss %xmm1, %xmm1
; SSE-64-NEXT: .LBB1_4:
; SSE-64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-64-NEXT: retq
;
; AVX-32-LABEL: uitofp_v2i64_v2f32:
; AVX-32: # %bb.0:
; AVX-32-NEXT: pushl %ebp
; AVX-32-NEXT: .cfi_def_cfa_offset 8
; AVX-32-NEXT: .cfi_offset %ebp, -8
; AVX-32-NEXT: movl %esp, %ebp
; AVX-32-NEXT: .cfi_def_cfa_register %ebp
; AVX-32-NEXT: andl $-8, %esp
; AVX-32-NEXT: subl $24, %esp
; AVX-32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)
; AVX-32-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
; AVX-32-NEXT: vmovlps %xmm1, {{[0-9]+}}(%esp)
; AVX-32-NEXT: vextractps $1, %xmm0, %eax
; AVX-32-NEXT: xorl %ecx, %ecx
; AVX-32-NEXT: testl %eax, %eax
; AVX-32-NEXT: setns %cl
; AVX-32-NEXT: fildll {{[0-9]+}}(%esp)
; AVX-32-NEXT: fadds {{\.LCPI.*}}(,%ecx,4)
; AVX-32-NEXT: fstps {{[0-9]+}}(%esp)
; AVX-32-NEXT: vextractps $3, %xmm0, %eax
; AVX-32-NEXT: xorl %ecx, %ecx
; AVX-32-NEXT: testl %eax, %eax
; AVX-32-NEXT: setns %cl
; AVX-32-NEXT: fildll {{[0-9]+}}(%esp)
; AVX-32-NEXT: fadds {{\.LCPI.*}}(,%ecx,4)
; AVX-32-NEXT: fstps (%esp)
; AVX-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-32-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
; AVX-32-NEXT: movl %ebp, %esp
; AVX-32-NEXT: popl %ebp
; AVX-32-NEXT: .cfi_def_cfa %esp, 4
; AVX-32-NEXT: retl
;
; AVX1-64-LABEL: uitofp_v2i64_v2f32:
; AVX1-64: # %bb.0:
; AVX1-64-NEXT: vpextrq $1, %xmm0, %rax
; AVX1-64-NEXT: movq %rax, %rcx
; AVX1-64-NEXT: shrq %rcx
; AVX1-64-NEXT: movl %eax, %edx
; AVX1-64-NEXT: andl $1, %edx
; AVX1-64-NEXT: orq %rcx, %rdx
; AVX1-64-NEXT: testq %rax, %rax
; AVX1-64-NEXT: cmovnsq %rax, %rdx
; AVX1-64-NEXT: vcvtsi2ss %rdx, %xmm1, %xmm1
; AVX1-64-NEXT: jns .LBB1_2
; AVX1-64-NEXT: # %bb.1:
; AVX1-64-NEXT: vaddss %xmm1, %xmm1, %xmm1
; AVX1-64-NEXT: .LBB1_2:
; AVX1-64-NEXT: vmovq %xmm0, %rax
; AVX1-64-NEXT: movq %rax, %rcx
; AVX1-64-NEXT: shrq %rcx
; AVX1-64-NEXT: movl %eax, %edx
; AVX1-64-NEXT: andl $1, %edx
; AVX1-64-NEXT: orq %rcx, %rdx
; AVX1-64-NEXT: testq %rax, %rax
; AVX1-64-NEXT: cmovnsq %rax, %rdx
; AVX1-64-NEXT: vcvtsi2ss %rdx, %xmm2, %xmm0
; AVX1-64-NEXT: jns .LBB1_4
; AVX1-64-NEXT: # %bb.3:
; AVX1-64-NEXT: vaddss %xmm0, %xmm0, %xmm0
; AVX1-64-NEXT: .LBB1_4:
; AVX1-64-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; AVX1-64-NEXT: retq
;
; AVX512F-64-LABEL: uitofp_v2i64_v2f32:
; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vpextrq $1, %xmm0, %rax
; AVX512F-64-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1
; AVX512F-64-NEXT: vmovq %xmm0, %rax
; AVX512F-64-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0
; AVX512F-64-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; AVX512F-64-NEXT: retq
;
; AVX512VL-64-LABEL: uitofp_v2i64_v2f32:
; AVX512VL-64: # %bb.0:
; AVX512VL-64-NEXT: vpextrq $1, %xmm0, %rax
; AVX512VL-64-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1
; AVX512VL-64-NEXT: vmovq %xmm0, %rax
; AVX512VL-64-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0
; AVX512VL-64-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; AVX512VL-64-NEXT: retq
;
; AVX512DQ-32-LABEL: uitofp_v2i64_v2f32:
; AVX512DQ-32: # %bb.0:
; AVX512DQ-32-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-32-NEXT: vcvtuqq2ps %zmm0, %ymm1
; AVX512DQ-32-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,3,0,1]
; AVX512DQ-32-NEXT: vcvtuqq2ps %zmm0, %ymm0
; AVX512DQ-32-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],zero,zero
; AVX512DQ-32-NEXT: vzeroupper
; AVX512DQ-32-NEXT: retl
;
; AVX512DQ-64-LABEL: uitofp_v2i64_v2f32:
; AVX512DQ-64: # %bb.0:
; AVX512DQ-64-NEXT: vpextrq $1, %xmm0, %rax
; AVX512DQ-64-NEXT: vcvtusi2ss %rax, %xmm1, %xmm1
; AVX512DQ-64-NEXT: vmovq %xmm0, %rax
; AVX512DQ-64-NEXT: vcvtusi2ss %rax, %xmm2, %xmm0
; AVX512DQ-64-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; AVX512DQ-64-NEXT: retq
;
; AVX512DQVL-LABEL: uitofp_v2i64_v2f32:
; AVX512DQVL: # %bb.0:
; AVX512DQVL-NEXT: vcvtuqq2ps %xmm0, %xmm0
; AVX512DQVL-NEXT: ret{{[l|q]}}
%result = call <2 x float> @llvm.experimental.constrained.uitofp.v2f32.v2i64(<2 x i64> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret <2 x float> %result
}

define <4 x float> @sitofp_v4i1_v4f32(<4 x i1> %x) #0 {
; SSE-LABEL: sitofp_v4i1_v4f32:
; SSE: # %bb.0:
Expand Down Expand Up @@ -72,6 +359,13 @@ define <4 x float> @uitofp_v4i1_v4f32(<4 x i1> %x) #0 {
; AVX1-64-NEXT: vcvtdq2ps %xmm0, %xmm0
; AVX1-64-NEXT: retq
;
; AVX512F-LABEL: uitofp_v4i1_v4f32:
; AVX512F: # %bb.0:
; AVX512F-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1]
; AVX512F-NEXT: vandps %xmm1, %xmm0, %xmm0
; AVX512F-NEXT: vcvtdq2ps %xmm0, %xmm0
; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512VL-32-LABEL: uitofp_v4i1_v4f32:
; AVX512VL-32: # %bb.0:
; AVX512VL-32-NEXT: vpandd {{\.LCPI.*}}{1to4}, %xmm0, %xmm0
Expand All @@ -90,6 +384,18 @@ define <4 x float> @uitofp_v4i1_v4f32(<4 x i1> %x) #0 {
; AVX512DQ-NEXT: vandps %xmm1, %xmm0, %xmm0
; AVX512DQ-NEXT: vcvtdq2ps %xmm0, %xmm0
; AVX512DQ-NEXT: ret{{[l|q]}}
;
; AVX512DQVL-32-LABEL: uitofp_v4i1_v4f32:
; AVX512DQVL-32: # %bb.0:
; AVX512DQVL-32-NEXT: vandps {{\.LCPI.*}}{1to4}, %xmm0, %xmm0
; AVX512DQVL-32-NEXT: vcvtdq2ps %xmm0, %xmm0
; AVX512DQVL-32-NEXT: retl
;
; AVX512DQVL-64-LABEL: uitofp_v4i1_v4f32:
; AVX512DQVL-64: # %bb.0:
; AVX512DQVL-64-NEXT: vandps {{.*}}(%rip){1to4}, %xmm0, %xmm0
; AVX512DQVL-64-NEXT: vcvtdq2ps %xmm0, %xmm0
; AVX512DQVL-64-NEXT: retq
%result = call <4 x float> @llvm.experimental.constrained.uitofp.v4f32.v4i1(<4 x i1> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
Expand Down Expand Up @@ -231,18 +537,33 @@ define <4 x float> @uitofp_v4i32_v4f32(<4 x i32> %x) #0 {
; AVX1-64-NEXT: vaddps %xmm0, %xmm1, %xmm0
; AVX1-64-NEXT: retq
;
; FIXME: This is an unsafe behavior for strict FP
; AVX512F-LABEL: uitofp_v4i32_v4f32:
; AVX512F: # %bb.0:
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512F-NEXT: vcvtudq2ps %zmm0, %zmm0
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512VL-LABEL: uitofp_v4i32_v4f32:
; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vcvtudq2ps %xmm0, %xmm0
; AVX512VL-NEXT: ret{{[l|q]}}
;
; FIXME: This is an unsafe behavior for strict FP
; AVX512DQ-LABEL: uitofp_v4i32_v4f32:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-NEXT: vcvtudq2ps %zmm0, %zmm0
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: ret{{[l|q]}}
;
; AVX512DQVL-LABEL: uitofp_v4i32_v4f32:
; AVX512DQVL: # %bb.0:
; AVX512DQVL-NEXT: vcvtudq2ps %xmm0, %xmm0
; AVX512DQVL-NEXT: ret{{[l|q]}}
%result = call <4 x float> @llvm.experimental.constrained.uitofp.v4f32.v4i32(<4 x i32> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
Expand Down Expand Up @@ -300,6 +621,14 @@ define <2 x double> @uitofp_v2i1_v2f64(<2 x i1> %x) #0 {
; AVX1-64-NEXT: vcvtdq2pd %xmm0, %xmm0
; AVX1-64-NEXT: retq
;
; AVX512F-LABEL: uitofp_v2i1_v2f64:
; AVX512F: # %bb.0:
; AVX512F-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,2,3]
; AVX512F-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1]
; AVX512F-NEXT: vandps %xmm1, %xmm0, %xmm0
; AVX512F-NEXT: vcvtdq2pd %xmm0, %xmm0
; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512VL-32-LABEL: uitofp_v2i1_v2f64:
; AVX512VL-32: # %bb.0:
; AVX512VL-32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
Expand All @@ -321,6 +650,20 @@ define <2 x double> @uitofp_v2i1_v2f64(<2 x i1> %x) #0 {
; AVX512DQ-NEXT: vandps %xmm1, %xmm0, %xmm0
; AVX512DQ-NEXT: vcvtdq2pd %xmm0, %xmm0
; AVX512DQ-NEXT: ret{{[l|q]}}
;
; AVX512DQVL-32-LABEL: uitofp_v2i1_v2f64:
; AVX512DQVL-32: # %bb.0:
; AVX512DQVL-32-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,2,3]
; AVX512DQVL-32-NEXT: vandps {{\.LCPI.*}}{1to4}, %xmm0, %xmm0
; AVX512DQVL-32-NEXT: vcvtdq2pd %xmm0, %xmm0
; AVX512DQVL-32-NEXT: retl
;
; AVX512DQVL-64-LABEL: uitofp_v2i1_v2f64:
; AVX512DQVL-64: # %bb.0:
; AVX512DQVL-64-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,2,3]
; AVX512DQVL-64-NEXT: vandps {{.*}}(%rip){1to4}, %xmm0, %xmm0
; AVX512DQVL-64-NEXT: vcvtdq2pd %xmm0, %xmm0
; AVX512DQVL-64-NEXT: retq
%result = call <2 x double> @llvm.experimental.constrained.uitofp.v2f64.v2i1(<2 x i1> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
Expand Down Expand Up @@ -466,18 +809,33 @@ define <2 x double> @uitofp_v2i32_v2f64(<2 x i32> %x) #0 {
; AVX1-64-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; AVX1-64-NEXT: retq
;
; FIXME: This is an unsafe behavior for strict FP
; AVX512F-LABEL: uitofp_v2i32_v2f64:
; AVX512F: # %bb.0:
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX512F-NEXT: vcvtudq2pd %ymm0, %zmm0
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512VL-LABEL: uitofp_v2i32_v2f64:
; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vcvtudq2pd %xmm0, %xmm0
; AVX512VL-NEXT: ret{{[l|q]}}
;
; FIXME: This is an unsafe behavior for strict FP
; AVX512DQ-LABEL: uitofp_v2i32_v2f64:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: ret{{[l|q]}}
;
; AVX512DQVL-LABEL: uitofp_v2i32_v2f64:
; AVX512DQVL: # %bb.0:
; AVX512DQVL-NEXT: vcvtudq2pd %xmm0, %xmm0
; AVX512DQVL-NEXT: ret{{[l|q]}}
%result = call <2 x double> @llvm.experimental.constrained.uitofp.v2f64.v2i32(<2 x i32> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
Expand Down Expand Up @@ -552,13 +910,19 @@ define <2 x double> @sitofp_v2i64_v2f64(<2 x i64> %x) #0 {
; AVX-64-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-64-NEXT: retq
;
; FIXME: This is an unsafe behavior for strict FP
; AVX512DQ-LABEL: sitofp_v2i64_v2f64:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm0
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: ret{{[l|q]}}
;
; AVX512DQVL-LABEL: sitofp_v2i64_v2f64:
; AVX512DQVL: # %bb.0:
; AVX512DQVL-NEXT: vcvtqq2pd %xmm0, %xmm0
; AVX512DQVL-NEXT: ret{{[l|q]}}
%result = call <2 x double> @llvm.experimental.constrained.sitofp.v2f64.v2i64(<2 x i64> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
Expand Down Expand Up @@ -610,6 +974,28 @@ define <2 x double> @uitofp_v2i64_v2f64(<2 x i64> %x) #0 {
; AVX1-64-NEXT: vaddpd %xmm0, %xmm1, %xmm0
; AVX1-64-NEXT: retq
;
; AVX512F-32-LABEL: uitofp_v2i64_v2f64:
; AVX512F-32: # %bb.0:
; AVX512F-32-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512F-32-NEXT: vpblendd {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
; AVX512F-32-NEXT: vpor {{\.LCPI.*}}, %xmm1, %xmm1
; AVX512F-32-NEXT: vpsrlq $32, %xmm0, %xmm0
; AVX512F-32-NEXT: vpor {{\.LCPI.*}}, %xmm0, %xmm0
; AVX512F-32-NEXT: vsubpd {{\.LCPI.*}}, %xmm0, %xmm0
; AVX512F-32-NEXT: vaddpd %xmm0, %xmm1, %xmm0
; AVX512F-32-NEXT: retl
;
; AVX512F-64-LABEL: uitofp_v2i64_v2f64:
; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512F-64-NEXT: vpblendd {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
; AVX512F-64-NEXT: vpor {{.*}}(%rip), %xmm1, %xmm1
; AVX512F-64-NEXT: vpsrlq $32, %xmm0, %xmm0
; AVX512F-64-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0
; AVX512F-64-NEXT: vsubpd {{.*}}(%rip), %xmm0, %xmm0
; AVX512F-64-NEXT: vaddpd %xmm0, %xmm1, %xmm0
; AVX512F-64-NEXT: retq
;
; AVX512VL-32-LABEL: uitofp_v2i64_v2f64:
; AVX512VL-32: # %bb.0:
; AVX512VL-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm1
Expand All @@ -630,13 +1016,19 @@ define <2 x double> @uitofp_v2i64_v2f64(<2 x i64> %x) #0 {
; AVX512VL-64-NEXT: vaddpd %xmm0, %xmm1, %xmm0
; AVX512VL-64-NEXT: retq
;
; FIXME: This is an unsafe behavior for strict FP
; AVX512DQ-LABEL: uitofp_v2i64_v2f64:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
; AVX512DQ-NEXT: vcvtuqq2pd %zmm0, %zmm0
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: ret{{[l|q]}}
;
; AVX512DQVL-LABEL: uitofp_v2i64_v2f64:
; AVX512DQVL: # %bb.0:
; AVX512DQVL-NEXT: vcvtuqq2pd %xmm0, %xmm0
; AVX512DQVL-NEXT: ret{{[l|q]}}
%result = call <2 x double> @llvm.experimental.constrained.uitofp.v2f64.v2i64(<2 x i64> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
Expand Down
111 changes: 107 additions & 4 deletions llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
View file
Original file line number Diff line number Diff line change
@@ -1,10 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX1,AVX-32,AVX1-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX1,AVX-64,AVX1-64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f,avx512vl -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX-32,AVX512VL-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,avx512vl -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX-64,AVX512VL-64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512f,avx512dq -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX512DQ,AVX512DQ-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f,avx512dq -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX512DQ,AVX512DQ-64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX512F,AVX-32,AVX512F-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX512F,AVX-64,AVX512F-64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512vl -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX-32,AVX512VL-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX-64,AVX512VL-64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512dq -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX512DQ,AVX512DQ-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512dq -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX512DQ,AVX512DQ-64
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512dq,avx512vl -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX512DQVL,AVX512DQVL-32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512dq,avx512vl -O3 -disable-strictnode-mutation | FileCheck %s --check-prefixes=CHECK,AVX512DQVL,AVX512DQVL-64

declare <8 x float> @llvm.experimental.constrained.sitofp.v8f32.v8i1(<8 x i1>, metadata, metadata)
declare <8 x float> @llvm.experimental.constrained.uitofp.v8f32.v8i1(<8 x i1>, metadata, metadata)
Expand Down Expand Up @@ -67,6 +71,20 @@ define <8 x float> @uitofp_v8i1_v8f32(<8 x i1> %x) #0 {
; AVX512DQ-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512DQ-64-NEXT: vcvtdq2ps %ymm0, %ymm0
; AVX512DQ-64-NEXT: retq
;
; AVX512DQVL-32-LABEL: uitofp_v8i1_v8f32:
; AVX512DQVL-32: # %bb.0:
; AVX512DQVL-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
; AVX512DQVL-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512DQVL-32-NEXT: vcvtdq2ps %ymm0, %ymm0
; AVX512DQVL-32-NEXT: retl
;
; AVX512DQVL-64-LABEL: uitofp_v8i1_v8f32:
; AVX512DQVL-64: # %bb.0:
; AVX512DQVL-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; AVX512DQVL-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512DQVL-64-NEXT: vcvtdq2ps %ymm0, %ymm0
; AVX512DQVL-64-NEXT: retq
%result = call <8 x float> @llvm.experimental.constrained.uitofp.v8f32.v8i1(<8 x i1> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
Expand Down Expand Up @@ -145,17 +163,31 @@ define <8 x float> @uitofp_v8i32_v8f32(<8 x i32> %x) #0 {
; AVX1-NEXT: vaddps %ymm0, %ymm1, %ymm0
; AVX1-NEXT: ret{{[l|q]}}
;
; FIXME: This is an unsafe behavior for strict FP
; AVX512F-LABEL: uitofp_v8i32_v8f32:
; AVX512F: # %bb.0:
; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512F-NEXT: vcvtudq2ps %zmm0, %zmm0
; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512VL-LABEL: uitofp_v8i32_v8f32:
; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vcvtudq2ps %ymm0, %ymm0
; AVX512VL-NEXT: ret{{[l|q]}}
;
; FIXME: This is an unsafe behavior for strict FP
; AVX512DQ-LABEL: uitofp_v8i32_v8f32:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512DQ-NEXT: vcvtudq2ps %zmm0, %zmm0
; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
; AVX512DQ-NEXT: ret{{[l|q]}}
;
; AVX512DQVL-LABEL: uitofp_v8i32_v8f32:
; AVX512DQVL: # %bb.0:
; AVX512DQVL-NEXT: vcvtudq2ps %ymm0, %ymm0
; AVX512DQVL-NEXT: ret{{[l|q]}}
%result = call <8 x float> @llvm.experimental.constrained.uitofp.v8f32.v8i32(<8 x i32> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
Expand Down Expand Up @@ -183,6 +215,13 @@ define <4 x double> @uitofp_v4i1_v4f64(<4 x i1> %x) #0 {
; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0
; AVX1-NEXT: ret{{[l|q]}}
;
; AVX512F-LABEL: uitofp_v4i1_v4f64:
; AVX512F: # %bb.0:
; AVX512F-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1]
; AVX512F-NEXT: vandps %xmm1, %xmm0, %xmm0
; AVX512F-NEXT: vcvtdq2pd %xmm0, %ymm0
; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512VL-32-LABEL: uitofp_v4i1_v4f64:
; AVX512VL-32: # %bb.0:
; AVX512VL-32-NEXT: vpandd {{\.LCPI.*}}{1to4}, %xmm0, %xmm0
Expand All @@ -201,6 +240,18 @@ define <4 x double> @uitofp_v4i1_v4f64(<4 x i1> %x) #0 {
; AVX512DQ-NEXT: vandps %xmm1, %xmm0, %xmm0
; AVX512DQ-NEXT: vcvtdq2pd %xmm0, %ymm0
; AVX512DQ-NEXT: ret{{[l|q]}}
;
; AVX512DQVL-32-LABEL: uitofp_v4i1_v4f64:
; AVX512DQVL-32: # %bb.0:
; AVX512DQVL-32-NEXT: vandps {{\.LCPI.*}}{1to4}, %xmm0, %xmm0
; AVX512DQVL-32-NEXT: vcvtdq2pd %xmm0, %ymm0
; AVX512DQVL-32-NEXT: retl
;
; AVX512DQVL-64-LABEL: uitofp_v4i1_v4f64:
; AVX512DQVL-64: # %bb.0:
; AVX512DQVL-64-NEXT: vandps {{.*}}(%rip){1to4}, %xmm0, %xmm0
; AVX512DQVL-64-NEXT: vcvtdq2pd %xmm0, %ymm0
; AVX512DQVL-64-NEXT: retq
%result = call <4 x double> @llvm.experimental.constrained.uitofp.v4f64.v4i1(<4 x i1> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
Expand Down Expand Up @@ -279,17 +330,31 @@ define <4 x double> @uitofp_v4i32_v4f64(<4 x i32> %x) #0 {
; AVX1-NEXT: vaddpd %ymm0, %ymm1, %ymm0
; AVX1-NEXT: ret{{[l|q]}}
;
; FIXME: This is an unsafe behavior for strict FP
; AVX512F-LABEL: uitofp_v4i32_v4f64:
; AVX512F: # %bb.0:
; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX512F-NEXT: vcvtudq2pd %ymm0, %zmm0
; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
; AVX512F-NEXT: ret{{[l|q]}}
;
; AVX512VL-LABEL: uitofp_v4i32_v4f64:
; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vcvtudq2pd %xmm0, %ymm0
; AVX512VL-NEXT: ret{{[l|q]}}
;
; FIXME: This is an unsafe behavior for strict FP
; AVX512DQ-LABEL: uitofp_v4i32_v4f64:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0
; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
; AVX512DQ-NEXT: ret{{[l|q]}}
;
; AVX512DQVL-LABEL: uitofp_v4i32_v4f64:
; AVX512DQVL: # %bb.0:
; AVX512DQVL-NEXT: vcvtudq2pd %xmm0, %ymm0
; AVX512DQVL-NEXT: ret{{[l|q]}}
%result = call <4 x double> @llvm.experimental.constrained.uitofp.v4f64.v4i32(<4 x i32> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
Expand Down Expand Up @@ -347,12 +412,18 @@ define <4 x double> @sitofp_v4i64_v4f64(<4 x i64> %x) #0 {
; AVX-64-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX-64-NEXT: retq
;
; FIXME: This is an unsafe behavior for strict FP
; AVX512DQ-LABEL: sitofp_v4i64_v4f64:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm0
; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
; AVX512DQ-NEXT: ret{{[l|q]}}
;
; AVX512DQVL-LABEL: sitofp_v4i64_v4f64:
; AVX512DQVL: # %bb.0:
; AVX512DQVL-NEXT: vcvtqq2pd %ymm0, %ymm0
; AVX512DQVL-NEXT: ret{{[l|q]}}
%result = call <4 x double> @llvm.experimental.constrained.sitofp.v4f64.v4i64(<4 x i64> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
Expand Down Expand Up @@ -386,6 +457,32 @@ define <4 x double> @uitofp_v4i64_v4f64(<4 x i64> %x) #0 {
; AVX1-64-NEXT: vaddpd %ymm0, %ymm1, %ymm0
; AVX1-64-NEXT: retq
;
; AVX512F-32-LABEL: uitofp_v4i64_v4f64:
; AVX512F-32: # %bb.0:
; AVX512F-32-NEXT: vpsrlq $32, %ymm0, %ymm1
; AVX512F-32-NEXT: vpor {{\.LCPI.*}}, %ymm1, %ymm1
; AVX512F-32-NEXT: vbroadcastsd {{.*#+}} ymm2 = [1.9342813118337666E+25,1.9342813118337666E+25,1.9342813118337666E+25,1.9342813118337666E+25]
; AVX512F-32-NEXT: vsubpd %ymm2, %ymm1, %ymm1
; AVX512F-32-NEXT: vxorpd %xmm2, %xmm2, %xmm2
; AVX512F-32-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm2[1],ymm0[2],ymm2[3],ymm0[4],ymm2[5],ymm0[6],ymm2[7]
; AVX512F-32-NEXT: vpor {{\.LCPI.*}}, %ymm0, %ymm0
; AVX512F-32-NEXT: vaddpd %ymm1, %ymm0, %ymm0
; AVX512F-32-NEXT: retl
;
; AVX512F-64-LABEL: uitofp_v4i64_v4f64:
; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512F-64-NEXT: vpblendd {{.*#+}} ymm1 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7]
; AVX512F-64-NEXT: vpbroadcastq {{.*#+}} ymm2 = [4841369599423283200,4841369599423283200,4841369599423283200,4841369599423283200]
; AVX512F-64-NEXT: vpor %ymm2, %ymm1, %ymm1
; AVX512F-64-NEXT: vpsrlq $32, %ymm0, %ymm0
; AVX512F-64-NEXT: vpbroadcastq {{.*#+}} ymm2 = [4985484787499139072,4985484787499139072,4985484787499139072,4985484787499139072]
; AVX512F-64-NEXT: vpor %ymm2, %ymm0, %ymm0
; AVX512F-64-NEXT: vbroadcastsd {{.*#+}} ymm2 = [1.9342813118337666E+25,1.9342813118337666E+25,1.9342813118337666E+25,1.9342813118337666E+25]
; AVX512F-64-NEXT: vsubpd %ymm2, %ymm0, %ymm0
; AVX512F-64-NEXT: vaddpd %ymm0, %ymm1, %ymm0
; AVX512F-64-NEXT: retq
;
; AVX512VL-32-LABEL: uitofp_v4i64_v4f64:
; AVX512VL-32: # %bb.0:
; AVX512VL-32-NEXT: vpand {{\.LCPI.*}}, %ymm0, %ymm1
Expand All @@ -406,12 +503,18 @@ define <4 x double> @uitofp_v4i64_v4f64(<4 x i64> %x) #0 {
; AVX512VL-64-NEXT: vaddpd %ymm0, %ymm1, %ymm0
; AVX512VL-64-NEXT: retq
;
; FIXME: This is an unsafe behavior for strict FP
; AVX512DQ-LABEL: uitofp_v4i64_v4f64:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
; AVX512DQ-NEXT: vcvtuqq2pd %zmm0, %zmm0
; AVX512DQ-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0
; AVX512DQ-NEXT: ret{{[l|q]}}
;
; AVX512DQVL-LABEL: uitofp_v4i64_v4f64:
; AVX512DQVL: # %bb.0:
; AVX512DQVL-NEXT: vcvtuqq2pd %ymm0, %ymm0
; AVX512DQVL-NEXT: ret{{[l|q]}}
%result = call <4 x double> @llvm.experimental.constrained.uitofp.v4f64.v4i64(<4 x i64> %x,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
Expand Down