668 changes: 462 additions & 206 deletions llvm/test/Transforms/InstCombine/canonicalize-ashr-shl-to-masking.ll
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668 changes: 462 additions & 206 deletions llvm/test/Transforms/InstCombine/canonicalize-lshr-shl-to-masking.ll
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15 changes: 7 additions & 8 deletions llvm/test/Transforms/InstCombine/cast.ll
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Expand Up @@ -459,8 +459,8 @@ define i64 @test38(i32 %a) {

define i16 @test39(i16 %a) {
; ALL-LABEL: @test39(
; ALL-NEXT: [[REV:%.*]] = call i16 @llvm.bswap.i16(i16 [[A:%.*]])
; ALL-NEXT: ret i16 [[REV]]
; ALL-NEXT: [[T32:%.*]] = call i16 @llvm.bswap.i16(i16 [[A:%.*]])
; ALL-NEXT: ret i16 [[T32]]
;
%t = zext i16 %a to i32
%t21 = lshr i32 %t, 8
Expand Down Expand Up @@ -684,10 +684,9 @@ define i64 @test49(i64 %A) {

define i64 @test50(i64 %x) {
; ALL-LABEL: @test50(
; ALL-NEXT: [[A:%.*]] = lshr i64 [[X:%.*]], 2
; ALL-NEXT: [[D:%.*]] = shl i64 [[A]], 32
; ALL-NEXT: [[SEXT:%.*]] = add i64 [[D]], -4294967296
; ALL-NEXT: [[E:%.*]] = ashr exact i64 [[SEXT]], 32
; ALL-NEXT: [[TMP1:%.*]] = shl i64 [[X:%.*]], 30
; ALL-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], -4294967296
; ALL-NEXT: [[E:%.*]] = ashr i64 [[TMP2]], 32
; ALL-NEXT: ret i64 [[E]]
;
%a = lshr i64 %x, 2
Expand Down Expand Up @@ -1318,8 +1317,8 @@ define double @test81(double *%p, float %f) {
define i64 @test82(i64 %A) {
; ALL-LABEL: @test82(
; ALL-NEXT: [[TMP1:%.*]] = shl i64 [[A:%.*]], 1
; ALL-NEXT: [[E:%.*]] = and i64 [[TMP1]], 4294966784
; ALL-NEXT: ret i64 [[E]]
; ALL-NEXT: [[D:%.*]] = and i64 [[TMP1]], 4294966784
; ALL-NEXT: ret i64 [[D]]
;
%B = trunc i64 %A to i32
%C = lshr i32 %B, 8
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/Transforms/InstCombine/gep-combine-loop-invariant.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -100,8 +100,8 @@ define void @PR37005(i8* %base, i8** %in) {
; CHECK-NEXT: [[E2:%.*]] = getelementptr inbounds i8*, i8** [[IN:%.*]], i64 undef
; CHECK-NEXT: [[E4:%.*]] = getelementptr inbounds i8*, i8** [[E2]], <2 x i64> <i64 0, i64 1>
; CHECK-NEXT: [[PI1:%.*]] = ptrtoint <2 x i8**> [[E4]] to <2 x i64>
; CHECK-NEXT: [[LR1:%.*]] = lshr <2 x i64> [[PI1]], <i64 21, i64 21>
; CHECK-NEXT: [[SL1:%.*]] = shl nuw nsw <2 x i64> [[LR1]], <i64 7, i64 7>
; CHECK-NEXT: [[TMP0:%.*]] = lshr <2 x i64> [[PI1]], <i64 14, i64 14>
; CHECK-NEXT: [[SL1:%.*]] = and <2 x i64> [[TMP0]], <i64 1125899906842496, i64 1125899906842496>
; CHECK-NEXT: [[E51:%.*]] = getelementptr inbounds i8, i8* [[BASE:%.*]], i64 80
; CHECK-NEXT: [[E6:%.*]] = getelementptr inbounds i8, i8* [[E51]], <2 x i64> [[SL1]]
; CHECK-NEXT: call void @blackhole(<2 x i8*> [[E6]])
Expand Down Expand Up @@ -132,8 +132,8 @@ define void @PR37005_2(i8* %base, i8** %in) {
; CHECK: loop:
; CHECK-NEXT: [[E2:%.*]] = getelementptr inbounds i8*, i8** [[IN:%.*]], i64 undef
; CHECK-NEXT: [[PI1:%.*]] = ptrtoint i8** [[E2]] to i64
; CHECK-NEXT: [[LR1:%.*]] = lshr i64 [[PI1]], 21
; CHECK-NEXT: [[SL1:%.*]] = shl nuw nsw i64 [[LR1]], 7
; CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[PI1]], 14
; CHECK-NEXT: [[SL1:%.*]] = and i64 [[TMP0]], 1125899906842496
; CHECK-NEXT: [[E51:%.*]] = getelementptr inbounds i8, i8* [[BASE:%.*]], <2 x i64> <i64 80, i64 60>
; CHECK-NEXT: [[E6:%.*]] = getelementptr inbounds i8, <2 x i8*> [[E51]], i64 [[SL1]]
; CHECK-NEXT: call void @blackhole(<2 x i8*> [[E6]])
Expand Down Expand Up @@ -162,8 +162,8 @@ define void @PR37005_3(<2 x i8*> %base, i8** %in) {
; CHECK-NEXT: [[E2:%.*]] = getelementptr inbounds i8*, i8** [[IN:%.*]], i64 undef
; CHECK-NEXT: [[E4:%.*]] = getelementptr inbounds i8*, i8** [[E2]], <2 x i64> <i64 0, i64 1>
; CHECK-NEXT: [[PI1:%.*]] = ptrtoint <2 x i8**> [[E4]] to <2 x i64>
; CHECK-NEXT: [[LR1:%.*]] = lshr <2 x i64> [[PI1]], <i64 21, i64 21>
; CHECK-NEXT: [[SL1:%.*]] = shl nuw nsw <2 x i64> [[LR1]], <i64 7, i64 7>
; CHECK-NEXT: [[TMP0:%.*]] = lshr <2 x i64> [[PI1]], <i64 14, i64 14>
; CHECK-NEXT: [[SL1:%.*]] = and <2 x i64> [[TMP0]], <i64 1125899906842496, i64 1125899906842496>
; CHECK-NEXT: [[E5:%.*]] = getelementptr inbounds i8, <2 x i8*> [[BASE:%.*]], i64 80
; CHECK-NEXT: [[E6:%.*]] = getelementptr inbounds i8, <2 x i8*> [[E5]], <2 x i64> [[SL1]]
; CHECK-NEXT: call void @blackhole(<2 x i8*> [[E6]])
Expand Down
3 changes: 2 additions & 1 deletion llvm/test/Transforms/InstCombine/known-signbit-shift.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,8 @@
; with nsw flag should also be non-negative
define i1 @test_shift_nonnegative(i32 %a) {
; CHECK-LABEL: @test_shift_nonnegative(
; CHECK-NEXT: ret i1 true
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%b = lshr i32 %a, 2
%shift = shl nsw i32 %b, 3
Expand Down
22 changes: 10 additions & 12 deletions llvm/test/Transforms/InstCombine/shift.ll
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Expand Up @@ -87,9 +87,8 @@ define i8 @test10a(i8 %A) {
;; The shl may be valuable to scalar evolution.
define i8 @test11(i8 %x) {
; CHECK-LABEL: @test11(
; CHECK-NEXT: [[A:%.*]] = mul i8 [[X:%.*]], 3
; CHECK-NEXT: [[B:%.*]] = lshr i8 [[A]], 3
; CHECK-NEXT: [[C:%.*]] = shl i8 [[B]], 4
; CHECK-NEXT: [[TMP1:%.*]] = mul i8 [[X:%.*]], 6
; CHECK-NEXT: [[C:%.*]] = and i8 [[TMP1]], -16
; CHECK-NEXT: ret i8 [[C]]
;
%a = mul i8 %x, 3
Expand Down Expand Up @@ -143,9 +142,8 @@ define i8 @shishi(i8 %x) {
;; The shl may be valuable to scalar evolution.
define i8 @test13(i8 %x) {
; CHECK-LABEL: @test13(
; CHECK-NEXT: [[A:%.*]] = mul i8 [[X:%.*]], 3
; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[A]], 3
; CHECK-NEXT: [[C:%.*]] = shl i8 [[TMP1]], 4
; CHECK-NEXT: [[TMP1:%.*]] = mul i8 [[X:%.*]], 6
; CHECK-NEXT: [[C:%.*]] = and i8 [[TMP1]], -16
; CHECK-NEXT: ret i8 [[C]]
;
%a = mul i8 %x, 3
Expand Down Expand Up @@ -1089,8 +1087,8 @@ define i32 @test55(i32 %x) {

define i32 @test56(i32 %x) {
; CHECK-LABEL: @test56(
; CHECK-NEXT: [[SHR2:%.*]] = lshr i32 [[X:%.*]], 1
; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[SHR2]], 4
; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[X:%.*]], 3
; CHECK-NEXT: [[SHL:%.*]] = and i32 [[TMP1]], -16
; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHL]], 7
; CHECK-NEXT: ret i32 [[OR]]
;
Expand All @@ -1102,8 +1100,8 @@ define i32 @test56(i32 %x) {

define i32 @test57(i32 %x) {
; CHECK-LABEL: @test57(
; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 1
; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[TMP1]], 4
; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[X:%.*]], 3
; CHECK-NEXT: [[SHL:%.*]] = and i32 [[TMP1]], -16
; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHL]], 7
; CHECK-NEXT: ret i32 [[OR]]
;
Expand Down Expand Up @@ -1139,8 +1137,8 @@ define <2 x i32> @test58_splat_vec(<2 x i32> %x) {

define i32 @test59(i32 %x) {
; CHECK-LABEL: @test59(
; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[X:%.*]], 4
; CHECK-NEXT: [[SHL:%.*]] = shl nsw i32 [[SHR]], 1
; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[X:%.*]], 3
; CHECK-NEXT: [[SHL:%.*]] = and i32 [[TMP1]], -4
; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHL]], 2
; CHECK-NEXT: ret i32 [[OR]]
;
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/Transforms/InstCombine/trunc.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -744,9 +744,9 @@ define void @trunc_shl_31_i32_i64_multi_use(i64 %val, i32 addrspace(1)* %ptr0, i

define i32 @trunc_shl_lshr_infloop(i64 %arg) {
; CHECK-LABEL: @trunc_shl_lshr_infloop(
; CHECK-NEXT: [[A:%.*]] = lshr i64 [[ARG:%.*]], 1
; CHECK-NEXT: [[B:%.*]] = shl i64 [[A]], 2
; CHECK-NEXT: [[C:%.*]] = trunc i64 [[B]] to i32
; CHECK-NEXT: [[ARG_TR:%.*]] = trunc i64 [[ARG:%.*]] to i32
; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[ARG_TR]], 1
; CHECK-NEXT: [[C:%.*]] = and i32 [[TMP1]], -4
; CHECK-NEXT: ret i32 [[C]]
;
%A = lshr i64 %arg, 1
Expand Down Expand Up @@ -801,9 +801,9 @@ define <2 x i32> @trunc_shl_v2i32_v2i64_outofrange(<2 x i64> %val) {

define i32 @trunc_shl_ashr_infloop(i64 %arg) {
; CHECK-LABEL: @trunc_shl_ashr_infloop(
; CHECK-NEXT: [[A:%.*]] = ashr i64 [[ARG:%.*]], 3
; CHECK-NEXT: [[B:%.*]] = shl nsw i64 [[A]], 2
; CHECK-NEXT: [[C:%.*]] = trunc i64 [[B]] to i32
; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[ARG:%.*]], 1
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
; CHECK-NEXT: [[C:%.*]] = and i32 [[TMP2]], -4
; CHECK-NEXT: ret i32 [[C]]
;
%A = ashr i64 %arg, 3
Expand Down
20 changes: 13 additions & 7 deletions llvm/test/Transforms/PhaseOrdering/basic.ll
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Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -O3 -S < %s | FileCheck %s

target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
Expand All @@ -6,9 +7,11 @@ target triple = "x86_64-apple-macosx10.6.7"
declare i8* @malloc(i64)
declare void @free(i8*)


; PR2338
define void @test1() nounwind ssp {
; CHECK-LABEL: @test1(
; CHECK-NEXT: ret void
;
%retval = alloca i32, align 4
%i = alloca i8*, align 8
%call = call i8* @malloc(i64 1)
Expand All @@ -19,8 +22,6 @@ define void @test1() nounwind ssp {
call void @free(i8* %tmp1)
ret void

; CHECK-LABEL: @test1(
; CHECK-NEXT: ret void
}

; This function exposes a phase ordering problem when InstCombine is
Expand All @@ -29,6 +30,15 @@ define void @test1() nounwind ssp {
; It it also important that %add is expressed as a multiple of %div so scalar
; evolution can recognize it.
define i32 @test2(i32 %a, i32* %p) nounwind uwtable ssp {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DIV:%.*]] = lshr i32 [[A:%.*]], 2
; CHECK-NEXT: store i32 [[DIV]], i32* [[P:%.*]], align 4
; CHECK-NEXT: [[ADD:%.*]] = shl nuw nsw i32 [[DIV]], 1
; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 1
; CHECK-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX1]], align 4
; CHECK-NEXT: ret i32 0
;
entry:
%div = udiv i32 %a, 4
%arrayidx = getelementptr inbounds i32, i32* %p, i64 0
Expand All @@ -44,8 +54,4 @@ entry:
%sub = sub i32 %0, %mul
ret i32 %sub

; CHECK-LABEL: @test2(
; CHECK: %div = lshr i32 %a, 2
; CHECK: %add = shl nuw nsw i32 %div, 1
; CHECK: ret i32 0
}