303 changes: 303 additions & 0 deletions llvm/test/CodeGen/X86/vselect-zero.ll
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Expand Up @@ -763,3 +763,306 @@ define <4 x i64> @signbit_setmask_v4i64(<4 x i64> %a, <4 x i64> %b) {
%r = select <4 x i1> %cond, <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, <4 x i64> %b
ret <4 x i64> %r
}

define <16 x i8> @not_signbit_mask_v16i8(<16 x i8> %a, <16 x i8> %b) {
; SSE-LABEL: not_signbit_mask_v16i8:
; SSE: # %bb.0:
; SSE-NEXT: pcmpeqd %xmm2, %xmm2
; SSE-NEXT: pcmpgtb %xmm2, %xmm0
; SSE-NEXT: pand %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: not_signbit_mask_v16i8:
; AVX: # %bb.0:
; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; AVX-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm0
; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512F-LABEL: not_signbit_mask_v16i8:
; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; AVX512F-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm0
; AVX512F-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX512F-NEXT: retq
;
; AVX512DQBW-LABEL: not_signbit_mask_v16i8:
; AVX512DQBW: # %bb.0:
; AVX512DQBW-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; AVX512DQBW-NEXT: vpcmpgtb %xmm2, %xmm0, %k1
; AVX512DQBW-NEXT: vmovdqu8 %xmm1, %xmm0 {%k1} {z}
; AVX512DQBW-NEXT: retq
%cond = icmp sgt <16 x i8> %a, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
%r = select <16 x i1> %cond, <16 x i8> %b, <16 x i8> zeroinitializer
ret <16 x i8> %r
}

define <8 x i16> @not_signbit_mask_v8i16(<8 x i16> %a, <8 x i16> %b) {
; SSE-LABEL: not_signbit_mask_v8i16:
; SSE: # %bb.0:
; SSE-NEXT: pcmpeqd %xmm2, %xmm2
; SSE-NEXT: pcmpgtw %xmm2, %xmm0
; SSE-NEXT: pand %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: not_signbit_mask_v8i16:
; AVX: # %bb.0:
; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; AVX-NEXT: vpcmpgtw %xmm2, %xmm0, %xmm0
; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512F-LABEL: not_signbit_mask_v8i16:
; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; AVX512F-NEXT: vpcmpgtw %xmm2, %xmm0, %xmm0
; AVX512F-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX512F-NEXT: retq
;
; AVX512DQBW-LABEL: not_signbit_mask_v8i16:
; AVX512DQBW: # %bb.0:
; AVX512DQBW-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; AVX512DQBW-NEXT: vpcmpgtw %xmm2, %xmm0, %k1
; AVX512DQBW-NEXT: vmovdqu16 %xmm1, %xmm0 {%k1} {z}
; AVX512DQBW-NEXT: retq
%cond = icmp sgt <8 x i16> %a, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
%r = select <8 x i1> %cond, <8 x i16> %b, <8 x i16> zeroinitializer
ret <8 x i16> %r
}

define <4 x i32> @not_signbit_mask_v4i32(<4 x i32> %a, <4 x i32> %b) {
; SSE-LABEL: not_signbit_mask_v4i32:
; SSE: # %bb.0:
; SSE-NEXT: pcmpeqd %xmm2, %xmm2
; SSE-NEXT: pcmpgtd %xmm2, %xmm0
; SSE-NEXT: pand %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: not_signbit_mask_v4i32:
; AVX: # %bb.0:
; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; AVX-NEXT: vpcmpgtd %xmm2, %xmm0, %xmm0
; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: not_signbit_mask_v4i32:
; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; AVX512-NEXT: vpcmpgtd %xmm2, %xmm0, %k1
; AVX512-NEXT: vmovdqa32 %xmm1, %xmm0 {%k1} {z}
; AVX512-NEXT: retq
%cond = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>
%r = select <4 x i1> %cond, <4 x i32> %b, <4 x i32> zeroinitializer
ret <4 x i32> %r
}

define <2 x i64> @not_signbit_mask_v2i64(<2 x i64> %a, <2 x i64> %b) {
; SSE2-LABEL: not_signbit_mask_v2i64:
; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm2, %xmm2
; SSE2-NEXT: pcmpgtd %xmm2, %xmm0
; SSE2-NEXT: pand %xmm1, %xmm0
; SSE2-NEXT: retq
;
; SSE42-LABEL: not_signbit_mask_v2i64:
; SSE42: # %bb.0:
; SSE42-NEXT: pcmpeqd %xmm2, %xmm2
; SSE42-NEXT: pcmpgtq %xmm2, %xmm0
; SSE42-NEXT: pand %xmm1, %xmm0
; SSE42-NEXT: retq
;
; AVX-LABEL: not_signbit_mask_v2i64:
; AVX: # %bb.0:
; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; AVX-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm0
; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: not_signbit_mask_v2i64:
; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
; AVX512-NEXT: vpcmpgtq %xmm2, %xmm0, %k1
; AVX512-NEXT: vmovdqa64 %xmm1, %xmm0 {%k1} {z}
; AVX512-NEXT: retq
%cond = icmp sgt <2 x i64> %a, <i64 -1, i64 -1>
%r = select <2 x i1> %cond, <2 x i64> %b, <2 x i64> zeroinitializer
ret <2 x i64> %r
}

define <32 x i8> @not_signbit_mask_v32i8(<32 x i8> %a, <32 x i8> %b) {
; SSE-LABEL: not_signbit_mask_v32i8:
; SSE: # %bb.0:
; SSE-NEXT: pcmpeqd %xmm4, %xmm4
; SSE-NEXT: pcmpgtb %xmm4, %xmm1
; SSE-NEXT: pcmpgtb %xmm4, %xmm0
; SSE-NEXT: pand %xmm2, %xmm0
; SSE-NEXT: pand %xmm3, %xmm1
; SSE-NEXT: retq
;
; AVX1-LABEL: not_signbit_mask_v32i8:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; AVX1-NEXT: vpcmpgtb %xmm3, %xmm2, %xmm2
; AVX1-NEXT: vpcmpgtb %xmm3, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: not_signbit_mask_v32i8:
; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
; AVX2-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512F-LABEL: not_signbit_mask_v32i8:
; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
; AVX512F-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0
; AVX512F-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX512F-NEXT: retq
;
; AVX512DQBW-LABEL: not_signbit_mask_v32i8:
; AVX512DQBW: # %bb.0:
; AVX512DQBW-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
; AVX512DQBW-NEXT: vpcmpgtb %ymm2, %ymm0, %k1
; AVX512DQBW-NEXT: vmovdqu8 %ymm1, %ymm0 {%k1} {z}
; AVX512DQBW-NEXT: retq
%cond = icmp sgt <32 x i8> %a, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
%r = select <32 x i1> %cond, <32 x i8> %b, <32 x i8> zeroinitializer
ret <32 x i8> %r
}

define <16 x i16> @not_signbit_mask_v16i16(<16 x i16> %a, <16 x i16> %b) {
; SSE-LABEL: not_signbit_mask_v16i16:
; SSE: # %bb.0:
; SSE-NEXT: pcmpeqd %xmm4, %xmm4
; SSE-NEXT: pcmpgtw %xmm4, %xmm1
; SSE-NEXT: pcmpgtw %xmm4, %xmm0
; SSE-NEXT: pand %xmm2, %xmm0
; SSE-NEXT: pand %xmm3, %xmm1
; SSE-NEXT: retq
;
; AVX1-LABEL: not_signbit_mask_v16i16:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; AVX1-NEXT: vpcmpgtw %xmm3, %xmm2, %xmm2
; AVX1-NEXT: vpcmpgtw %xmm3, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: not_signbit_mask_v16i16:
; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
; AVX2-NEXT: vpcmpgtw %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512F-LABEL: not_signbit_mask_v16i16:
; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
; AVX512F-NEXT: vpcmpgtw %ymm2, %ymm0, %ymm0
; AVX512F-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX512F-NEXT: retq
;
; AVX512DQBW-LABEL: not_signbit_mask_v16i16:
; AVX512DQBW: # %bb.0:
; AVX512DQBW-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
; AVX512DQBW-NEXT: vpcmpgtw %ymm2, %ymm0, %k1
; AVX512DQBW-NEXT: vmovdqu16 %ymm1, %ymm0 {%k1} {z}
; AVX512DQBW-NEXT: retq
%cond = icmp sgt <16 x i16> %a, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
%r = select <16 x i1> %cond, <16 x i16> %b, <16 x i16> zeroinitializer
ret <16 x i16> %r
}

define <8 x i32> @not_signbit_mask_v8i32(<8 x i32> %a, <8 x i32> %b) {
; SSE-LABEL: not_signbit_mask_v8i32:
; SSE: # %bb.0:
; SSE-NEXT: pcmpeqd %xmm4, %xmm4
; SSE-NEXT: pcmpgtd %xmm4, %xmm1
; SSE-NEXT: pcmpgtd %xmm4, %xmm0
; SSE-NEXT: pand %xmm2, %xmm0
; SSE-NEXT: pand %xmm3, %xmm1
; SSE-NEXT: retq
;
; AVX1-LABEL: not_signbit_mask_v8i32:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; AVX1-NEXT: vpcmpgtd %xmm3, %xmm2, %xmm2
; AVX1-NEXT: vpcmpgtd %xmm3, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: not_signbit_mask_v8i32:
; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
; AVX2-NEXT: vpcmpgtd %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: not_signbit_mask_v8i32:
; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
; AVX512-NEXT: vpcmpgtd %ymm2, %ymm0, %k1
; AVX512-NEXT: vmovdqa32 %ymm1, %ymm0 {%k1} {z}
; AVX512-NEXT: retq
%cond = icmp sgt <8 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
%r = select <8 x i1> %cond, <8 x i32> %b, <8 x i32> zeroinitializer
ret <8 x i32> %r
}

define <4 x i64> @not_signbit_mask_v4i64(<4 x i64> %a, <4 x i64> %b) {
; SSE2-LABEL: not_signbit_mask_v4i64:
; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-NEXT: pcmpeqd %xmm4, %xmm4
; SSE2-NEXT: pcmpgtd %xmm4, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: pcmpgtd %xmm4, %xmm0
; SSE2-NEXT: pand %xmm2, %xmm0
; SSE2-NEXT: pand %xmm3, %xmm1
; SSE2-NEXT: retq
;
; SSE42-LABEL: not_signbit_mask_v4i64:
; SSE42: # %bb.0:
; SSE42-NEXT: pcmpeqd %xmm4, %xmm4
; SSE42-NEXT: pcmpgtq %xmm4, %xmm1
; SSE42-NEXT: pcmpgtq %xmm4, %xmm0
; SSE42-NEXT: pand %xmm2, %xmm0
; SSE42-NEXT: pand %xmm3, %xmm1
; SSE42-NEXT: retq
;
; AVX1-LABEL: not_signbit_mask_v4i64:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; AVX1-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2
; AVX1-NEXT: vpcmpgtq %xmm3, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: not_signbit_mask_v4i64:
; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
; AVX2-NEXT: vpcmpgtq %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: not_signbit_mask_v4i64:
; AVX512: # %bb.0:
; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2
; AVX512-NEXT: vpcmpgtq %ymm2, %ymm0, %k1
; AVX512-NEXT: vmovdqa64 %ymm1, %ymm0 {%k1} {z}
; AVX512-NEXT: retq
%cond = icmp sgt <4 x i64> %a, <i64 -1, i64 -1, i64 -1, i64 -1>
%r = select <4 x i1> %cond, <4 x i64> %b, <4 x i64> zeroinitializer
ret <4 x i64> %r
}