232 changes: 86 additions & 146 deletions llvm/test/Transforms/InstCombine/abs-1.ll
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496 changes: 186 additions & 310 deletions llvm/test/Transforms/InstCombine/abs_abs.ll
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12 changes: 4 additions & 8 deletions llvm/test/Transforms/InstCombine/call-callconv.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -6,10 +6,8 @@

define arm_aapcscc i32 @_abs(i32 %i) nounwind readnone {
; CHECK-LABEL: @_abs(
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[I:%.*]], 0
; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[I]]
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[NEG]], i32 [[I]]
; CHECK-NEXT: ret i32 [[TMP2]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[I:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[TMP1]]
;
%call = tail call arm_aapcscc i32 @abs(i32 %i) nounwind readnone
ret i32 %call
Expand All @@ -19,10 +17,8 @@ declare arm_aapcscc i32 @abs(i32) nounwind readnone

define arm_aapcscc i32 @_labs(i32 %i) nounwind readnone {
; CHECK-LABEL: @_labs(
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[I:%.*]], 0
; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[I]]
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[NEG]], i32 [[I]]
; CHECK-NEXT: ret i32 [[TMP2]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[I:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[TMP1]]
;
%call = tail call arm_aapcscc i32 @labs(i32 %i) nounwind readnone
ret i32 %call
Expand Down
11 changes: 4 additions & 7 deletions llvm/test/Transforms/InstCombine/cttz-abs.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -105,10 +105,8 @@ define i64 @cttz_abs_64(i64 %x) {

define i32 @cttz_abs_multiuse(i32 %x) {
; CHECK-LABEL: @cttz_abs_multiuse(
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 0
; CHECK-NEXT: [[S:%.*]] = sub i32 0, [[X]]
; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]]
; CHECK-NEXT: call void @use_abs(i32 [[D]])
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: call void @use_abs(i32 [[TMP1]])
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
Expand All @@ -122,9 +120,8 @@ define i32 @cttz_abs_multiuse(i32 %x) {

define i32 @cttz_nabs_multiuse(i32 %x) {
; CHECK-LABEL: @cttz_nabs_multiuse(
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 0
; CHECK-NEXT: [[S:%.*]] = sub i32 0, [[X]]
; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[X]], i32 [[S]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[D:%.*]] = sub i32 0, [[TMP1]]
; CHECK-NEXT: call void @use_abs(i32 [[D]])
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
Expand Down
18 changes: 6 additions & 12 deletions llvm/test/Transforms/InstCombine/icmp.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -3056,10 +3056,8 @@ define i32 @f5(i8 %a, i8 %b) {
; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
; CHECK-NEXT: [[CONV3:%.*]] = zext i8 [[B:%.*]] to i32
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV3]]
; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i32 [[SUB]], 0
; CHECK-NEXT: [[SUB7:%.*]] = sub nsw i32 0, [[SUB]]
; CHECK-NEXT: [[SUB7_SUB:%.*]] = select i1 [[CMP4]], i32 [[SUB7]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[SUB7_SUB]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[SUB]], i1 true)
; CHECK-NEXT: ret i32 [[TMP1]]
;
%conv = zext i8 %a to i32
%conv3 = zext i8 %b to i32
Expand Down Expand Up @@ -3653,10 +3651,8 @@ define i1 @knownbits8(i8 %a, i8 %b) {
define i32 @abs_preserve(i32 %x) {
; CHECK-LABEL: @abs_preserve(
; CHECK-NEXT: [[A:%.*]] = shl nsw i32 [[X:%.*]], 1
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[A]], 0
; CHECK-NEXT: [[NEGA:%.*]] = sub i32 0, [[A]]
; CHECK-NEXT: [[ABS:%.*]] = select i1 [[C]], i32 [[NEGA]], i32 [[A]]
; CHECK-NEXT: ret i32 [[ABS]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false)
; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = mul nsw i32 %x, 2
%c = icmp sge i32 %a, 0
Expand Down Expand Up @@ -3694,10 +3690,8 @@ define <2 x i1> @PR36583(<2 x i8*>) {
; fold (icmp pred (sub (0, X)) C1) for vec type
define <2 x i32> @Op1Negated_Vec(<2 x i32> %x) {
; CHECK-LABEL: @Op1Negated_Vec(
; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
; CHECK-NEXT: ret <2 x i32> [[COND]]
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%sub = sub nsw <2 x i32> zeroinitializer, %x
%cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
Expand Down
10 changes: 4 additions & 6 deletions llvm/test/Transforms/InstCombine/max-of-nots.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -240,12 +240,10 @@ define i32 @abs_of_min_of_not(i32 %x, i32 %y) {
; CHECK-LABEL: @abs_of_min_of_not(
; CHECK-NEXT: [[XORD:%.*]] = xor i32 [[X:%.*]], -1
; CHECK-NEXT: [[YADD:%.*]] = add i32 [[Y:%.*]], 2
; CHECK-NEXT: [[COND_I:%.*]] = icmp slt i32 [[YADD]], [[XORD]]
; CHECK-NEXT: [[MIN:%.*]] = select i1 [[COND_I]], i32 [[YADD]], i32 [[XORD]]
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[MIN]], 0
; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[MIN]]
; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP2]], i32 [[SUB]], i32 [[MIN]]
; CHECK-NEXT: ret i32 [[ABS]]
; CHECK-NEXT: [[COND_I_NOT:%.*]] = icmp slt i32 [[YADD]], [[XORD]]
; CHECK-NEXT: [[MIN:%.*]] = select i1 [[COND_I_NOT]], i32 [[YADD]], i32 [[XORD]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[MIN]], i1 false)
; CHECK-NEXT: ret i32 [[TMP1]]
;

%xord = xor i32 %x, -1
Expand Down
96 changes: 46 additions & 50 deletions llvm/test/Transforms/InstCombine/select_meta.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -5,9 +5,9 @@

define i32 @foo(i32) local_unnamed_addr #0 {
; CHECK-LABEL: @foo(
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 %0, 2
; CHECK-NEXT: [[DOTV:%.*]] = select i1 [[TMP2]], i32 20, i32 -20, !prof ![[$MD1:[0-9]+]]
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[DOTV]], %0
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP0:%.*]], 2
; CHECK-NEXT: [[DOTV:%.*]] = select i1 [[TMP2]], i32 20, i32 -20, !prof !0
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[DOTV]], [[TMP0]]
; CHECK-NEXT: ret i32 [[TMP3]]
;
%2 = icmp sgt i32 %0, 2
Expand All @@ -19,8 +19,8 @@ define i32 @foo(i32) local_unnamed_addr #0 {

define i8 @shrink_select(i1 %cond, i32 %x) {
; CHECK-LABEL: @shrink_select(
; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i8
; CHECK-NEXT: [[TRUNC:%.*]] = select i1 %cond, i8 [[TMP1]], i8 42, !prof ![[$MD1]]
; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8
; CHECK-NEXT: [[TRUNC:%.*]] = select i1 [[COND:%.*]], i8 [[TMP1]], i8 42, !prof !0
; CHECK-NEXT: ret i8 [[TRUNC]]
;
%sel = select i1 %cond, i32 %x, i32 42, !prof !1
Expand All @@ -30,12 +30,12 @@ define i8 @shrink_select(i1 %cond, i32 %x) {

define void @min_max_bitcast(<4 x float> %a, <4 x float> %b, <4 x i32>* %ptr1, <4 x i32>* %ptr2) {
; CHECK-LABEL: @min_max_bitcast(
; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> %a, %b
; CHECK-NEXT: [[SEL1_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> %a, <4 x float> %b, !prof ![[$MD1]]
; CHECK-NEXT: [[SEL2_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> %b, <4 x float> %a, !prof ![[$MD1]]
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32>* %ptr1 to <4 x float>*
; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[SEL1_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[A]], <4 x float> [[B]], !prof !0
; CHECK-NEXT: [[SEL2_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[B]], <4 x float> [[A]], !prof !0
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32>* [[PTR1:%.*]] to <4 x float>*
; CHECK-NEXT: store <4 x float> [[SEL1_V]], <4 x float>* [[TMP1]], align 16
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32>* %ptr2 to <4 x float>*
; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32>* [[PTR2:%.*]] to <4 x float>*
; CHECK-NEXT: store <4 x float> [[SEL2_V]], <4 x float>* [[TMP2]], align 16
; CHECK-NEXT: ret void
;
Expand All @@ -51,10 +51,10 @@ define void @min_max_bitcast(<4 x float> %a, <4 x float> %b, <4 x i32>* %ptr1, <

define i32 @foo2(i32, i32) local_unnamed_addr #0 {
; CHECK-LABEL: @foo2(
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 %0, 2
; CHECK-NEXT: [[TMP4:%.*]] = sub i32 0, %1
; CHECK-NEXT: [[DOTP:%.*]] = select i1 [[TMP3]], i32 %1, i32 [[TMP4]], !prof ![[$MD1]]
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[DOTP]], %0
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP0:%.*]], 2
; CHECK-NEXT: [[TMP4:%.*]] = sub i32 0, [[TMP1:%.*]]
; CHECK-NEXT: [[DOTP:%.*]] = select i1 [[TMP3]], i32 [[TMP1]], i32 [[TMP4]], !prof !0
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[DOTP]], [[TMP0]]
; CHECK-NEXT: ret i32 [[TMP5]]
;
%3 = icmp sgt i32 %0, 2
Expand All @@ -66,9 +66,9 @@ define i32 @foo2(i32, i32) local_unnamed_addr #0 {

define i64 @test43(i32 %a) nounwind {
; CHECK-LABEL: @test43(
; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 %a to i64
; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[A_EXT]], 0
; CHECK-NEXT: [[MAX:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 0, !prof ![[$MD1]]
; CHECK-NEXT: [[MAX:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 0, !prof !0
; CHECK-NEXT: ret i64 [[MAX]]
;
%a_ext = sext i32 %a to i64
Expand All @@ -79,7 +79,7 @@ define i64 @test43(i32 %a) nounwind {

define <2 x i32> @scalar_select_of_vectors_sext(<2 x i1> %cca, i1 %ccb) {
; CHECK-LABEL: @scalar_select_of_vectors_sext(
; CHECK-NEXT: [[NARROW:%.*]] = select i1 %ccb, <2 x i1> %cca, <2 x i1> zeroinitializer, !prof ![[$MD1]]
; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> zeroinitializer, !prof !0
; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[NARROW]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
Expand All @@ -91,8 +91,8 @@ define <2 x i32> @scalar_select_of_vectors_sext(<2 x i1> %cca, i1 %ccb) {

define i16 @t7(i32 %a) {
; CHECK-LABEL: @t7(
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 %a, -32768
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 %a, i32 -32768, !prof ![[$MD1]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], -32768
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 -32768, !prof !0
; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16
; CHECK-NEXT: ret i16 [[TMP3]]
;
Expand All @@ -104,10 +104,8 @@ define i16 @t7(i32 %a) {

define i32 @abs_nabs_x01(i32 %x) {
; CHECK-LABEL: @abs_nabs_x01(
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, 0
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, %x
; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 %x, !prof ![[$MD3:[0-9]+]]
; CHECK-NEXT: ret i32 [[COND1]]
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
Expand All @@ -122,10 +120,8 @@ define i32 @abs_nabs_x01(i32 %x) {

define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) {
; CHECK-LABEL: @abs_nabs_x01_vec(
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> %x, zeroinitializer
; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, %x
; CHECK-NEXT: [[COND1:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> %x, !prof ![[$MD3]]
; CHECK-NEXT: ret <2 x i32> [[COND1]]
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%cmp = icmp sgt <2 x i32> %x, <i32 -1, i32 -1>
%sub = sub nsw <2 x i32> zeroinitializer, %x
Expand All @@ -139,8 +135,8 @@ define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) {
; SMAX(SMAX(x, y), x) -> SMAX(x, y)
define i32 @test30(i32 %x, i32 %y) {
; CHECK-LABEL: @test30(
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, %y
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 %x, i32 %y, !prof ![[$MD1]]
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[Y]], !prof !0
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, %y
Expand All @@ -153,8 +149,8 @@ define i32 @test30(i32 %x, i32 %y) {
; SMAX(SMAX(75, X), 36) -> SMAX(X, 75)
define i32 @test70(i32 %x) {
; CHECK-LABEL: @test70(
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 %x, 75
; CHECK-NEXT: [[COND:%.*]] = select i1 [[TMP1]], i32 %x, i32 75, !prof ![[$MD3]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 75
; CHECK-NEXT: [[COND:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 75, !prof !1
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 75
Expand All @@ -168,8 +164,8 @@ define i32 @test70(i32 %x) {
; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11)
define i32 @test72(i32 %x) {
; CHECK-LABEL: @test72(
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 %x, 11
; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 %x, i32 11, !prof ![[$MD4:[0-9]+]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 11
; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 11, !prof !2
; CHECK-NEXT: ret i32 [[RETVAL]]
;
%cmp = icmp sgt i32 %x, 92
Expand All @@ -183,8 +179,8 @@ define i32 @test72(i32 %x) {
; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75)
define i32 @test74(i32 %x) {
; CHECK-LABEL: @test74(
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 %x, 75
; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 %x, i32 75, !prof ![[$MD4]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 75
; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 75, !prof !2
; CHECK-NEXT: ret i32 [[RETVAL]]
;
%cmp = icmp slt i32 %x, 36
Expand All @@ -198,7 +194,7 @@ define i32 @test74(i32 %x) {
define i32 @smin1(i32 %x) {
; CHECK-LABEL: @smin1(
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 0
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof ![[$MD1]]
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof !0
; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP2]], -1
; CHECK-NEXT: ret i32 [[SEL]]
;
Expand All @@ -212,7 +208,7 @@ define i32 @smin1(i32 %x) {
define i32 @smin2(i32 %x) {
; CHECK-LABEL: @smin2(
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 0
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof ![[$MD3]]
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof !1
; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP2]], -1
; CHECK-NEXT: ret i32 [[SEL]]
;
Expand All @@ -226,7 +222,7 @@ define i32 @smin2(i32 %x) {
define i32 @smax1(i32 %x) {
; CHECK-LABEL: @smax1(
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 0
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof ![[$MD1]]
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof !0
; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP2]], -1
; CHECK-NEXT: ret i32 [[SEL]]
;
Expand All @@ -240,7 +236,7 @@ define i32 @smax1(i32 %x) {
define i32 @smax2(i32 %x) {
; CHECK-LABEL: @smax2(
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 0
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof ![[$MD3]]
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof !1
; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP2]], -1
; CHECK-NEXT: ret i32 [[SEL]]
;
Expand All @@ -253,8 +249,8 @@ define i32 @smax2(i32 %x) {
; The compare should change, but the metadata remains the same because the select operands are not swapped.
define i32 @umin1(i32 %x) {
; CHECK-LABEL: @umin1(
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %x, -2147483648
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 -2147483648, !prof ![[$MD1]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], -2147483648
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -2147483648, !prof !0
; CHECK-NEXT: ret i32 [[SEL]]
;
%cmp = icmp sgt i32 %x, -1
Expand All @@ -265,8 +261,8 @@ define i32 @umin1(i32 %x) {
; The compare should change, and the metadata is swapped because the select operands are swapped.
define i32 @umin2(i32 %x) {
; CHECK-LABEL: @umin2(
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %x, 2147483647
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 2147483647, !prof ![[$MD3]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], 2147483647
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 2147483647, !prof !1
; CHECK-NEXT: ret i32 [[SEL]]
;
%cmp = icmp slt i32 %x, 0
Expand All @@ -277,8 +273,8 @@ define i32 @umin2(i32 %x) {
; The compare should change, but the metadata remains the same because the select operands are not swapped.
define i32 @umax1(i32 %x) {
; CHECK-LABEL: @umax1(
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %x, 2147483647
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 2147483647, !prof ![[$MD1]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], 2147483647
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 2147483647, !prof !0
; CHECK-NEXT: ret i32 [[SEL]]
;
%cmp = icmp slt i32 %x, 0
Expand All @@ -289,8 +285,8 @@ define i32 @umax1(i32 %x) {
; The compare should change, and the metadata is swapped because the select operands are swapped.
define i32 @umax2(i32 %x) {
; CHECK-LABEL: @umax2(
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %x, -2147483648
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 -2147483648, !prof ![[$MD3]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], -2147483648
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -2147483648, !prof !1
; CHECK-NEXT: ret i32 [[SEL]]
;
%cmp = icmp sgt i32 %x, -1
Expand All @@ -302,7 +298,7 @@ define i32 @umax2(i32 %x) {

define i32 @not_cond(i1 %c, i32 %tv, i32 %fv) {
; CHECK-LABEL: @not_cond(
; CHECK-NEXT: [[R:%.*]] = select i1 [[C:%.*]], i32 [[FV:%.*]], i32 [[TV:%.*]], !prof ![[$MD3]]
; CHECK-NEXT: [[R:%.*]] = select i1 [[C:%.*]], i32 [[FV:%.*]], i32 [[TV:%.*]], !prof !1
; CHECK-NEXT: ret i32 [[R]]
;
%notc = xor i1 %c, true
Expand All @@ -314,7 +310,7 @@ define i32 @not_cond(i1 %c, i32 %tv, i32 %fv) {

define <2 x i32> @not_cond_vec(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) {
; CHECK-LABEL: @not_cond_vec(
; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof ![[$MD3]]
; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof !1
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%notc = xor <2 x i1> %c, <i1 true, i1 true>
Expand All @@ -327,7 +323,7 @@ define <2 x i32> @not_cond_vec(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) {

define <2 x i32> @not_cond_vec_undef(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) {
; CHECK-LABEL: @not_cond_vec_undef(
; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof ![[$MD3]]
; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof !1
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%notc = xor <2 x i1> %c, <i1 undef, i1 true>
Expand Down
8 changes: 3 additions & 5 deletions llvm/test/Transforms/InstCombine/sub-of-negatible.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1296,9 +1296,8 @@ define i8 @negate_abs(i8 %x, i8 %y) {
; CHECK-LABEL: @negate_abs(
; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T0]])
; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[X]], 0
; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[T1]], i8 [[X]], i8 [[T0]], !prof !0
; CHECK-NEXT: [[T3:%.*]] = add i8 [[TMP1]], [[Y:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false)
; CHECK-NEXT: [[T3:%.*]] = sub i8 [[Y:%.*]], [[TMP1]]
; CHECK-NEXT: ret i8 [[T3]]
;
%t0 = sub i8 0, %x
Expand All @@ -1312,8 +1311,7 @@ define i8 @negate_nabs(i8 %x, i8 %y) {
; CHECK-LABEL: @negate_nabs(
; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T0]])
; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[X]], 0
; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[T1]], i8 [[T0]], i8 [[X]], !prof !0
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false)
; CHECK-NEXT: [[T3:%.*]] = add i8 [[TMP1]], [[Y:%.*]]
; CHECK-NEXT: ret i8 [[T3]]
;
Expand Down
32 changes: 32 additions & 0 deletions llvm/test/Transforms/InstSimplify/abs_intrinsic.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -221,6 +221,22 @@ define i32 @select_abs_of_abs_eq(i32 %x) {
ret i32 %sel
}

; The comparison is not with the same value we take abs() of, so this isn't the pattern.
define i32 @select_abs_of_abs_eq_wrong(i32 %x, i32 %y) {
; CHECK-LABEL: @select_abs_of_abs_eq_wrong(
; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[NEG:%.*]] = sub i32 0, [[ABS]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[Y:%.*]], 0
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[NEG]], i32 [[ABS]]
; CHECK-NEXT: ret i32 [[SEL]]
;
%abs = call i32 @llvm.abs.i32(i32 %x, i1 false)
%neg = sub i32 0, %abs
%cmp = icmp eq i32 %y, 0 ; not %x
%sel = select i1 %cmp, i32 %neg, i32 %abs
ret i32 %sel
}

define i32 @select_abs_of_abs_ne(i32 %x) {
; CHECK-LABEL: @select_abs_of_abs_ne(
; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
Expand All @@ -246,6 +262,22 @@ define i32 @select_nabs_of_abs_eq(i32 %x) {
ret i32 %sel
}

; The comparison is not with the same value we take abs() of, so this isn't the pattern.
define i32 @select_nabs_of_abs_eq_wrong(i32 %x, i32 %y) {
; CHECK-LABEL: @select_nabs_of_abs_eq_wrong(
; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[NEG:%.*]] = sub i32 0, [[ABS]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[Y:%.*]], 0
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[ABS]], i32 [[NEG]]
; CHECK-NEXT: ret i32 [[SEL]]
;
%abs = call i32 @llvm.abs.i32(i32 %x, i1 false)
%neg = sub i32 0, %abs
%cmp = icmp eq i32 %y, 0
%sel = select i1 %cmp, i32 %abs, i32 %neg
ret i32 %sel
}

define i32 @select_nabs_of_abs_ne(i32 %x) {
; CHECK-LABEL: @select_nabs_of_abs_ne(
; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
Expand Down
8 changes: 3 additions & 5 deletions llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -71,11 +71,9 @@ define i32 @TestVectorsEqual(i32* noalias %Vec0, i32* noalias %Vec1, i32 %Tolera
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[VEC1:%.*]] to <4 x i32>*
; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = sub nsw <4 x i32> [[TMP1]], [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = icmp slt <4 x i32> [[TMP4]], zeroinitializer
; CHECK-NEXT: [[TMP6:%.*]] = sub nsw <4 x i32> zeroinitializer, [[TMP4]]
; CHECK-NEXT: [[TMP7:%.*]] = select <4 x i1> [[TMP5]], <4 x i32> [[TMP6]], <4 x i32> [[TMP4]]
; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP7]])
; CHECK-NEXT: [[CMP5_NOT:%.*]] = icmp sle i32 [[TMP8]], [[TOLERANCE:%.*]]
; CHECK-NEXT: [[TMP5:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[TMP4]], i1 true)
; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP5]])
; CHECK-NEXT: [[CMP5_NOT:%.*]] = icmp sle i32 [[TMP6]], [[TOLERANCE:%.*]]
; CHECK-NEXT: [[COND6:%.*]] = zext i1 [[CMP5_NOT]] to i32
; CHECK-NEXT: ret i32 [[COND6]]
;
Expand Down
11 changes: 4 additions & 7 deletions llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -33,10 +33,8 @@ define i8 @smax_nsw(i8 %a, i8 %b) {

define i8 @abs_swapped(i8 %a) {
; CHECK-LABEL: @abs_swapped(
; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]]
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[A]], 0
; CHECK-NEXT: [[M1:%.*]] = select i1 [[CMP1]], i8 [[NEG]], i8 [[A]]
; CHECK-NEXT: ret i8 [[M1]]
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A:%.*]], i1 false)
; CHECK-NEXT: ret i8 [[TMP1]]
;
%neg = sub i8 0, %a
%cmp1 = icmp sgt i8 %a, 0
Expand Down Expand Up @@ -81,9 +79,8 @@ define i8 @abs_different_constants(i8 %a) {

define i8 @nabs_different_constants(i8 %a) {
; CHECK-LABEL: @nabs_different_constants(
; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]]
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[A]], 0
; CHECK-NEXT: [[M1:%.*]] = select i1 [[CMP1]], i8 [[A]], i8 [[NEG]]
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A:%.*]], i1 false)
; CHECK-NEXT: [[M1:%.*]] = sub i8 0, [[TMP1]]
; CHECK-NEXT: ret i8 [[M1]]
;
%neg = sub i8 0, %a
Expand Down