diff --git a/llvm/lib/Target/CSKY/CSKY.td b/llvm/lib/Target/CSKY/CSKY.td
diff --git a/llvm/lib/Target/CSKY/CSKYRegisterInfo.td b/llvm/lib/Target/CSKY/CSKYRegisterInfo.td
@@ -81,17 +81,21 @@ let RegAltNameIndices = [ABIRegAltName] in {
   def R29 : CSKYReg<29, "r29", ["rtb"]>, DwarfRegNum<[29]>;
   def R30 : CSKYReg<30, "r30", ["svbr"]>, DwarfRegNum<[30]>;
   def R31 : CSKYReg<31, "r31", ["tls"]>, DwarfRegNum<[31]>;
-  def C : CSKYReg<32, "cr0", ["psr"]>;
+
+  // Faked for GPRTuple
+  def R32 : CSKYReg<32, "r32", ["r32"]>, DwarfRegNum<[32]>;
+
+  def C : CSKYReg<33, "cr0", ["psr"]>;
 
 }
 
 def GPRTuple : RegisterTuples<
           [sub32_0, sub32_32],
-          [(add (sequence "R%u", 0, 30)), (add (sequence "R%u", 1, 31))],
+          [(add (sequence "R%u", 0, 31)), (add (sequence "R%u", 1, 32))],
           [ "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
             "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",
             "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
-            "r24", "r25", "r26", "r27", "r28", "r29", "r30"
+            "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
           ]>;
 
 // Floating point registers

diff --git a/llvm/lib/Target/CSKY/CSKYSubtarget.cpp b/llvm/lib/Target/CSKY/CSKYSubtarget.cpp
@@ -33,14 +33,42 @@ CSKYSubtarget &CSKYSubtarget::initializeSubtargetDependencies(
   UseHardFloatABI = false;
   HasFPUv2SingleFloat = false;
   HasFPUv2DoubleFloat = false;
+  HasFPUv3HalfWord = false;
+  HasFPUv3HalfFloat = false;
   HasFPUv3SingleFloat = false;
   HasFPUv3DoubleFloat = false;
-
+  HasFdivdu = false;
+  HasFLOATE1 = false;
+  HasFLOAT1E2 = false;
+  HasFLOAT1E3 = false;
+  HasFLOAT3E4 = false;
+  HasFLOAT7E60 = false;
+  HasExtendLrw = false;
   HasBTST16 = false;
+  HasTrust = false;
   HasJAVA = false;
-  HasExtendLrw = false;
+  HasCache = false;
+  HasNVIC = false;
+  HasDSP = false;
+  HasDSP1E2 = false;
+  HasDSPE60 = false;
+  HasDSPV2 = false;
+  HasDSP_Silan = false;
   HasDoloop = false;
+  HasHardwareDivide = false;
   HasHighRegisters = false;
+  HasVDSPV2 = false;
+  HasVDSP2E3 = false;
+  HasVDSP2E60F = false;
+  ReadTPHard = false;
+  HasVDSPV1_128 = false;
+  UseCCRT = false;
+  DumpConstPool = false;
+  EnableInterruptAttribute = false;
+  HasPushPop = false;
+  HasSTM = false;
+  SmartMode = false;
+  EnableStackSize = false;
 
   HasE1 = false;
   HasE2 = false;

diff --git a/llvm/lib/Target/CSKY/CSKYSubtarget.h b/llvm/lib/Target/CSKY/CSKYSubtarget.h
@@ -36,18 +36,65 @@ class CSKYSubtarget : public CSKYGenSubtargetInfo {
   CSKYTargetLowering TLInfo;
   SelectionDAGTargetInfo TSInfo;
 
+  enum CSKYProcFamilyEnum {
+    Others,
+
+    CK801,
+    CK802,
+    CK803,
+    CK803S,
+    CK804,
+    CK805,
+    CK807,
+    CK810,
+    CK810V,
+    CK860,
+    CK860V
+  };
+
+  /// CSKYProcFamily - CSKY processor family: CK801, CK802, and others.
+  CSKYProcFamilyEnum CSKYProcFamily = Others;
+
   bool UseHardFloat;
   bool UseHardFloatABI;
   bool HasFPUv2SingleFloat;
   bool HasFPUv2DoubleFloat;
+  bool HasFPUv3HalfWord;
+  bool HasFPUv3HalfFloat;
   bool HasFPUv3SingleFloat;
   bool HasFPUv3DoubleFloat;
-
+  bool HasFdivdu;
+  bool HasFLOATE1;
+  bool HasFLOAT1E2;
+  bool HasFLOAT1E3;
+  bool HasFLOAT3E4;
+  bool HasFLOAT7E60;
   bool HasBTST16;
-  bool HasJAVA;
   bool HasExtendLrw;
+  bool HasTrust;
+  bool HasJAVA;
+  bool HasCache;
+  bool HasNVIC;
+  bool HasDSP;
+  bool HasDSP1E2;
+  bool HasDSPE60;
+  bool HasDSPV2;
+  bool HasDSP_Silan;
   bool HasDoloop;
+  bool HasHardwareDivide;
   bool HasHighRegisters;
+  bool HasVDSPV2;
+  bool HasVDSP2E3;
+  bool HasVDSP2E60F;
+  bool ReadTPHard;
+  bool HasVDSPV1_128;
+  bool UseCCRT;
+  bool DumpConstPool;
+  bool EnableInterruptAttribute;
+  bool HasPushPop;
+  bool HasSTM;
+  bool SmartMode;
+  bool EnableStackSize;
 
   bool HasE1;
   bool HasE2;
@@ -92,16 +139,49 @@ class CSKYSubtarget : public CSKYGenSubtargetInfo {
   bool hasFPUv2SingleFloat() const { return HasFPUv2SingleFloat; }
   bool hasFPUv2DoubleFloat() const { return HasFPUv2DoubleFloat; }
   bool hasFPUv2() const { return HasFPUv2SingleFloat || HasFPUv2DoubleFloat; }
+  bool hasFPUv3HalfWord() const { return HasFPUv3HalfWord; }
+  bool hasFPUv3HalfFloat() const { return HasFPUv3HalfFloat; }
   bool hasFPUv3SingleFloat() const { return HasFPUv3SingleFloat; }
   bool hasFPUv3DoubleFloat() const { return HasFPUv3DoubleFloat; }
-  bool hasFPUv3() const { return HasFPUv3SingleFloat || HasFPUv3DoubleFloat; }
+  bool hasFPUv3() const {
+    return HasFPUv3HalfFloat || HasFPUv3SingleFloat || HasFPUv3DoubleFloat;
+  }
   bool hasAnyFloatExt() const { return hasFPUv2() || hasFPUv3(); };
-
+  bool hasFdivdu() const { return HasFdivdu; }
+  bool hasFLOATE1() const { return HasFLOATE1; }
+  bool hasFLOAT1E2() const { return HasFLOAT1E2; }
+  bool hasFLOAT1E3() const { return HasFLOAT1E3; }
+  bool hasFLOAT3E4() const { return HasFLOAT3E4; }
+  bool hasFLOAT7E60() const { return HasFLOAT7E60; }
+  bool hasExtendLrw() const { return HasExtendLrw; }
   bool hasBTST16() const { return HasBTST16; }
+  bool hasTrust() const { return HasTrust; }
   bool hasJAVA() const { return HasJAVA; }
-  bool hasExtendLrw() const { return HasExtendLrw; }
+  bool hasCache() const { return HasCache; }
+  bool hasNVIC() const { return HasNVIC; }
+  bool hasDSP() const { return HasDSP; }
+  bool hasDSP1E2() const { return HasDSP1E2; }
+  bool hasDSPE60() const { return HasDSPE60; }
+  bool hasDSPV2() const { return HasDSPV2; }
+  bool hasDSP_Silan() const { return HasDSP_Silan; }
   bool hasDoloop() const { return HasDoloop; }
   bool hasHighRegisters() const { return HasHighRegisters; }
+  bool hasVDSPV2() const { return HasVDSPV2; }
+  bool hasVDSPV2_FLOAT() const { return HasVDSPV2 && UseHardFloat; }
+  bool hasVDSPV2_HALF() const {
+    return HasVDSPV2 && UseHardFloat && HasFPUv3HalfFloat;
+  }
+  bool hasVDSP2E3() const { return HasVDSP2E3; }
+  bool hasVDSP2E60F() const { return HasVDSP2E60F; }
+  bool readTPHard() const { return ReadTPHard; }
+  bool hasVDSPV1_128() const { return HasVDSPV1_128; }
+  bool useCCRT() const { return UseCCRT; }
+  bool dumpConstPool() const { return DumpConstPool; }
+  bool enableInterruptAttribute() const { return EnableInterruptAttribute; }
+  bool hasPushPop() const { return HasPushPop; }
+  bool hasSTM() const { return HasSTM; }
+  bool smartMode() const { return SmartMode; }
+  bool enableStackSize() const { return EnableStackSize; }
 
   bool hasE1() const { return HasE1; }
   bool hasE2() const { return HasE2; }
@@ -114,6 +194,18 @@ class CSKYSubtarget : public CSKYGenSubtargetInfo {
   bool hasMP1E2() const { return HasMP1E2; }
   bool has7E10() const { return Has7E10; }
   bool has10E60() const { return Has10E60; }
+
+  bool isCK801() const { return CSKYProcFamily == CK801; }
+  bool isCK802() const { return CSKYProcFamily == CK802; }
+  bool isCK803() const { return CSKYProcFamily == CK803; }
+  bool isCK803S() const { return CSKYProcFamily == CK803S; }
+  bool isCK804() const { return CSKYProcFamily == CK804; }
+  bool isCK805() const { return CSKYProcFamily == CK805; }
+  bool isCK807() const { return CSKYProcFamily == CK807; }
+  bool isCK810() const { return CSKYProcFamily == CK810; }
+  bool isCK810V() const { return CSKYProcFamily == CK810V; }
+  bool isCK860() const { return CSKYProcFamily == CK860; }
+  bool isCK860V() const { return CSKYProcFamily == CK860V; }
 };
 } // namespace llvm
 

diff --git a/llvm/lib/Target/CSKY/Disassembler/CMakeLists.txt b/llvm/lib/Target/CSKY/Disassembler/CMakeLists.txt
@@ -0,0 +1,11 @@
+add_llvm_component_library(LLVMCSKYDisassembler
+  CSKYDisassembler.cpp
+
+  LINK_COMPONENTS
+  CSKYInfo
+  MCDisassembler
+  Support
+
+  ADD_TO_COMPONENT
+  CSKY
+  )
diff --git a/llvm/lib/Target/CSKY/Disassembler/CSKYDisassembler.cpp b/llvm/lib/Target/CSKY/Disassembler/CSKYDisassembler.cpp
diff --git a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.cpp b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.cpp
@@ -9,16 +9,21 @@
 // This class prints an CSKY MCInst to a .s file.
 //
 //===----------------------------------------------------------------------===//
-
 #include "CSKYInstPrinter.h"
+#include "MCTargetDesc/CSKYBaseInfo.h"
+#include "MCTargetDesc/CSKYMCExpr.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCInstrInfo.h"
 #include "llvm/MC/MCRegisterInfo.h"
+#include "llvm/MC/MCSection.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/FormattedStream.h"
 
@@ -55,6 +60,14 @@ bool CSKYInstPrinter::applyTargetSpecificCLOption(StringRef Opt) {
     ArchRegNames = true;
     return true;
   }
+  if (Opt == "debug") {
+    DebugFlag = true;
+    return true;
+  }
+  if (Opt == "abi-names") {
+    ABIRegNames = true;
+    return true;
+  }
 
   return false;
 }
@@ -70,7 +83,11 @@ void CSKYInstPrinter::printInst(const MCInst *MI, uint64_t Address,
 }
 
 void CSKYInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
-  O << getRegisterName(RegNo);
+  if (PrintBranchImmAsAddress)
+    O << getRegisterName(RegNo, ABIRegNames ? CSKY::ABIRegAltName
+                                            : CSKY::NoRegAltName);
+  else
+    O << getRegisterName(RegNo);
 }
 
 void CSKYInstPrinter::printFPRRegName(raw_ostream &O, unsigned RegNo) const {
@@ -87,15 +104,38 @@ void CSKYInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
   const MCOperand &MO = MI->getOperand(OpNo);
 
   if (MO.isReg()) {
-    if (MO.getReg() == CSKY::C)
-      O << "";
+    unsigned Reg = MO.getReg();
+    bool useABIName = false;
+    if (PrintBranchImmAsAddress)
+      useABIName = ABIRegNames;
     else
-      printRegName(O, MO.getReg());
+      useABIName = !ArchRegNames;
+
+    if (Reg == CSKY::C)
+      O << "";
+    else if (STI.getFeatureBits()[CSKY::FeatureJAVA]) {
+      if (Reg == CSKY::R23)
+        O << (useABIName ? "fp" : "r23");
+      else if (Reg == CSKY::R24)
+        O << (useABIName ? "top" : "r24");
+      else if (Reg == CSKY::R25)
+        O << (useABIName ? "bsp" : "r25");
+      else
+        printRegName(O, Reg);
+    } else
+      printRegName(O, Reg);
+
     return;
   }
 
   if (MO.isImm()) {
-    O << formatImm(MO.getImm());
+    uint64_t TSFlags = MII.get(MI->getOpcode()).TSFlags;
+
+    if (((TSFlags & CSKYII::AddrModeMask) != CSKYII::AddrModeNone) &&
+        PrintBranchImmAsAddress)
+      O << formatHex(MO.getImm());
+    else
+      O << MO.getImm();
     return;
   }
 
@@ -157,6 +197,22 @@ void CSKYInstPrinter::printCSKYSymbolOperand(const MCInst *MI, uint64_t Address,
   }
 }
 
+void CSKYInstPrinter::printPSRFlag(const MCInst *MI, unsigned OpNo,
+                                   const MCSubtargetInfo &STI, raw_ostream &O) {
+  auto V = MI->getOperand(OpNo).getImm();
+
+  ListSeparator LS;
+
+  if ((V >> 3) & 0x1)
+    O << LS << "ee";
+  if ((V >> 2) & 0x1)
+    O << LS << "ie";
+  if ((V >> 1) & 0x1)
+    O << LS << "fe";
+  if ((V >> 0) & 0x1)
+    O << LS << "af";
+}
+
 void CSKYInstPrinter::printRegisterSeq(const MCInst *MI, unsigned OpNum,
                                        const MCSubtargetInfo &STI,
                                        raw_ostream &O) {

diff --git a/llvm/test/MC/CSKY/basic-16bit.s b/llvm/test/MC/CSKY/basic-16bit.s
@@ -1,191 +1,202 @@
 # RUN: llvm-mc %s -triple=csky -show-encoding -csky-no-aliases -mattr=+e1 \
-# RUN: -mattr=+e2 -mattr=+btst16 | FileCheck -check-prefixes=CHECK-ASM %s
+# RUN: -mattr=+e2 -mattr=+btst16 | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=csky -mattr=+e1 -mattr=+e2 -mattr=+btst16 < %s \
+# RUN:     | llvm-objdump --mattr=+e1 --mattr=+e2 --mattr=+btst16 -M no-aliases -M abi-names -d -r - \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ,CHECK-OBJ %s
 
-# CHECK-ASM: addi16 a0, a0, 2
+# CHECK-ASM-AND-OBJ: addi16 a0, a0, 2
 # CHECK-ASM: encoding: [0x06,0x58]
 addi16 a0, a0, 2
 
-# CHECK-ASM: addi16 a0, sp, 4
+# CHECK-ASM-AND-OBJ: addi16 a0, sp, 4
 # CHECK-ASM: encoding: [0x01,0x18]
 addi16 a0, sp, 4
 
-# CHECK-ASM: addi16 a0, a1, 2
+# CHECK-ASM-AND-OBJ: addi16 a0, a1, 2
 # CHECK-ASM: encoding: [0x06,0x59]
 addi16 a0, a1, 2
 
-# CHECK-ASM: addi16 sp, sp, 8
+# CHECK-ASM-AND-OBJ: addi16 sp, sp, 8
 # CHECK-ASM: encoding: [0x02,0x14]
 addi16 sp, sp, 8
 
-# CHECK-ASM: subi16 a0, a0, 2
+# CHECK-ASM-AND-OBJ: subi16 a0, a0, 2
 # CHECK-ASM: encoding: [0x07,0x58]
 subi16 a0, a0, 2
 
-# CHECK-ASM: subi16 a0, a1, 2
+# CHECK-ASM-AND-OBJ: subi16 a0, a1, 2
 # CHECK-ASM: encoding: [0x07,0x59]
 subi16 a0, a1, 2
 
-# CHECK-ASM: subi16 sp, sp, 8
+# CHECK-ASM-AND-OBJ: subi16 sp, sp, 8
 # CHECK-ASM: encoding: [0x22,0x14]
 subi16 sp, sp, 8
 
-# CHECK-ASM: lsli16 a0, a1, 2
+# CHECK-ASM-AND-OBJ: lsli16 a0, a1, 2
 # CHECK-ASM: encoding: [0x02,0x41]
 lsli16 a0, a1, 2
 
-# CHECK-ASM: lsri16 a0, a1, 2
+# CHECK-ASM-AND-OBJ: lsri16 a0, a1, 2
 # CHECK-ASM: encoding: [0x02,0x49]
 lsri16 a0, a1, 2
 
-# CHECK-ASM: asri16 a0, a1, 2
+# CHECK-ASM-AND-OBJ: asri16 a0, a1, 2
 # CHECK-ASM: encoding: [0x02,0x51]
 asri16 a0, a1, 2
 
-# CHECK-ASM: btsti16 a0, 2
+# CHECK-ASM-AND-OBJ: btsti16 a0, 2
 # CHECK-ASM: encoding: [0xc2,0x38]
 btsti16 a0, 2
 
-# CHECK-ASM: bclri16 a0, 2
+# CHECK-ASM-AND-OBJ: bclri16 a0, 2
 # CHECK-ASM: encoding: [0x82,0x38]
 bclri16 a0, 2
 
-# CHECK-ASM: bseti16 a0, 2
+# CHECK-ASM-AND-OBJ: bseti16 a0, 2
 # CHECK-ASM: encoding: [0xa2,0x38]
 bseti16 a0, 2
 
-# CHECK-ASM: cmpnei16 a0, 2
+# CHECK-ASM-AND-OBJ: cmpnei16 a0, 2
 # CHECK-ASM: encoding: [0x42,0x38]
 cmpnei16 a0, 2
 
-# CHECK-ASM: cmphsi16 a0, 2
+# CHECK-ASM-AND-OBJ: cmphsi16 a0, 2
 # CHECK-ASM: encoding: [0x01,0x38]
 cmphsi16 a0, 2
 
-# CHECK-ASM: cmplti16 a0, 2
+# CHECK-ASM-AND-OBJ: cmplti16 a0, 2
 # CHECK-ASM: encoding: [0x21,0x38]
 cmplti16 a0, 2
 
-# CHECK-ASM: movi16 a0, 2
+# CHECK-ASM-AND-OBJ: movi16 a0, 2
 # CHECK-ASM: encoding: [0x02,0x30]
 movi16 a0, 2
 
-# CHECK-ASM: addu16 a3, l0, l1
+# CHECK-ASM-AND-OBJ: addu16 a3, l0, l1
 # CHECK-ASM: encoding: [0x74,0x5c]
 addu16 a3, l0, l1
 
-# CHECK-ASM: subu16 a3, l0, l1
+# CHECK-ASM-AND-OBJ: subu16 a3, l0, l1
 # CHECK-ASM: encoding: [0x75,0x5c]
 subu16 a3, l0, l1
 
-# CHECK-ASM: and16 a3, l0
+# CHECK-ASM-AND-OBJ: and16 a3, l0
 # CHECK-ASM: encoding: [0xd0,0x68]
 and16 a3, l0
 
-# CHECK-ASM: andn16 a3, l0
+# CHECK-ASM-AND-OBJ: andn16 a3, l0
 # CHECK-ASM: encoding: [0xd1,0x68]
 andn16 a3, l0
 
-# CHECK-ASM: or16 a3, l0
+# CHECK-ASM-AND-OBJ: or16 a3, l0
 # CHECK-ASM: encoding: [0xd0,0x6c]
 or16 a3, l0
 
-# CHECK-ASM: xor16 a3, l0
+# CHECK-ASM-AND-OBJ: xor16 a3, l0
 # CHECK-ASM: encoding: [0xd1,0x6c]
 xor16 a3, l0
 
-# CHECK-ASM: nor16 a3, l0
+# CHECK-ASM-AND-OBJ: nor16 a3, l0
 # CHECK-ASM: encoding: [0xd2,0x6c]
 nor16 a3, l0
 
-# CHECK-ASM: lsl16 a3, l0
+# CHECK-ASM-AND-OBJ: lsl16 a3, l0
 # CHECK-ASM: encoding: [0xd0,0x70]
 lsl16 a3, l0
 
-# CHECK-ASM: rotl16 a3, l0
+# CHECK-ASM-AND-OBJ: rotl16 a3, l0
 # CHECK-ASM: encoding: [0xd3,0x70]
 rotl16 a3, l0
 
-# CHECK-ASM: lsr16 a3, l0
+# CHECK-ASM-AND-OBJ: lsr16 a3, l0
 # CHECK-ASM: encoding: [0xd1,0x70]
 lsr16 a3, l0
 
-# CHECK-ASM: asr16 a3, l0
+# CHECK-ASM-AND-OBJ: asr16 a3, l0
 # CHECK-ASM: encoding: [0xd2,0x70]
 asr16 a3, l0
 
-# CHECK-ASM: mult16 a3, l0
+# CHECK-ASM-AND-OBJ: mult16 a3, l0
 # CHECK-ASM: encoding: [0xd0,0x7c]
 mult16 a3, l0
 
-# CHECK-ASM: addc16 a3, l0
+# CHECK-ASM-AND-OBJ: addc16 a3, l0
 # CHECK-ASM: encoding: [0xd1,0x60]
 addc16 a3, l0
 
-# CHECK-ASM: subc16 a3, l0
+# CHECK-ASM-AND-OBJ: subc16 a3, l0
 # CHECK-ASM: encoding: [0xd3,0x60]
 subc16 a3, l0
 
+# CHECK-OBJ: ld16.b a0, (a0, 0x2)
 # CHECK-ASM: ld16.b a0, (a0, 2)
 # CHECK-ASM: encoding: [0x02,0x80]
 ld16.b a0, (a0, 2)
 
+# CHECK-OBJ: ld16.h a0, (a0, 0x2)
 # CHECK-ASM: ld16.h a0, (a0, 2)
 # CHECK-ASM: encoding: [0x01,0x88]
 ld16.h a0, (a0, 2)
 
+# CHECK-OBJ: ld16.w a0, (a0, 0x4)
 # CHECK-ASM: ld16.w a0, (a0, 4)
 # CHECK-ASM: encoding: [0x01,0x90]
 ld16.w a0, (a0, 4)
 
+# CHECK-OBJ: ld16.w a0, (sp, 0x4)
 # CHECK-ASM: ld16.w a0, (sp, 4)
 # CHECK-ASM: encoding: [0x01,0x98]
 ld16.w a0, (sp, 4)
 
+# CHECK-OBJ: st16.b a0, (a0, 0x2)
 # CHECK-ASM: st16.b a0, (a0, 2)
 # CHECK-ASM: encoding: [0x02,0xa0]
 st16.b a0, (a0, 2)
 
+# CHECK-OBJ: st16.h a0, (a0, 0x2)
 # CHECK-ASM: st16.h a0, (a0, 2)
 # CHECK-ASM: encoding: [0x01,0xa8]
 st16.h a0, (a0, 2)
 
+# CHECK-OBJ: st16.w a0, (a0, 0x4)
 # CHECK-ASM: st16.w a0, (a0, 4)
 # CHECK-ASM: encoding: [0x01,0xb0]
 st16.w a0, (a0, 4)
 
+# CHECK-OBJ: st16.w a0, (sp, 0x4)
 # CHECK-ASM: st16.w a0, (sp, 4)
 # CHECK-ASM: encoding: [0x01,0xb8]
 st16.w a0, (sp, 4)
 
-# CHECK-ASM: revb16 a3, l0
+# CHECK-ASM-AND-OBJ: revb16 a3, l0
 # CHECK-ASM: encoding: [0xd2,0x78]
 revb16 a3, l0
 
-# CHECK-ASM: revh16 a3, l0
+# CHECK-ASM-AND-OBJ: revh16 a3, l0
 # CHECK-ASM: encoding: [0xd3,0x78]
 revh16 a3, l0
 
-# CHECK-ASM: mvcv16 a3
+# CHECK-ASM-AND-OBJ: mvcv16 a3
 # CHECK-ASM: encoding: [0xc3,0x64]
 mvcv16 a3
 
-# CHECK-ASM: cmpne16 a3, l0
+# CHECK-ASM-AND-OBJ: cmpne16 a3, l0
 # CHECK-ASM: encoding: [0x0e,0x65]
 cmpne16 a3, l0
 
-# CHECK-ASM: cmphs16 a3, l0
+# CHECK-ASM-AND-OBJ: cmphs16 a3, l0
 # CHECK-ASM: encoding: [0x0c,0x65]
 cmphs16 a3, l0
 
-# CHECK-ASM: cmplt16 a3, l0
+# CHECK-ASM-AND-OBJ: cmplt16 a3, l0
 # CHECK-ASM: encoding: [0x0d,0x65]
 cmplt16 a3, l0
 
-# CHECK-ASM: tst16 a3, l0
+# CHECK-ASM-AND-OBJ: tst16 a3, l0
 # CHECK-ASM: encoding: [0x0e,0x69]
 tst16 a3, l0
 
-# CHECK-ASM: tstnbz16 a3
+# CHECK-ASM-AND-OBJ: tstnbz16 a3
 # CHECK-ASM: encoding: [0x0f,0x68]
 tstnbz16 a3
 
@@ -207,11 +218,11 @@ bt16 .L.test2
 .L.test3:
 bf16 .L.test3
 
-# CHECK-ASM: jmp16 a3
+# CHECK-ASM-AND-OBJ: jmp16 a3
 # CHECK-ASM: encoding: [0x0c,0x78]
 jmp16 a3
 
-# CHECK-ASM: jsr16 a3
+# CHECK-ASM-AND-OBJ: jsr16 a3
 # CHECK-ASM: encoding: [0xcd,0x7b]
 jsr16 a3
 

diff --git a/llvm/test/MC/CSKY/basic.s b/llvm/test/MC/CSKY/basic.s
diff --git a/llvm/test/MC/CSKY/fpuv2.s b/llvm/test/MC/CSKY/fpuv2.s
@@ -1,5 +1,8 @@
 # RUN: llvm-mc %s -triple=csky -show-encoding -csky-no-aliases -mattr=+fpuv2_sf -mattr=+fpuv2_df \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=csky -mattr=+fpuv2_sf -mattr=+fpuv2_df < %s \
+# RUN:     | llvm-objdump --mattr=+fpuv2_sf --mattr=+fpuv2_df -M no-aliases -M abi-names -d -r - \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s
 
 # CHECK-ASM-AND-OBJ: fldms  vr1-vr2, (a1)
 # CHECK-ASM: encoding: [0x21,0xf4,0x01,0x30]

diff --git a/llvm/test/MC/CSKY/fpuv3.s b/llvm/test/MC/CSKY/fpuv3.s
@@ -1,5 +1,8 @@
 # RUN: llvm-mc %s -triple=csky -show-encoding -csky-no-aliases -mattr=+fpuv3_sf,+fpuv3_df \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=csky -mattr=+fpuv3_sf,+fpuv3_df < %s \
+# RUN:     | llvm-objdump --mattr=+fpuv3_sf,+fpuv3_df -M no-aliases -M abi-names -d -r - \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s
 
 # CHECK-ASM-AND-OBJ: fldm.32 vr1-vr2, (a1)
 # CHECK-ASM: encoding: [0x21,0xf4,0x01,0x30]