diff --git a/libc/src/__support/threads/linux/thread.cpp b/libc/src/__support/threads/linux/thread.cpp
@@ -57,7 +57,7 @@ static constexpr unsigned CLONE_SYSCALL_FLAGS =
 
 #ifdef LIBC_TARGET_ARCH_IS_AARCH64
 #define CLONE_RESULT_REGISTER "x0"
-#elif defined(LIBC_TARGET_ARCH_IS_RISCV64)
+#elif defined(LIBC_TARGET_ARCH_IS_ANY_RISCV)
 #define CLONE_RESULT_REGISTER "t0"
 #elif defined(LIBC_TARGET_ARCH_IS_X86_64)
 #define CLONE_RESULT_REGISTER "rax"
@@ -169,7 +169,7 @@ cleanup_thread_resources(ThreadAttributes *attrib) {
   // is set to the stack pointer where start args are stored. So, we fetch
   // from there.
   return reinterpret_cast<uintptr_t>(__builtin_frame_address(1));
-#elif defined(LIBC_TARGET_ARCH_IS_RISCV64)
+#elif defined(LIBC_TARGET_ARCH_IS_ANY_RISCV)
   // The current frame pointer is the previous stack pointer where the start
   // args are stored.
   return reinterpret_cast<uintptr_t>(__builtin_frame_address(0));
@@ -306,7 +306,7 @@ int Thread::run(ThreadStyle style, ThreadRunner runner, void *arg, void *stack,
       tls.tp           // The thread pointer value for the new thread.
   );
 #elif defined(LIBC_TARGET_ARCH_IS_AARCH64) ||                                  \
-    defined(LIBC_TARGET_ARCH_IS_RISCV64)
+    defined(LIBC_TARGET_ARCH_IS_ANY_RISCV)
   long register clone_result asm(CLONE_RESULT_REGISTER);
   clone_result = LIBC_NAMESPACE::syscall_impl<long>(
       SYS_clone, CLONE_SYSCALL_FLAGS, adjusted_stack,

diff --git a/libc/src/__support/threads/thread.h b/libc/src/__support/threads/thread.h
@@ -41,7 +41,7 @@ union ThreadReturnValue {
 
 #if (defined(LIBC_TARGET_ARCH_IS_AARCH64) ||                                   \
      defined(LIBC_TARGET_ARCH_IS_X86_64) ||                                    \
-     defined(LIBC_TARGET_ARCH_IS_RISCV64))
+     defined(LIBC_TARGET_ARCH_IS_ANY_RISCV))
 constexpr unsigned int STACK_ALIGNMENT = 16;
 #endif
 // TODO: Provide stack alignment requirements for other architectures.

diff --git a/libc/src/setjmp/riscv64/CMakeLists.txt → libc/src/setjmp/riscv/CMakeLists.txt b/libc/src/setjmp/riscv64/CMakeLists.txt → libc/src/setjmp/riscv/CMakeLists.txt
diff --git a/libc/src/setjmp/riscv64/longjmp.cpp → libc/src/setjmp/riscv/longjmp.cpp b/libc/src/setjmp/riscv64/longjmp.cpp → libc/src/setjmp/riscv/longjmp.cpp
@@ -12,7 +12,7 @@
 
 #include <setjmp.h>
 
-#if !defined(LIBC_TARGET_ARCH_IS_RISCV64)
+#if !defined(LIBC_TARGET_ARCH_IS_ANY_RISCV)
 #error "Invalid file include"
 #endif
 

diff --git a/libc/src/setjmp/riscv64/setjmp.cpp → libc/src/setjmp/riscv/setjmp.cpp b/libc/src/setjmp/riscv64/setjmp.cpp → libc/src/setjmp/riscv/setjmp.cpp
@@ -11,7 +11,7 @@
 
 #include <setjmp.h>
 
-#if !defined(LIBC_TARGET_ARCH_IS_RISCV64)
+#if !defined(LIBC_TARGET_ARCH_IS_ANY_RISCV)
 #error "Invalid file include"
 #endif
 

diff --git a/libc/startup/linux/riscv64/CMakeLists.txt → libc/startup/linux/riscv/CMakeLists.txt b/libc/startup/linux/riscv64/CMakeLists.txt → libc/startup/linux/riscv/CMakeLists.txt
diff --git a/libc/startup/linux/riscv64/start.cpp → libc/startup/linux/riscv/start.cpp b/libc/startup/linux/riscv64/start.cpp → libc/startup/linux/riscv/start.cpp
diff --git a/libc/test/src/fenv/enabled_exceptions_test.cpp b/libc/test/src/fenv/enabled_exceptions_test.cpp
@@ -21,7 +21,8 @@
 // This test enables an exception and verifies that raising that exception
 // triggers SIGFPE.
 TEST(LlvmLibcExceptionStatusTest, RaiseAndCrash) {
-#if defined(LIBC_TARGET_ARCH_IS_ANY_ARM) || defined(LIBC_TARGET_ARCH_IS_RISCV64)
+#if defined(LIBC_TARGET_ARCH_IS_ANY_ARM) ||                                    \
+    defined(LIBC_TARGET_ARCH_IS_ANY_RISCV)
   // Few Arm HW implementations do not trap exceptions. We skip this test
   // completely on such HW.
   //

diff --git a/libc/test/src/fenv/feenableexcept_test.cpp b/libc/test/src/fenv/feenableexcept_test.cpp
@@ -16,7 +16,8 @@
 #include <fenv.h>
 
 TEST(LlvmLibcFEnvTest, EnableTest) {
-#if defined(LIBC_TARGET_ARCH_IS_ANY_ARM) || defined(LIBC_TARGET_ARCH_IS_RISCV64)
+#if defined(LIBC_TARGET_ARCH_IS_ANY_ARM) ||                                    \
+    defined(LIBC_TARGET_ARCH_IS_ANY_RISCV)
   // Few Arm HW implementations do not trap exceptions. We skip this test
   // completely on such HW.
   //

diff --git a/libc/test/src/fenv/feholdexcept_test.cpp b/libc/test/src/fenv/feholdexcept_test.cpp
@@ -16,7 +16,8 @@
 #include <fenv.h>
 
 TEST(LlvmLibcFEnvTest, RaiseAndCrash) {
-#if defined(LIBC_TARGET_ARCH_IS_ANY_ARM) || defined(LIBC_TARGET_ARCH_IS_RISCV64)
+#if defined(LIBC_TARGET_ARCH_IS_ANY_ARM) ||                                    \
+    defined(LIBC_TARGET_ARCH_IS_ANY_RISCV)
   // Few Arm HW implementations do not trap exceptions. We skip this test
   // completely on such HW.
   //