diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
@@ -90,9 +90,11 @@ bool AArch64MachObjectWriter::getAArch64FixupKindMachOInfo(
     Log2Size = llvm::Log2_32(4);
     // This encompasses the relocation for the whole 21-bit value.
     switch (Sym->getKind()) {
-    default:
-      Asm.getContext().reportFatalError(Fixup.getLoc(),
-                                  "ADR/ADRP relocations must be GOT relative");
+    default: {
+      Asm.getContext().reportError(Fixup.getLoc(),
+                                   "ADR/ADRP relocations must be GOT relative");
+      return false;
+    }
     case MCSymbolRefExpr::VK_PAGE:
       RelocType = unsigned(MachO::ARM64_RELOC_PAGE21);
       return true;
@@ -170,25 +172,25 @@ void AArch64MachObjectWriter::recordRelocation(
   // assembler local symbols. If we got here, that's not what we have,
   // so complain loudly.
   if (Kind == AArch64::fixup_aarch64_pcrel_branch19) {
-    Asm.getContext().reportFatalError(Fixup.getLoc(),
-                                "conditional branch requires assembler-local"
-                                " label. '" +
-                                    Target.getSymA()->getSymbol().getName() +
-                                    "' is external.");
+    Asm.getContext().reportError(Fixup.getLoc(),
+                                 "conditional branch requires assembler-local"
+                                 " label. '" +
+                                     Target.getSymA()->getSymbol().getName() +
+                                     "' is external.");
     return;
   }
 
   // 14-bit branch relocations should only target internal labels, and so
   // should never get here.
   if (Kind == AArch64::fixup_aarch64_pcrel_branch14) {
-    Asm.getContext().reportFatalError(Fixup.getLoc(),
-                                "Invalid relocation on conditional branch!");
+    Asm.getContext().reportError(Fixup.getLoc(),
+                                 "Invalid relocation on conditional branch!");
     return;
   }
 
   if (!getAArch64FixupKindMachOInfo(Fixup, Type, Target.getSymA(), Log2Size,
-                                  Asm)) {
-    Asm.getContext().reportFatalError(Fixup.getLoc(), "unknown AArch64 fixup kind!");
+                                    Asm)) {
+    Asm.getContext().reportError(Fixup.getLoc(), "unknown AArch64 fixup kind!");
     return;
   }
 
@@ -200,8 +202,9 @@ void AArch64MachObjectWriter::recordRelocation(
     Type = MachO::ARM64_RELOC_UNSIGNED;
 
     if (IsPCRel) {
-      Asm.getContext().reportFatalError(Fixup.getLoc(),
-                                  "PC relative absolute relocation!");
+      Asm.getContext().reportError(Fixup.getLoc(),
+                                   "PC relative absolute relocation!");
+      return;
 
       // FIXME: x86_64 sets the type to a branch reloc here. Should we do
       // something similar?
@@ -229,37 +232,47 @@ void AArch64MachObjectWriter::recordRelocation(
       Writer->addRelocation(A_Base, Fragment->getParent(), MRE);
       return;
     } else if (Target.getSymA()->getKind() != MCSymbolRefExpr::VK_None ||
-               Target.getSymB()->getKind() != MCSymbolRefExpr::VK_None)
+               Target.getSymB()->getKind() != MCSymbolRefExpr::VK_None) {
       // Otherwise, neither symbol can be modified.
-      Asm.getContext().reportFatalError(Fixup.getLoc(),
-                                  "unsupported relocation of modified symbol");
+      Asm.getContext().reportError(Fixup.getLoc(),
+                                   "unsupported relocation of modified symbol");
+      return;
+    }
 
     // We don't support PCrel relocations of differences.
-    if (IsPCRel)
-      Asm.getContext().reportFatalError(Fixup.getLoc(),
-                                  "unsupported pc-relative relocation of "
-                                  "difference");
+    if (IsPCRel) {
+      Asm.getContext().reportError(Fixup.getLoc(),
+                                   "unsupported pc-relative relocation of "
+                                   "difference");
+      return;
+    }
 
     // AArch64 always uses external relocations. If there is no symbol to use as
     // a base address (a local symbol with no preceding non-local symbol),
     // error out.
     //
     // FIXME: We should probably just synthesize an external symbol and use
     // that.
-    if (!A_Base)
-      Asm.getContext().reportFatalError(
+    if (!A_Base) {
+      Asm.getContext().reportError(
           Fixup.getLoc(),
           "unsupported relocation of local symbol '" + A->getName() +
               "'. Must have non-local symbol earlier in section.");
-    if (!B_Base)
-      Asm.getContext().reportFatalError(
+      return;
+    }
+    if (!B_Base) {
+      Asm.getContext().reportError(
           Fixup.getLoc(),
           "unsupported relocation of local symbol '" + B->getName() +
               "'. Must have non-local symbol earlier in section.");
+      return;
+    }
 
-    if (A_Base == B_Base && A_Base)
-      Asm.getContext().reportFatalError(Fixup.getLoc(),
-                                  "unsupported relocation with identical base");
+    if (A_Base == B_Base && A_Base) {
+      Asm.getContext().reportError(
+          Fixup.getLoc(), "unsupported relocation with identical base");
+      return;
+    }
 
     Value += (!A->getFragment() ? 0 : Writer->getSymbolAddress(*A, Layout)) -
              (!A_Base || !A_Base->getFragment() ? 0 : Writer->getSymbolAddress(
@@ -309,10 +322,12 @@ void AArch64MachObjectWriter::recordRelocation(
       // we need to preserve and merge with the new Target? How about
       // the FixedValue?
       if (!Symbol->getVariableValue()->evaluateAsRelocatable(Target, &Layout,
-                                                             &Fixup))
-        Asm.getContext().reportFatalError(Fixup.getLoc(),
-                                    "unable to resolve variable '" +
-                                        Symbol->getName() + "'");
+                                                             &Fixup)) {
+        Asm.getContext().reportError(Fixup.getLoc(),
+                                     "unable to resolve variable '" +
+                                         Symbol->getName() + "'");
+        return;
+      }
       return recordRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
                               FixedValue);
     }
@@ -337,11 +352,13 @@ void AArch64MachObjectWriter::recordRelocation(
         Value +=
             Layout.getSymbolOffset(*Symbol) - Layout.getSymbolOffset(*Base);
     } else if (Symbol->isInSection()) {
-      if (!CanUseLocalRelocation)
-        Asm.getContext().reportFatalError(
+      if (!CanUseLocalRelocation) {
+        Asm.getContext().reportError(
             Fixup.getLoc(),
             "unsupported relocation of local symbol '" + Symbol->getName() +
                 "'. Must have non-local symbol earlier in section.");
+        return;
+      }
       // Adjust the relocation to be section-relative.
       // The index is the section ordinal (1-based).
       const MCSection &Sec = Symbol->getSection();
@@ -361,9 +378,10 @@ void AArch64MachObjectWriter::recordRelocation(
           return;
         }
       }
-      Asm.getContext().reportFatalError(Fixup.getLoc(),
+      Asm.getContext().reportError(Fixup.getLoc(),
                                   "unsupported relocation of variable '" +
                                       Symbol->getName() + "'");
+      return;
     }
   }
 

diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -395,8 +395,10 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
       Value = -Value;
       isAdd = false;
     }
-    if (Ctx && Value >= 4096)
-      Ctx->reportFatalError(Fixup.getLoc(), "out of range pc-relative fixup value");
+    if (Ctx && Value >= 4096) {
+      Ctx->reportError(Fixup.getLoc(), "out of range pc-relative fixup value");
+      return 0;
+    }
     Value |= isAdd << 23;
 
     // Same addressing mode as fixup_arm_pcrel_10,
@@ -414,8 +416,10 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
       Value = -Value;
       opc = 2; // 0b0010
     }
-    if (Ctx && ARM_AM::getSOImmVal(Value) == -1)
-      Ctx->reportFatalError(Fixup.getLoc(), "out of range pc-relative fixup value");
+    if (Ctx && ARM_AM::getSOImmVal(Value) == -1) {
+      Ctx->reportError(Fixup.getLoc(), "out of range pc-relative fixup value");
+      return 0;
+    }
     // Encode the immediate and shift the opcode into place.
     return ARM_AM::getSOImmVal(Value) | (opc << 21);
   }
@@ -544,8 +548,10 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
     // could have an error on our hands.
     if (Ctx && !STI->getFeatureBits()[ARM::FeatureThumb2] && IsResolved) {
       const char *FixupDiagnostic = reasonForFixupRelaxation(Fixup, Value);
-      if (FixupDiagnostic)
-        Ctx->reportFatalError(Fixup.getLoc(), FixupDiagnostic);
+      if (FixupDiagnostic) {
+        Ctx->reportError(Fixup.getLoc(), FixupDiagnostic);
+        return 0;
+      }
     }
     // Offset by 4, and don't encode the low two bits.
     return ((Value - 4) >> 2) & 0xff;
@@ -559,16 +565,20 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
     // Offset by 4 and don't encode the lower bit, which is always 0.
     if (Ctx && !STI->getFeatureBits()[ARM::FeatureThumb2]) {
       const char *FixupDiagnostic = reasonForFixupRelaxation(Fixup, Value);
-      if (FixupDiagnostic)
-        Ctx->reportFatalError(Fixup.getLoc(), FixupDiagnostic);
+      if (FixupDiagnostic) {
+        Ctx->reportError(Fixup.getLoc(), FixupDiagnostic);
+        return 0;
+      }
     }
     return ((Value - 4) >> 1) & 0x7ff;
   case ARM::fixup_arm_thumb_bcc:
     // Offset by 4 and don't encode the lower bit, which is always 0.
     if (Ctx && !STI->getFeatureBits()[ARM::FeatureThumb2]) {
       const char *FixupDiagnostic = reasonForFixupRelaxation(Fixup, Value);
-      if (FixupDiagnostic)
-        Ctx->reportFatalError(Fixup.getLoc(), FixupDiagnostic);
+      if (FixupDiagnostic) {
+        Ctx->reportError(Fixup.getLoc(), FixupDiagnostic);
+        return 0;
+      }
     }
     return ((Value - 4) >> 1) & 0xff;
   case ARM::fixup_arm_pcrel_10_unscaled: {
@@ -580,8 +590,10 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
       isAdd = false;
     }
     // The value has the low 4 bits encoded in [3:0] and the high 4 in [11:8].
-    if (Ctx && Value >= 256)
-      Ctx->reportFatalError(Fixup.getLoc(), "out of range pc-relative fixup value");
+    if (Ctx && Value >= 256) {
+      Ctx->reportError(Fixup.getLoc(), "out of range pc-relative fixup value");
+      return 0;
+    }
     Value = (Value & 0xf) | ((Value & 0xf0) << 4);
     return Value | (isAdd << 23);
   }
@@ -599,8 +611,10 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
     }
     // These values don't encode the low two bits since they're always zero.
     Value >>= 2;
-    if (Ctx && Value >= 256)
-      Ctx->reportFatalError(Fixup.getLoc(), "out of range pc-relative fixup value");
+    if (Ctx && Value >= 256) {
+      Ctx->reportError(Fixup.getLoc(), "out of range pc-relative fixup value");
+      return 0;
+    }
     Value |= isAdd << 23;
 
     // Same addressing mode as fixup_arm_pcrel_10, but with 16-bit halfwords

diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -509,8 +509,10 @@ class ARMELFStreamer : public MCELFStreamer {
   /// necessary.
   void EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc) override {
     if (const MCSymbolRefExpr *SRE = dyn_cast_or_null<MCSymbolRefExpr>(Value))
-      if (SRE->getKind() == MCSymbolRefExpr::VK_ARM_SBREL && !(Size == 4))
-        getContext().reportFatalError(Loc, "relocated expression must be 32-bit");
+      if (SRE->getKind() == MCSymbolRefExpr::VK_ARM_SBREL && !(Size == 4)) {
+        getContext().reportError(Loc, "relocated expression must be 32-bit");
+        return;
+      }
 
     EmitDataMappingSymbol();
     MCELFStreamer::EmitValueImpl(Value, Size, Loc);

diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
@@ -150,10 +150,12 @@ RecordARMScatteredHalfRelocation(MachObjectWriter *Writer,
   // See <reloc.h>.
   const MCSymbol *A = &Target.getSymA()->getSymbol();
 
-  if (!A->getFragment())
-    Asm.getContext().reportFatalError(Fixup.getLoc(),
+  if (!A->getFragment()) {
+    Asm.getContext().reportError(Fixup.getLoc(),
                        "symbol '" + A->getName() +
                        "' can not be undefined in a subtraction expression");
+    return;
+  }
 
   uint32_t Value = Writer->getSymbolAddress(*A, Layout);
   uint32_t Value2 = 0;
@@ -163,10 +165,12 @@ RecordARMScatteredHalfRelocation(MachObjectWriter *Writer,
   if (const MCSymbolRefExpr *B = Target.getSymB()) {
     const MCSymbol *SB = &B->getSymbol();
 
-    if (!SB->getFragment())
-      Asm.getContext().reportFatalError(Fixup.getLoc(),
+    if (!SB->getFragment()) {
+      Asm.getContext().reportError(Fixup.getLoc(),
                          "symbol '" + B->getSymbol().getName() +
                          "' can not be undefined in a subtraction expression");
+      return;
+    }
 
     // Select the appropriate difference relocation type.
     Type = MachO::ARM_RELOC_HALF_SECTDIFF;
@@ -251,10 +255,12 @@ void ARMMachObjectWriter::RecordARMScatteredRelocation(MachObjectWriter *Writer,
   // See <reloc.h>.
   const MCSymbol *A = &Target.getSymA()->getSymbol();
 
-  if (!A->getFragment())
-    Asm.getContext().reportFatalError(Fixup.getLoc(),
+  if (!A->getFragment()) {
+    Asm.getContext().reportError(Fixup.getLoc(),
                        "symbol '" + A->getName() +
                        "' can not be undefined in a subtraction expression");
+    return;
+  }
 
   uint32_t Value = Writer->getSymbolAddress(*A, Layout);
   uint64_t SecAddr = Writer->getSectionAddress(A->getFragment()->getParent());
@@ -265,10 +271,12 @@ void ARMMachObjectWriter::RecordARMScatteredRelocation(MachObjectWriter *Writer,
     assert(Type == MachO::ARM_RELOC_VANILLA && "invalid reloc for 2 symbols");
     const MCSymbol *SB = &B->getSymbol();
 
-    if (!SB->getFragment())
-      Asm.getContext().reportFatalError(Fixup.getLoc(),
+    if (!SB->getFragment()) {
+      Asm.getContext().reportError(Fixup.getLoc(),
                          "symbol '" + B->getSymbol().getName() +
                          "' can not be undefined in a subtraction expression");
+      return;
+    }
 
     // Select the appropriate difference relocation type.
     Type = MachO::ARM_RELOC_SECTDIFF;
@@ -346,13 +354,15 @@ void ARMMachObjectWriter::recordRelocation(MachObjectWriter *Writer,
   unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
   unsigned Log2Size;
   unsigned RelocType = MachO::ARM_RELOC_VANILLA;
-  if (!getARMFixupKindMachOInfo(Fixup.getKind(), RelocType, Log2Size))
+  if (!getARMFixupKindMachOInfo(Fixup.getKind(), RelocType, Log2Size)) {
     // If we failed to get fixup kind info, it's because there's no legal
     // relocation type for the fixup kind. This happens when it's a fixup that's
     // expected to always be resolvable at assembly time and not have any
     // relocations needed.
-    Asm.getContext().reportFatalError(Fixup.getLoc(),
-                                "unsupported relocation on symbol");
+    Asm.getContext().reportError(Fixup.getLoc(),
+                                 "unsupported relocation on symbol");
+    return;
+  }
 
   // If this is a difference or a defined symbol plus an offset, then we need a
   // scattered relocation entry.  Differences always require scattered

diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -63,15 +63,19 @@ static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
     // address range. Forcing a signed division because Value can be negative.
     Value = (int64_t)Value / 4;
     // We now check if Value can be encoded as a 16-bit signed immediate.
-    if (!isInt<16>(Value) && Ctx)
-      Ctx->reportFatalError(Fixup.getLoc(), "out of range PC16 fixup");
+    if (!isInt<16>(Value) && Ctx) {
+      Ctx->reportError(Fixup.getLoc(), "out of range PC16 fixup");
+      return 0;
+    }
     break;
   case Mips::fixup_MIPS_PC19_S2:
     // Forcing a signed division because Value can be negative.
     Value = (int64_t)Value / 4;
     // We now check if Value can be encoded as a 19-bit signed immediate.
-    if (!isInt<19>(Value) && Ctx)
-      Ctx->reportFatalError(Fixup.getLoc(), "out of range PC19 fixup");
+    if (!isInt<19>(Value) && Ctx) {
+      Ctx->reportError(Fixup.getLoc(), "out of range PC19 fixup");
+      return 0;
+    }
     break;
   case Mips::fixup_Mips_26:
     // So far we are only using this type for jumps.
@@ -104,45 +108,57 @@ static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
     // Forcing a signed division because Value can be negative.
     Value = (int64_t) Value / 2;
     // We now check if Value can be encoded as a 7-bit signed immediate.
-    if (!isInt<7>(Value) && Ctx)
-      Ctx->reportFatalError(Fixup.getLoc(), "out of range PC7 fixup");
+    if (!isInt<7>(Value) && Ctx) {
+      Ctx->reportError(Fixup.getLoc(), "out of range PC7 fixup");
+      return 0;
+    }
     break;
   case Mips::fixup_MICROMIPS_PC10_S1:
     Value -= 2;
     // Forcing a signed division because Value can be negative.
     Value = (int64_t) Value / 2;
     // We now check if Value can be encoded as a 10-bit signed immediate.
-    if (!isInt<10>(Value) && Ctx)
-      Ctx->reportFatalError(Fixup.getLoc(), "out of range PC10 fixup");
+    if (!isInt<10>(Value) && Ctx) {
+      Ctx->reportError(Fixup.getLoc(), "out of range PC10 fixup");
+      return 0;
+    }
     break;
   case Mips::fixup_MICROMIPS_PC16_S1:
     Value -= 4;
     // Forcing a signed division because Value can be negative.
     Value = (int64_t)Value / 2;
     // We now check if Value can be encoded as a 16-bit signed immediate.
-    if (!isInt<16>(Value) && Ctx)
-      Ctx->reportFatalError(Fixup.getLoc(), "out of range PC16 fixup");
+    if (!isInt<16>(Value) && Ctx) {
+      Ctx->reportError(Fixup.getLoc(), "out of range PC16 fixup");
+      return 0;
+    }
     break;
   case Mips::fixup_MIPS_PC18_S3:
     // Forcing a signed division because Value can be negative.
     Value = (int64_t)Value / 8;
     // We now check if Value can be encoded as a 18-bit signed immediate.
-    if (!isInt<18>(Value) && Ctx)
-      Ctx->reportFatalError(Fixup.getLoc(), "out of range PC18 fixup");
+    if (!isInt<18>(Value) && Ctx) {
+      Ctx->reportError(Fixup.getLoc(), "out of range PC18 fixup");
+      return 0;
+    }
     break;
   case Mips::fixup_MIPS_PC21_S2:
     // Forcing a signed division because Value can be negative.
     Value = (int64_t) Value / 4;
     // We now check if Value can be encoded as a 21-bit signed immediate.
-    if (!isInt<21>(Value) && Ctx)
-      Ctx->reportFatalError(Fixup.getLoc(), "out of range PC21 fixup");
+    if (!isInt<21>(Value) && Ctx) {
+      Ctx->reportError(Fixup.getLoc(), "out of range PC21 fixup");
+      return 0;
+    }
     break;
   case Mips::fixup_MIPS_PC26_S2:
     // Forcing a signed division because Value can be negative.
     Value = (int64_t) Value / 4;
     // We now check if Value can be encoded as a 26-bit signed immediate.
-    if (!isInt<26>(Value) && Ctx)
-      Ctx->reportFatalError(Fixup.getLoc(), "out of range PC26 fixup");
+    if (!isInt<26>(Value) && Ctx) {
+      Ctx->reportError(Fixup.getLoc(), "out of range PC26 fixup");
+      return 0;
+    }
     break;
   }
 

diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp
@@ -241,12 +241,12 @@ bool PPCMachObjectWriter::recordScatteredRelocation(
     if (FixupOffset > 0xffffff) {
       char Buffer[32];
       format("0x%x", FixupOffset).print(Buffer, sizeof(Buffer));
-      Asm.getContext().reportFatalError(Fixup.getLoc(),
+      Asm.getContext().reportError(Fixup.getLoc(),
                                   Twine("Section too large, can't encode "
                                         "r_address (") +
                                       Buffer + ") into 24 bits of scattered "
                                                "relocation entry.");
-      llvm_unreachable("fatal error returned?!");
+      return false;
     }
 
     // Is this supposed to follow MCTarget/PPCAsmBackend.cpp:adjustFixupValue()?

diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
@@ -175,9 +175,10 @@ void X86MachObjectWriter::RecordX86_64Relocation(
     // non-relocatable expression.
     if (A->isUndefined() || B->isUndefined()) {
       StringRef Name = A->isUndefined() ? A->getName() : B->getName();
-      Asm.getContext().reportFatalError(Fixup.getLoc(),
+      Asm.getContext().reportError(Fixup.getLoc(),
         "unsupported relocation with subtraction expression, symbol '" +
         Name + "' can not be undefined in a subtraction expression");
+      return;
     }
 
     Value += Writer->getSymbolAddress(*A, Layout) -
@@ -387,12 +388,12 @@ bool X86MachObjectWriter::recordScatteredRelocation(MachObjectWriter *Writer,
     if (FixupOffset > 0xffffff) {
       char Buffer[32];
       format("0x%x", FixupOffset).print(Buffer, sizeof(Buffer));
-      Asm.getContext().reportFatalError(Fixup.getLoc(),
+      Asm.getContext().reportError(Fixup.getLoc(),
                          Twine("Section too large, can't encode "
                                 "r_address (") + Buffer +
                          ") into 24 bits of scattered "
                          "relocation entry.");
-      llvm_unreachable("fatal error returned?!");
+      return false;
     }
 
     MachO::any_relocation_info MRE;

diff --git a/llvm/test/MC/AArch64/error-location.s b/llvm/test/MC/AArch64/error-location.s
@@ -1,5 +1,49 @@
 // RUN: not llvm-mc -triple aarch64--none-eabi -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
 
+// Note: These errors are not always emitted in the order in which the relevant
+// source appears, this file is carefully ordered so that that is the case.
+
   .text
 // CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: symbol 'undef' can not be undefined in a subtraction expression
   .word (0-undef)
+
+// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: expected relocatable expression
+  .word -undef
+
+// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: No relocation available to represent this relative expression
+  adr x0, #a-undef
+
+// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: Cannot represent a difference across sections
+  .word x_a - y_a
+
+// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: Cannot represent a subtraction with a weak symbol
+  .word a - w
+
+// CHECK: <unknown>:0: error: expression could not be evaluated
+  .set v1, -undef
+
+  .comm common, 4
+// CHECK: <unknown>:0: error: Common symbol 'common' cannot be used in assignment expr
+  .set v3, common
+
+// CHECK: <unknown>:0: error: Undefined temporary symbol
+  .word 5f
+
+// CHECK: <unknown>:0: error: symbol 'undef' could not be evaluated in a subtraction expression
+  .set v2, a-undef
+
+
+
+w:
+  .word 0
+  .weak w
+
+
+  .section sec_x
+x_a:
+  .word 0
+
+
+  .section sec_y
+y_a:
+  .word 0
diff --git a/llvm/test/MC/ARM/arm-elf-relocation-diagnostics.s b/llvm/test/MC/ARM/arm-elf-relocation-diagnostics.s
@@ -8,20 +8,19 @@
 @ CHECK: .byte target(sbrel)
 @ CHECK:       ^
 
-@ TODO: enable these negative test cases
-@ 	.hword target(sbrel)
-@ @ CHECK-SBREL-HWORD: error: relocated expression must be 32-bit
-@ @ CHECK-SBREL-HWORD: .hword target(sbrel)
-@ @ CHECK-SBREL-HWORD:        ^
-@
-@ 	.short target(sbrel)
-@ @ CHECK-SBREL-SHORT: error: relocated expression must be 32-bit
-@ @ CHECK-SBREL-SHORT: .short target(sbrel)
-@ @ CHECK-SBREL-SHORT:        ^
-@
-@ 	.quad target(sbrel)
-@ @ CHECK-SBREL-SHORT: error: relocated expression must be 32-bit
-@ @ CHECK-SBREL-SHORT: .quad target(sbrel)
-@ @ CHECK-SBREL-SHORT:        ^
+	.hword target(sbrel)
+@ CHECK: error: relocated expression must be 32-bit
+@ CHECK: .hword target(sbrel)
+@ CHECK:        ^
+
+	.short target(sbrel)
+@ CHECK: error: relocated expression must be 32-bit
+@ CHECK: .short target(sbrel)
+@ CHECK:        ^
+
+	.quad target(sbrel)
+@ CHECK: error: relocated expression must be 32-bit
+@ CHECK: .quad target(sbrel)
+@ CHECK:        ^
 
 
diff --git a/llvm/test/MC/ARM/error-location.s b/llvm/test/MC/ARM/error-location.s
@@ -1,5 +1,49 @@
 @ RUN: not llvm-mc -triple armv7a--none-eabi -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
 
+@ Note: These errors are not always emitted in the order in which the relevant
+@ source appears, this file is carefully ordered so that that is the case.
+
   .text
 @ CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: symbol 'undef' can not be undefined in a subtraction expression
   .word (0-undef)
+
+@ CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: expected relocatable expression
+  .word -undef
+
+@ CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: No relocation available to represent this relative expression
+  adr r0, #a-undef
+
+@ CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: Cannot represent a difference across sections
+  .word x_a - y_a
+
+@ CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: Cannot represent a subtraction with a weak symbol
+  .word a - w
+
+@ CHECK: <unknown>:0: error: expression could not be evaluated
+  .set v1, -undef
+
+  .comm common, 4
+@ CHECK: <unknown>:0: error: Common symbol 'common' cannot be used in assignment expr
+  .set v3, common
+
+@ CHECK: <unknown>:0: error: Undefined temporary symbol
+  .word 5f
+
+@ CHECK: <unknown>:0: error: symbol 'undef' could not be evaluated in a subtraction expression
+  .set v2, a-undef
+
+
+
+w:
+  .word 0
+  .weak w
+
+
+  .section sec_x
+x_a:
+  .word 0
+
+
+  .section sec_y
+y_a:
+  .word 0
diff --git a/llvm/test/MC/ARM/thumb1-relax-adr-local.s b/llvm/test/MC/ARM/thumb1-relax-adr-local.s
diff --git a/llvm/test/MC/ARM/thumb1-relax-bcc-local.s b/llvm/test/MC/ARM/thumb1-relax-bcc-local.s
diff --git a/llvm/test/MC/ARM/thumb1-relax-br-local.s b/llvm/test/MC/ARM/thumb1-relax-br-local.s
diff --git a/llvm/test/MC/ARM/thumb1-relax-ldrlit-local-behind.s b/llvm/test/MC/ARM/thumb1-relax-ldrlit-local-behind.s
diff --git a/llvm/test/MC/ARM/thumb1-relax-ldrlit-local-misaligned.s b/llvm/test/MC/ARM/thumb1-relax-ldrlit-local-misaligned.s
diff --git a/llvm/test/MC/ARM/thumb1-relax-ldrlit-local-range.s b/llvm/test/MC/ARM/thumb1-relax-ldrlit-local-range.s
diff --git a/llvm/test/MC/ARM/thumb1-relax.s b/llvm/test/MC/ARM/thumb1-relax.s
@@ -0,0 +1,35 @@
+@ RUN: not llvm-mc -triple thumbv6m-none-macho -filetype=obj -o /dev/null %s 2>&1 | FileCheck %s
+@ RUN: not llvm-mc -triple thumbv6m-none-eabi -filetype=obj -o /dev/null %s 2>&1 | FileCheck %s
+
+Lhere:
+@ CHECK: out of range pc-relative fixup value
+  ldr r0, Lhere
+
+@ CHECK: out of range pc-relative fixup value
+  b Lfar2
+
+@ CHECK: out of range pc-relative fixup value
+  bne Lfar1
+
+@ CHECK: out of range pc-relative fixup value
+  ldr r0, Lfar2
+
+@ CHECK: misaligned pc-relative fixup value
+  adr r0, Lmisaligned
+
+@ CHECK: misaligned pc-relative fixup value
+  ldr r0, Lmisaligned
+
+  .balign 4
+  .short 0
+Lmisaligned:
+  .word 42
+
+  .space 256
+Lfar1:
+  .word 42
+
+  .space 2050
+Lfar2:
+  .word 42
+
diff --git a/llvm/test/MC/COFF/bad-expr.s b/llvm/test/MC/COFF/bad-expr.s
@@ -1,7 +1,9 @@
 // RUN: not llvm-mc -filetype=obj -triple i386-pc-win32 %s 2>&1 | FileCheck %s
 
+// CHECK: symbol '__ImageBase' can not be undefined in a subtraction expression
 // CHECK: symbol '__ImageBase' can not be undefined in a subtraction expression
 
         .data
 _x:
         .long   _x-__ImageBase
+        .long   __ImageBase-_x
diff --git a/llvm/test/MC/COFF/invalid-def.s b/llvm/test/MC/COFF/invalid-def.s
@@ -1,5 +1,8 @@
-# RUN: not llvm-mc -triple i686-windows -filetype obj -o /dev/null %s
+# RUN: not llvm-mc -triple i686-windows -filetype obj -o /dev/null %s 2>&1 | FileCheck %s
 
+# CHECK: error: starting a new symbol definition without completing the previous one
+# CHECK: error: starting a new symbol definition without completing the previous one
 	.def first
 	.def second
+	.def third
 
diff --git a/llvm/test/MC/COFF/invalid-endef.s b/llvm/test/MC/COFF/invalid-endef.s
@@ -1,4 +1,7 @@
-# RUN: not llvm-mc -triple i686-windows -filetype obj -o /dev/null %s
+# RUN: not llvm-mc -triple i686-windows -filetype obj -o /dev/null %s 2>&1 | FileCheck %s
 
+# CHECK: ending symbol definition without starting one
+# CHECK: ending symbol definition without starting one
+	.endef
 	.endef
 
diff --git a/llvm/test/MC/COFF/invalid-scl-range.s b/llvm/test/MC/COFF/invalid-scl-range.s
@@ -1,6 +1,9 @@
 # RUN: not llvm-mc -triple i686-windows -filetype obj -o /dev/null %s
 
 	.def storage_class_range
+# CHECK: storage class value '1337' out of range
+# CHECK: storage class value '9001' out of range
 		.scl 1337
+		.scl 9001
 	.endef
 
diff --git a/llvm/test/MC/COFF/invalid-scl.s b/llvm/test/MC/COFF/invalid-scl.s
@@ -1,4 +1,7 @@
-# RUN: not llvm-mc -triple i686-windows -filetype obj -o /dev/null %s
+# RUN: not llvm-mc -triple i686-windows -filetype obj -o /dev/null %s 2>&1 | FileCheck %s
 
+# CHECK: storage class specified outside of symbol definition
+# CHECK: storage class specified outside of symbol definition
+	.scl 1337
 	.scl 1337
 
diff --git a/llvm/test/MC/COFF/invalid-type.s b/llvm/test/MC/COFF/invalid-type.s
@@ -1,4 +1,7 @@
-# RUN: not llvm-mc -triple i686-windows -filetype obj -o /dev/null %s
+# RUN: not llvm-mc -triple i686-windows -filetype obj -o /dev/null %s 2>&1 | FileCheck %s
 
+# CHECK: symbol type specified outside of a symbol definition
+# CHECK: symbol type specified outside of a symbol definition
 	.type 65536
+	.type 65537
 
diff --git a/llvm/test/MC/COFF/label-undefined.s b/llvm/test/MC/COFF/label-undefined.s
@@ -1,4 +1,6 @@
 // RUN: not llvm-mc -filetype=obj -triple i386-pc-win32 %s 2>&1 | FileCheck %s
 // CHECK: assembler label 'Lundefined' can not be undefined
+// CHECK: assembler label 'Lundefined2' can not be undefined
         .text
         movl Lundefined, %eax
+        movl Lundefined2, %eax
diff --git a/llvm/test/MC/COFF/secidx-diagnostic.s b/llvm/test/MC/COFF/secidx-diagnostic.s
@@ -2,7 +2,9 @@
 // RUN: FileCheck %s < %t
 
 // CHECK: symbol 'bar' can not be undefined
+// CHECK: symbol 'baz' can not be undefined
 
 .data
 foo:
         .secidx bar
+        .secidx baz
diff --git a/llvm/test/MC/ELF/common-error1.s b/llvm/test/MC/ELF/common-error1.s
@@ -3,4 +3,4 @@
         .comm   C,4,4
         .set    A,C
 
-// CHECK: Common symbol C cannot be used in assignment expr
+// CHECK: Common symbol 'C' cannot be used in assignment expr
diff --git a/llvm/test/MC/ELF/common-error2.s b/llvm/test/MC/ELF/common-error2.s
@@ -3,4 +3,4 @@
         .set    A,C
         .comm   C,4,4
 
-// CHECK: Common symbol C cannot be used in assignment expr
+// CHECK: Common symbol 'C' cannot be used in assignment expr
diff --git a/llvm/test/MC/MachO/AArch64/reloc-errors.s b/llvm/test/MC/MachO/AArch64/reloc-errors.s
@@ -0,0 +1,10 @@
+; RUN: not llvm-mc -triple aarch64-none-macho %s -filetype=obj -o - 2>&1 | FileCheck %s
+
+; CHECK: error: conditional branch requires assembler-local label. 'external' is external.
+  b.eq external
+
+; CHECK: error: Invalid relocation on conditional branch
+  tbz w0, #4, external
+
+; CHECK: error: unknown AArch64 fixup kind!
+  adr x0, external
diff --git a/llvm/test/MC/MachO/ARM/bad-darwin-ARM-reloc.s b/llvm/test/MC/MachO/ARM/bad-darwin-ARM-reloc.s
@@ -7,3 +7,9 @@
 L___fcommon: 
     .word 0
 @ CHECK-ERROR: unsupported relocation on symbol
+
+c:
+  .word a - b
+@ CHECK-ERROR: symbol 'a' can not be undefined in a subtraction expression
+  .word c - b
+@ CHECK-ERROR: symbol 'b' can not be undefined in a subtraction expression
diff --git a/llvm/test/MC/MachO/bad-darwin-x86_64-diff-relocs.s b/llvm/test/MC/MachO/bad-darwin-x86_64-diff-relocs.s
@@ -2,4 +2,12 @@
 // RUN: FileCheck --check-prefix=CHECK-ERROR < %t.err %s
 
 .quad _foo - _bar
-// CHECK-ERROR: unsupported relocation with subtraction expression
+// CHECK-ERROR: error: unsupported relocation with subtraction expression
+
+_Y:
+.long (_Y+4)-_b
+// CHECK-ERROR: error: unsupported relocation with subtraction expression, symbol '_b' can not be undefined in a subtraction expression
+
+_Z:
+.long (_a+4)-_Z
+// CHECK-ERROR: error: unsupported relocation with subtraction expression, symbol '_a' can not be undefined in a subtraction expression
diff --git a/llvm/test/MC/MachO/bad-darwin-x86_64-reloc-expr1.s b/llvm/test/MC/MachO/bad-darwin-x86_64-reloc-expr1.s
diff --git a/llvm/test/MC/MachO/bad-darwin-x86_64-reloc-expr2.s b/llvm/test/MC/MachO/bad-darwin-x86_64-reloc-expr2.s
diff --git a/llvm/test/MC/Mips/micromips-diagnostic-fixup.s b/llvm/test/MC/Mips/micromips-diagnostic-fixup.s
@@ -1,8 +1,11 @@
 # RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -arch=mips -mattr=+micromips 2>&1 -filetype=obj | FileCheck %s
-#
+
+# Two instructions, to check that this is not a fatal error
+# CHECK: error: out of range PC16 fixup
 # CHECK: error: out of range PC16 fixup
 
 .text
+  b foo
   b foo
   .space 65536 - 6, 1   # -6 = size of b instr plus size of automatically inserted nop
   nop                   # This instr makes the branch too long to fit into a 17-bit offset

diff --git a/llvm/test/MC/Mips/micromips-pc16-fixup.s b/llvm/test/MC/Mips/micromips-pc16-fixup.s
@@ -1,6 +1,6 @@
 # RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -arch=mips -mattr=+micromips 2>&1 -filetype=obj | FileCheck %s
 #
-# CHECK-NOT: LLVM ERROR: out of range PC16 fixup
+# CHECK-NOT: error: out of range PC16 fixup
 
 .text
   b foo

diff --git a/llvm/test/MC/Mips/mips-diagnostic-fixup.s b/llvm/test/MC/Mips/mips-diagnostic-fixup.s
@@ -1,8 +1,11 @@
 # RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -arch=mips 2>&1 -filetype=obj | FileCheck %s
-#
+
+# Two instructions, to check that this is not a fatal error
+# CHECK: error: out of range PC16 fixup
 # CHECK: error: out of range PC16 fixup
 
 .text
+  b foo
   b foo
   .space 131072 - 8, 1  # -8 = size of b instr plus size of automatically inserted nop
   nop                   # This instr makes the branch too long to fit into a 18-bit offset

diff --git a/llvm/test/MC/Mips/mips-pc16-fixup.s b/llvm/test/MC/Mips/mips-pc16-fixup.s
@@ -1,6 +1,6 @@
 # RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -arch=mips 2>&1 -filetype=obj | FileCheck %s
 #
-# CHECK-NOT: LLVM ERROR: out of range PC16 fixup
+# CHECK-NOT: error: out of range PC16 fixup
 
 .text
   b foo