144 changes: 72 additions & 72 deletions llvm/test/CodeGen/LoongArch/ir-instruction/float-convert.ll
View file

Large diffs are not rendered by default.

9 changes: 5 additions & 4 deletions llvm/test/CodeGen/LoongArch/ir-instruction/fmul.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 --mattr=+d < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 --mattr=+d < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -7,12 +8,12 @@ define float @fmul_s(float %x, float %y) {
; LA32-LABEL: fmul_s:
; LA32: # %bb.0:
; LA32-NEXT: fmul.s $fa0, $fa0, $fa1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fmul_s:
; LA64: # %bb.0:
; LA64-NEXT: fmul.s $fa0, $fa0, $fa1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%mul = fmul float %x, %y
ret float %mul
}
Expand All @@ -21,12 +22,12 @@ define double @fmul_d(double %x, double %y) {
; LA32-LABEL: fmul_d:
; LA32: # %bb.0:
; LA32-NEXT: fmul.d $fa0, $fa0, $fa1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fmul_d:
; LA64: # %bb.0:
; LA64-NEXT: fmul.d $fa0, $fa0, $fa1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%mul = fmul double %x, %y
ret double %mul
}
9 changes: 5 additions & 4 deletions llvm/test/CodeGen/LoongArch/ir-instruction/fneg.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 --mattr=+d < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 --mattr=+d < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -7,12 +8,12 @@ define float @fneg_s(float %x) {
; LA32-LABEL: fneg_s:
; LA32: # %bb.0:
; LA32-NEXT: fneg.s $fa0, $fa0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fneg_s:
; LA64: # %bb.0:
; LA64-NEXT: fneg.s $fa0, $fa0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%neg = fneg float %x
ret float %neg
}
Expand All @@ -21,12 +22,12 @@ define double @fneg_d(double %x) {
; LA32-LABEL: fneg_d:
; LA32: # %bb.0:
; LA32-NEXT: fneg.d $fa0, $fa0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fneg_d:
; LA64: # %bb.0:
; LA64-NEXT: fneg.d $fa0, $fa0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%neg = fneg double %x
ret double %neg
}
17 changes: 9 additions & 8 deletions llvm/test/CodeGen/LoongArch/ir-instruction/fsub.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 --mattr=+d < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 --mattr=+d < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -7,12 +8,12 @@ define float @fsub_s(float %x, float %y) {
; LA32-LABEL: fsub_s:
; LA32: # %bb.0:
; LA32-NEXT: fsub.s $fa0, $fa0, $fa1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fsub_s:
; LA64: # %bb.0:
; LA64-NEXT: fsub.s $fa0, $fa0, $fa1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%sub = fsub float %x, %y
ret float %sub
}
Expand All @@ -21,12 +22,12 @@ define double @fsub_d(double %x, double %y) {
; LA32-LABEL: fsub_d:
; LA32: # %bb.0:
; LA32-NEXT: fsub.d $fa0, $fa0, $fa1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fsub_d:
; LA64: # %bb.0:
; LA64-NEXT: fsub.d $fa0, $fa0, $fa1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%sub = fsub double %x, %y
ret double %sub
}
Expand All @@ -35,12 +36,12 @@ define float @fneg_s(float %x) {
; LA32-LABEL: fneg_s:
; LA32: # %bb.0:
; LA32-NEXT: fneg.s $fa0, $fa0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fneg_s:
; LA64: # %bb.0:
; LA64-NEXT: fneg.s $fa0, $fa0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = fsub float -0.0, %x
ret float %res
}
Expand All @@ -49,12 +50,12 @@ define double @fneg_d(double %x) {
; LA32-LABEL: fneg_d:
; LA32: # %bb.0:
; LA32-NEXT: fneg.d $fa0, $fa0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fneg_d:
; LA64: # %bb.0:
; LA64-NEXT: fneg.d $fa0, $fa0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = fsub double -0.0, %x
ret double %res
}
65 changes: 33 additions & 32 deletions llvm/test/CodeGen/LoongArch/ir-instruction/icmp.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -8,13 +9,13 @@ define i1 @icmp_eq(i32 signext %a, i32 signext %b) {
; LA32: # %bb.0:
; LA32-NEXT: xor $a0, $a0, $a1
; LA32-NEXT: sltui $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_eq:
; LA64: # %bb.0:
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: sltui $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp eq i32 %a, %b
ret i1 %res
}
Expand All @@ -24,13 +25,13 @@ define i1 @icmp_ne(i32 signext %a, i32 signext %b) {
; LA32: # %bb.0:
; LA32-NEXT: xor $a0, $a0, $a1
; LA32-NEXT: sltu $a0, $zero, $a0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_ne:
; LA64: # %bb.0:
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: sltu $a0, $zero, $a0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp ne i32 %a, %b
ret i1 %res
}
Expand All @@ -39,12 +40,12 @@ define i1 @icmp_ugt(i32 signext %a, i32 signext %b) {
; LA32-LABEL: icmp_ugt:
; LA32: # %bb.0:
; LA32-NEXT: sltu $a0, $a1, $a0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_ugt:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a1, $a0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp ugt i32 %a, %b
ret i1 %res
}
Expand All @@ -54,13 +55,13 @@ define i1 @icmp_uge(i32 signext %a, i32 signext %b) {
; LA32: # %bb.0:
; LA32-NEXT: sltu $a0, $a0, $a1
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_uge:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a0, $a1
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp uge i32 %a, %b
ret i1 %res
}
Expand All @@ -69,12 +70,12 @@ define i1 @icmp_ult(i32 signext %a, i32 signext %b) {
; LA32-LABEL: icmp_ult:
; LA32: # %bb.0:
; LA32-NEXT: sltu $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_ult:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp ult i32 %a, %b
ret i1 %res
}
Expand All @@ -84,13 +85,13 @@ define i1 @icmp_ule(i32 signext %a, i32 signext %b) {
; LA32: # %bb.0:
; LA32-NEXT: sltu $a0, $a1, $a0
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_ule:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a1, $a0
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp ule i32 %a, %b
ret i1 %res
}
Expand All @@ -99,12 +100,12 @@ define i1 @icmp_sgt(i32 signext %a, i32 signext %b) {
; LA32-LABEL: icmp_sgt:
; LA32: # %bb.0:
; LA32-NEXT: slt $a0, $a1, $a0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_sgt:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a1, $a0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp sgt i32 %a, %b
ret i1 %res
}
Expand All @@ -114,13 +115,13 @@ define i1 @icmp_sge(i32 signext %a, i32 signext %b) {
; LA32: # %bb.0:
; LA32-NEXT: slt $a0, $a0, $a1
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_sge:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a0, $a1
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp sge i32 %a, %b
ret i1 %res
}
Expand All @@ -129,12 +130,12 @@ define i1 @icmp_slt(i32 signext %a, i32 signext %b) {
; LA32-LABEL: icmp_slt:
; LA32: # %bb.0:
; LA32-NEXT: slt $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_slt:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp slt i32 %a, %b
ret i1 %res
}
Expand All @@ -144,13 +145,13 @@ define i1 @icmp_sle(i32 signext %a, i32 signext %b) {
; LA32: # %bb.0:
; LA32-NEXT: slt $a0, $a1, $a0
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_sle:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a1, $a0
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp sle i32 %a, %b
ret i1 %res
}
Expand All @@ -159,12 +160,12 @@ define i1 @icmp_slt_3(i32 signext %a) {
; LA32-LABEL: icmp_slt_3:
; LA32: # %bb.0:
; LA32-NEXT: slti $a0, $a0, 3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_slt_3:
; LA64: # %bb.0:
; LA64-NEXT: slti $a0, $a0, 3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp slt i32 %a, 3
ret i1 %res
}
Expand All @@ -173,12 +174,12 @@ define i1 @icmp_ult_3(i32 signext %a) {
; LA32-LABEL: icmp_ult_3:
; LA32: # %bb.0:
; LA32-NEXT: sltui $a0, $a0, 3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_ult_3:
; LA64: # %bb.0:
; LA64-NEXT: sltui $a0, $a0, 3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp ult i32 %a, 3
ret i1 %res
}
Expand All @@ -187,12 +188,12 @@ define i1 @icmp_eq_0(i32 signext %a) {
; LA32-LABEL: icmp_eq_0:
; LA32: # %bb.0:
; LA32-NEXT: sltui $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_eq_0:
; LA64: # %bb.0:
; LA64-NEXT: sltui $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp eq i32 %a, 0
ret i1 %res
}
Expand All @@ -202,13 +203,13 @@ define i1 @icmp_eq_3(i32 signext %a) {
; LA32: # %bb.0:
; LA32-NEXT: addi.w $a0, $a0, -3
; LA32-NEXT: sltui $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_eq_3:
; LA64: # %bb.0:
; LA64-NEXT: addi.d $a0, $a0, -3
; LA64-NEXT: sltui $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp eq i32 %a, 3
ret i1 %res
}
Expand All @@ -217,12 +218,12 @@ define i1 @icmp_ne_0(i32 signext %a) {
; LA32-LABEL: icmp_ne_0:
; LA32: # %bb.0:
; LA32-NEXT: sltu $a0, $zero, $a0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_ne_0:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $zero, $a0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp ne i32 %a, 0
ret i1 %res
}
Expand All @@ -232,13 +233,13 @@ define i1 @icmp_ne_3(i32 signext %a) {
; LA32: # %bb.0:
; LA32-NEXT: addi.w $a0, $a0, -3
; LA32-NEXT: sltu $a0, $zero, $a0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: icmp_ne_3:
; LA64: # %bb.0:
; LA64-NEXT: addi.d $a0, $a0, -3
; LA64-NEXT: sltu $a0, $zero, $a0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = icmp ne i32 %a, 3
ret i1 %res
}
7 changes: 4 additions & 3 deletions llvm/test/CodeGen/LoongArch/ir-instruction/indirectbr.ll
View file
Original file line number Diff line number Diff line change
@@ -1,12 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s

define i32 @indirectbr(ptr %target) nounwind {
; CHECK-LABEL: indirectbr:
; CHECK: # %bb.0:
; CHECK-NEXT: jirl $zero, $a0, 0
; CHECK-NEXT: jr $a0
; CHECK-NEXT: .LBB0_1: # %test_label
; CHECK-NEXT: move $a0, $zero
; CHECK-NEXT: jirl $zero, $ra, 0
; CHECK-NEXT: ret
indirectbr ptr %target, [label %test_label]
test_label:
br label %ret
Expand All @@ -20,7 +21,7 @@ define i32 @indirectbr_with_offset(ptr %a) nounwind {
; CHECK-NEXT: jirl $zero, $a0, 1380
; CHECK-NEXT: .LBB1_1: # %test_label
; CHECK-NEXT: move $a0, $zero
; CHECK-NEXT: jirl $zero, $ra, 0
; CHECK-NEXT: ret
%target = getelementptr inbounds i8, ptr %a, i32 1380
indirectbr ptr %target, [label %test_label]
test_label:
Expand Down
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/LoongArch/ir-instruction/load-store-atomic.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,13 +7,13 @@ define i8 @load_acquire_i8(ptr %ptr) {
; LA32: # %bb.0:
; LA32-NEXT: ld.b $a0, $a0, 0
; LA32-NEXT: dbar 0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: load_acquire_i8:
; LA64: # %bb.0:
; LA64-NEXT: ld.b $a0, $a0, 0
; LA64-NEXT: dbar 0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%val = load atomic i8, ptr %ptr acquire, align 1
ret i8 %val
}
Expand All @@ -23,13 +23,13 @@ define i16 @load_acquire_i16(ptr %ptr) {
; LA32: # %bb.0:
; LA32-NEXT: ld.h $a0, $a0, 0
; LA32-NEXT: dbar 0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: load_acquire_i16:
; LA64: # %bb.0:
; LA64-NEXT: ld.h $a0, $a0, 0
; LA64-NEXT: dbar 0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%val = load atomic i16, ptr %ptr acquire, align 2
ret i16 %val
}
Expand All @@ -39,13 +39,13 @@ define i32 @load_acquire_i32(ptr %ptr) {
; LA32: # %bb.0:
; LA32-NEXT: ld.w $a0, $a0, 0
; LA32-NEXT: dbar 0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: load_acquire_i32:
; LA64: # %bb.0:
; LA64-NEXT: ld.w $a0, $a0, 0
; LA64-NEXT: dbar 0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%val = load atomic i32, ptr %ptr acquire, align 4
ret i32 %val
}
Expand All @@ -61,13 +61,13 @@ define i64 @load_acquire_i64(ptr %ptr) {
; LA32-NEXT: bl __atomic_load_8
; LA32-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
; LA32-NEXT: addi.w $sp, $sp, 16
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: load_acquire_i64:
; LA64: # %bb.0:
; LA64-NEXT: ld.d $a0, $a0, 0
; LA64-NEXT: dbar 0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%val = load atomic i64, ptr %ptr acquire, align 8
ret i64 %val
}
Expand All @@ -77,13 +77,13 @@ define void @store_release_i8(ptr %ptr, i8 signext %v) {
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
; LA32-NEXT: st.b $a0, $a1, 0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_release_i8:
; LA64: # %bb.0:
; LA64-NEXT: dbar 0
; LA64-NEXT: st.b $a0, $a1, 0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
store atomic i8 %v, ptr %ptr release, align 1
ret void
}
Expand All @@ -93,13 +93,13 @@ define void @store_release_i16(ptr %ptr, i16 signext %v) {
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
; LA32-NEXT: st.h $a0, $a1, 0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_release_i16:
; LA64: # %bb.0:
; LA64-NEXT: dbar 0
; LA64-NEXT: st.h $a0, $a1, 0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
store atomic i16 %v, ptr %ptr release, align 2
ret void
}
Expand All @@ -109,13 +109,13 @@ define void @store_release_i32(ptr %ptr, i32 signext %v) {
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
; LA32-NEXT: st.w $a0, $a1, 0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_release_i32:
; LA64: # %bb.0:
; LA64-NEXT: dbar 0
; LA64-NEXT: st.w $a0, $a1, 0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
store atomic i32 %v, ptr %ptr release, align 4
ret void
}
Expand All @@ -131,13 +131,13 @@ define void @store_release_i64(ptr %ptr, i64 %v) {
; LA32-NEXT: bl __atomic_store_8
; LA32-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
; LA32-NEXT: addi.w $sp, $sp, 16
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_release_i64:
; LA64: # %bb.0:
; LA64-NEXT: dbar 0
; LA64-NEXT: st.d $a0, $a1, 0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
store atomic i64 %v, ptr %ptr release, align 8
ret void
}
102 changes: 51 additions & 51 deletions llvm/test/CodeGen/LoongArch/ir-instruction/load-store.ll
View file

Large diffs are not rendered by default.

41 changes: 21 additions & 20 deletions llvm/test/CodeGen/LoongArch/ir-instruction/lshr.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -6,11 +7,11 @@
define i1 @lshr_i1(i1 %x, i1 %y) {
; LA32-LABEL: lshr_i1:
; LA32: # %bb.0:
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: lshr_i1:
; LA64: # %bb.0:
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%lshr = lshr i1 %x, %y
ret i1 %lshr
}
Expand All @@ -20,13 +21,13 @@ define i8 @lshr_i8(i8 %x, i8 %y) {
; LA32: # %bb.0:
; LA32-NEXT: andi $a0, $a0, 255
; LA32-NEXT: srl.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: lshr_i8:
; LA64: # %bb.0:
; LA64-NEXT: andi $a0, $a0, 255
; LA64-NEXT: srl.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%lshr = lshr i8 %x, %y
ret i8 %lshr
}
Expand All @@ -36,13 +37,13 @@ define i16 @lshr_i16(i16 %x, i16 %y) {
; LA32: # %bb.0:
; LA32-NEXT: bstrpick.w $a0, $a0, 15, 0
; LA32-NEXT: srl.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: lshr_i16:
; LA64: # %bb.0:
; LA64-NEXT: bstrpick.d $a0, $a0, 15, 0
; LA64-NEXT: srl.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%lshr = lshr i16 %x, %y
ret i16 %lshr
}
Expand All @@ -51,12 +52,12 @@ define i32 @lshr_i32(i32 %x, i32 %y) {
; LA32-LABEL: lshr_i32:
; LA32: # %bb.0:
; LA32-NEXT: srl.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: lshr_i32:
; LA64: # %bb.0:
; LA64-NEXT: srl.w $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%lshr = lshr i32 %x, %y
ret i32 %lshr
}
Expand All @@ -78,24 +79,24 @@ define i64 @lshr_i64(i64 %x, i64 %y) {
; LA32-NEXT: srl.w $a1, $a1, $a2
; LA32-NEXT: srai.w $a2, $a3, 31
; LA32-NEXT: and $a1, $a2, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: lshr_i64:
; LA64: # %bb.0:
; LA64-NEXT: srl.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%lshr = lshr i64 %x, %y
ret i64 %lshr
}

define i1 @lshr_i1_3(i1 %x) {
; LA32-LABEL: lshr_i1_3:
; LA32: # %bb.0:
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: lshr_i1_3:
; LA64: # %bb.0:
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%lshr = lshr i1 %x, 3
ret i1 %lshr
}
Expand All @@ -104,12 +105,12 @@ define i8 @lshr_i8_3(i8 %x) {
; LA32-LABEL: lshr_i8_3:
; LA32: # %bb.0:
; LA32-NEXT: bstrpick.w $a0, $a0, 7, 3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: lshr_i8_3:
; LA64: # %bb.0:
; LA64-NEXT: bstrpick.d $a0, $a0, 7, 3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%lshr = lshr i8 %x, 3
ret i8 %lshr
}
Expand All @@ -118,12 +119,12 @@ define i16 @lshr_i16_3(i16 %x) {
; LA32-LABEL: lshr_i16_3:
; LA32: # %bb.0:
; LA32-NEXT: bstrpick.w $a0, $a0, 15, 3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: lshr_i16_3:
; LA64: # %bb.0:
; LA64-NEXT: bstrpick.d $a0, $a0, 15, 3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%lshr = lshr i16 %x, 3
ret i16 %lshr
}
Expand All @@ -132,12 +133,12 @@ define i32 @lshr_i32_3(i32 %x) {
; LA32-LABEL: lshr_i32_3:
; LA32: # %bb.0:
; LA32-NEXT: srli.w $a0, $a0, 3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: lshr_i32_3:
; LA64: # %bb.0:
; LA64-NEXT: bstrpick.d $a0, $a0, 31, 3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%lshr = lshr i32 %x, 3
ret i32 %lshr
}
Expand All @@ -149,12 +150,12 @@ define i64 @lshr_i64_3(i64 %x) {
; LA32-NEXT: slli.w $a2, $a1, 29
; LA32-NEXT: or $a0, $a0, $a2
; LA32-NEXT: srli.w $a1, $a1, 3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: lshr_i64_3:
; LA64: # %bb.0:
; LA64-NEXT: srli.d $a0, $a0, 3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%lshr = lshr i64 %x, 3
ret i64 %lshr
}
52 changes: 26 additions & 26 deletions llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -8,12 +8,12 @@ define i1 @mul_i1(i1 %a, i1 %b) {
; LA32-LABEL: mul_i1:
; LA32: # %bb.0: # %entry
; LA32-NEXT: mul.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mul_i1:
; LA64: # %bb.0: # %entry
; LA64-NEXT: mul.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = mul i1 %a, %b
ret i1 %r
Expand All @@ -23,12 +23,12 @@ define i8 @mul_i8(i8 %a, i8 %b) {
; LA32-LABEL: mul_i8:
; LA32: # %bb.0: # %entry
; LA32-NEXT: mul.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mul_i8:
; LA64: # %bb.0: # %entry
; LA64-NEXT: mul.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = mul i8 %a, %b
ret i8 %r
Expand All @@ -38,12 +38,12 @@ define i16 @mul_i16(i16 %a, i16 %b) {
; LA32-LABEL: mul_i16:
; LA32: # %bb.0: # %entry
; LA32-NEXT: mul.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mul_i16:
; LA64: # %bb.0: # %entry
; LA64-NEXT: mul.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = mul i16 %a, %b
ret i16 %r
Expand All @@ -53,12 +53,12 @@ define i32 @mul_i32(i32 %a, i32 %b) {
; LA32-LABEL: mul_i32:
; LA32: # %bb.0: # %entry
; LA32-NEXT: mul.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mul_i32:
; LA64: # %bb.0: # %entry
; LA64-NEXT: mul.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = mul i32 %a, %b
ret i32 %r
Expand All @@ -73,12 +73,12 @@ define i64 @mul_i64(i64 %a, i64 %b) {
; LA32-NEXT: mul.w $a1, $a1, $a2
; LA32-NEXT: add.w $a1, $a3, $a1
; LA32-NEXT: mul.w $a0, $a0, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mul_i64:
; LA64: # %bb.0: # %entry
; LA64-NEXT: mul.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = mul i64 %a, %b
ret i64 %r
Expand All @@ -91,12 +91,12 @@ define i64 @mul_pow2(i64 %a) {
; LA32-NEXT: srli.w $a2, $a0, 29
; LA32-NEXT: or $a1, $a1, $a2
; LA32-NEXT: slli.w $a0, $a0, 3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mul_pow2:
; LA64: # %bb.0:
; LA64-NEXT: slli.d $a0, $a0, 3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%1 = mul i64 %a, 8
ret i64 %1
}
Expand All @@ -109,13 +109,13 @@ define i64 @mul_p5(i64 %a) {
; LA32-NEXT: mulh.wu $a3, $a0, $a2
; LA32-NEXT: add.w $a1, $a3, $a1
; LA32-NEXT: mul.w $a0, $a0, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mul_p5:
; LA64: # %bb.0:
; LA64-NEXT: ori $a1, $zero, 5
; LA64-NEXT: mul.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%1 = mul i64 %a, 5
ret i64 %1
}
Expand All @@ -124,13 +124,13 @@ define i32 @mulh_w(i32 %a, i32 %b) {
; LA32-LABEL: mulh_w:
; LA32: # %bb.0:
; LA32-NEXT: mulh.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mulh_w:
; LA64: # %bb.0:
; LA64-NEXT: mulw.d.w $a0, $a0, $a1
; LA64-NEXT: srli.d $a0, $a0, 32
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%1 = sext i32 %a to i64
%2 = sext i32 %b to i64
%3 = mul i64 %1, %2
Expand All @@ -143,13 +143,13 @@ define i32 @mulh_wu(i32 %a, i32 %b) {
; LA32-LABEL: mulh_wu:
; LA32: # %bb.0:
; LA32-NEXT: mulh.wu $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mulh_wu:
; LA64: # %bb.0:
; LA64-NEXT: mulw.d.wu $a0, $a0, $a1
; LA64-NEXT: srli.d $a0, $a0, 32
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%1 = zext i32 %a to i64
%2 = zext i32 %b to i64
%3 = mul i64 %1, %2
Expand Down Expand Up @@ -200,12 +200,12 @@ define i64 @mulh_d(i64 %a, i64 %b) {
; LA32-NEXT: add.w $a0, $a4, $a2
; LA32-NEXT: sltu $a2, $a0, $a4
; LA32-NEXT: add.w $a1, $a1, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mulh_d:
; LA64: # %bb.0:
; LA64-NEXT: mulh.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%1 = sext i64 %a to i128
%2 = sext i64 %b to i128
%3 = mul i128 %1, %2
Expand Down Expand Up @@ -236,12 +236,12 @@ define i64 @mulh_du(i64 %a, i64 %b) {
; LA32-NEXT: add.w $a0, $a4, $a0
; LA32-NEXT: sltu $a2, $a0, $a4
; LA32-NEXT: add.w $a1, $a1, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mulh_du:
; LA64: # %bb.0:
; LA64-NEXT: mulh.du $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%1 = zext i64 %a to i128
%2 = zext i64 %b to i128
%3 = mul i128 %1, %2
Expand All @@ -256,12 +256,12 @@ define i64 @mulw_d_w(i32 %a, i32 %b) {
; LA32-NEXT: mul.w $a2, $a0, $a1
; LA32-NEXT: mulh.w $a1, $a0, $a1
; LA32-NEXT: move $a0, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mulw_d_w:
; LA64: # %bb.0:
; LA64-NEXT: mulw.d.w $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%1 = sext i32 %a to i64
%2 = sext i32 %b to i64
%3 = mul i64 %1, %2
Expand All @@ -274,12 +274,12 @@ define i64 @mulw_d_wu(i32 %a, i32 %b) {
; LA32-NEXT: mul.w $a2, $a0, $a1
; LA32-NEXT: mulh.wu $a1, $a0, $a1
; LA32-NEXT: move $a0, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: mulw_d_wu:
; LA64: # %bb.0:
; LA64-NEXT: mulw.d.wu $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%1 = zext i32 %a to i64
%2 = zext i32 %b to i64
%3 = mul i64 %1, %2
Expand Down
69 changes: 35 additions & 34 deletions llvm/test/CodeGen/LoongArch/ir-instruction/or.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -7,12 +8,12 @@ define i1 @or_i1(i1 %a, i1 %b) {
; LA32-LABEL: or_i1:
; LA32: # %bb.0: # %entry
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i1:
; LA64: # %bb.0: # %entry
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i1 %a, %b
ret i1 %r
Expand All @@ -22,12 +23,12 @@ define i8 @or_i8(i8 %a, i8 %b) {
; LA32-LABEL: or_i8:
; LA32: # %bb.0: # %entry
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i8:
; LA64: # %bb.0: # %entry
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i8 %a, %b
ret i8 %r
Expand All @@ -37,12 +38,12 @@ define i16 @or_i16(i16 %a, i16 %b) {
; LA32-LABEL: or_i16:
; LA32: # %bb.0: # %entry
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i16:
; LA64: # %bb.0: # %entry
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i16 %a, %b
ret i16 %r
Expand All @@ -52,12 +53,12 @@ define i32 @or_i32(i32 %a, i32 %b) {
; LA32-LABEL: or_i32:
; LA32: # %bb.0: # %entry
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i32:
; LA64: # %bb.0: # %entry
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i32 %a, %b
ret i32 %r
Expand All @@ -68,12 +69,12 @@ define i64 @or_i64(i64 %a, i64 %b) {
; LA32: # %bb.0: # %entry
; LA32-NEXT: or $a0, $a0, $a2
; LA32-NEXT: or $a1, $a1, $a3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i64:
; LA64: # %bb.0: # %entry
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i64 %a, %b
ret i64 %r
Expand All @@ -82,11 +83,11 @@ entry:
define i1 @or_i1_0(i1 %b) {
; LA32-LABEL: or_i1_0:
; LA32: # %bb.0: # %entry
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i1_0:
; LA64: # %bb.0: # %entry
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i1 4, %b
ret i1 %r
Expand All @@ -96,12 +97,12 @@ define i1 @or_i1_5(i1 %b) {
; LA32-LABEL: or_i1_5:
; LA32: # %bb.0: # %entry
; LA32-NEXT: ori $a0, $zero, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i1_5:
; LA64: # %bb.0: # %entry
; LA64-NEXT: ori $a0, $zero, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i1 5, %b
ret i1 %r
Expand All @@ -111,12 +112,12 @@ define i8 @or_i8_5(i8 %b) {
; LA32-LABEL: or_i8_5:
; LA32: # %bb.0: # %entry
; LA32-NEXT: ori $a0, $a0, 5
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i8_5:
; LA64: # %bb.0: # %entry
; LA64-NEXT: ori $a0, $a0, 5
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i8 5, %b
ret i8 %r
Expand All @@ -126,12 +127,12 @@ define i8 @or_i8_257(i8 %b) {
; LA32-LABEL: or_i8_257:
; LA32: # %bb.0: # %entry
; LA32-NEXT: ori $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i8_257:
; LA64: # %bb.0: # %entry
; LA64-NEXT: ori $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i8 257, %b
ret i8 %r
Expand All @@ -141,12 +142,12 @@ define i16 @or_i16_5(i16 %b) {
; LA32-LABEL: or_i16_5:
; LA32: # %bb.0: # %entry
; LA32-NEXT: ori $a0, $a0, 5
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i16_5:
; LA64: # %bb.0: # %entry
; LA64-NEXT: ori $a0, $a0, 5
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i16 5, %b
ret i16 %r
Expand All @@ -157,13 +158,13 @@ define i16 @or_i16_0x1000(i16 %b) {
; LA32: # %bb.0: # %entry
; LA32-NEXT: lu12i.w $a1, 1
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i16_0x1000:
; LA64: # %bb.0: # %entry
; LA64-NEXT: lu12i.w $a1, 1
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i16 4096, %b
ret i16 %r
Expand All @@ -173,12 +174,12 @@ define i16 @or_i16_0x10001(i16 %b) {
; LA32-LABEL: or_i16_0x10001:
; LA32: # %bb.0: # %entry
; LA32-NEXT: ori $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i16_0x10001:
; LA64: # %bb.0: # %entry
; LA64-NEXT: ori $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i16 65537, %b
ret i16 %r
Expand All @@ -188,12 +189,12 @@ define i32 @or_i32_5(i32 %b) {
; LA32-LABEL: or_i32_5:
; LA32: # %bb.0: # %entry
; LA32-NEXT: ori $a0, $a0, 5
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i32_5:
; LA64: # %bb.0: # %entry
; LA64-NEXT: ori $a0, $a0, 5
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i32 5, %b
ret i32 %r
Expand All @@ -204,13 +205,13 @@ define i32 @or_i32_0x1000(i32 %b) {
; LA32: # %bb.0: # %entry
; LA32-NEXT: lu12i.w $a1, 1
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i32_0x1000:
; LA64: # %bb.0: # %entry
; LA64-NEXT: lu12i.w $a1, 1
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i32 4096, %b
ret i32 %r
Expand All @@ -220,12 +221,12 @@ define i32 @or_i32_0x100000001(i32 %b) {
; LA32-LABEL: or_i32_0x100000001:
; LA32: # %bb.0: # %entry
; LA32-NEXT: ori $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i32_0x100000001:
; LA64: # %bb.0: # %entry
; LA64-NEXT: ori $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i32 4294967297, %b
ret i32 %r
Expand All @@ -235,12 +236,12 @@ define i64 @or_i64_5(i64 %b) {
; LA32-LABEL: or_i64_5:
; LA32: # %bb.0: # %entry
; LA32-NEXT: ori $a0, $a0, 5
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i64_5:
; LA64: # %bb.0: # %entry
; LA64-NEXT: ori $a0, $a0, 5
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i64 5, %b
ret i64 %r
Expand All @@ -251,13 +252,13 @@ define i64 @or_i64_0x1000(i64 %b) {
; LA32: # %bb.0: # %entry
; LA32-NEXT: lu12i.w $a2, 1
; LA32-NEXT: or $a0, $a0, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: or_i64_0x1000:
; LA64: # %bb.0: # %entry
; LA64-NEXT: lu12i.w $a1, 1
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = or i64 4096, %b
ret i64 %r
Expand Down
160 changes: 80 additions & 80 deletions llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
View file

Large diffs are not rendered by default.

5 changes: 3 additions & 2 deletions llvm/test/CodeGen/LoongArch/ir-instruction/select-bare-dbl.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 --mattr=+d < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 --mattr=+d < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -10,14 +11,14 @@ define double @test(i1 %a, double %b, double %c) {
; LA32-NEXT: andi $a0, $a0, 1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: test:
; LA64: # %bb.0:
; LA64-NEXT: andi $a0, $a0, 1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = select i1 %a, double %b, double %c
ret double %res
}
5 changes: 3 additions & 2 deletions llvm/test/CodeGen/LoongArch/ir-instruction/select-bare-flt.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 --mattr=+f,-d < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 --mattr=+f,-d < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -10,14 +11,14 @@ define float @test(i1 %a, float %b, float %c) {
; LA32-NEXT: andi $a0, $a0, 1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: test:
; LA64: # %bb.0:
; LA64-NEXT: andi $a0, $a0, 1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = select i1 %a, float %b, float %c
ret float %res
}
21 changes: 11 additions & 10 deletions llvm/test/CodeGen/LoongArch/ir-instruction/select-bare-int.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -10,15 +11,15 @@ define i1 @bare_select_i1(i1 %a, i1 %b, i1 %c) {
; LA32-NEXT: masknez $a2, $a2, $a0
; LA32-NEXT: maskeqz $a0, $a1, $a0
; LA32-NEXT: or $a0, $a0, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: bare_select_i1:
; LA64: # %bb.0:
; LA64-NEXT: andi $a0, $a0, 1
; LA64-NEXT: masknez $a2, $a2, $a0
; LA64-NEXT: maskeqz $a0, $a1, $a0
; LA64-NEXT: or $a0, $a0, $a2
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = select i1 %a, i1 %b, i1 %c
ret i1 %res
}
Expand All @@ -30,15 +31,15 @@ define i8 @bare_select_i8(i1 %a, i8 %b, i8 %c) {
; LA32-NEXT: masknez $a2, $a2, $a0
; LA32-NEXT: maskeqz $a0, $a1, $a0
; LA32-NEXT: or $a0, $a0, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: bare_select_i8:
; LA64: # %bb.0:
; LA64-NEXT: andi $a0, $a0, 1
; LA64-NEXT: masknez $a2, $a2, $a0
; LA64-NEXT: maskeqz $a0, $a1, $a0
; LA64-NEXT: or $a0, $a0, $a2
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = select i1 %a, i8 %b, i8 %c
ret i8 %res
}
Expand All @@ -50,15 +51,15 @@ define i16 @bare_select_i16(i1 %a, i16 %b, i16 %c) {
; LA32-NEXT: masknez $a2, $a2, $a0
; LA32-NEXT: maskeqz $a0, $a1, $a0
; LA32-NEXT: or $a0, $a0, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: bare_select_i16:
; LA64: # %bb.0:
; LA64-NEXT: andi $a0, $a0, 1
; LA64-NEXT: masknez $a2, $a2, $a0
; LA64-NEXT: maskeqz $a0, $a1, $a0
; LA64-NEXT: or $a0, $a0, $a2
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = select i1 %a, i16 %b, i16 %c
ret i16 %res
}
Expand All @@ -70,15 +71,15 @@ define i32 @bare_select_i32(i1 %a, i32 %b, i32 %c) {
; LA32-NEXT: masknez $a2, $a2, $a0
; LA32-NEXT: maskeqz $a0, $a1, $a0
; LA32-NEXT: or $a0, $a0, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: bare_select_i32:
; LA64: # %bb.0:
; LA64-NEXT: andi $a0, $a0, 1
; LA64-NEXT: masknez $a2, $a2, $a0
; LA64-NEXT: maskeqz $a0, $a1, $a0
; LA64-NEXT: or $a0, $a0, $a2
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = select i1 %a, i32 %b, i32 %c
ret i32 %res
}
Expand All @@ -93,15 +94,15 @@ define i64 @bare_select_i64(i1 %a, i64 %b, i64 %c) {
; LA32-NEXT: masknez $a1, $a4, $a5
; LA32-NEXT: maskeqz $a2, $a2, $a5
; LA32-NEXT: or $a1, $a2, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: bare_select_i64:
; LA64: # %bb.0:
; LA64-NEXT: andi $a0, $a0, 1
; LA64-NEXT: masknez $a2, $a2, $a0
; LA64-NEXT: maskeqz $a0, $a1, $a0
; LA64-NEXT: or $a0, $a0, $a2
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%res = select i1 %a, i64 %b, i64 %c
ret i64 %res
}
65 changes: 33 additions & 32 deletions llvm/test/CodeGen/LoongArch/ir-instruction/select-fpcc-dbl.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 --mattr=+d < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 --mattr=+d < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -7,12 +8,12 @@ define double @fcmp_false(double %a, double %b, double %x, double %y) {
; LA32-LABEL: fcmp_false:
; LA32: # %bb.0:
; LA32-NEXT: fmov.d $fa0, $fa3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_false:
; LA64: # %bb.0:
; LA64-NEXT: fmov.d $fa0, $fa3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp false double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -23,13 +24,13 @@ define double @fcmp_oeq(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.ceq.d $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_oeq:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.ceq.d $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp oeq double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -40,13 +41,13 @@ define double @fcmp_ogt(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.clt.d $fcc0, $fa1, $fa0
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ogt:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.clt.d $fcc0, $fa1, $fa0
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ogt double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -57,13 +58,13 @@ define double @fcmp_oge(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cle.d $fcc0, $fa1, $fa0
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_oge:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cle.d $fcc0, $fa1, $fa0
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp oge double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -74,13 +75,13 @@ define double @fcmp_olt(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.clt.d $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_olt:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.clt.d $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp olt double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -91,13 +92,13 @@ define double @fcmp_ole(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cle.d $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ole:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cle.d $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ole double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -108,13 +109,13 @@ define double @fcmp_one(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cne.d $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_one:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cne.d $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp one double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -125,13 +126,13 @@ define double @fcmp_ord(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cor.d $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ord:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cor.d $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ord double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -142,13 +143,13 @@ define double @fcmp_ueq(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cueq.d $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ueq:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cueq.d $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ueq double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -159,13 +160,13 @@ define double @fcmp_ugt(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cult.d $fcc0, $fa1, $fa0
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ugt:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cult.d $fcc0, $fa1, $fa0
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ugt double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -176,13 +177,13 @@ define double @fcmp_uge(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cule.d $fcc0, $fa1, $fa0
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_uge:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cule.d $fcc0, $fa1, $fa0
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp uge double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -193,13 +194,13 @@ define double @fcmp_ult(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cult.d $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ult:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cult.d $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ult double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -210,13 +211,13 @@ define double @fcmp_ule(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cule.d $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ule:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cule.d $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ule double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -227,13 +228,13 @@ define double @fcmp_une(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cune.d $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_une:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cune.d $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp une double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -244,13 +245,13 @@ define double @fcmp_uno(double %a, double %b, double %x, double %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cun.d $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_uno:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cun.d $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp uno double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand All @@ -260,12 +261,12 @@ define double @fcmp_true(double %a, double %b, double %x, double %y) {
; LA32-LABEL: fcmp_true:
; LA32: # %bb.0:
; LA32-NEXT: fmov.d $fa0, $fa2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_true:
; LA64: # %bb.0:
; LA64-NEXT: fmov.d $fa0, $fa2
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp true double %a, %b
%res = select i1 %cmp, double %x, double %y
ret double %res
Expand Down
65 changes: 33 additions & 32 deletions llvm/test/CodeGen/LoongArch/ir-instruction/select-fpcc-flt.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 --mattr=+f,-d < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 --mattr=+f,-d < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -7,12 +8,12 @@ define float @fcmp_false(float %a, float %b, float %x, float %y) {
; LA32-LABEL: fcmp_false:
; LA32: # %bb.0:
; LA32-NEXT: fmov.s $fa0, $fa3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_false:
; LA64: # %bb.0:
; LA64-NEXT: fmov.s $fa0, $fa3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp false float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -23,13 +24,13 @@ define float @fcmp_oeq(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_oeq:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.ceq.s $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp oeq float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -40,13 +41,13 @@ define float @fcmp_ogt(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.clt.s $fcc0, $fa1, $fa0
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ogt:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.clt.s $fcc0, $fa1, $fa0
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ogt float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -57,13 +58,13 @@ define float @fcmp_oge(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cle.s $fcc0, $fa1, $fa0
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_oge:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cle.s $fcc0, $fa1, $fa0
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp oge float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -74,13 +75,13 @@ define float @fcmp_olt(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.clt.s $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_olt:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.clt.s $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp olt float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -91,13 +92,13 @@ define float @fcmp_ole(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cle.s $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ole:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cle.s $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ole float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -108,13 +109,13 @@ define float @fcmp_one(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cne.s $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_one:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cne.s $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp one float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -125,13 +126,13 @@ define float @fcmp_ord(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cor.s $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ord:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cor.s $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ord float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -142,13 +143,13 @@ define float @fcmp_ueq(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cueq.s $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ueq:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cueq.s $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ueq float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -159,13 +160,13 @@ define float @fcmp_ugt(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cult.s $fcc0, $fa1, $fa0
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ugt:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cult.s $fcc0, $fa1, $fa0
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ugt float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -176,13 +177,13 @@ define float @fcmp_uge(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cule.s $fcc0, $fa1, $fa0
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_uge:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cule.s $fcc0, $fa1, $fa0
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp uge float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -193,13 +194,13 @@ define float @fcmp_ult(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cult.s $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ult:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cult.s $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ult float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -210,13 +211,13 @@ define float @fcmp_ule(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cule.s $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_ule:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cule.s $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp ule float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -227,13 +228,13 @@ define float @fcmp_une(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cune.s $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_une:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cune.s $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp une float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -244,13 +245,13 @@ define float @fcmp_uno(float %a, float %b, float %x, float %y) {
; LA32: # %bb.0:
; LA32-NEXT: fcmp.cun.s $fcc0, $fa0, $fa1
; LA32-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_uno:
; LA64: # %bb.0:
; LA64-NEXT: fcmp.cun.s $fcc0, $fa0, $fa1
; LA64-NEXT: fsel $fa0, $fa3, $fa2, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp uno float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand All @@ -260,12 +261,12 @@ define float @fcmp_true(float %a, float %b, float %x, float %y) {
; LA32-LABEL: fcmp_true:
; LA32: # %bb.0:
; LA32-NEXT: fmov.s $fa0, $fa2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: fcmp_true:
; LA64: # %bb.0:
; LA64-NEXT: fmov.s $fa0, $fa2
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cmp = fcmp true float %a, %b
%res = select i1 %cmp, float %x, float %y
ret float %res
Expand Down
129 changes: 65 additions & 64 deletions llvm/test/CodeGen/LoongArch/ir-instruction/select-fpcc-int.ll
View file

Large diffs are not rendered by default.

41 changes: 21 additions & 20 deletions llvm/test/CodeGen/LoongArch/ir-instruction/select-icc-dbl.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 --mattr=+d < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 --mattr=+d < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -10,15 +11,15 @@ define double @select_eq(i32 signext %a, i32 signext %b, double %x, double %y) {
; LA32-NEXT: sltui $a0, $a0, 1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_eq:
; LA64: # %bb.0:
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: sltui $a0, $a0, 1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp eq i32 %a, %b
%res = select i1 %cond, double %x, double %y
ret double %res
Expand All @@ -31,15 +32,15 @@ define double @select_ne(i32 signext %a, i32 signext %b, double %x, double %y) {
; LA32-NEXT: sltu $a0, $zero, $a0
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_ne:
; LA64: # %bb.0:
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: sltu $a0, $zero, $a0
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp ne i32 %a, %b
%res = select i1 %cond, double %x, double %y
ret double %res
Expand All @@ -51,14 +52,14 @@ define double @select_ugt(i32 signext %a, i32 signext %b, double %x, double %y)
; LA32-NEXT: sltu $a0, $a1, $a0
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_ugt:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a1, $a0
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp ugt i32 %a, %b
%res = select i1 %cond, double %x, double %y
ret double %res
Expand All @@ -71,15 +72,15 @@ define double @select_uge(i32 signext %a, i32 signext %b, double %x, double %y)
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_uge:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a0, $a1
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp uge i32 %a, %b
%res = select i1 %cond, double %x, double %y
ret double %res
Expand All @@ -91,14 +92,14 @@ define double @select_ult(i32 signext %a, i32 signext %b, double %x, double %y)
; LA32-NEXT: sltu $a0, $a0, $a1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_ult:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a0, $a1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp ult i32 %a, %b
%res = select i1 %cond, double %x, double %y
ret double %res
Expand All @@ -111,15 +112,15 @@ define double @select_ule(i32 signext %a, i32 signext %b, double %x, double %y)
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_ule:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a1, $a0
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp ule i32 %a, %b
%res = select i1 %cond, double %x, double %y
ret double %res
Expand All @@ -131,14 +132,14 @@ define double @select_sgt(i32 signext %a, i32 signext %b, double %x, double %y)
; LA32-NEXT: slt $a0, $a1, $a0
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_sgt:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a1, $a0
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp sgt i32 %a, %b
%res = select i1 %cond, double %x, double %y
ret double %res
Expand All @@ -151,15 +152,15 @@ define double @select_sge(i32 signext %a, i32 signext %b, double %x, double %y)
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_sge:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a0, $a1
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp sge i32 %a, %b
%res = select i1 %cond, double %x, double %y
ret double %res
Expand All @@ -171,14 +172,14 @@ define double @select_slt(i32 signext %a, i32 signext %b, double %x, double %y)
; LA32-NEXT: slt $a0, $a0, $a1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_slt:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a0, $a1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp slt i32 %a, %b
%res = select i1 %cond, double %x, double %y
ret double %res
Expand All @@ -191,15 +192,15 @@ define double @select_sle(i32 signext %a, i32 signext %b, double %x, double %y)
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_sle:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a1, $a0
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp sle i32 %a, %b
%res = select i1 %cond, double %x, double %y
ret double %res
Expand Down
41 changes: 21 additions & 20 deletions llvm/test/CodeGen/LoongArch/ir-instruction/select-icc-flt.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 --mattr=+f,-d < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 --mattr=+f,-d < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -10,15 +11,15 @@ define float @select_eq(i32 signext %a, i32 signext %b, float %x, float %y) {
; LA32-NEXT: sltui $a0, $a0, 1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_eq:
; LA64: # %bb.0:
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: sltui $a0, $a0, 1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp eq i32 %a, %b
%res = select i1 %cond, float %x, float %y
ret float %res
Expand All @@ -31,15 +32,15 @@ define float @select_ne(i32 signext %a, i32 signext %b, float %x, float %y) {
; LA32-NEXT: sltu $a0, $zero, $a0
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_ne:
; LA64: # %bb.0:
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: sltu $a0, $zero, $a0
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp ne i32 %a, %b
%res = select i1 %cond, float %x, float %y
ret float %res
Expand All @@ -51,14 +52,14 @@ define float @select_ugt(i32 signext %a, i32 signext %b, float %x, float %y) {
; LA32-NEXT: sltu $a0, $a1, $a0
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_ugt:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a1, $a0
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp ugt i32 %a, %b
%res = select i1 %cond, float %x, float %y
ret float %res
Expand All @@ -71,15 +72,15 @@ define float @select_uge(i32 signext %a, i32 signext %b, float %x, float %y) {
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_uge:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a0, $a1
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp uge i32 %a, %b
%res = select i1 %cond, float %x, float %y
ret float %res
Expand All @@ -91,14 +92,14 @@ define float @select_ult(i32 signext %a, i32 signext %b, float %x, float %y) {
; LA32-NEXT: sltu $a0, $a0, $a1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_ult:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a0, $a1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp ult i32 %a, %b
%res = select i1 %cond, float %x, float %y
ret float %res
Expand All @@ -111,15 +112,15 @@ define float @select_ule(i32 signext %a, i32 signext %b, float %x, float %y) {
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_ule:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a1, $a0
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp ule i32 %a, %b
%res = select i1 %cond, float %x, float %y
ret float %res
Expand All @@ -131,14 +132,14 @@ define float @select_sgt(i32 signext %a, i32 signext %b, float %x, float %y) {
; LA32-NEXT: slt $a0, $a1, $a0
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_sgt:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a1, $a0
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp sgt i32 %a, %b
%res = select i1 %cond, float %x, float %y
ret float %res
Expand All @@ -151,15 +152,15 @@ define float @select_sge(i32 signext %a, i32 signext %b, float %x, float %y) {
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_sge:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a0, $a1
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp sge i32 %a, %b
%res = select i1 %cond, float %x, float %y
ret float %res
Expand All @@ -171,14 +172,14 @@ define float @select_slt(i32 signext %a, i32 signext %b, float %x, float %y) {
; LA32-NEXT: slt $a0, $a0, $a1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_slt:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a0, $a1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp slt i32 %a, %b
%res = select i1 %cond, float %x, float %y
ret float %res
Expand All @@ -191,15 +192,15 @@ define float @select_sle(i32 signext %a, i32 signext %b, float %x, float %y) {
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: movgr2cf $fcc0, $a0
; LA32-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_sle:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a1, $a0
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: movgr2cf $fcc0, $a0
; LA64-NEXT: fsel $fa0, $fa1, $fa0, $fcc0
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp sle i32 %a, %b
%res = select i1 %cond, float %x, float %y
ret float %res
Expand Down
41 changes: 21 additions & 20 deletions llvm/test/CodeGen/LoongArch/ir-instruction/select-icc-int.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -11,7 +12,7 @@ define i32 @select_eq(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA32-NEXT: masknez $a1, $a3, $a0
; LA32-NEXT: maskeqz $a0, $a2, $a0
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_eq:
; LA64: # %bb.0:
Expand All @@ -20,7 +21,7 @@ define i32 @select_eq(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA64-NEXT: masknez $a1, $a3, $a0
; LA64-NEXT: maskeqz $a0, $a2, $a0
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp eq i32 %a, %b
%res = select i1 %cond, i32 %x, i32 %y
ret i32 %res
Expand All @@ -34,7 +35,7 @@ define i32 @select_ne(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA32-NEXT: masknez $a1, $a3, $a0
; LA32-NEXT: maskeqz $a0, $a2, $a0
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_ne:
; LA64: # %bb.0:
Expand All @@ -43,7 +44,7 @@ define i32 @select_ne(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA64-NEXT: masknez $a1, $a3, $a0
; LA64-NEXT: maskeqz $a0, $a2, $a0
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp ne i32 %a, %b
%res = select i1 %cond, i32 %x, i32 %y
ret i32 %res
Expand All @@ -56,15 +57,15 @@ define i32 @select_ugt(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA32-NEXT: masknez $a1, $a3, $a0
; LA32-NEXT: maskeqz $a0, $a2, $a0
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_ugt:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a1, $a0
; LA64-NEXT: masknez $a1, $a3, $a0
; LA64-NEXT: maskeqz $a0, $a2, $a0
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp ugt i32 %a, %b
%res = select i1 %cond, i32 %x, i32 %y
ret i32 %res
Expand All @@ -78,7 +79,7 @@ define i32 @select_uge(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA32-NEXT: masknez $a1, $a3, $a0
; LA32-NEXT: maskeqz $a0, $a2, $a0
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_uge:
; LA64: # %bb.0:
Expand All @@ -87,7 +88,7 @@ define i32 @select_uge(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA64-NEXT: masknez $a1, $a3, $a0
; LA64-NEXT: maskeqz $a0, $a2, $a0
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp uge i32 %a, %b
%res = select i1 %cond, i32 %x, i32 %y
ret i32 %res
Expand All @@ -100,15 +101,15 @@ define i32 @select_ult(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA32-NEXT: masknez $a1, $a3, $a0
; LA32-NEXT: maskeqz $a0, $a2, $a0
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_ult:
; LA64: # %bb.0:
; LA64-NEXT: sltu $a0, $a0, $a1
; LA64-NEXT: masknez $a1, $a3, $a0
; LA64-NEXT: maskeqz $a0, $a2, $a0
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp ult i32 %a, %b
%res = select i1 %cond, i32 %x, i32 %y
ret i32 %res
Expand All @@ -122,7 +123,7 @@ define i32 @select_ule(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA32-NEXT: masknez $a1, $a3, $a0
; LA32-NEXT: maskeqz $a0, $a2, $a0
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_ule:
; LA64: # %bb.0:
Expand All @@ -131,7 +132,7 @@ define i32 @select_ule(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA64-NEXT: masknez $a1, $a3, $a0
; LA64-NEXT: maskeqz $a0, $a2, $a0
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp ule i32 %a, %b
%res = select i1 %cond, i32 %x, i32 %y
ret i32 %res
Expand All @@ -144,15 +145,15 @@ define i32 @select_sgt(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA32-NEXT: masknez $a1, $a3, $a0
; LA32-NEXT: maskeqz $a0, $a2, $a0
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_sgt:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a1, $a0
; LA64-NEXT: masknez $a1, $a3, $a0
; LA64-NEXT: maskeqz $a0, $a2, $a0
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp sgt i32 %a, %b
%res = select i1 %cond, i32 %x, i32 %y
ret i32 %res
Expand All @@ -166,7 +167,7 @@ define i32 @select_sge(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA32-NEXT: masknez $a1, $a3, $a0
; LA32-NEXT: maskeqz $a0, $a2, $a0
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_sge:
; LA64: # %bb.0:
Expand All @@ -175,7 +176,7 @@ define i32 @select_sge(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA64-NEXT: masknez $a1, $a3, $a0
; LA64-NEXT: maskeqz $a0, $a2, $a0
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp sge i32 %a, %b
%res = select i1 %cond, i32 %x, i32 %y
ret i32 %res
Expand All @@ -188,15 +189,15 @@ define i32 @select_slt(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA32-NEXT: masknez $a1, $a3, $a0
; LA32-NEXT: maskeqz $a0, $a2, $a0
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_slt:
; LA64: # %bb.0:
; LA64-NEXT: slt $a0, $a0, $a1
; LA64-NEXT: masknez $a1, $a3, $a0
; LA64-NEXT: maskeqz $a0, $a2, $a0
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp slt i32 %a, %b
%res = select i1 %cond, i32 %x, i32 %y
ret i32 %res
Expand All @@ -210,7 +211,7 @@ define i32 @select_sle(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA32-NEXT: masknez $a1, $a3, $a0
; LA32-NEXT: maskeqz $a0, $a2, $a0
; LA32-NEXT: or $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: select_sle:
; LA64: # %bb.0:
Expand All @@ -219,7 +220,7 @@ define i32 @select_sle(i32 signext %a, i32 signext %b, i32 %x, i32 %y) {
; LA64-NEXT: masknez $a1, $a3, $a0
; LA64-NEXT: maskeqz $a0, $a2, $a0
; LA64-NEXT: or $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%cond = icmp sle i32 %a, %b
%res = select i1 %cond, i32 %x, i32 %y
ret i32 %res
Expand Down
121 changes: 61 additions & 60 deletions llvm/test/CodeGen/LoongArch/ir-instruction/sext-zext-trunc.ll
View file

Large diffs are not rendered by default.

41 changes: 21 additions & 20 deletions llvm/test/CodeGen/LoongArch/ir-instruction/shl.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -6,11 +7,11 @@
define i1 @shl_i1(i1 %x, i1 %y) {
; LA32-LABEL: shl_i1:
; LA32: # %bb.0:
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: shl_i1:
; LA64: # %bb.0:
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%shl = shl i1 %x, %y
ret i1 %shl
}
Expand All @@ -19,12 +20,12 @@ define i8 @shl_i8(i8 %x, i8 %y) {
; LA32-LABEL: shl_i8:
; LA32: # %bb.0:
; LA32-NEXT: sll.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: shl_i8:
; LA64: # %bb.0:
; LA64-NEXT: sll.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%shl = shl i8 %x, %y
ret i8 %shl
}
Expand All @@ -33,12 +34,12 @@ define i16 @shl_i16(i16 %x, i16 %y) {
; LA32-LABEL: shl_i16:
; LA32: # %bb.0:
; LA32-NEXT: sll.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: shl_i16:
; LA64: # %bb.0:
; LA64-NEXT: sll.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%shl = shl i16 %x, %y
ret i16 %shl
}
Expand All @@ -47,12 +48,12 @@ define i32 @shl_i32(i32 %x, i32 %y) {
; LA32-LABEL: shl_i32:
; LA32: # %bb.0:
; LA32-NEXT: sll.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: shl_i32:
; LA64: # %bb.0:
; LA64-NEXT: sll.w $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%shl = shl i32 %x, %y
ret i32 %shl
}
Expand All @@ -74,24 +75,24 @@ define i64 @shl_i64(i64 %x, i64 %y) {
; LA32-NEXT: sll.w $a0, $a0, $a2
; LA32-NEXT: srai.w $a2, $a3, 31
; LA32-NEXT: and $a0, $a2, $a0
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: shl_i64:
; LA64: # %bb.0:
; LA64-NEXT: sll.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%shl = shl i64 %x, %y
ret i64 %shl
}

define i1 @shl_i1_3(i1 %x) {
; LA32-LABEL: shl_i1_3:
; LA32: # %bb.0:
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: shl_i1_3:
; LA64: # %bb.0:
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%shl = shl i1 %x, 3
ret i1 %shl
}
Expand All @@ -100,12 +101,12 @@ define i8 @shl_i8_3(i8 %x) {
; LA32-LABEL: shl_i8_3:
; LA32: # %bb.0:
; LA32-NEXT: slli.w $a0, $a0, 3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: shl_i8_3:
; LA64: # %bb.0:
; LA64-NEXT: slli.d $a0, $a0, 3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%shl = shl i8 %x, 3
ret i8 %shl
}
Expand All @@ -114,12 +115,12 @@ define i16 @shl_i16_3(i16 %x) {
; LA32-LABEL: shl_i16_3:
; LA32: # %bb.0:
; LA32-NEXT: slli.w $a0, $a0, 3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: shl_i16_3:
; LA64: # %bb.0:
; LA64-NEXT: slli.d $a0, $a0, 3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%shl = shl i16 %x, 3
ret i16 %shl
}
Expand All @@ -128,12 +129,12 @@ define i32 @shl_i32_3(i32 %x) {
; LA32-LABEL: shl_i32_3:
; LA32: # %bb.0:
; LA32-NEXT: slli.w $a0, $a0, 3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: shl_i32_3:
; LA64: # %bb.0:
; LA64-NEXT: slli.d $a0, $a0, 3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%shl = shl i32 %x, 3
ret i32 %shl
}
Expand All @@ -145,12 +146,12 @@ define i64 @shl_i64_3(i64 %x) {
; LA32-NEXT: srli.w $a2, $a0, 29
; LA32-NEXT: or $a1, $a1, $a2
; LA32-NEXT: slli.w $a0, $a0, 3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: shl_i64_3:
; LA64: # %bb.0:
; LA64-NEXT: slli.d $a0, $a0, 3
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%shl = shl i64 %x, 3
ret i64 %shl
}
25 changes: 13 additions & 12 deletions llvm/test/CodeGen/LoongArch/ir-instruction/sub.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -7,12 +8,12 @@ define i1 @sub_i1(i1 %x, i1 %y) {
; LA32-LABEL: sub_i1:
; LA32: # %bb.0:
; LA32-NEXT: sub.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: sub_i1:
; LA64: # %bb.0:
; LA64-NEXT: sub.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%sub = sub i1 %x, %y
ret i1 %sub
}
Expand All @@ -21,12 +22,12 @@ define i8 @sub_i8(i8 %x, i8 %y) {
; LA32-LABEL: sub_i8:
; LA32: # %bb.0:
; LA32-NEXT: sub.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: sub_i8:
; LA64: # %bb.0:
; LA64-NEXT: sub.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%sub = sub i8 %x, %y
ret i8 %sub
}
Expand All @@ -35,12 +36,12 @@ define i16 @sub_i16(i16 %x, i16 %y) {
; LA32-LABEL: sub_i16:
; LA32: # %bb.0:
; LA32-NEXT: sub.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: sub_i16:
; LA64: # %bb.0:
; LA64-NEXT: sub.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%sub = sub i16 %x, %y
ret i16 %sub
}
Expand All @@ -49,12 +50,12 @@ define i32 @sub_i32(i32 %x, i32 %y) {
; LA32-LABEL: sub_i32:
; LA32: # %bb.0:
; LA32-NEXT: sub.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: sub_i32:
; LA64: # %bb.0:
; LA64-NEXT: sub.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%sub = sub i32 %x, %y
ret i32 %sub
}
Expand All @@ -65,12 +66,12 @@ define signext i32 @sub_i32_sext(i32 %x, i32 %y) {
; LA32-LABEL: sub_i32_sext:
; LA32: # %bb.0:
; LA32-NEXT: sub.w $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: sub_i32_sext:
; LA64: # %bb.0:
; LA64-NEXT: sub.w $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%sub = sub i32 %x, %y
ret i32 %sub
}
Expand All @@ -82,12 +83,12 @@ define i64 @sub_i64(i64 %x, i64 %y) {
; LA32-NEXT: sltu $a3, $a0, $a2
; LA32-NEXT: sub.w $a1, $a1, $a3
; LA32-NEXT: sub.w $a0, $a0, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: sub_i64:
; LA64: # %bb.0:
; LA64-NEXT: sub.d $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
%sub = sub i64 %x, %y
ret i64 %sub
}
69 changes: 35 additions & 34 deletions llvm/test/CodeGen/LoongArch/ir-instruction/xor.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64

Expand All @@ -7,12 +8,12 @@ define i1 @xor_i1(i1 %a, i1 %b) {
; LA32-LABEL: xor_i1:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xor $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i1:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i1 %a, %b
ret i1 %r
Expand All @@ -22,12 +23,12 @@ define i8 @xor_i8(i8 %a, i8 %b) {
; LA32-LABEL: xor_i8:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xor $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i8:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i8 %a, %b
ret i8 %r
Expand All @@ -37,12 +38,12 @@ define i16 @xor_i16(i16 %a, i16 %b) {
; LA32-LABEL: xor_i16:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xor $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i16:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i16 %a, %b
ret i16 %r
Expand All @@ -52,12 +53,12 @@ define i32 @xor_i32(i32 %a, i32 %b) {
; LA32-LABEL: xor_i32:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xor $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i32:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i32 %a, %b
ret i32 %r
Expand All @@ -68,12 +69,12 @@ define i64 @xor_i64(i64 %a, i64 %b) {
; LA32: # %bb.0: # %entry
; LA32-NEXT: xor $a0, $a0, $a2
; LA32-NEXT: xor $a1, $a1, $a3
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i64:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i64 %a, %b
ret i64 %r
Expand All @@ -82,11 +83,11 @@ entry:
define i1 @xor_i1_0(i1 %b) {
; LA32-LABEL: xor_i1_0:
; LA32: # %bb.0: # %entry
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i1_0:
; LA64: # %bb.0: # %entry
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i1 4, %b
ret i1 %r
Expand All @@ -96,12 +97,12 @@ define i1 @xor_i1_5(i1 %b) {
; LA32-LABEL: xor_i1_5:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i1_5:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i1 5, %b
ret i1 %r
Expand All @@ -111,12 +112,12 @@ define i8 @xor_i8_5(i8 %b) {
; LA32-LABEL: xor_i8_5:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xori $a0, $a0, 5
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i8_5:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xori $a0, $a0, 5
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i8 5, %b
ret i8 %r
Expand All @@ -126,12 +127,12 @@ define i8 @xor_i8_257(i8 %b) {
; LA32-LABEL: xor_i8_257:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i8_257:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i8 257, %b
ret i8 %r
Expand All @@ -141,12 +142,12 @@ define i16 @xor_i16_5(i16 %b) {
; LA32-LABEL: xor_i16_5:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xori $a0, $a0, 5
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i16_5:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xori $a0, $a0, 5
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i16 5, %b
ret i16 %r
Expand All @@ -157,13 +158,13 @@ define i16 @xor_i16_0x1000(i16 %b) {
; LA32: # %bb.0: # %entry
; LA32-NEXT: lu12i.w $a1, 1
; LA32-NEXT: xor $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i16_0x1000:
; LA64: # %bb.0: # %entry
; LA64-NEXT: lu12i.w $a1, 1
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i16 4096, %b
ret i16 %r
Expand All @@ -173,12 +174,12 @@ define i16 @xor_i16_0x10001(i16 %b) {
; LA32-LABEL: xor_i16_0x10001:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i16_0x10001:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i16 65537, %b
ret i16 %r
Expand All @@ -188,12 +189,12 @@ define i32 @xor_i32_5(i32 %b) {
; LA32-LABEL: xor_i32_5:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xori $a0, $a0, 5
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i32_5:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xori $a0, $a0, 5
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i32 5, %b
ret i32 %r
Expand All @@ -204,13 +205,13 @@ define i32 @xor_i32_0x1000(i32 %b) {
; LA32: # %bb.0: # %entry
; LA32-NEXT: lu12i.w $a1, 1
; LA32-NEXT: xor $a0, $a0, $a1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i32_0x1000:
; LA64: # %bb.0: # %entry
; LA64-NEXT: lu12i.w $a1, 1
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i32 4096, %b
ret i32 %r
Expand All @@ -220,12 +221,12 @@ define i32 @xor_i32_0x100000001(i32 %b) {
; LA32-LABEL: xor_i32_0x100000001:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xori $a0, $a0, 1
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i32_0x100000001:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xori $a0, $a0, 1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i32 4294967297, %b
ret i32 %r
Expand All @@ -235,12 +236,12 @@ define i64 @xor_i64_5(i64 %b) {
; LA32-LABEL: xor_i64_5:
; LA32: # %bb.0: # %entry
; LA32-NEXT: xori $a0, $a0, 5
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i64_5:
; LA64: # %bb.0: # %entry
; LA64-NEXT: xori $a0, $a0, 5
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i64 5, %b
ret i64 %r
Expand All @@ -251,13 +252,13 @@ define i64 @xor_i64_0x1000(i64 %b) {
; LA32: # %bb.0: # %entry
; LA32-NEXT: lu12i.w $a2, 1
; LA32-NEXT: xor $a0, $a0, $a2
; LA32-NEXT: jirl $zero, $ra, 0
; LA32-NEXT: ret
;
; LA64-LABEL: xor_i64_0x1000:
; LA64: # %bb.0: # %entry
; LA64-NEXT: lu12i.w $a1, 1
; LA64-NEXT: xor $a0, $a0, $a1
; LA64-NEXT: jirl $zero, $ra, 0
; LA64-NEXT: ret
entry:
%r = xor i64 4096, %b
ret i64 %r
Expand Down
Loading