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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

vpdpbusd %zmm16, %zmm17, %zmm19
vpdpbusd (%rax), %zmm17, %zmm19
vpdpbusd (%rax){1to16}, %zmm17, %zmm19
vpdpbusd %zmm16, %zmm17, %zmm19 {k1}
vpdpbusd (%rax), %zmm17, %zmm19 {k1}
vpdpbusd (%rax){1to16}, %zmm17, %zmm19 {k1}
vpdpbusd %zmm16, %zmm17, %zmm19 {z}{k1}
vpdpbusd (%rax), %zmm17, %zmm19 {z}{k1}
vpdpbusd (%rax){1to16}, %zmm17, %zmm19 {z}{k1}

vpdpbusds %zmm16, %zmm17, %zmm19
vpdpbusds (%rax), %zmm17, %zmm19
vpdpbusds (%rax){1to16}, %zmm17, %zmm19
vpdpbusds %zmm16, %zmm17, %zmm19 {k1}
vpdpbusds (%rax), %zmm17, %zmm19 {k1}
vpdpbusds (%rax){1to16}, %zmm17, %zmm19 {k1}
vpdpbusds %zmm16, %zmm17, %zmm19 {z}{k1}
vpdpbusds (%rax), %zmm17, %zmm19 {z}{k1}
vpdpbusds (%rax){1to16}, %zmm17, %zmm19 {z}{k1}

vpdpwssd %zmm16, %zmm17, %zmm19
vpdpwssd (%rax), %zmm17, %zmm19
vpdpwssd (%rax){1to16}, %zmm17, %zmm19
vpdpwssd %zmm16, %zmm17, %zmm19 {k1}
vpdpwssd (%rax), %zmm17, %zmm19 {k1}
vpdpwssd (%rax){1to16}, %zmm17, %zmm19 {k1}
vpdpwssd %zmm16, %zmm17, %zmm19 {z}{k1}
vpdpwssd (%rax), %zmm17, %zmm19 {z}{k1}
vpdpwssd (%rax){1to16}, %zmm17, %zmm19 {z}{k1}

vpdpwssds %zmm16, %zmm17, %zmm19
vpdpwssds (%rax), %zmm17, %zmm19
vpdpwssds (%rax){1to16}, %zmm17, %zmm19
vpdpwssds %zmm16, %zmm17, %zmm19 {k1}
vpdpwssds (%rax), %zmm17, %zmm19 {k1}
vpdpwssds (%rax){1to16}, %zmm17, %zmm19 {k1}
vpdpwssds %zmm16, %zmm17, %zmm19 {z}{k1}
vpdpwssds (%rax), %zmm17, %zmm19 {z}{k1}
vpdpwssds (%rax){1to16}, %zmm17, %zmm19 {z}{k1}

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 5 1.00 vpdpbusd %zmm16, %zmm17, %zmm19
# CHECK-NEXT: 2 13 1.00 * vpdpbusd (%rax), %zmm17, %zmm19
# CHECK-NEXT: 2 13 1.00 * vpdpbusd (%rax){1to16}, %zmm17, %zmm19
# CHECK-NEXT: 1 5 1.00 vpdpbusd %zmm16, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 2 13 1.00 * vpdpbusd (%rax), %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 2 13 1.00 * vpdpbusd (%rax){1to16}, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1 5 1.00 vpdpbusd %zmm16, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 2 13 1.00 * vpdpbusd (%rax), %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 2 13 1.00 * vpdpbusd (%rax){1to16}, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1 5 1.00 vpdpbusds %zmm16, %zmm17, %zmm19
# CHECK-NEXT: 2 13 1.00 * vpdpbusds (%rax), %zmm17, %zmm19
# CHECK-NEXT: 2 13 1.00 * vpdpbusds (%rax){1to16}, %zmm17, %zmm19
# CHECK-NEXT: 1 5 1.00 vpdpbusds %zmm16, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 2 13 1.00 * vpdpbusds (%rax), %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 2 13 1.00 * vpdpbusds (%rax){1to16}, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1 5 1.00 vpdpbusds %zmm16, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 2 13 1.00 * vpdpbusds (%rax), %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 2 13 1.00 * vpdpbusds (%rax){1to16}, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1 5 1.00 vpdpwssd %zmm16, %zmm17, %zmm19
# CHECK-NEXT: 2 13 1.00 * vpdpwssd (%rax), %zmm17, %zmm19
# CHECK-NEXT: 2 13 1.00 * vpdpwssd (%rax){1to16}, %zmm17, %zmm19
# CHECK-NEXT: 1 5 1.00 vpdpwssd %zmm16, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 2 13 1.00 * vpdpwssd (%rax), %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 2 13 1.00 * vpdpwssd (%rax){1to16}, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1 5 1.00 vpdpwssd %zmm16, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 2 13 1.00 * vpdpwssd (%rax), %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 2 13 1.00 * vpdpwssd (%rax){1to16}, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1 5 1.00 vpdpwssds %zmm16, %zmm17, %zmm19
# CHECK-NEXT: 2 13 1.00 * vpdpwssds (%rax), %zmm17, %zmm19
# CHECK-NEXT: 2 13 1.00 * vpdpwssds (%rax){1to16}, %zmm17, %zmm19
# CHECK-NEXT: 1 5 1.00 vpdpwssds %zmm16, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 2 13 1.00 * vpdpwssds (%rax), %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 2 13 1.00 * vpdpwssds (%rax){1to16}, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1 5 1.00 vpdpwssds %zmm16, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 2 13 1.00 * vpdpwssds (%rax), %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 2 13 1.00 * vpdpwssds (%rax){1to16}, %zmm17, %zmm19 {%k1} {z}

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 36.00 - 8.00 8.00 - - - - - - - 8.00 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: 1.00 - - - - - - - - - - - - vpdpbusd %zmm16, %zmm17, %zmm19
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpbusd (%rax), %zmm17, %zmm19
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpbusd (%rax){1to16}, %zmm17, %zmm19
# CHECK-NEXT: 1.00 - - - - - - - - - - - - vpdpbusd %zmm16, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpbusd (%rax), %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpbusd (%rax){1to16}, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1.00 - - - - - - - - - - - - vpdpbusd %zmm16, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpbusd (%rax), %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpbusd (%rax){1to16}, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1.00 - - - - - - - - - - - - vpdpbusds %zmm16, %zmm17, %zmm19
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpbusds (%rax), %zmm17, %zmm19
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpbusds (%rax){1to16}, %zmm17, %zmm19
# CHECK-NEXT: 1.00 - - - - - - - - - - - - vpdpbusds %zmm16, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpbusds (%rax), %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpbusds (%rax){1to16}, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1.00 - - - - - - - - - - - - vpdpbusds %zmm16, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpbusds (%rax), %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpbusds (%rax){1to16}, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1.00 - - - - - - - - - - - - vpdpwssd %zmm16, %zmm17, %zmm19
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpwssd (%rax), %zmm17, %zmm19
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpwssd (%rax){1to16}, %zmm17, %zmm19
# CHECK-NEXT: 1.00 - - - - - - - - - - - - vpdpwssd %zmm16, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpwssd (%rax), %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpwssd (%rax){1to16}, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1.00 - - - - - - - - - - - - vpdpwssd %zmm16, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpwssd (%rax), %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpwssd (%rax){1to16}, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1.00 - - - - - - - - - - - - vpdpwssds %zmm16, %zmm17, %zmm19
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpwssds (%rax), %zmm17, %zmm19
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpwssds (%rax){1to16}, %zmm17, %zmm19
# CHECK-NEXT: 1.00 - - - - - - - - - - - - vpdpwssds %zmm16, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpwssds (%rax), %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpwssds (%rax){1to16}, %zmm17, %zmm19 {%k1}
# CHECK-NEXT: 1.00 - - - - - - - - - - - - vpdpwssds %zmm16, %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpwssds (%rax), %zmm17, %zmm19 {%k1} {z}
# CHECK-NEXT: 1.00 - 0.33 0.33 - - - - - - - 0.33 - vpdpwssds (%rax){1to16}, %zmm17, %zmm19 {%k1} {z}
258 changes: 258 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vnnivl.s
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53 changes: 53 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vp2intersect.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=tigerlake -instruction-tables < %s | FileCheck %s

vp2intersectd %zmm16, %zmm19, %k0
vp2intersectd (%rax), %zmm19, %k0
vp2intersectd (%rax){1to16}, %zmm19, %k0

vp2intersectq %zmm16, %zmm19, %k0
vp2intersectq (%rax), %zmm19, %k0
vp2intersectq (%rax){1to8}, %zmm19, %k0

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 1 1.00 vp2intersectd %zmm16, %zmm19, %k0
# CHECK-NEXT: 2 8 1.00 * vp2intersectd (%rax), %zmm19, %k0
# CHECK-NEXT: 2 8 1.00 * vp2intersectd (%rax){1to16}, %zmm19, %k0
# CHECK-NEXT: 1 1 1.00 vp2intersectq %zmm16, %zmm19, %k0
# CHECK-NEXT: 2 8 1.00 * vp2intersectq (%rax), %zmm19, %k0
# CHECK-NEXT: 2 8 1.00 * vp2intersectq (%rax){1to8}, %zmm19, %k0

# CHECK: Resources:
# CHECK-NEXT: [0] - ICXDivider
# CHECK-NEXT: [1] - ICXFPDivider
# CHECK-NEXT: [2] - ICXPort0
# CHECK-NEXT: [3] - ICXPort1
# CHECK-NEXT: [4] - ICXPort2
# CHECK-NEXT: [5] - ICXPort3
# CHECK-NEXT: [6] - ICXPort4
# CHECK-NEXT: [7] - ICXPort5
# CHECK-NEXT: [8] - ICXPort6
# CHECK-NEXT: [9] - ICXPort7
# CHECK-NEXT: [10] - ICXPort8
# CHECK-NEXT: [11] - ICXPort9

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
# CHECK-NEXT: - - 6.00 - 2.00 2.00 - - - - - -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions:
# CHECK-NEXT: - - 1.00 - - - - - - - - - vp2intersectd %zmm16, %zmm19, %k0
# CHECK-NEXT: - - 1.00 - 0.50 0.50 - - - - - - vp2intersectd (%rax), %zmm19, %k0
# CHECK-NEXT: - - 1.00 - 0.50 0.50 - - - - - - vp2intersectd (%rax){1to16}, %zmm19, %k0
# CHECK-NEXT: - - 1.00 - - - - - - - - - vp2intersectq %zmm16, %zmm19, %k0
# CHECK-NEXT: - - 1.00 - 0.50 0.50 - - - - - - vp2intersectq (%rax), %zmm19, %k0
# CHECK-NEXT: - - 1.00 - 0.50 0.50 - - - - - - vp2intersectq (%rax){1to8}, %zmm19, %k0
73 changes: 73 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vp2intersectvl.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=tigerlake -instruction-tables < %s | FileCheck %s

vp2intersectd %xmm16, %xmm19, %k0
vp2intersectd (%rax), %xmm19, %k0
vp2intersectd (%rax){1to4}, %xmm19, %k0

vp2intersectd %ymm16, %ymm19, %k0
vp2intersectd (%rax), %ymm19, %k0
vp2intersectd (%rax){1to8}, %ymm19, %k0

vp2intersectq %xmm16, %xmm19, %k0
vp2intersectq (%rax), %xmm19, %k0
vp2intersectq (%rax){1to2}, %xmm19, %k0

vp2intersectq %ymm16, %ymm19, %k0
vp2intersectq (%rax), %ymm19, %k0
vp2intersectq (%rax){1to4}, %ymm19, %k0

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 1 0.50 vp2intersectd %xmm16, %xmm19, %k0
# CHECK-NEXT: 2 7 0.50 * vp2intersectd (%rax), %xmm19, %k0
# CHECK-NEXT: 2 7 0.50 * vp2intersectd (%rax){1to4}, %xmm19, %k0
# CHECK-NEXT: 1 1 0.50 vp2intersectd %ymm16, %ymm19, %k0
# CHECK-NEXT: 2 8 0.50 * vp2intersectd (%rax), %ymm19, %k0
# CHECK-NEXT: 2 8 0.50 * vp2intersectd (%rax){1to8}, %ymm19, %k0
# CHECK-NEXT: 1 1 0.50 vp2intersectq %xmm16, %xmm19, %k0
# CHECK-NEXT: 2 7 0.50 * vp2intersectq (%rax), %xmm19, %k0
# CHECK-NEXT: 2 7 0.50 * vp2intersectq (%rax){1to2}, %xmm19, %k0
# CHECK-NEXT: 1 1 0.50 vp2intersectq %ymm16, %ymm19, %k0
# CHECK-NEXT: 2 8 0.50 * vp2intersectq (%rax), %ymm19, %k0
# CHECK-NEXT: 2 8 0.50 * vp2intersectq (%rax){1to4}, %ymm19, %k0

# CHECK: Resources:
# CHECK-NEXT: [0] - ICXDivider
# CHECK-NEXT: [1] - ICXFPDivider
# CHECK-NEXT: [2] - ICXPort0
# CHECK-NEXT: [3] - ICXPort1
# CHECK-NEXT: [4] - ICXPort2
# CHECK-NEXT: [5] - ICXPort3
# CHECK-NEXT: [6] - ICXPort4
# CHECK-NEXT: [7] - ICXPort5
# CHECK-NEXT: [8] - ICXPort6
# CHECK-NEXT: [9] - ICXPort7
# CHECK-NEXT: [10] - ICXPort8
# CHECK-NEXT: [11] - ICXPort9

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
# CHECK-NEXT: - - 6.00 6.00 4.00 4.00 - - - - - -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions:
# CHECK-NEXT: - - 0.50 0.50 - - - - - - - - vp2intersectd %xmm16, %xmm19, %k0
# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - - - - - - vp2intersectd (%rax), %xmm19, %k0
# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - - - - - - vp2intersectd (%rax){1to4}, %xmm19, %k0
# CHECK-NEXT: - - 0.50 0.50 - - - - - - - - vp2intersectd %ymm16, %ymm19, %k0
# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - - - - - - vp2intersectd (%rax), %ymm19, %k0
# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - - - - - - vp2intersectd (%rax){1to8}, %ymm19, %k0
# CHECK-NEXT: - - 0.50 0.50 - - - - - - - - vp2intersectq %xmm16, %xmm19, %k0
# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - - - - - - vp2intersectq (%rax), %xmm19, %k0
# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - - - - - - vp2intersectq (%rax){1to2}, %xmm19, %k0
# CHECK-NEXT: - - 0.50 0.50 - - - - - - - - vp2intersectq %ymm16, %ymm19, %k0
# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - - - - - - vp2intersectq (%rax), %ymm19, %k0
# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - - - - - - vp2intersectq (%rax){1to4}, %ymm19, %k0
41 changes: 41 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vpclmulqdq.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

vpclmulqdq $11, %zmm16, %zmm17, %zmm19
vpclmulqdq $11, (%rax), %zmm17, %zmm19

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 3 1.00 vpclmulqdq $11, %zmm16, %zmm17, %zmm19
# CHECK-NEXT: 2 11 1.00 * vpclmulqdq $11, (%rax), %zmm17, %zmm19

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: - - 0.33 0.33 - 2.00 - - - - - 0.33 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpclmulqdq $11, %zmm16, %zmm17, %zmm19
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpclmulqdq $11, (%rax), %zmm17, %zmm19
48 changes: 48 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vpclmulqdqvl.s
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@@ -0,0 +1,48 @@
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

vpclmulqdq $11, %xmm16, %xmm17, %xmm19
vpclmulqdq $11, (%rax), %xmm17, %xmm19

vpclmulqdq $11, %ymm16, %ymm17, %ymm19
vpclmulqdq $11, (%rax), %ymm17, %ymm19

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 3 1.00 vpclmulqdq $11, %xmm16, %xmm17, %xmm19
# CHECK-NEXT: 2 10 1.00 * vpclmulqdq $11, (%rax), %xmm17, %xmm19
# CHECK-NEXT: 1 3 1.00 vpclmulqdq $11, %ymm16, %ymm17, %ymm19
# CHECK-NEXT: 2 11 1.00 * vpclmulqdq $11, (%rax), %ymm17, %ymm19

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: - - 0.67 0.67 - 4.00 - - - - - 0.67 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpclmulqdq $11, %xmm16, %xmm17, %xmm19
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpclmulqdq $11, (%rax), %xmm17, %xmm19
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpclmulqdq $11, %ymm16, %ymm17, %ymm19
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpclmulqdq $11, (%rax), %ymm17, %ymm19
94 changes: 94 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vpopcntdq.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

vpopcntd %zmm1, %zmm0
vpopcntd (%rdi), %zmm0
vpopcntd (%rdi){1to16}, %zmm0

vpopcntd %zmm1, %zmm0 {%k1}
vpopcntd (%rdi), %zmm0 {%k1}
vpopcntd (%rdi){1to16}, %zmm0 {%k1}

vpopcntd %zmm1, %zmm0 {%k1} {z}
vpopcntd (%rdi), %zmm0 {%k1} {z}
vpopcntd (%rdi){1to16}, %zmm0 {%k1} {z}

vpopcntq %zmm1, %zmm0
vpopcntq (%rdi), %zmm0
vpopcntq (%rdi){1to8}, %zmm0

vpopcntq %zmm1, %zmm0 {%k1}
vpopcntq (%rdi), %zmm0 {%k1}
vpopcntq (%rdi){1to8}, %zmm0 {%k1}

vpopcntq %zmm1, %zmm0 {%k1} {z}
vpopcntq (%rdi), %zmm0 {%k1} {z}
vpopcntq (%rdi){1to8}, %zmm0 {%k1} {z}

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 3 1.00 vpopcntd %zmm1, %zmm0
# CHECK-NEXT: 2 11 1.00 * vpopcntd (%rdi), %zmm0
# CHECK-NEXT: 2 11 1.00 * vpopcntd (%rdi){1to16}, %zmm0
# CHECK-NEXT: 1 3 1.00 vpopcntd %zmm1, %zmm0 {%k1}
# CHECK-NEXT: 2 11 1.00 * vpopcntd (%rdi), %zmm0 {%k1}
# CHECK-NEXT: 2 11 1.00 * vpopcntd (%rdi){1to16}, %zmm0 {%k1}
# CHECK-NEXT: 1 3 1.00 vpopcntd %zmm1, %zmm0 {%k1} {z}
# CHECK-NEXT: 2 11 1.00 * vpopcntd (%rdi), %zmm0 {%k1} {z}
# CHECK-NEXT: 2 11 1.00 * vpopcntd (%rdi){1to16}, %zmm0 {%k1} {z}
# CHECK-NEXT: 1 3 1.00 vpopcntq %zmm1, %zmm0
# CHECK-NEXT: 2 11 1.00 * vpopcntq (%rdi), %zmm0
# CHECK-NEXT: 2 11 1.00 * vpopcntq (%rdi){1to8}, %zmm0
# CHECK-NEXT: 1 3 1.00 vpopcntq %zmm1, %zmm0 {%k1}
# CHECK-NEXT: 2 11 1.00 * vpopcntq (%rdi), %zmm0 {%k1}
# CHECK-NEXT: 2 11 1.00 * vpopcntq (%rdi){1to8}, %zmm0 {%k1}
# CHECK-NEXT: 1 3 1.00 vpopcntq %zmm1, %zmm0 {%k1} {z}
# CHECK-NEXT: 2 11 1.00 * vpopcntq (%rdi), %zmm0 {%k1} {z}
# CHECK-NEXT: 2 11 1.00 * vpopcntq (%rdi){1to8}, %zmm0 {%k1} {z}

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: - - 4.00 4.00 - 18.00 - - - - - 4.00 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntd %zmm1, %zmm0
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi), %zmm0
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi){1to16}, %zmm0
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntd %zmm1, %zmm0 {%k1}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi), %zmm0 {%k1}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi){1to16}, %zmm0 {%k1}
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntd %zmm1, %zmm0 {%k1} {z}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi), %zmm0 {%k1} {z}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi){1to16}, %zmm0 {%k1} {z}
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntq %zmm1, %zmm0
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi), %zmm0
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi){1to8}, %zmm0
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntq %zmm1, %zmm0 {%k1}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi), %zmm0 {%k1}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi){1to8}, %zmm0 {%k1}
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntq %zmm1, %zmm0 {%k1} {z}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi), %zmm0 {%k1} {z}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi){1to8}, %zmm0 {%k1} {z}
154 changes: 154 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avx512vpopcntdqvl.s
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@@ -0,0 +1,154 @@
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

vpopcntd %xmm1, %xmm0
vpopcntd (%rdi), %xmm0
vpopcntd (%rdi){1to4}, %xmm0

vpopcntd %xmm1, %xmm0 {%k1}
vpopcntd (%rdi), %xmm0 {%k1}
vpopcntd (%rdi){1to4}, %xmm0 {%k1}

vpopcntd %xmm1, %xmm0 {%k1} {z}
vpopcntd (%rdi), %xmm0 {%k1} {z}
vpopcntd (%rdi){1to4}, %xmm0 {%k1} {z}

vpopcntd %ymm1, %ymm0
vpopcntd (%rdi), %ymm0
vpopcntd (%rdi){1to8}, %ymm0

vpopcntd %ymm1, %ymm0 {%k1}
vpopcntd (%rdi), %ymm0 {%k1}
vpopcntd (%rdi){1to8}, %ymm0 {%k1}

vpopcntd %ymm1, %ymm0 {%k1} {z}
vpopcntd (%rdi), %ymm0 {%k1} {z}
vpopcntd (%rdi){1to8}, %ymm0 {%k1} {z}

vpopcntq %xmm1, %xmm0
vpopcntq (%rdi), %xmm0
vpopcntq (%rdi){1to2}, %xmm0

vpopcntq %xmm1, %xmm0 {%k1}
vpopcntq (%rdi), %xmm0 {%k1}
vpopcntq (%rdi){1to2}, %xmm0 {%k1}

vpopcntq %xmm1, %xmm0 {%k1} {z}
vpopcntq (%rdi), %xmm0 {%k1} {z}
vpopcntq (%rdi){1to2}, %xmm0 {%k1} {z}

vpopcntq %ymm1, %ymm0
vpopcntq (%rdi), %ymm0
vpopcntq (%rdi){1to4}, %ymm0

vpopcntq %ymm1, %ymm0 {%k1}
vpopcntq (%rdi), %ymm0 {%k1}
vpopcntq (%rdi){1to4}, %ymm0 {%k1}

vpopcntq %ymm1, %ymm0 {%k1} {z}
vpopcntq (%rdi), %ymm0 {%k1} {z}
vpopcntq (%rdi){1to4}, %ymm0 {%k1} {z}

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 3 1.00 vpopcntd %xmm1, %xmm0
# CHECK-NEXT: 2 10 1.00 * vpopcntd (%rdi), %xmm0
# CHECK-NEXT: 2 10 1.00 * vpopcntd (%rdi){1to4}, %xmm0
# CHECK-NEXT: 1 3 1.00 vpopcntd %xmm1, %xmm0 {%k1}
# CHECK-NEXT: 2 10 1.00 * vpopcntd (%rdi), %xmm0 {%k1}
# CHECK-NEXT: 2 10 1.00 * vpopcntd (%rdi){1to4}, %xmm0 {%k1}
# CHECK-NEXT: 1 3 1.00 vpopcntd %xmm1, %xmm0 {%k1} {z}
# CHECK-NEXT: 2 10 1.00 * vpopcntd (%rdi), %xmm0 {%k1} {z}
# CHECK-NEXT: 2 10 1.00 * vpopcntd (%rdi){1to4}, %xmm0 {%k1} {z}
# CHECK-NEXT: 1 3 1.00 vpopcntd %ymm1, %ymm0
# CHECK-NEXT: 2 11 1.00 * vpopcntd (%rdi), %ymm0
# CHECK-NEXT: 2 11 1.00 * vpopcntd (%rdi){1to8}, %ymm0
# CHECK-NEXT: 1 3 1.00 vpopcntd %ymm1, %ymm0 {%k1}
# CHECK-NEXT: 2 11 1.00 * vpopcntd (%rdi), %ymm0 {%k1}
# CHECK-NEXT: 2 11 1.00 * vpopcntd (%rdi){1to8}, %ymm0 {%k1}
# CHECK-NEXT: 1 3 1.00 vpopcntd %ymm1, %ymm0 {%k1} {z}
# CHECK-NEXT: 2 11 1.00 * vpopcntd (%rdi), %ymm0 {%k1} {z}
# CHECK-NEXT: 2 11 1.00 * vpopcntd (%rdi){1to8}, %ymm0 {%k1} {z}
# CHECK-NEXT: 1 3 1.00 vpopcntq %xmm1, %xmm0
# CHECK-NEXT: 2 10 1.00 * vpopcntq (%rdi), %xmm0
# CHECK-NEXT: 2 10 1.00 * vpopcntq (%rdi){1to2}, %xmm0
# CHECK-NEXT: 1 3 1.00 vpopcntq %xmm1, %xmm0 {%k1}
# CHECK-NEXT: 2 10 1.00 * vpopcntq (%rdi), %xmm0 {%k1}
# CHECK-NEXT: 2 10 1.00 * vpopcntq (%rdi){1to2}, %xmm0 {%k1}
# CHECK-NEXT: 1 3 1.00 vpopcntq %xmm1, %xmm0 {%k1} {z}
# CHECK-NEXT: 2 10 1.00 * vpopcntq (%rdi), %xmm0 {%k1} {z}
# CHECK-NEXT: 2 10 1.00 * vpopcntq (%rdi){1to2}, %xmm0 {%k1} {z}
# CHECK-NEXT: 1 3 1.00 vpopcntq %ymm1, %ymm0
# CHECK-NEXT: 2 11 1.00 * vpopcntq (%rdi), %ymm0
# CHECK-NEXT: 2 11 1.00 * vpopcntq (%rdi){1to4}, %ymm0
# CHECK-NEXT: 1 3 1.00 vpopcntq %ymm1, %ymm0 {%k1}
# CHECK-NEXT: 2 11 1.00 * vpopcntq (%rdi), %ymm0 {%k1}
# CHECK-NEXT: 2 11 1.00 * vpopcntq (%rdi){1to4}, %ymm0 {%k1}
# CHECK-NEXT: 1 3 1.00 vpopcntq %ymm1, %ymm0 {%k1} {z}
# CHECK-NEXT: 2 11 1.00 * vpopcntq (%rdi), %ymm0 {%k1} {z}
# CHECK-NEXT: 2 11 1.00 * vpopcntq (%rdi){1to4}, %ymm0 {%k1} {z}

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: - - 8.00 8.00 - 36.00 - - - - - 8.00 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntd %xmm1, %xmm0
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi), %xmm0
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi){1to4}, %xmm0
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntd %xmm1, %xmm0 {%k1}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi), %xmm0 {%k1}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi){1to4}, %xmm0 {%k1}
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntd %xmm1, %xmm0 {%k1} {z}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi), %xmm0 {%k1} {z}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi){1to4}, %xmm0 {%k1} {z}
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntd %ymm1, %ymm0
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi), %ymm0
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi){1to8}, %ymm0
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntd %ymm1, %ymm0 {%k1}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi), %ymm0 {%k1}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi){1to8}, %ymm0 {%k1}
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntd %ymm1, %ymm0 {%k1} {z}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi), %ymm0 {%k1} {z}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntd (%rdi){1to8}, %ymm0 {%k1} {z}
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntq %xmm1, %xmm0
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi), %xmm0
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi){1to2}, %xmm0
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntq %xmm1, %xmm0 {%k1}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi), %xmm0 {%k1}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi){1to2}, %xmm0 {%k1}
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntq %xmm1, %xmm0 {%k1} {z}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi), %xmm0 {%k1} {z}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi){1to2}, %xmm0 {%k1} {z}
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntq %ymm1, %ymm0
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi), %ymm0
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi){1to4}, %ymm0
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntq %ymm1, %ymm0 {%k1}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi), %ymm0 {%k1}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi){1to4}, %ymm0 {%k1}
# CHECK-NEXT: - - - - - 1.00 - - - - - - - vpopcntq %ymm1, %ymm0 {%k1} {z}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi), %ymm0 {%k1} {z}
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - vpopcntq (%rdi){1to4}, %ymm0 {%k1} {z}
76 changes: 76 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avxgfni.s
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Original file line number Diff line number Diff line change
@@ -0,0 +1,76 @@
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

vgf2p8affineinvqb $0, %xmm0, %xmm1, %xmm2
vgf2p8affineinvqb $0, (%rax), %xmm1, %xmm2

vgf2p8affineinvqb $0, %ymm0, %ymm1, %ymm2
vgf2p8affineinvqb $0, (%rax), %ymm1, %ymm2

vgf2p8affineqb $0, %xmm0, %xmm1, %xmm2
vgf2p8affineqb $0, (%rax), %xmm1, %xmm2

vgf2p8affineqb $0, %ymm0, %ymm1, %ymm2
vgf2p8affineqb $0, (%rax), %ymm1, %ymm2

vgf2p8mulb %xmm0, %xmm1, %xmm2
vgf2p8mulb (%rax), %xmm1, %xmm2

vgf2p8mulb %ymm0, %ymm1, %ymm2
vgf2p8mulb (%rax), %ymm1, %ymm2

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 5 0.50 vgf2p8affineinvqb $0, %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 2 12 0.50 * vgf2p8affineinvqb $0, (%rax), %xmm1, %xmm2
# CHECK-NEXT: 1 5 0.50 vgf2p8affineinvqb $0, %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 2 12 0.50 * vgf2p8affineinvqb $0, (%rax), %ymm1, %ymm2
# CHECK-NEXT: 1 5 0.50 vgf2p8affineqb $0, %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 2 12 0.50 * vgf2p8affineqb $0, (%rax), %xmm1, %xmm2
# CHECK-NEXT: 1 5 0.50 vgf2p8affineqb $0, %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 2 12 0.50 * vgf2p8affineqb $0, (%rax), %ymm1, %ymm2
# CHECK-NEXT: 1 5 0.50 vgf2p8mulb %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 2 12 0.50 * vgf2p8mulb (%rax), %xmm1, %xmm2
# CHECK-NEXT: 1 5 0.50 vgf2p8mulb %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 2 12 0.50 * vgf2p8mulb (%rax), %ymm1, %ymm2

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 6.00 6.00 2.00 2.00 - - - - - - - 2.00 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vgf2p8affineinvqb $0, %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vgf2p8affineinvqb $0, (%rax), %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vgf2p8affineinvqb $0, %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vgf2p8affineinvqb $0, (%rax), %ymm1, %ymm2
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vgf2p8affineqb $0, %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vgf2p8affineqb $0, (%rax), %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vgf2p8affineqb $0, %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vgf2p8affineqb $0, (%rax), %ymm1, %ymm2
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vgf2p8mulb %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vgf2p8mulb (%rax), %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vgf2p8mulb %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vgf2p8mulb (%rax), %ymm1, %ymm2
90 changes: 90 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-avxvnni.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

vpdpbusd %xmm0, %xmm1, %xmm2
vpdpbusd (%rax), %xmm1, %xmm2

vpdpbusd %ymm0, %ymm1, %ymm2
vpdpbusd (%rax), %ymm1, %ymm2

vpdpbusds %xmm0, %xmm1, %xmm2
vpdpbusds (%rax), %xmm1, %xmm2

vpdpbusds %ymm0, %ymm1, %ymm2
vpdpbusds (%rax), %ymm1, %ymm2

vpdpwssd %xmm0, %xmm1, %xmm2
vpdpwssd (%rax), %xmm1, %xmm2

vpdpwssd %ymm0, %ymm1, %ymm2
vpdpwssd (%rax), %ymm1, %ymm2

vpdpwssds %xmm0, %xmm1, %xmm2
vpdpwssds (%rax), %xmm1, %xmm2

vpdpwssds %ymm0, %ymm1, %ymm2
vpdpwssds (%rax), %ymm1, %ymm2

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 5 0.50 vpdpbusd %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 2 13 0.50 * vpdpbusd (%rax), %xmm1, %xmm2
# CHECK-NEXT: 1 5 0.50 vpdpbusd %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 2 13 0.50 * vpdpbusd (%rax), %ymm1, %ymm2
# CHECK-NEXT: 1 5 0.50 vpdpbusds %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 2 13 0.50 * vpdpbusds (%rax), %xmm1, %xmm2
# CHECK-NEXT: 1 5 0.50 vpdpbusds %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 2 13 0.50 * vpdpbusds (%rax), %ymm1, %ymm2
# CHECK-NEXT: 1 5 0.50 vpdpwssd %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 2 13 0.50 * vpdpwssd (%rax), %xmm1, %xmm2
# CHECK-NEXT: 1 5 0.50 vpdpwssd %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 2 13 0.50 * vpdpwssd (%rax), %ymm1, %ymm2
# CHECK-NEXT: 1 5 0.50 vpdpwssds %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 2 13 0.50 * vpdpwssds (%rax), %xmm1, %xmm2
# CHECK-NEXT: 1 5 0.50 vpdpwssds %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 2 13 0.50 * vpdpwssds (%rax), %ymm1, %ymm2

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 8.00 8.00 2.67 2.67 - - - - - - - 2.67 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vpdpbusd %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vpdpbusd (%rax), %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vpdpbusd %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vpdpbusd (%rax), %ymm1, %ymm2
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vpdpbusds %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vpdpbusds (%rax), %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vpdpbusds %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vpdpbusds (%rax), %ymm1, %ymm2
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vpdpwssd %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vpdpwssd (%rax), %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vpdpwssd %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vpdpwssd (%rax), %ymm1, %ymm2
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vpdpwssds %xmm0, %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vpdpwssds (%rax), %xmm1, %xmm2
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - vpdpwssds %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vpdpwssds (%rax), %ymm1, %ymm2
125 changes: 125 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-bmi1.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

andn %eax, %ebx, %ecx
andn (%rax), %ebx, %ecx

andn %rax, %rbx, %rcx
andn (%rax), %rbx, %rcx

bextr %eax, %ebx, %ecx
bextr %eax, (%rbx), %ecx

bextr %rax, %rbx, %rcx
bextr %rax, (%rbx), %rcx

blsi %eax, %ecx
blsi (%rax), %ecx

blsi %rax, %rcx
blsi (%rax), %rcx

blsmsk %eax, %ecx
blsmsk (%rax), %ecx

blsmsk %rax, %rcx
blsmsk (%rax), %rcx

blsr %eax, %ecx
blsr (%rax), %ecx

blsr %rax, %rcx
blsr (%rax), %rcx

tzcnt %ax, %cx
tzcnt (%rax), %cx

tzcnt %eax, %ecx
tzcnt (%rax), %ecx

tzcnt %rax, %rcx
tzcnt (%rax), %rcx

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 2 0.33 andnl %eax, %ebx, %ecx
# CHECK-NEXT: 2 7 0.33 * andnl (%rax), %ebx, %ecx
# CHECK-NEXT: 1 2 0.33 andnq %rax, %rbx, %rcx
# CHECK-NEXT: 2 7 0.33 * andnq (%rax), %rbx, %rcx
# CHECK-NEXT: 2 6 1.00 bextrl %eax, %ebx, %ecx
# CHECK-NEXT: 3 11 1.00 * bextrl %eax, (%rbx), %ecx
# CHECK-NEXT: 2 6 1.00 bextrq %rax, %rbx, %rcx
# CHECK-NEXT: 3 11 1.00 * bextrq %rax, (%rbx), %rcx
# CHECK-NEXT: 1 2 0.33 blsil %eax, %ecx
# CHECK-NEXT: 2 7 0.33 * blsil (%rax), %ecx
# CHECK-NEXT: 1 2 0.33 blsiq %rax, %rcx
# CHECK-NEXT: 2 7 0.33 * blsiq (%rax), %rcx
# CHECK-NEXT: 1 2 0.33 blsmskl %eax, %ecx
# CHECK-NEXT: 2 7 0.33 * blsmskl (%rax), %ecx
# CHECK-NEXT: 1 2 0.33 blsmskq %rax, %rcx
# CHECK-NEXT: 2 7 0.33 * blsmskq (%rax), %rcx
# CHECK-NEXT: 1 2 0.33 blsrl %eax, %ecx
# CHECK-NEXT: 2 7 0.33 * blsrl (%rax), %ecx
# CHECK-NEXT: 1 2 0.33 blsrq %rax, %rcx
# CHECK-NEXT: 2 7 0.33 * blsrq (%rax), %rcx
# CHECK-NEXT: 1 3 1.00 tzcntw %ax, %cx
# CHECK-NEXT: 2 8 1.00 * tzcntw (%rax), %cx
# CHECK-NEXT: 1 3 1.00 tzcntl %eax, %ecx
# CHECK-NEXT: 2 8 1.00 * tzcntl (%rax), %ecx
# CHECK-NEXT: 1 3 1.00 tzcntq %rax, %rcx
# CHECK-NEXT: 2 8 1.00 * tzcntq (%rax), %rcx

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 2.00 15.33 4.33 4.33 - 5.33 2.00 - - - 5.33 4.33 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: - 0.33 - - - 0.33 - - - - 0.33 - - andnl %eax, %ebx, %ecx
# CHECK-NEXT: - 0.33 0.33 0.33 - 0.33 - - - - 0.33 0.33 - andnl (%rax), %ebx, %ecx
# CHECK-NEXT: - 0.33 - - - 0.33 - - - - 0.33 - - andnq %rax, %rbx, %rcx
# CHECK-NEXT: - 0.33 0.33 0.33 - 0.33 - - - - 0.33 0.33 - andnq (%rax), %rbx, %rcx
# CHECK-NEXT: 0.50 1.00 - - - - 0.50 - - - - - - bextrl %eax, %ebx, %ecx
# CHECK-NEXT: 0.50 1.00 0.33 0.33 - - 0.50 - - - - 0.33 - bextrl %eax, (%rbx), %ecx
# CHECK-NEXT: 0.50 1.00 - - - - 0.50 - - - - - - bextrq %rax, %rbx, %rcx
# CHECK-NEXT: 0.50 1.00 0.33 0.33 - - 0.50 - - - - 0.33 - bextrq %rax, (%rbx), %rcx
# CHECK-NEXT: - 0.33 - - - 0.33 - - - - 0.33 - - blsil %eax, %ecx
# CHECK-NEXT: - 0.33 0.33 0.33 - 0.33 - - - - 0.33 0.33 - blsil (%rax), %ecx
# CHECK-NEXT: - 0.33 - - - 0.33 - - - - 0.33 - - blsiq %rax, %rcx
# CHECK-NEXT: - 0.33 0.33 0.33 - 0.33 - - - - 0.33 0.33 - blsiq (%rax), %rcx
# CHECK-NEXT: - 0.33 - - - 0.33 - - - - 0.33 - - blsmskl %eax, %ecx
# CHECK-NEXT: - 0.33 0.33 0.33 - 0.33 - - - - 0.33 0.33 - blsmskl (%rax), %ecx
# CHECK-NEXT: - 0.33 - - - 0.33 - - - - 0.33 - - blsmskq %rax, %rcx
# CHECK-NEXT: - 0.33 0.33 0.33 - 0.33 - - - - 0.33 0.33 - blsmskq (%rax), %rcx
# CHECK-NEXT: - 0.33 - - - 0.33 - - - - 0.33 - - blsrl %eax, %ecx
# CHECK-NEXT: - 0.33 0.33 0.33 - 0.33 - - - - 0.33 0.33 - blsrl (%rax), %ecx
# CHECK-NEXT: - 0.33 - - - 0.33 - - - - 0.33 - - blsrq %rax, %rcx
# CHECK-NEXT: - 0.33 0.33 0.33 - 0.33 - - - - 0.33 0.33 - blsrq (%rax), %rcx
# CHECK-NEXT: - 1.00 - - - - - - - - - - - tzcntw %ax, %cx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - tzcntw (%rax), %cx
# CHECK-NEXT: - 1.00 - - - - - - - - - - - tzcntl %eax, %ecx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - tzcntl (%rax), %ecx
# CHECK-NEXT: - 1.00 - - - - - - - - - - - tzcntq %rax, %rcx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - tzcntq (%rax), %rcx
146 changes: 146 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-bmi2.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

bzhi %eax, %ebx, %ecx
bzhi %eax, (%rbx), %ecx

bzhi %rax, %rbx, %rcx
bzhi %rax, (%rbx), %rcx

mulx %eax, %ebx, %ecx
mulx (%rax), %ebx, %ecx

mulx %rax, %rbx, %rcx
mulx (%rax), %rbx, %rcx

pdep %eax, %ebx, %ecx
pdep (%rax), %ebx, %ecx

pdep %rax, %rbx, %rcx
pdep (%rax), %rbx, %rcx

pext %eax, %ebx, %ecx
pext (%rax), %ebx, %ecx

pext %rax, %rbx, %rcx
pext (%rax), %rbx, %rcx

rorx $1, %eax, %ecx
rorx $1, (%rax), %ecx

rorx $1, %rax, %rcx
rorx $1, (%rax), %rcx

sarx %eax, %ebx, %ecx
sarx %eax, (%rbx), %ecx

sarx %rax, %rbx, %rcx
sarx %rax, (%rbx), %rcx

shlx %eax, %ebx, %ecx
shlx %eax, (%rbx), %ecx

shlx %rax, %rbx, %rcx
shlx %rax, (%rbx), %rcx

shrx %eax, %ebx, %ecx
shrx %eax, (%rbx), %ecx

shrx %rax, %rbx, %rcx
shrx %rax, (%rbx), %rcx

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 3 1.00 bzhil %eax, %ebx, %ecx
# CHECK-NEXT: 2 8 1.00 * bzhil %eax, (%rbx), %ecx
# CHECK-NEXT: 1 3 1.00 bzhiq %rax, %rbx, %rcx
# CHECK-NEXT: 2 8 1.00 * bzhiq %rax, (%rbx), %rcx
# CHECK-NEXT: 3 4 1.00 mulxl %eax, %ebx, %ecx
# CHECK-NEXT: 4 9 1.00 * mulxl (%rax), %ebx, %ecx
# CHECK-NEXT: 2 4 1.00 mulxq %rax, %rbx, %rcx
# CHECK-NEXT: 3 9 1.00 * mulxq (%rax), %rbx, %rcx
# CHECK-NEXT: 1 3 1.00 pdepl %eax, %ebx, %ecx
# CHECK-NEXT: 2 8 1.00 * pdepl (%rax), %ebx, %ecx
# CHECK-NEXT: 1 3 1.00 pdepq %rax, %rbx, %rcx
# CHECK-NEXT: 2 8 1.00 * pdepq (%rax), %rbx, %rcx
# CHECK-NEXT: 1 3 1.00 pextl %eax, %ebx, %ecx
# CHECK-NEXT: 2 8 1.00 * pextl (%rax), %ebx, %ecx
# CHECK-NEXT: 1 3 1.00 pextq %rax, %rbx, %rcx
# CHECK-NEXT: 2 8 1.00 * pextq (%rax), %rbx, %rcx
# CHECK-NEXT: 1 1 0.50 rorxl $1, %eax, %ecx
# CHECK-NEXT: 2 6 0.50 * rorxl $1, (%rax), %ecx
# CHECK-NEXT: 1 1 0.50 rorxq $1, %rax, %rcx
# CHECK-NEXT: 2 6 0.50 * rorxq $1, (%rax), %rcx
# CHECK-NEXT: 1 3 0.50 sarxl %eax, %ebx, %ecx
# CHECK-NEXT: 2 8 0.50 * sarxl %eax, (%rbx), %ecx
# CHECK-NEXT: 1 3 0.50 sarxq %rax, %rbx, %rcx
# CHECK-NEXT: 2 8 0.50 * sarxq %rax, (%rbx), %rcx
# CHECK-NEXT: 1 3 0.50 shlxl %eax, %ebx, %ecx
# CHECK-NEXT: 2 8 0.50 * shlxl %eax, (%rbx), %ecx
# CHECK-NEXT: 1 3 0.50 shlxq %rax, %rbx, %rcx
# CHECK-NEXT: 2 8 0.50 * shlxq %rax, (%rbx), %rcx
# CHECK-NEXT: 1 3 0.50 shrxl %eax, %ebx, %ecx
# CHECK-NEXT: 2 8 0.50 * shrxl %eax, (%rbx), %ecx
# CHECK-NEXT: 1 3 0.50 shrxq %rax, %rbx, %rcx
# CHECK-NEXT: 2 8 0.50 * shrxq %rax, (%rbx), %rcx

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 9.40 16.40 5.33 5.33 - 2.40 9.40 - - - 0.40 5.33 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - - - - - - bzhil %eax, %ebx, %ecx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - bzhil %eax, (%rbx), %ecx
# CHECK-NEXT: - 1.00 - - - - - - - - - - - bzhiq %rax, %rbx, %rcx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - bzhiq %rax, (%rbx), %rcx
# CHECK-NEXT: 0.70 1.20 - - - 0.20 0.70 - - - 0.20 - - mulxl %eax, %ebx, %ecx
# CHECK-NEXT: 0.70 1.20 0.33 0.33 - 0.20 0.70 - - - 0.20 0.33 - mulxl (%rax), %ebx, %ecx
# CHECK-NEXT: - 1.00 - - - 1.00 - - - - - - - mulxq %rax, %rbx, %rcx
# CHECK-NEXT: - 1.00 0.33 0.33 - 1.00 - - - - - 0.33 - mulxq (%rax), %rbx, %rcx
# CHECK-NEXT: - 1.00 - - - - - - - - - - - pdepl %eax, %ebx, %ecx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - pdepl (%rax), %ebx, %ecx
# CHECK-NEXT: - 1.00 - - - - - - - - - - - pdepq %rax, %rbx, %rcx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - pdepq (%rax), %rbx, %rcx
# CHECK-NEXT: - 1.00 - - - - - - - - - - - pextl %eax, %ebx, %ecx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - pextl (%rax), %ebx, %ecx
# CHECK-NEXT: - 1.00 - - - - - - - - - - - pextq %rax, %rbx, %rcx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - pextq (%rax), %rbx, %rcx
# CHECK-NEXT: 0.50 - - - - - 0.50 - - - - - - rorxl $1, %eax, %ecx
# CHECK-NEXT: 0.50 - 0.33 0.33 - - 0.50 - - - - 0.33 - rorxl $1, (%rax), %ecx
# CHECK-NEXT: 0.50 - - - - - 0.50 - - - - - - rorxq $1, %rax, %rcx
# CHECK-NEXT: 0.50 - 0.33 0.33 - - 0.50 - - - - 0.33 - rorxq $1, (%rax), %rcx
# CHECK-NEXT: 0.50 - - - - - 0.50 - - - - - - sarxl %eax, %ebx, %ecx
# CHECK-NEXT: 0.50 - 0.33 0.33 - - 0.50 - - - - 0.33 - sarxl %eax, (%rbx), %ecx
# CHECK-NEXT: 0.50 - - - - - 0.50 - - - - - - sarxq %rax, %rbx, %rcx
# CHECK-NEXT: 0.50 - 0.33 0.33 - - 0.50 - - - - 0.33 - sarxq %rax, (%rbx), %rcx
# CHECK-NEXT: 0.50 - - - - - 0.50 - - - - - - shlxl %eax, %ebx, %ecx
# CHECK-NEXT: 0.50 - 0.33 0.33 - - 0.50 - - - - 0.33 - shlxl %eax, (%rbx), %ecx
# CHECK-NEXT: 0.50 - - - - - 0.50 - - - - - - shlxq %rax, %rbx, %rcx
# CHECK-NEXT: 0.50 - 0.33 0.33 - - 0.50 - - - - 0.33 - shlxq %rax, (%rbx), %rcx
# CHECK-NEXT: 0.50 - - - - - 0.50 - - - - - - shrxl %eax, %ebx, %ecx
# CHECK-NEXT: 0.50 - 0.33 0.33 - - 0.50 - - - - 0.33 - shrxl %eax, (%rbx), %ecx
# CHECK-NEXT: 0.50 - - - - - 0.50 - - - - - - shrxq %rax, %rbx, %rcx
# CHECK-NEXT: 0.50 - 0.33 0.33 - - 0.50 - - - - 0.33 - shrxq %rax, (%rbx), %rcx
38 changes: 38 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-clflushopt.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

clflushopt (%rax)

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 3 2 0.50 * * U clflushopt (%rax)

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 0.20 0.20 - - 0.50 0.20 0.20 0.50 0.50 0.50 0.20 - -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: 0.20 0.20 - - 0.50 0.20 0.20 0.50 0.50 0.50 0.20 - - clflushopt (%rax)
38 changes: 38 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-clwb.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

clwb (%rax)

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 3 5 0.50 * * U clwb (%rax)

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 0.20 0.20 - - 0.50 0.20 0.20 0.50 0.50 0.50 0.20 - -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: 0.20 0.20 - - 0.50 0.20 0.20 0.50 0.50 0.50 0.20 - - clwb (%rax)
328 changes: 328 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-cmov.s
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47 changes: 47 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-cmpxchg.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

cmpxchg8b (%rax)
cmpxchg16b (%rax)
lock cmpxchg8b (%rax)
lock cmpxchg16b (%rax)

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 16 25 3.50 * * cmpxchg8b (%rax)
# CHECK-NEXT: 22 32 4.00 * * cmpxchg16b (%rax)
# CHECK-NEXT: 16 25 3.50 * * lock cmpxchg8b (%rax)
# CHECK-NEXT: 22 32 4.00 * * lock cmpxchg16b (%rax)

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 21.40 10.40 1.33 1.33 2.00 10.40 17.40 2.00 2.00 2.00 4.40 1.33 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: 4.30 2.80 0.33 0.33 0.50 0.80 4.30 0.50 0.50 0.50 0.80 0.33 - cmpxchg8b (%rax)
# CHECK-NEXT: 6.40 2.40 0.33 0.33 0.50 4.40 4.40 0.50 0.50 0.50 1.40 0.33 - cmpxchg16b (%rax)
# CHECK-NEXT: 4.30 2.80 0.33 0.33 0.50 0.80 4.30 0.50 0.50 0.50 0.80 0.33 - lock cmpxchg8b (%rax)
# CHECK-NEXT: 6.40 2.40 0.33 0.33 0.50 4.40 4.40 0.50 0.50 0.50 1.40 0.33 - lock cmpxchg16b (%rax)
62 changes: 62 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-f16c.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

vcvtph2ps %xmm0, %xmm2
vcvtph2ps (%rax), %xmm2

vcvtph2ps %xmm0, %ymm2
vcvtph2ps (%rax), %ymm2

vcvtps2ph $0, %xmm0, %xmm2
vcvtps2ph $0, %xmm0, (%rax)

vcvtps2ph $0, %ymm0, %xmm2
vcvtps2ph $0, %ymm0, (%rax)

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 2 6 1.00 vcvtph2ps %xmm0, %xmm2
# CHECK-NEXT: 2 12 0.50 * vcvtph2ps (%rax), %xmm2
# CHECK-NEXT: 2 8 1.00 vcvtph2ps %xmm0, %ymm2
# CHECK-NEXT: 2 12 0.50 * vcvtph2ps (%rax), %ymm2
# CHECK-NEXT: 2 6 1.00 vcvtps2ph $0, %xmm0, %xmm2
# CHECK-NEXT: 3 12 0.50 * vcvtps2ph $0, %xmm0, (%rax)
# CHECK-NEXT: 2 8 1.00 vcvtps2ph $0, %ymm0, %xmm2
# CHECK-NEXT: 3 12 0.50 * vcvtps2ph $0, %ymm0, (%rax)

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 4.00 4.00 0.67 0.67 1.00 4.00 - 1.00 1.00 1.00 - 0.67 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - vcvtph2ps %xmm0, %xmm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vcvtph2ps (%rax), %xmm2
# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - vcvtph2ps %xmm0, %ymm2
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - vcvtph2ps (%rax), %ymm2
# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - vcvtps2ph $0, %xmm0, %xmm2
# CHECK-NEXT: 0.50 0.50 - - 0.50 - - 0.50 0.50 0.50 - - - vcvtps2ph $0, %xmm0, (%rax)
# CHECK-NEXT: 0.50 0.50 - - - 1.00 - - - - - - - vcvtps2ph $0, %ymm0, %xmm2
# CHECK-NEXT: 0.50 0.50 - - 0.50 - - 0.50 0.50 0.50 - - - vcvtps2ph $0, %ymm0, (%rax)
706 changes: 706 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-fma.s
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62 changes: 62 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-fsgsbase.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

rdfsbase %eax
rdfsbase %rax

rdgsbase %eax
rdgsbase %rax

wrfsbase %edi
wrfsbase %rdi

wrgsbase %edi
wrgsbase %rdi

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 100 0.25 * * U rdfsbasel %eax
# CHECK-NEXT: 1 100 0.25 * * U rdfsbaseq %rax
# CHECK-NEXT: 1 100 0.25 * * U rdgsbasel %eax
# CHECK-NEXT: 1 100 0.25 * * U rdgsbaseq %rax
# CHECK-NEXT: 1 100 0.25 * * U wrfsbasel %edi
# CHECK-NEXT: 1 100 0.25 * * U wrfsbaseq %rdi
# CHECK-NEXT: 1 100 0.25 * * U wrgsbasel %edi
# CHECK-NEXT: 1 100 0.25 * * U wrgsbaseq %rdi

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 2.00 2.00 - - - 2.00 2.00 - - - - - -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: 0.25 0.25 - - - 0.25 0.25 - - - - - - rdfsbasel %eax
# CHECK-NEXT: 0.25 0.25 - - - 0.25 0.25 - - - - - - rdfsbaseq %rax
# CHECK-NEXT: 0.25 0.25 - - - 0.25 0.25 - - - - - - rdgsbasel %eax
# CHECK-NEXT: 0.25 0.25 - - - 0.25 0.25 - - - - - - rdgsbaseq %rax
# CHECK-NEXT: 0.25 0.25 - - - 0.25 0.25 - - - - - - wrfsbasel %edi
# CHECK-NEXT: 0.25 0.25 - - - 0.25 0.25 - - - - - - wrfsbaseq %rdi
# CHECK-NEXT: 0.25 0.25 - - - 0.25 0.25 - - - - - - wrgsbasel %edi
# CHECK-NEXT: 0.25 0.25 - - - 0.25 0.25 - - - - - - wrgsbaseq %rdi
55 changes: 55 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-gfni.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

gf2p8affineinvqb $0, %xmm0, %xmm1
gf2p8affineinvqb $0, (%rax), %xmm1

gf2p8affineqb $0, %xmm0, %xmm1
gf2p8affineqb $0, (%rax), %xmm1

gf2p8mulb %xmm0, %xmm1
gf2p8mulb (%rax), %xmm1

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 5 0.50 gf2p8affineinvqb $0, %xmm0, %xmm1
# CHECK-NEXT: 2 12 0.50 * gf2p8affineinvqb $0, (%rax), %xmm1
# CHECK-NEXT: 1 5 0.50 gf2p8affineqb $0, %xmm0, %xmm1
# CHECK-NEXT: 2 12 0.50 * gf2p8affineqb $0, (%rax), %xmm1
# CHECK-NEXT: 1 5 0.50 gf2p8mulb %xmm0, %xmm1
# CHECK-NEXT: 2 12 0.50 * gf2p8mulb (%rax), %xmm1

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 3.00 3.00 1.00 1.00 - - - - - - - 1.00 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - gf2p8affineinvqb $0, %xmm0, %xmm1
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - gf2p8affineinvqb $0, (%rax), %xmm1
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - gf2p8affineqb $0, %xmm0, %xmm1
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - gf2p8affineqb $0, (%rax), %xmm1
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - gf2p8mulb %xmm0, %xmm1
# CHECK-NEXT: 0.50 0.50 0.33 0.33 - - - - - - - 0.33 - gf2p8mulb (%rax), %xmm1
442 changes: 442 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-lea.s
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55 changes: 55 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-lzcnt.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

lzcntw %cx, %cx
lzcntw (%rax), %cx

lzcntl %eax, %ecx
lzcntl (%rax), %ecx

lzcntq %rax, %rcx
lzcntq (%rax), %rcx

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 3 1.00 lzcntw %cx, %cx
# CHECK-NEXT: 2 8 1.00 * lzcntw (%rax), %cx
# CHECK-NEXT: 1 3 1.00 lzcntl %eax, %ecx
# CHECK-NEXT: 2 8 1.00 * lzcntl (%rax), %ecx
# CHECK-NEXT: 1 3 1.00 lzcntq %rax, %rcx
# CHECK-NEXT: 2 8 1.00 * lzcntq (%rax), %rcx

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: - 6.00 1.00 1.00 - - - - - - - 1.00 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - - - - - - lzcntw %cx, %cx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - lzcntw (%rax), %cx
# CHECK-NEXT: - 1.00 - - - - - - - - - - - lzcntl %eax, %ecx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - lzcntl (%rax), %ecx
# CHECK-NEXT: - 1.00 - - - - - - - - - - - lzcntq %rax, %rcx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - lzcntq (%rax), %rcx
398 changes: 398 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-mmx.s
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55 changes: 55 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-movbe.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

movbe %cx, (%rax)
movbe (%rax), %cx

movbe %ecx, (%rax)
movbe (%rax), %ecx

movbe %rcx, (%rax)
movbe (%rax), %rcx

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 3 12 0.50 * movbew %cx, (%rax)
# CHECK-NEXT: 3 7 0.50 * movbew (%rax), %cx
# CHECK-NEXT: 3 12 1.00 * movbel %ecx, (%rax)
# CHECK-NEXT: 2 6 1.00 * movbel (%rax), %ecx
# CHECK-NEXT: 4 12 1.00 * movbeq %rcx, (%rax)
# CHECK-NEXT: 3 7 1.00 * movbeq (%rax), %rcx

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 2.20 4.20 1.00 1.00 1.50 0.20 2.20 1.50 1.50 1.50 0.20 1.00 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: 0.50 - - - 0.50 - 0.50 0.50 0.50 0.50 - - - movbew %cx, (%rax)
# CHECK-NEXT: 0.70 0.20 0.33 0.33 - 0.20 0.70 - - - 0.20 0.33 - movbew (%rax), %cx
# CHECK-NEXT: - 1.00 - - 0.50 - - 0.50 0.50 0.50 - - - movbel %ecx, (%rax)
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - movbel (%rax), %ecx
# CHECK-NEXT: 0.50 1.00 - - 0.50 - 0.50 0.50 0.50 0.50 - - - movbeq %rcx, (%rax)
# CHECK-NEXT: 0.50 1.00 0.33 0.33 - - 0.50 - - - - 0.33 - movbeq (%rax), %rcx
41 changes: 41 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-pclmul.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

pclmulqdq $11, %xmm0, %xmm2
pclmulqdq $11, (%rax), %xmm2

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 3 1.00 pclmulqdq $11, %xmm0, %xmm2
# CHECK-NEXT: 2 10 1.00 * pclmulqdq $11, (%rax), %xmm2

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: - - 0.33 0.33 - 2.00 - - - - - 0.33 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: - - - - - 1.00 - - - - - - - pclmulqdq $11, %xmm0, %xmm2
# CHECK-NEXT: - - 0.33 0.33 - 1.00 - - - - - 0.33 - pclmulqdq $11, (%rax), %xmm2
55 changes: 55 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-popcnt.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

popcntw %cx, %cx
popcntw (%rax), %cx

popcntl %eax, %ecx
popcntl (%rax), %ecx

popcntq %rax, %rcx
popcntq (%rax), %rcx

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 3 1.00 popcntw %cx, %cx
# CHECK-NEXT: 2 8 1.00 * popcntw (%rax), %cx
# CHECK-NEXT: 1 3 1.00 popcntl %eax, %ecx
# CHECK-NEXT: 2 8 1.00 * popcntl (%rax), %ecx
# CHECK-NEXT: 1 3 1.00 popcntq %rax, %rcx
# CHECK-NEXT: 2 8 1.00 * popcntq (%rax), %rcx

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: - 6.00 1.00 1.00 - - - - - - - 1.00 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - - - - - - popcntw %cx, %cx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - popcntw (%rax), %cx
# CHECK-NEXT: - 1.00 - - - - - - - - - - - popcntl %eax, %ecx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - popcntl (%rax), %ecx
# CHECK-NEXT: - 1.00 - - - - - - - - - - - popcntq %rax, %rcx
# CHECK-NEXT: - 1.00 0.33 0.33 - - - - - - - 0.33 - popcntq (%rax), %rcx
41 changes: 41 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-prefetchw.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

prefetch (%rax)
prefetchw (%rax)

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 5 0.33 * * prefetch (%rax)
# CHECK-NEXT: 1 5 0.33 * * prefetchw (%rax)

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: - - 0.67 0.67 - - - - - - - 0.67 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: - - 0.33 0.33 - - - - - - - 0.33 - prefetch (%rax)
# CHECK-NEXT: - - 0.33 0.33 - - - - - - - 0.33 - prefetchw (%rax)
44 changes: 44 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-rdrand.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

rdrand %ax
rdrand %eax
rdrand %rax

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 25 1386 7.00 U rdrandw %ax
# CHECK-NEXT: 25 100 7.00 U rdrandl %eax
# CHECK-NEXT: 25 100 7.00 U rdrandq %rax

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 17.30 27.30 1.00 1.00 - 14.30 11.30 - - - 1.80 1.00 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: 5.77 9.10 0.33 0.33 - 4.77 3.77 - - - 0.60 0.33 - rdrandw %ax
# CHECK-NEXT: 5.77 9.10 0.33 0.33 - 4.77 3.77 - - - 0.60 0.33 - rdrandl %eax
# CHECK-NEXT: 5.77 9.10 0.33 0.33 - 4.77 3.77 - - - 0.60 0.33 - rdrandq %rax
44 changes: 44 additions & 0 deletions llvm/test/tools/llvm-mca/X86/SapphireRapids/resources-rdseed.s
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -instruction-tables < %s | FileCheck %s

rdseed %ax
rdseed %eax
rdseed %rax

# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)

# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 25 1381 7.00 U rdseedw %ax
# CHECK-NEXT: 25 100 7.00 U rdseedl %eax
# CHECK-NEXT: 25 100 7.00 U rdseedq %rax

# CHECK: Resources:
# CHECK-NEXT: [0] - SPRPort00
# CHECK-NEXT: [1] - SPRPort01
# CHECK-NEXT: [2] - SPRPort02
# CHECK-NEXT: [3] - SPRPort03
# CHECK-NEXT: [4] - SPRPort04
# CHECK-NEXT: [5] - SPRPort05
# CHECK-NEXT: [6] - SPRPort06
# CHECK-NEXT: [7] - SPRPort07
# CHECK-NEXT: [8] - SPRPort08
# CHECK-NEXT: [9] - SPRPort09
# CHECK-NEXT: [10] - SPRPort10
# CHECK-NEXT: [11] - SPRPort11
# CHECK-NEXT: [12] - SPRPortInvalid

# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
# CHECK-NEXT: 19.50 24.00 1.00 1.00 - 18.00 10.50 - - - - 1.00 -

# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
# CHECK-NEXT: 6.50 8.00 0.33 0.33 - 6.00 3.50 - - - - 0.33 - rdseedw %ax
# CHECK-NEXT: 6.50 8.00 0.33 0.33 - 6.00 3.50 - - - - 0.33 - rdseedl %eax
# CHECK-NEXT: 6.50 8.00 0.33 0.33 - 6.00 3.50 - - - - 0.33 - rdseedq %rax
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