90 changes: 0 additions & 90 deletions llvm/test/CodeGen/Hexagon/swp-memrefs-epilog1.ll
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This file was deleted.

22 changes: 6 additions & 16 deletions llvm/test/CodeGen/Mips/cconv/vector.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -2053,12 +2053,10 @@ define <2 x i32> @i32_2(<2 x i32> %a, <2 x i32> %b) {
; MIPS64R5-NEXT: sd $4, 24($sp)
; MIPS64R5-NEXT: ldi.b $w0, 0
; MIPS64R5-NEXT: lw $1, 20($sp)
; MIPS64R5-NEXT: lw $2, 16($sp)
; MIPS64R5-NEXT: move.v $w1, $w0
; MIPS64R5-NEXT: insert.d $w1[0], $2
; MIPS64R5-NEXT: insert.d $w1[0], $5
; MIPS64R5-NEXT: insert.d $w1[1], $1
; MIPS64R5-NEXT: lw $1, 24($sp)
; MIPS64R5-NEXT: insert.d $w0[0], $1
; MIPS64R5-NEXT: insert.d $w0[0], $4
; MIPS64R5-NEXT: lw $1, 28($sp)
; MIPS64R5-NEXT: insert.d $w0[1], $1
; MIPS64R5-NEXT: addv.d $w0, $w0, $w1
Expand Down Expand Up @@ -3533,12 +3531,8 @@ define void @call_i8_2() {
; MIPS32R5EB-NEXT: .cfi_def_cfa_offset 32
; MIPS32R5EB-NEXT: sw $ra, 28($sp) # 4-byte Folded Spill
; MIPS32R5EB-NEXT: .cfi_offset 31, -4
; MIPS32R5EB-NEXT: addiu $1, $zero, 1543
; MIPS32R5EB-NEXT: sh $1, 20($sp)
; MIPS32R5EB-NEXT: addiu $1, $zero, 3080
; MIPS32R5EB-NEXT: sh $1, 24($sp)
; MIPS32R5EB-NEXT: lhu $4, 20($sp)
; MIPS32R5EB-NEXT: lhu $5, 24($sp)
; MIPS32R5EB-NEXT: addiu $4, $zero, 1543
; MIPS32R5EB-NEXT: addiu $5, $zero, 3080
; MIPS32R5EB-NEXT: jal i8_2
; MIPS32R5EB-NEXT: nop
; MIPS32R5EB-NEXT: sw $2, 16($sp)
Expand Down Expand Up @@ -3645,12 +3639,8 @@ define void @call_i8_2() {
; MIPS32R5EL-NEXT: .cfi_def_cfa_offset 32
; MIPS32R5EL-NEXT: sw $ra, 28($sp) # 4-byte Folded Spill
; MIPS32R5EL-NEXT: .cfi_offset 31, -4
; MIPS32R5EL-NEXT: addiu $1, $zero, 1798
; MIPS32R5EL-NEXT: sh $1, 20($sp)
; MIPS32R5EL-NEXT: addiu $1, $zero, 2060
; MIPS32R5EL-NEXT: sh $1, 24($sp)
; MIPS32R5EL-NEXT: lhu $4, 20($sp)
; MIPS32R5EL-NEXT: lhu $5, 24($sp)
; MIPS32R5EL-NEXT: addiu $4, $zero, 1798
; MIPS32R5EL-NEXT: addiu $5, $zero, 2060
; MIPS32R5EL-NEXT: jal i8_2
; MIPS32R5EL-NEXT: nop
; MIPS32R5EL-NEXT: sw $2, 16($sp)
Expand Down
22 changes: 10 additions & 12 deletions llvm/test/CodeGen/Mips/indirect-jump-hazard/jumptables.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -155,11 +155,10 @@ define i8* @_Z3fooi(i32 signext %Letter) {
; MIPS64R2: # %bb.0: # %entry
; MIPS64R2-NEXT: daddiu $sp, $sp, -16
; MIPS64R2-NEXT: .cfi_def_cfa_offset 16
; MIPS64R2-NEXT: sw $4, 4($sp)
; MIPS64R2-NEXT: lwu $2, 4($sp)
; MIPS64R2-NEXT: dext $2, $4, 0, 32
; MIPS64R2-NEXT: sltiu $1, $2, 7
; MIPS64R2-NEXT: beqz $1, .LBB0_3
; MIPS64R2-NEXT: nop
; MIPS64R2-NEXT: sw $4, 4($sp)
; MIPS64R2-NEXT: .LBB0_1: # %entry
; MIPS64R2-NEXT: dsll $1, $2, 3
; MIPS64R2-NEXT: lui $2, %highest(.LJTI0_0)
Expand Down Expand Up @@ -251,10 +250,10 @@ define i8* @_Z3fooi(i32 signext %Letter) {
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: daddiu $sp, $sp, -16
; MIPS64R6-NEXT: .cfi_def_cfa_offset 16
; MIPS64R6-NEXT: sw $4, 4($sp)
; MIPS64R6-NEXT: lwu $2, 4($sp)
; MIPS64R6-NEXT: dext $2, $4, 0, 32
; MIPS64R6-NEXT: sltiu $1, $2, 7
; MIPS64R6-NEXT: beqzc $1, .LBB0_3
; MIPS64R6-NEXT: beqz $1, .LBB0_3
; MIPS64R6-NEXT: sw $4, 4($sp)
; MIPS64R6-NEXT: .LBB0_1: # %entry
; MIPS64R6-NEXT: dsll $1, $2, 3
; MIPS64R6-NEXT: lui $2, %highest(.LJTI0_0)
Expand Down Expand Up @@ -473,11 +472,10 @@ define i8* @_Z3fooi(i32 signext %Letter) {
; PIC-MIPS64R2-NEXT: lui $1, %hi(%neg(%gp_rel(_Z3fooi)))
; PIC-MIPS64R2-NEXT: daddu $1, $1, $25
; PIC-MIPS64R2-NEXT: daddiu $2, $1, %lo(%neg(%gp_rel(_Z3fooi)))
; PIC-MIPS64R2-NEXT: sw $4, 4($sp)
; PIC-MIPS64R2-NEXT: lwu $3, 4($sp)
; PIC-MIPS64R2-NEXT: dext $3, $4, 0, 32
; PIC-MIPS64R2-NEXT: sltiu $1, $3, 7
; PIC-MIPS64R2-NEXT: beqz $1, .LBB0_3
; PIC-MIPS64R2-NEXT: nop
; PIC-MIPS64R2-NEXT: sw $4, 4($sp)
; PIC-MIPS64R2-NEXT: .LBB0_1: # %entry
; PIC-MIPS64R2-NEXT: dsll $1, $3, 3
; PIC-MIPS64R2-NEXT: ld $3, %got_page(.LJTI0_0)($2)
Expand Down Expand Up @@ -537,10 +535,10 @@ define i8* @_Z3fooi(i32 signext %Letter) {
; PIC-MIPS64R6-NEXT: lui $1, %hi(%neg(%gp_rel(_Z3fooi)))
; PIC-MIPS64R6-NEXT: daddu $1, $1, $25
; PIC-MIPS64R6-NEXT: daddiu $2, $1, %lo(%neg(%gp_rel(_Z3fooi)))
; PIC-MIPS64R6-NEXT: sw $4, 4($sp)
; PIC-MIPS64R6-NEXT: lwu $3, 4($sp)
; PIC-MIPS64R6-NEXT: dext $3, $4, 0, 32
; PIC-MIPS64R6-NEXT: sltiu $1, $3, 7
; PIC-MIPS64R6-NEXT: beqzc $1, .LBB0_3
; PIC-MIPS64R6-NEXT: beqz $1, .LBB0_3
; PIC-MIPS64R6-NEXT: sw $4, 4($sp)
; PIC-MIPS64R6-NEXT: .LBB0_1: # %entry
; PIC-MIPS64R6-NEXT: dsll $1, $3, 3
; PIC-MIPS64R6-NEXT: ld $3, %got_page(.LJTI0_0)($2)
Expand Down
8 changes: 5 additions & 3 deletions llvm/test/CodeGen/Mips/o32_cc_byval.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -109,7 +109,8 @@ define void @f2(float %f, %struct.S1* nocapture byval %s1) nounwind {
; CHECK-NEXT: lw $1, 64($sp)
; CHECK-NEXT: lw $2, 68($sp)
; CHECK-NEXT: lh $3, 58($sp)
; CHECK-NEXT: lb $5, 56($sp)
; CHECK-NEXT: sll $5, $6, 24
; CHECK-NEXT: sra $5, $5, 24
; CHECK-NEXT: swc1 $f12, 36($sp)
; CHECK-NEXT: sw $5, 32($sp)
; CHECK-NEXT: sw $3, 28($sp)
Expand Down Expand Up @@ -191,11 +192,12 @@ define void @f4(float %f, %struct.S3* nocapture byval %s3, %struct.S1* nocapture
; CHECK-NEXT: sw $ra, 44($sp) # 4-byte Folded Spill
; CHECK-NEXT: addu $gp, $2, $25
; CHECK-NEXT: move $4, $7
; CHECK-NEXT: sw $5, 52($sp)
; CHECK-NEXT: sw $6, 56($sp)
; CHECK-NEXT: sw $5, 52($sp)
; CHECK-NEXT: sw $7, 60($sp)
; CHECK-NEXT: lw $1, 80($sp)
; CHECK-NEXT: lb $2, 52($sp)
; CHECK-NEXT: sll $2, $5, 24
; CHECK-NEXT: sra $2, $2, 24
; CHECK-NEXT: addiu $3, $zero, 4
; CHECK-NEXT: lui $5, 16576
; CHECK-NEXT: sw $5, 36($sp)
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/Mips/o32_cc_vararg.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -29,10 +29,10 @@ entry:

; CHECK-LABEL: va1:
; CHECK: addiu $sp, $sp, -16
; CHECK: sw $5, 20($sp)
; CHECK: sw $7, 28($sp)
; CHECK: sw $6, 24($sp)
; CHECK: lw $2, 20($sp)
; CHECK: sw $5, 20($sp)
; CHECK: move $2, $5
}

; check whether the variable double argument will be accessed from the 8-byte
Expand Down Expand Up @@ -83,9 +83,9 @@ entry:

; CHECK-LABEL: va3:
; CHECK: addiu $sp, $sp, -16
; CHECK: sw $6, 24($sp)
; CHECK: sw $7, 28($sp)
; CHECK: lw $2, 24($sp)
; CHECK: sw $6, 24($sp)
; CHECK: move $2, $6
}

; double
Expand Down Expand Up @@ -135,7 +135,7 @@ entry:
; CHECK-LABEL: va5:
; CHECK: addiu $sp, $sp, -24
; CHECK: sw $7, 36($sp)
; CHECK: lw $2, 36($sp)
; CHECK: move $2, $7
}

; double
Expand Down
5 changes: 2 additions & 3 deletions llvm/test/CodeGen/PowerPC/addi-offset-fold.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -24,12 +24,11 @@ entry:
ret i32 %bf.cast

; CHECK-LABEL: @foo
; FIXME: We don't need to do these stores/loads at all.
; FIXME: We don't need to do these stores at all.
; CHECK-DAG: std 3, -24(1)
; CHECK-DAG: stb 4, -16(1)
; CHECK-DAG: lbz [[REG1:[0-9]+]], -16(1)
; CHECK-DAG: sldi [[REG3:[0-9]+]], 4, 32
; CHECK-DAG: lwz [[REG2:[0-9]+]], -20(1)
; CHECK-DAG: sldi [[REG3:[0-9]+]], [[REG1]], 32
; CHECK-DAG: or [[REG4:[0-9]+]], [[REG2]], [[REG3]]
; CHECK: rldicl 3, [[REG4]], 33, 57
; CHECK: blr
Expand Down
3 changes: 1 addition & 2 deletions llvm/test/CodeGen/SystemZ/store_nonbytesized_vecs.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -60,8 +60,7 @@ define i16 @fun1(<16 x i1> %src)
; CHECK-NEXT: rosbg %r0, %r1, 62, 62, 1
; CHECK-NEXT: vlgvb %r1, %v24, 15
; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 0
; CHECK-NEXT: sth %r0, 160(%r15)
; CHECK-NEXT: lh %r2, 160(%r15)
; CHECK-NEXT: llhr %r2, %r0
; CHECK-NEXT: aghi %r15, 168
; CHECK-NEXT: br %r14
{
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/i386-shrink-wrapping.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,7 @@ target triple = "i386-apple-macosx10.5"
;
; CHECK-NEXT: L_e$non_lazy_ptr, [[E:%[a-z]+]]
; CHECK-NEXT: movb %dl, ([[E]])
; CHECK-NEXT: movsbl ([[E]]), [[CONV:%[a-z]+]]
; CHECK-NEXT: movzbl %dl, [[CONV:%[a-z]+]]
; CHECK-NEXT: movl $6, [[CONV:%[a-z]+]]
; The eflags is used in the next instruction.
; If that instruction disappear, we are not exercising the bug
Expand Down
1 change: 0 additions & 1 deletion llvm/test/CodeGen/X86/pr32108.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,6 @@
define void @pr32108() {
; CHECK-LABEL: pr32108:
; CHECK: # %bb.0: # %BB
; CHECK-NEXT: movb $0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB0_1: # %CF244
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
Expand Down
6 changes: 0 additions & 6 deletions llvm/test/CodeGen/X86/pr38533.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -19,8 +19,6 @@ define void @pr38533_2(half %x) {
; SSE-NEXT: pushq %rax
; SSE-NEXT: .cfi_def_cfa_offset 16
; SSE-NEXT: callq __gnu_f2h_ieee
; SSE-NEXT: movw %ax, {{[0-9]+}}(%rsp)
; SSE-NEXT: movzwl {{[0-9]+}}(%rsp), %eax
; SSE-NEXT: movw %ax, (%rax)
; SSE-NEXT: popq %rax
; SSE-NEXT: .cfi_def_cfa_offset 8
Expand All @@ -30,8 +28,6 @@ define void @pr38533_2(half %x) {
; AVX512: # %bb.0:
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vmovd %xmm0, %eax
; AVX512-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; AVX512-NEXT: movw %ax, (%rax)
; AVX512-NEXT: retq
%a = bitcast half %x to <4 x i4>
Expand All @@ -46,8 +42,6 @@ define void @pr38533_3(half %x) {
; SSE-NEXT: pushq %rax
; SSE-NEXT: .cfi_def_cfa_offset 16
; SSE-NEXT: callq __gnu_f2h_ieee
; SSE-NEXT: movw %ax, (%rsp)
; SSE-NEXT: movzwl (%rsp), %eax
; SSE-NEXT: movw %ax, (%rax)
; SSE-NEXT: popq %rax
; SSE-NEXT: .cfi_def_cfa_offset 8
Expand Down
5 changes: 3 additions & 2 deletions llvm/test/CodeGen/X86/win64_vararg.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -124,7 +124,8 @@ entry:
; CHECK: movq %rcx, %rax
; CHECK-DAG: movq %r9, 40(%rsp)
; CHECK-DAG: movq %r8, 32(%rsp)
; CHECK: movl 32(%rsp), %[[tmp:[^ ]*]]
; CHECK: movl %[[tmp]], (%rax)
; CHECK-DAG: leaq 36(%rsp), %[[sret:[^ ]*]]
; CHECK-DAG: movl %r8d, (%rax)
; CHECK-DAG: movq %[[sret]], (%rsp)
; CHECK: popq
; CHECK: retq