# RUN: llc -march=amdgcn -run-pass register-coalescer -o - %s | FileCheck --check-prefix=GCN %s

---
name:            regcoal-subrange-join-seg
alignment:       1
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
hasWinCFI:       false
callsEHReturn:   false
callsUnwindInit: false
hasEHCatchret:   false
hasEHScopes:     false
hasEHFunclets:   false
isOutlined:      false
debugInstrRef:   false
failsVerification: false
tracksDebugUserValues: false
registers:
  - { id: 0, class: sgpr_128, preferred-register: '' }
  - { id: 1, class: sgpr_128, preferred-register: '' }
  - { id: 2, class: sgpr_128, preferred-register: '' }
  - { id: 3, class: sgpr_128, preferred-register: '' }
  - { id: 4, class: sgpr_128, preferred-register: '' }
  - { id: 5, class: sgpr_128, preferred-register: '' }
  - { id: 6, class: sgpr_128, preferred-register: '' }
  - { id: 7, class: sgpr_128, preferred-register: '' }
  - { id: 8, class: sgpr_128, preferred-register: '' }
  - { id: 9, class: sreg_32_xm0, preferred-register: '' }
  - { id: 10, class: sreg_32_xm0, preferred-register: '' }
  - { id: 11, class: vgpr_32, preferred-register: '' }
  - { id: 12, class: vgpr_32, preferred-register: '' }
  - { id: 13, class: vgpr_32, preferred-register: '' }
  - { id: 14, class: sreg_32_xm0_xexec, preferred-register: '' }
  - { id: 15, class: sgpr_128, preferred-register: '' }
  - { id: 16, class: sreg_32, preferred-register: '' }
  - { id: 17, class: sreg_32_xm0, preferred-register: '' }
  - { id: 18, class: sreg_32_xm0, preferred-register: '' }
  - { id: 19, class: sreg_32_xm0, preferred-register: '' }
  - { id: 20, class: sreg_32_xm0, preferred-register: '' }
  - { id: 21, class: sreg_32_xm0_xexec, preferred-register: '' }
  - { id: 22, class: sgpr_128, preferred-register: '' }
  - { id: 23, class: sreg_32_xm0, preferred-register: '' }
  - { id: 24, class: vgpr_32, preferred-register: '' }
  - { id: 25, class: sreg_64_xexec, preferred-register: '' }
  - { id: 26, class: vgpr_32, preferred-register: '' }
  - { id: 27, class: sreg_32_xm0, preferred-register: '' }
  - { id: 28, class: sreg_32, preferred-register: '' }
  - { id: 29, class: sgpr_128, preferred-register: '' }
  - { id: 30, class: sreg_32_xm0, preferred-register: '' }
  - { id: 31, class: sreg_32_xm0, preferred-register: '' }
  - { id: 32, class: vgpr_32, preferred-register: '' }
  - { id: 33, class: vgpr_32, preferred-register: '' }
  - { id: 34, class: vgpr_32, preferred-register: '' }
  - { id: 35, class: vgpr_32, preferred-register: '' }
  - { id: 36, class: vgpr_32, preferred-register: '' }
  - { id: 37, class: vgpr_32, preferred-register: '' }
  - { id: 38, class: vgpr_32, preferred-register: '' }
  - { id: 39, class: vgpr_32, preferred-register: '' }
  - { id: 40, class: vgpr_32, preferred-register: '' }
  - { id: 41, class: vgpr_32, preferred-register: '' }
  - { id: 42, class: vgpr_32, preferred-register: '' }
  - { id: 43, class: vgpr_32, preferred-register: '' }
  - { id: 44, class: vgpr_32, preferred-register: '' }
  - { id: 45, class: vgpr_32, preferred-register: '' }
  - { id: 46, class: vgpr_32, preferred-register: '' }
  - { id: 47, class: vgpr_32, preferred-register: '' }
  - { id: 48, class: vgpr_32, preferred-register: '' }
  - { id: 49, class: vreg_128, preferred-register: '' }
  - { id: 50, class: vreg_128, preferred-register: '' }
  - { id: 51, class: vreg_128, preferred-register: '' }
  - { id: 52, class: vreg_128, preferred-register: '' }
  - { id: 53, class: vreg_128, preferred-register: '' }
  - { id: 54, class: vreg_128, preferred-register: '' }
  - { id: 55, class: vgpr_32, preferred-register: '' }
  - { id: 56, class: vreg_128, preferred-register: '' }
  - { id: 57, class: vreg_128, preferred-register: '' }
  - { id: 58, class: vreg_128, preferred-register: '' }
  - { id: 59, class: vreg_128, preferred-register: '' }
  - { id: 60, class: vreg_128, preferred-register: '' }
  - { id: 61, class: vreg_128, preferred-register: '' }
  - { id: 62, class: vreg_128, preferred-register: '' }
  - { id: 63, class: vreg_128, preferred-register: '' }
liveins:         []
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  functionContext: ''
  maxCallFrameSize: 4294967295
  cvBytesOfCalleeSavedRegisters: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  hasTailCall:     false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:      []
stack:           []
entry_values:    []
callSites:       []
debugValueSubstitutions: []
constants:       []
machineFunctionInfo:
  explicitKernArgSize: 0
  maxKernArgAlign: 1
  ldsSize:         0
  gdsSize:         0
  dynLDSAlign:     1
  isEntryFunction: false
  noSignedZerosFPMath: false
  memoryBound:     false
  waveLimiter:     false
  hasSpilledSGPRs: false
  hasSpilledVGPRs: false
  scratchRSrcReg:  '$private_rsrc_reg'
  frameOffsetReg:  '$fp_reg'
  stackPtrOffsetReg: '$sp_reg'
  bytesInStackArgArea: 0
  returnsVoid:     true
  psInputAddr:     0
  psInputEnable:   0
  mode:
    ieee:            true
    dx10-clamp:      true
    fp32-input-denormals: true
    fp32-output-denormals: true
    fp64-fp16-input-denormals: true
    fp64-fp16-output-denormals: true
  highBitsOf32BitAddress: 0
  occupancy:       10
  vgprForAGPRCopy: ''
  sgprForEXECCopy: ''
  longBranchReservedReg: ''
body:             |
  bb.0:
    successors: %bb.6(0x40000000), %bb.1(0x40000000)

    S_CBRANCH_SCC1 %bb.6, implicit undef $scc
    S_BRANCH %bb.1

  bb.1:
    successors: %bb.4(0x40000000), %bb.2(0x40000000)

    S_CBRANCH_SCC1 %bb.4, implicit undef $scc
    S_BRANCH %bb.2

  bb.2:
    successors: %bb.4(0x40000000), %bb.3(0x40000000)

    S_CBRANCH_SCC1 %bb.4, implicit undef $scc
    S_BRANCH %bb.3

  bb.3:
    successors: %bb.4(0x80000000)


  bb.4:
    successors: %bb.5(0x40000000), %bb.6(0x40000000)

    S_CBRANCH_SCC1 %bb.6, implicit undef $scc
    S_BRANCH %bb.5

  bb.5:
    successors: %bb.6(0x80000000)


  bb.6:
    successors: %bb.14(0x40000000), %bb.7(0x40000000)

    S_CBRANCH_SCC1 %bb.14, implicit undef $scc
    S_BRANCH %bb.7

  bb.7:
    successors: %bb.9(0x40000000), %bb.8(0x40000000)

    S_CBRANCH_SCC1 %bb.9, implicit undef $scc
    S_BRANCH %bb.8

  bb.8:
    successors: %bb.9(0x80000000)


  bb.9:
    successors: %bb.10(0x40000000), %bb.13(0x40000000)

    S_CBRANCH_SCC1 %bb.13, implicit undef $scc
    S_BRANCH %bb.10

  bb.10:
    successors: %bb.12(0x40000000), %bb.11(0x40000000)

    S_CBRANCH_SCC1 %bb.12, implicit undef $scc
    S_BRANCH %bb.11

  bb.11:
    successors: %bb.12(0x80000000)


  bb.12:
    successors: %bb.13(0x80000000)


  bb.13:
    successors: %bb.14(0x80000000)


  bb.14:
    successors: %bb.26(0x40000000), %bb.15(0x40000000)

    S_CBRANCH_SCC1 %bb.26, implicit undef $scc
    S_BRANCH %bb.15

  bb.15:
    successors: %bb.20(0x40000000), %bb.16(0x40000000)

    S_CBRANCH_SCC1 %bb.20, implicit undef $scc
    S_BRANCH %bb.16

  bb.16:
    successors: %bb.17(0x40000000), %bb.19(0x40000000)

    S_CBRANCH_SCC1 %bb.19, implicit undef $scc
    S_BRANCH %bb.17

  bb.17:
    successors: %bb.18(0x40000000), %bb.19(0x40000000)

    S_CBRANCH_SCC1 %bb.19, implicit undef $scc
    S_BRANCH %bb.18

  bb.18:
    successors: %bb.19(0x80000000)


  bb.19:
    successors: %bb.20(0x80000000)


  bb.20:
    successors: %bb.25(0x40000000), %bb.21(0x40000000)

    S_CBRANCH_SCC1 %bb.25, implicit undef $scc
    S_BRANCH %bb.21

  bb.21:
    successors: %bb.22(0x40000000), %bb.24(0x40000000)

    S_CBRANCH_SCC1 %bb.24, implicit undef $scc
    S_BRANCH %bb.22

  bb.22:
    successors: %bb.23(0x40000000), %bb.24(0x40000000)

    S_CBRANCH_SCC1 %bb.24, implicit undef $scc
    S_BRANCH %bb.23

  bb.23:
    successors: %bb.24(0x80000000)


  bb.24:
    successors: %bb.25(0x80000000)


  bb.25:
    successors: %bb.26(0x80000000)


  bb.26:
    successors: %bb.36(0x40000000), %bb.27(0x40000000)

    S_CBRANCH_SCC1 %bb.36, implicit undef $scc
    S_BRANCH %bb.27

  bb.27:
    successors: %bb.33(0x40000000), %bb.28(0x40000000)

    S_CBRANCH_SCC1 %bb.33, implicit undef $scc
    S_BRANCH %bb.28

  bb.28:
    successors: %bb.29(0x80000000)

    %9:sreg_32_xm0 = S_FF1_I32_B32 undef %10:sreg_32_xm0
    %13:vgpr_32 = V_MAD_U32_U24_e64 killed %9, 48, 32, 0, implicit $exec
    %45:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN killed %13, undef %15:sgpr_128, 0, 0, 0, 0, implicit $exec :: (dereferenceable invariant load (s32))
    %46:vgpr_32 = V_AND_B32_e32 1, killed %45, implicit $exec
    %21:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR undef %22:sgpr_128, undef %23:sreg_32_xm0, 0 :: (dereferenceable invariant load (s32))
    %25:sreg_64_xexec = V_CMP_GE_F32_e64 0, 0, 0, killed %21, 0, implicit $mode, implicit $exec
    %26:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, -1, killed %25, implicit $exec
    %62:vreg_128 = IMPLICIT_DEF

  bb.29:
    successors: %bb.31(0x30000000), %bb.30(0x50000000)

    %53:vreg_128 = COPY killed %62
    %47:vgpr_32 = V_ADD_U32_e32 -1, %46, implicit-def dead $vcc, implicit $exec
    %48:vgpr_32 = V_OR_B32_e32 killed %47, %26, implicit $exec
    %49:vreg_128 = COPY %53
    %49.sub2:vreg_128 = COPY undef %48
    %51:vreg_128 = COPY killed %49
    %51.sub3:vreg_128 = COPY undef %26
    V_CMP_NE_U32_e32 0, killed %48, implicit-def $vcc, implicit $exec
    $vcc = S_AND_B64 $exec, killed $vcc, implicit-def dead $scc
    S_CBRANCH_VCCZ %bb.31, implicit killed $vcc

  bb.30:
    successors: %bb.32(0x80000000)

    %63:vreg_128 = COPY killed %51
    S_BRANCH %bb.32

  bb.31:
    successors: %bb.32(0x80000000)

    %33:vgpr_32 = V_MAD_F32_e64 1, killed %53.sub0, 0, undef %34:vgpr_32, 0, 0, 0, 0, implicit $mode, implicit $exec
    %35:vgpr_32 = V_MAC_F32_e32 killed %33, undef %36:vgpr_32, undef %35, implicit $mode, implicit $exec
    %38:vgpr_32 = V_MAX_F32_e32 0, killed %35, implicit $mode, implicit $exec
    %39:vgpr_32 = V_LOG_F32_e32 killed %38, implicit $mode, implicit $exec
    %40:vgpr_32 = V_MUL_F32_e32 killed %39, undef %41:vgpr_32, implicit $mode, implicit $exec
    %42:vgpr_32 = V_EXP_F32_e32 killed %40, implicit $mode, implicit $exec
    dead %43:vgpr_32 = V_MUL_F32_e32 killed %42, undef %44:vgpr_32, implicit $mode, implicit $exec
    %63:vreg_128 = COPY killed %51

  bb.32:
    successors: %bb.29(0x80000000)

    %52:vreg_128 = COPY killed %63
    %62:vreg_128 = COPY killed %52
    S_BRANCH %bb.29

  bb.33:
    successors: %bb.35(0x40000000), %bb.34(0x40000000)

    S_CBRANCH_SCC1 %bb.35, implicit undef $scc
    S_BRANCH %bb.34

  bb.34:
    successors: %bb.35(0x80000000)


  bb.35:
    successors: %bb.36(0x80000000)


  bb.36:
    S_ENDPGM 0

...